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[deliverable/linux.git] / drivers / char / pcmcia / synclink_cs.c
1 /*
2 * linux/drivers/char/pcmcia/synclink_cs.c
3 *
4 * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
5 *
6 * Device driver for Microgate SyncLink PC Card
7 * multiprotocol serial adapter.
8 *
9 * written by Paul Fulghum for Microgate Corporation
10 * paulkf@microgate.com
11 *
12 * Microgate and SyncLink are trademarks of Microgate Corporation
13 *
14 * This code is released under the GNU General Public License (GPL)
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
30 #if defined(__i386__)
31 # define BREAKPOINT() asm(" int $3");
32 #else
33 # define BREAKPOINT() { }
34 #endif
35
36 #define MAX_DEVICE_COUNT 4
37
38 #include <linux/module.h>
39 #include <linux/errno.h>
40 #include <linux/signal.h>
41 #include <linux/sched.h>
42 #include <linux/timer.h>
43 #include <linux/time.h>
44 #include <linux/interrupt.h>
45 #include <linux/pci.h>
46 #include <linux/tty.h>
47 #include <linux/tty_flip.h>
48 #include <linux/serial.h>
49 #include <linux/major.h>
50 #include <linux/string.h>
51 #include <linux/fcntl.h>
52 #include <linux/ptrace.h>
53 #include <linux/ioport.h>
54 #include <linux/mm.h>
55 #include <linux/slab.h>
56 #include <linux/netdevice.h>
57 #include <linux/vmalloc.h>
58 #include <linux/init.h>
59 #include <linux/delay.h>
60 #include <linux/ioctl.h>
61
62 #include <asm/system.h>
63 #include <asm/io.h>
64 #include <asm/irq.h>
65 #include <asm/dma.h>
66 #include <linux/bitops.h>
67 #include <asm/types.h>
68 #include <linux/termios.h>
69 #include <linux/workqueue.h>
70 #include <linux/hdlc.h>
71
72 #include <pcmcia/cs_types.h>
73 #include <pcmcia/cs.h>
74 #include <pcmcia/cistpl.h>
75 #include <pcmcia/cisreg.h>
76 #include <pcmcia/ds.h>
77
78 #ifdef CONFIG_HDLC_MODULE
79 #define CONFIG_HDLC 1
80 #endif
81
82 #define GET_USER(error,value,addr) error = get_user(value,addr)
83 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
84 #define PUT_USER(error,value,addr) error = put_user(value,addr)
85 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
86
87 #include <asm/uaccess.h>
88
89 #include "linux/synclink.h"
90
91 static MGSL_PARAMS default_params = {
92 MGSL_MODE_HDLC, /* unsigned long mode */
93 0, /* unsigned char loopback; */
94 HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
95 HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
96 0, /* unsigned long clock_speed; */
97 0xff, /* unsigned char addr_filter; */
98 HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
99 HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
100 HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
101 9600, /* unsigned long data_rate; */
102 8, /* unsigned char data_bits; */
103 1, /* unsigned char stop_bits; */
104 ASYNC_PARITY_NONE /* unsigned char parity; */
105 };
106
107 typedef struct
108 {
109 int count;
110 unsigned char status;
111 char data[1];
112 } RXBUF;
113
114 /* The queue of BH actions to be performed */
115
116 #define BH_RECEIVE 1
117 #define BH_TRANSMIT 2
118 #define BH_STATUS 4
119
120 #define IO_PIN_SHUTDOWN_LIMIT 100
121
122 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
123
124 struct _input_signal_events {
125 int ri_up;
126 int ri_down;
127 int dsr_up;
128 int dsr_down;
129 int dcd_up;
130 int dcd_down;
131 int cts_up;
132 int cts_down;
133 };
134
135
136 /*
137 * Device instance data structure
138 */
139
140 typedef struct _mgslpc_info {
141 void *if_ptr; /* General purpose pointer (used by SPPP) */
142 int magic;
143 int flags;
144 int count; /* count of opens */
145 int line;
146 unsigned short close_delay;
147 unsigned short closing_wait; /* time to wait before closing */
148
149 struct mgsl_icount icount;
150
151 struct tty_struct *tty;
152 int timeout;
153 int x_char; /* xon/xoff character */
154 int blocked_open; /* # of blocked opens */
155 unsigned char read_status_mask;
156 unsigned char ignore_status_mask;
157
158 unsigned char *tx_buf;
159 int tx_put;
160 int tx_get;
161 int tx_count;
162
163 /* circular list of fixed length rx buffers */
164
165 unsigned char *rx_buf; /* memory allocated for all rx buffers */
166 int rx_buf_total_size; /* size of memory allocated for rx buffers */
167 int rx_put; /* index of next empty rx buffer */
168 int rx_get; /* index of next full rx buffer */
169 int rx_buf_size; /* size in bytes of single rx buffer */
170 int rx_buf_count; /* total number of rx buffers */
171 int rx_frame_count; /* number of full rx buffers */
172
173 wait_queue_head_t open_wait;
174 wait_queue_head_t close_wait;
175
176 wait_queue_head_t status_event_wait_q;
177 wait_queue_head_t event_wait_q;
178 struct timer_list tx_timer; /* HDLC transmit timeout timer */
179 struct _mgslpc_info *next_device; /* device list link */
180
181 unsigned short imra_value;
182 unsigned short imrb_value;
183 unsigned char pim_value;
184
185 spinlock_t lock;
186 struct work_struct task; /* task structure for scheduling bh */
187
188 u32 max_frame_size;
189
190 u32 pending_bh;
191
192 int bh_running;
193 int bh_requested;
194
195 int dcd_chkcount; /* check counts to prevent */
196 int cts_chkcount; /* too many IRQs if a signal */
197 int dsr_chkcount; /* is floating */
198 int ri_chkcount;
199
200 int rx_enabled;
201 int rx_overflow;
202
203 int tx_enabled;
204 int tx_active;
205 int tx_aborting;
206 u32 idle_mode;
207
208 int if_mode; /* serial interface selection (RS-232, v.35 etc) */
209
210 char device_name[25]; /* device instance name */
211
212 unsigned int io_base; /* base I/O address of adapter */
213 unsigned int irq_level;
214
215 MGSL_PARAMS params; /* communications parameters */
216
217 unsigned char serial_signals; /* current serial signal states */
218
219 char irq_occurred; /* for diagnostics use */
220 char testing_irq;
221 unsigned int init_error; /* startup error (DIAGS) */
222
223 char flag_buf[MAX_ASYNC_BUFFER_SIZE];
224 BOOLEAN drop_rts_on_tx_done;
225
226 struct _input_signal_events input_signal_events;
227
228 /* PCMCIA support */
229 struct pcmcia_device *p_dev;
230 dev_node_t node;
231 int stop;
232
233 /* SPPP/Cisco HDLC device parts */
234 int netcount;
235 int dosyncppp;
236 spinlock_t netlock;
237
238 #ifdef CONFIG_HDLC
239 struct net_device *netdev;
240 #endif
241
242 } MGSLPC_INFO;
243
244 #define MGSLPC_MAGIC 0x5402
245
246 /*
247 * The size of the serial xmit buffer is 1 page, or 4096 bytes
248 */
249 #define TXBUFSIZE 4096
250
251
252 #define CHA 0x00 /* channel A offset */
253 #define CHB 0x40 /* channel B offset */
254
255 /*
256 * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
257 */
258 #undef PVR
259
260 #define RXFIFO 0
261 #define TXFIFO 0
262 #define STAR 0x20
263 #define CMDR 0x20
264 #define RSTA 0x21
265 #define PRE 0x21
266 #define MODE 0x22
267 #define TIMR 0x23
268 #define XAD1 0x24
269 #define XAD2 0x25
270 #define RAH1 0x26
271 #define RAH2 0x27
272 #define DAFO 0x27
273 #define RAL1 0x28
274 #define RFC 0x28
275 #define RHCR 0x29
276 #define RAL2 0x29
277 #define RBCL 0x2a
278 #define XBCL 0x2a
279 #define RBCH 0x2b
280 #define XBCH 0x2b
281 #define CCR0 0x2c
282 #define CCR1 0x2d
283 #define CCR2 0x2e
284 #define CCR3 0x2f
285 #define VSTR 0x34
286 #define BGR 0x34
287 #define RLCR 0x35
288 #define AML 0x36
289 #define AMH 0x37
290 #define GIS 0x38
291 #define IVA 0x38
292 #define IPC 0x39
293 #define ISR 0x3a
294 #define IMR 0x3a
295 #define PVR 0x3c
296 #define PIS 0x3d
297 #define PIM 0x3d
298 #define PCR 0x3e
299 #define CCR4 0x3f
300
301 // IMR/ISR
302
303 #define IRQ_BREAK_ON BIT15 // rx break detected
304 #define IRQ_DATAOVERRUN BIT14 // receive data overflow
305 #define IRQ_ALLSENT BIT13 // all sent
306 #define IRQ_UNDERRUN BIT12 // transmit data underrun
307 #define IRQ_TIMER BIT11 // timer interrupt
308 #define IRQ_CTS BIT10 // CTS status change
309 #define IRQ_TXREPEAT BIT9 // tx message repeat
310 #define IRQ_TXFIFO BIT8 // transmit pool ready
311 #define IRQ_RXEOM BIT7 // receive message end
312 #define IRQ_EXITHUNT BIT6 // receive frame start
313 #define IRQ_RXTIME BIT6 // rx char timeout
314 #define IRQ_DCD BIT2 // carrier detect status change
315 #define IRQ_OVERRUN BIT1 // receive frame overflow
316 #define IRQ_RXFIFO BIT0 // receive pool full
317
318 // STAR
319
320 #define XFW BIT6 // transmit FIFO write enable
321 #define CEC BIT2 // command executing
322 #define CTS BIT1 // CTS state
323
324 #define PVR_DTR BIT0
325 #define PVR_DSR BIT1
326 #define PVR_RI BIT2
327 #define PVR_AUTOCTS BIT3
328 #define PVR_RS232 0x20 /* 0010b */
329 #define PVR_V35 0xe0 /* 1110b */
330 #define PVR_RS422 0x40 /* 0100b */
331
332 /* Register access functions */
333
334 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
335 #define read_reg(info, reg) inb((info)->io_base + (reg))
336
337 #define read_reg16(info, reg) inw((info)->io_base + (reg))
338 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
339
340 #define set_reg_bits(info, reg, mask) \
341 write_reg(info, (reg), \
342 (unsigned char) (read_reg(info, (reg)) | (mask)))
343 #define clear_reg_bits(info, reg, mask) \
344 write_reg(info, (reg), \
345 (unsigned char) (read_reg(info, (reg)) & ~(mask)))
346 /*
347 * interrupt enable/disable routines
348 */
349 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
350 {
351 if (channel == CHA) {
352 info->imra_value |= mask;
353 write_reg16(info, CHA + IMR, info->imra_value);
354 } else {
355 info->imrb_value |= mask;
356 write_reg16(info, CHB + IMR, info->imrb_value);
357 }
358 }
359 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
360 {
361 if (channel == CHA) {
362 info->imra_value &= ~mask;
363 write_reg16(info, CHA + IMR, info->imra_value);
364 } else {
365 info->imrb_value &= ~mask;
366 write_reg16(info, CHB + IMR, info->imrb_value);
367 }
368 }
369
370 #define port_irq_disable(info, mask) \
371 { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
372
373 #define port_irq_enable(info, mask) \
374 { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
375
376 static void rx_start(MGSLPC_INFO *info);
377 static void rx_stop(MGSLPC_INFO *info);
378
379 static void tx_start(MGSLPC_INFO *info);
380 static void tx_stop(MGSLPC_INFO *info);
381 static void tx_set_idle(MGSLPC_INFO *info);
382
383 static void get_signals(MGSLPC_INFO *info);
384 static void set_signals(MGSLPC_INFO *info);
385
386 static void reset_device(MGSLPC_INFO *info);
387
388 static void hdlc_mode(MGSLPC_INFO *info);
389 static void async_mode(MGSLPC_INFO *info);
390
391 static void tx_timeout(unsigned long context);
392
393 static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
394
395 #ifdef CONFIG_HDLC
396 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
397 static void hdlcdev_tx_done(MGSLPC_INFO *info);
398 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
399 static int hdlcdev_init(MGSLPC_INFO *info);
400 static void hdlcdev_exit(MGSLPC_INFO *info);
401 #endif
402
403 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
404
405 static BOOLEAN register_test(MGSLPC_INFO *info);
406 static BOOLEAN irq_test(MGSLPC_INFO *info);
407 static int adapter_test(MGSLPC_INFO *info);
408
409 static int claim_resources(MGSLPC_INFO *info);
410 static void release_resources(MGSLPC_INFO *info);
411 static void mgslpc_add_device(MGSLPC_INFO *info);
412 static void mgslpc_remove_device(MGSLPC_INFO *info);
413
414 static int rx_get_frame(MGSLPC_INFO *info);
415 static void rx_reset_buffers(MGSLPC_INFO *info);
416 static int rx_alloc_buffers(MGSLPC_INFO *info);
417 static void rx_free_buffers(MGSLPC_INFO *info);
418
419 static irqreturn_t mgslpc_isr(int irq, void *dev_id);
420
421 /*
422 * Bottom half interrupt handlers
423 */
424 static void bh_handler(struct work_struct *work);
425 static void bh_transmit(MGSLPC_INFO *info);
426 static void bh_status(MGSLPC_INFO *info);
427
428 /*
429 * ioctl handlers
430 */
431 static int tiocmget(struct tty_struct *tty, struct file *file);
432 static int tiocmset(struct tty_struct *tty, struct file *file,
433 unsigned int set, unsigned int clear);
434 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
435 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
436 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
437 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
438 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
439 static int set_txenable(MGSLPC_INFO *info, int enable);
440 static int tx_abort(MGSLPC_INFO *info);
441 static int set_rxenable(MGSLPC_INFO *info, int enable);
442 static int wait_events(MGSLPC_INFO *info, int __user *mask);
443
444 static MGSLPC_INFO *mgslpc_device_list = NULL;
445 static int mgslpc_device_count = 0;
446
447 /*
448 * Set this param to non-zero to load eax with the
449 * .text section address and breakpoint on module load.
450 * This is useful for use with gdb and add-symbol-file command.
451 */
452 static int break_on_load=0;
453
454 /*
455 * Driver major number, defaults to zero to get auto
456 * assigned major number. May be forced as module parameter.
457 */
458 static int ttymajor=0;
459
460 static int debug_level = 0;
461 static int maxframe[MAX_DEVICE_COUNT] = {0,};
462 static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
463
464 module_param(break_on_load, bool, 0);
465 module_param(ttymajor, int, 0);
466 module_param(debug_level, int, 0);
467 module_param_array(maxframe, int, NULL, 0);
468 module_param_array(dosyncppp, int, NULL, 0);
469
470 MODULE_LICENSE("GPL");
471
472 static char *driver_name = "SyncLink PC Card driver";
473 static char *driver_version = "$Revision: 4.34 $";
474
475 static struct tty_driver *serial_driver;
476
477 /* number of characters left in xmit buffer before we ask for more */
478 #define WAKEUP_CHARS 256
479
480 static void mgslpc_change_params(MGSLPC_INFO *info);
481 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
482
483 /* PCMCIA prototypes */
484
485 static int mgslpc_config(struct pcmcia_device *link);
486 static void mgslpc_release(u_long arg);
487 static void mgslpc_detach(struct pcmcia_device *p_dev);
488
489 /*
490 * 1st function defined in .text section. Calling this function in
491 * init_module() followed by a breakpoint allows a remote debugger
492 * (gdb) to get the .text address for the add-symbol-file command.
493 * This allows remote debugging of dynamically loadable modules.
494 */
495 static void* mgslpc_get_text_ptr(void)
496 {
497 return mgslpc_get_text_ptr;
498 }
499
500 /**
501 * line discipline callback wrappers
502 *
503 * The wrappers maintain line discipline references
504 * while calling into the line discipline.
505 *
506 * ldisc_flush_buffer - flush line discipline receive buffers
507 * ldisc_receive_buf - pass receive data to line discipline
508 */
509
510 static void ldisc_flush_buffer(struct tty_struct *tty)
511 {
512 struct tty_ldisc *ld = tty_ldisc_ref(tty);
513 if (ld) {
514 if (ld->flush_buffer)
515 ld->flush_buffer(tty);
516 tty_ldisc_deref(ld);
517 }
518 }
519
520 static void ldisc_receive_buf(struct tty_struct *tty,
521 const __u8 *data, char *flags, int count)
522 {
523 struct tty_ldisc *ld;
524 if (!tty)
525 return;
526 ld = tty_ldisc_ref(tty);
527 if (ld) {
528 if (ld->receive_buf)
529 ld->receive_buf(tty, data, flags, count);
530 tty_ldisc_deref(ld);
531 }
532 }
533
534 static int mgslpc_probe(struct pcmcia_device *link)
535 {
536 MGSLPC_INFO *info;
537 int ret;
538
539 if (debug_level >= DEBUG_LEVEL_INFO)
540 printk("mgslpc_attach\n");
541
542 info = (MGSLPC_INFO *)kmalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
543 if (!info) {
544 printk("Error can't allocate device instance data\n");
545 return -ENOMEM;
546 }
547
548 memset(info, 0, sizeof(MGSLPC_INFO));
549 info->magic = MGSLPC_MAGIC;
550 INIT_WORK(&info->task, bh_handler);
551 info->max_frame_size = 4096;
552 info->close_delay = 5*HZ/10;
553 info->closing_wait = 30*HZ;
554 init_waitqueue_head(&info->open_wait);
555 init_waitqueue_head(&info->close_wait);
556 init_waitqueue_head(&info->status_event_wait_q);
557 init_waitqueue_head(&info->event_wait_q);
558 spin_lock_init(&info->lock);
559 spin_lock_init(&info->netlock);
560 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
561 info->idle_mode = HDLC_TXIDLE_FLAGS;
562 info->imra_value = 0xffff;
563 info->imrb_value = 0xffff;
564 info->pim_value = 0xff;
565
566 info->p_dev = link;
567 link->priv = info;
568
569 /* Initialize the struct pcmcia_device structure */
570
571 /* Interrupt setup */
572 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
573 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
574 link->irq.Handler = NULL;
575
576 link->conf.Attributes = 0;
577 link->conf.IntType = INT_MEMORY_AND_IO;
578
579 ret = mgslpc_config(link);
580 if (ret)
581 return ret;
582
583 mgslpc_add_device(info);
584
585 return 0;
586 }
587
588 /* Card has been inserted.
589 */
590
591 #define CS_CHECK(fn, ret) \
592 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
593
594 static int mgslpc_config(struct pcmcia_device *link)
595 {
596 MGSLPC_INFO *info = link->priv;
597 tuple_t tuple;
598 cisparse_t parse;
599 int last_fn, last_ret;
600 u_char buf[64];
601 cistpl_cftable_entry_t dflt = { 0 };
602 cistpl_cftable_entry_t *cfg;
603
604 if (debug_level >= DEBUG_LEVEL_INFO)
605 printk("mgslpc_config(0x%p)\n", link);
606
607 /* read CONFIG tuple to find its configuration registers */
608 tuple.DesiredTuple = CISTPL_CONFIG;
609 tuple.Attributes = 0;
610 tuple.TupleData = buf;
611 tuple.TupleDataMax = sizeof(buf);
612 tuple.TupleOffset = 0;
613 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
614 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
615 CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
616 link->conf.ConfigBase = parse.config.base;
617 link->conf.Present = parse.config.rmask[0];
618
619 /* get CIS configuration entry */
620
621 tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
622 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
623
624 cfg = &(parse.cftable_entry);
625 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
626 CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
627
628 if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
629 if (cfg->index == 0)
630 goto cs_failed;
631
632 link->conf.ConfigIndex = cfg->index;
633 link->conf.Attributes |= CONF_ENABLE_IRQ;
634
635 /* IO window settings */
636 link->io.NumPorts1 = 0;
637 if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
638 cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
639 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
640 if (!(io->flags & CISTPL_IO_8BIT))
641 link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
642 if (!(io->flags & CISTPL_IO_16BIT))
643 link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
644 link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
645 link->io.BasePort1 = io->win[0].base;
646 link->io.NumPorts1 = io->win[0].len;
647 CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
648 }
649
650 link->conf.Attributes = CONF_ENABLE_IRQ;
651 link->conf.IntType = INT_MEMORY_AND_IO;
652 link->conf.ConfigIndex = 8;
653 link->conf.Present = PRESENT_OPTION;
654
655 link->irq.Attributes |= IRQ_HANDLE_PRESENT;
656 link->irq.Handler = mgslpc_isr;
657 link->irq.Instance = info;
658 CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
659
660 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
661
662 info->io_base = link->io.BasePort1;
663 info->irq_level = link->irq.AssignedIRQ;
664
665 /* add to linked list of devices */
666 sprintf(info->node.dev_name, "mgslpc0");
667 info->node.major = info->node.minor = 0;
668 link->dev_node = &info->node;
669
670 printk(KERN_INFO "%s: index 0x%02x:",
671 info->node.dev_name, link->conf.ConfigIndex);
672 if (link->conf.Attributes & CONF_ENABLE_IRQ)
673 printk(", irq %d", link->irq.AssignedIRQ);
674 if (link->io.NumPorts1)
675 printk(", io 0x%04x-0x%04x", link->io.BasePort1,
676 link->io.BasePort1+link->io.NumPorts1-1);
677 printk("\n");
678 return 0;
679
680 cs_failed:
681 cs_error(link, last_fn, last_ret);
682 mgslpc_release((u_long)link);
683 return -ENODEV;
684 }
685
686 /* Card has been removed.
687 * Unregister device and release PCMCIA configuration.
688 * If device is open, postpone until it is closed.
689 */
690 static void mgslpc_release(u_long arg)
691 {
692 struct pcmcia_device *link = (struct pcmcia_device *)arg;
693
694 if (debug_level >= DEBUG_LEVEL_INFO)
695 printk("mgslpc_release(0x%p)\n", link);
696
697 pcmcia_disable_device(link);
698 }
699
700 static void mgslpc_detach(struct pcmcia_device *link)
701 {
702 if (debug_level >= DEBUG_LEVEL_INFO)
703 printk("mgslpc_detach(0x%p)\n", link);
704
705 ((MGSLPC_INFO *)link->priv)->stop = 1;
706 mgslpc_release((u_long)link);
707
708 mgslpc_remove_device((MGSLPC_INFO *)link->priv);
709 }
710
711 static int mgslpc_suspend(struct pcmcia_device *link)
712 {
713 MGSLPC_INFO *info = link->priv;
714
715 info->stop = 1;
716
717 return 0;
718 }
719
720 static int mgslpc_resume(struct pcmcia_device *link)
721 {
722 MGSLPC_INFO *info = link->priv;
723
724 info->stop = 0;
725
726 return 0;
727 }
728
729
730 static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
731 char *name, const char *routine)
732 {
733 #ifdef MGSLPC_PARANOIA_CHECK
734 static const char *badmagic =
735 "Warning: bad magic number for mgsl struct (%s) in %s\n";
736 static const char *badinfo =
737 "Warning: null mgslpc_info for (%s) in %s\n";
738
739 if (!info) {
740 printk(badinfo, name, routine);
741 return 1;
742 }
743 if (info->magic != MGSLPC_MAGIC) {
744 printk(badmagic, name, routine);
745 return 1;
746 }
747 #else
748 if (!info)
749 return 1;
750 #endif
751 return 0;
752 }
753
754
755 #define CMD_RXFIFO BIT7 // release current rx FIFO
756 #define CMD_RXRESET BIT6 // receiver reset
757 #define CMD_RXFIFO_READ BIT5
758 #define CMD_START_TIMER BIT4
759 #define CMD_TXFIFO BIT3 // release current tx FIFO
760 #define CMD_TXEOM BIT1 // transmit end message
761 #define CMD_TXRESET BIT0 // transmit reset
762
763 static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
764 {
765 int i = 0;
766 /* wait for command completion */
767 while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
768 udelay(1);
769 if (i++ == 1000)
770 return FALSE;
771 }
772 return TRUE;
773 }
774
775 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
776 {
777 wait_command_complete(info, channel);
778 write_reg(info, (unsigned char) (channel + CMDR), cmd);
779 }
780
781 static void tx_pause(struct tty_struct *tty)
782 {
783 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
784 unsigned long flags;
785
786 if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
787 return;
788 if (debug_level >= DEBUG_LEVEL_INFO)
789 printk("tx_pause(%s)\n",info->device_name);
790
791 spin_lock_irqsave(&info->lock,flags);
792 if (info->tx_enabled)
793 tx_stop(info);
794 spin_unlock_irqrestore(&info->lock,flags);
795 }
796
797 static void tx_release(struct tty_struct *tty)
798 {
799 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
800 unsigned long flags;
801
802 if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
803 return;
804 if (debug_level >= DEBUG_LEVEL_INFO)
805 printk("tx_release(%s)\n",info->device_name);
806
807 spin_lock_irqsave(&info->lock,flags);
808 if (!info->tx_enabled)
809 tx_start(info);
810 spin_unlock_irqrestore(&info->lock,flags);
811 }
812
813 /* Return next bottom half action to perform.
814 * or 0 if nothing to do.
815 */
816 static int bh_action(MGSLPC_INFO *info)
817 {
818 unsigned long flags;
819 int rc = 0;
820
821 spin_lock_irqsave(&info->lock,flags);
822
823 if (info->pending_bh & BH_RECEIVE) {
824 info->pending_bh &= ~BH_RECEIVE;
825 rc = BH_RECEIVE;
826 } else if (info->pending_bh & BH_TRANSMIT) {
827 info->pending_bh &= ~BH_TRANSMIT;
828 rc = BH_TRANSMIT;
829 } else if (info->pending_bh & BH_STATUS) {
830 info->pending_bh &= ~BH_STATUS;
831 rc = BH_STATUS;
832 }
833
834 if (!rc) {
835 /* Mark BH routine as complete */
836 info->bh_running = 0;
837 info->bh_requested = 0;
838 }
839
840 spin_unlock_irqrestore(&info->lock,flags);
841
842 return rc;
843 }
844
845 static void bh_handler(struct work_struct *work)
846 {
847 MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
848 int action;
849
850 if (!info)
851 return;
852
853 if (debug_level >= DEBUG_LEVEL_BH)
854 printk( "%s(%d):bh_handler(%s) entry\n",
855 __FILE__,__LINE__,info->device_name);
856
857 info->bh_running = 1;
858
859 while((action = bh_action(info)) != 0) {
860
861 /* Process work item */
862 if ( debug_level >= DEBUG_LEVEL_BH )
863 printk( "%s(%d):bh_handler() work item action=%d\n",
864 __FILE__,__LINE__,action);
865
866 switch (action) {
867
868 case BH_RECEIVE:
869 while(rx_get_frame(info));
870 break;
871 case BH_TRANSMIT:
872 bh_transmit(info);
873 break;
874 case BH_STATUS:
875 bh_status(info);
876 break;
877 default:
878 /* unknown work item ID */
879 printk("Unknown work item ID=%08X!\n", action);
880 break;
881 }
882 }
883
884 if (debug_level >= DEBUG_LEVEL_BH)
885 printk( "%s(%d):bh_handler(%s) exit\n",
886 __FILE__,__LINE__,info->device_name);
887 }
888
889 static void bh_transmit(MGSLPC_INFO *info)
890 {
891 struct tty_struct *tty = info->tty;
892 if (debug_level >= DEBUG_LEVEL_BH)
893 printk("bh_transmit() entry on %s\n", info->device_name);
894
895 if (tty) {
896 tty_wakeup(tty);
897 wake_up_interruptible(&tty->write_wait);
898 }
899 }
900
901 static void bh_status(MGSLPC_INFO *info)
902 {
903 info->ri_chkcount = 0;
904 info->dsr_chkcount = 0;
905 info->dcd_chkcount = 0;
906 info->cts_chkcount = 0;
907 }
908
909 /* eom: non-zero = end of frame */
910 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
911 {
912 unsigned char data[2];
913 unsigned char fifo_count, read_count, i;
914 RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
915
916 if (debug_level >= DEBUG_LEVEL_ISR)
917 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
918
919 if (!info->rx_enabled)
920 return;
921
922 if (info->rx_frame_count >= info->rx_buf_count) {
923 /* no more free buffers */
924 issue_command(info, CHA, CMD_RXRESET);
925 info->pending_bh |= BH_RECEIVE;
926 info->rx_overflow = 1;
927 info->icount.buf_overrun++;
928 return;
929 }
930
931 if (eom) {
932 /* end of frame, get FIFO count from RBCL register */
933 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
934 fifo_count = 32;
935 } else
936 fifo_count = 32;
937
938 do {
939 if (fifo_count == 1) {
940 read_count = 1;
941 data[0] = read_reg(info, CHA + RXFIFO);
942 } else {
943 read_count = 2;
944 *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
945 }
946 fifo_count -= read_count;
947 if (!fifo_count && eom)
948 buf->status = data[--read_count];
949
950 for (i = 0; i < read_count; i++) {
951 if (buf->count >= info->max_frame_size) {
952 /* frame too large, reset receiver and reset current buffer */
953 issue_command(info, CHA, CMD_RXRESET);
954 buf->count = 0;
955 return;
956 }
957 *(buf->data + buf->count) = data[i];
958 buf->count++;
959 }
960 } while (fifo_count);
961
962 if (eom) {
963 info->pending_bh |= BH_RECEIVE;
964 info->rx_frame_count++;
965 info->rx_put++;
966 if (info->rx_put >= info->rx_buf_count)
967 info->rx_put = 0;
968 }
969 issue_command(info, CHA, CMD_RXFIFO);
970 }
971
972 static void rx_ready_async(MGSLPC_INFO *info, int tcd)
973 {
974 unsigned char data, status, flag;
975 int fifo_count;
976 int work = 0;
977 struct tty_struct *tty = info->tty;
978 struct mgsl_icount *icount = &info->icount;
979
980 if (tcd) {
981 /* early termination, get FIFO count from RBCL register */
982 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
983
984 /* Zero fifo count could mean 0 or 32 bytes available.
985 * If BIT5 of STAR is set then at least 1 byte is available.
986 */
987 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
988 fifo_count = 32;
989 } else
990 fifo_count = 32;
991
992 tty_buffer_request_room(tty, fifo_count);
993 /* Flush received async data to receive data buffer. */
994 while (fifo_count) {
995 data = read_reg(info, CHA + RXFIFO);
996 status = read_reg(info, CHA + RXFIFO);
997 fifo_count -= 2;
998
999 icount->rx++;
1000 flag = TTY_NORMAL;
1001
1002 // if no frameing/crc error then save data
1003 // BIT7:parity error
1004 // BIT6:framing error
1005
1006 if (status & (BIT7 + BIT6)) {
1007 if (status & BIT7)
1008 icount->parity++;
1009 else
1010 icount->frame++;
1011
1012 /* discard char if tty control flags say so */
1013 if (status & info->ignore_status_mask)
1014 continue;
1015
1016 status &= info->read_status_mask;
1017
1018 if (status & BIT7)
1019 flag = TTY_PARITY;
1020 else if (status & BIT6)
1021 flag = TTY_FRAME;
1022 }
1023 work += tty_insert_flip_char(tty, data, flag);
1024 }
1025 issue_command(info, CHA, CMD_RXFIFO);
1026
1027 if (debug_level >= DEBUG_LEVEL_ISR) {
1028 printk("%s(%d):rx_ready_async",
1029 __FILE__,__LINE__);
1030 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
1031 __FILE__,__LINE__,icount->rx,icount->brk,
1032 icount->parity,icount->frame,icount->overrun);
1033 }
1034
1035 if (work)
1036 tty_flip_buffer_push(tty);
1037 }
1038
1039
1040 static void tx_done(MGSLPC_INFO *info)
1041 {
1042 if (!info->tx_active)
1043 return;
1044
1045 info->tx_active = 0;
1046 info->tx_aborting = 0;
1047
1048 if (info->params.mode == MGSL_MODE_ASYNC)
1049 return;
1050
1051 info->tx_count = info->tx_put = info->tx_get = 0;
1052 del_timer(&info->tx_timer);
1053
1054 if (info->drop_rts_on_tx_done) {
1055 get_signals(info);
1056 if (info->serial_signals & SerialSignal_RTS) {
1057 info->serial_signals &= ~SerialSignal_RTS;
1058 set_signals(info);
1059 }
1060 info->drop_rts_on_tx_done = 0;
1061 }
1062
1063 #ifdef CONFIG_HDLC
1064 if (info->netcount)
1065 hdlcdev_tx_done(info);
1066 else
1067 #endif
1068 {
1069 if (info->tty->stopped || info->tty->hw_stopped) {
1070 tx_stop(info);
1071 return;
1072 }
1073 info->pending_bh |= BH_TRANSMIT;
1074 }
1075 }
1076
1077 static void tx_ready(MGSLPC_INFO *info)
1078 {
1079 unsigned char fifo_count = 32;
1080 int c;
1081
1082 if (debug_level >= DEBUG_LEVEL_ISR)
1083 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1084
1085 if (info->params.mode == MGSL_MODE_HDLC) {
1086 if (!info->tx_active)
1087 return;
1088 } else {
1089 if (info->tty->stopped || info->tty->hw_stopped) {
1090 tx_stop(info);
1091 return;
1092 }
1093 if (!info->tx_count)
1094 info->tx_active = 0;
1095 }
1096
1097 if (!info->tx_count)
1098 return;
1099
1100 while (info->tx_count && fifo_count) {
1101 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1102
1103 if (c == 1) {
1104 write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1105 } else {
1106 write_reg16(info, CHA + TXFIFO,
1107 *((unsigned short*)(info->tx_buf + info->tx_get)));
1108 }
1109 info->tx_count -= c;
1110 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1111 fifo_count -= c;
1112 }
1113
1114 if (info->params.mode == MGSL_MODE_ASYNC) {
1115 if (info->tx_count < WAKEUP_CHARS)
1116 info->pending_bh |= BH_TRANSMIT;
1117 issue_command(info, CHA, CMD_TXFIFO);
1118 } else {
1119 if (info->tx_count)
1120 issue_command(info, CHA, CMD_TXFIFO);
1121 else
1122 issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1123 }
1124 }
1125
1126 static void cts_change(MGSLPC_INFO *info)
1127 {
1128 get_signals(info);
1129 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1130 irq_disable(info, CHB, IRQ_CTS);
1131 info->icount.cts++;
1132 if (info->serial_signals & SerialSignal_CTS)
1133 info->input_signal_events.cts_up++;
1134 else
1135 info->input_signal_events.cts_down++;
1136 wake_up_interruptible(&info->status_event_wait_q);
1137 wake_up_interruptible(&info->event_wait_q);
1138
1139 if (info->flags & ASYNC_CTS_FLOW) {
1140 if (info->tty->hw_stopped) {
1141 if (info->serial_signals & SerialSignal_CTS) {
1142 if (debug_level >= DEBUG_LEVEL_ISR)
1143 printk("CTS tx start...");
1144 if (info->tty)
1145 info->tty->hw_stopped = 0;
1146 tx_start(info);
1147 info->pending_bh |= BH_TRANSMIT;
1148 return;
1149 }
1150 } else {
1151 if (!(info->serial_signals & SerialSignal_CTS)) {
1152 if (debug_level >= DEBUG_LEVEL_ISR)
1153 printk("CTS tx stop...");
1154 if (info->tty)
1155 info->tty->hw_stopped = 1;
1156 tx_stop(info);
1157 }
1158 }
1159 }
1160 info->pending_bh |= BH_STATUS;
1161 }
1162
1163 static void dcd_change(MGSLPC_INFO *info)
1164 {
1165 get_signals(info);
1166 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1167 irq_disable(info, CHB, IRQ_DCD);
1168 info->icount.dcd++;
1169 if (info->serial_signals & SerialSignal_DCD) {
1170 info->input_signal_events.dcd_up++;
1171 }
1172 else
1173 info->input_signal_events.dcd_down++;
1174 #ifdef CONFIG_HDLC
1175 if (info->netcount) {
1176 if (info->serial_signals & SerialSignal_DCD)
1177 netif_carrier_on(info->netdev);
1178 else
1179 netif_carrier_off(info->netdev);
1180 }
1181 #endif
1182 wake_up_interruptible(&info->status_event_wait_q);
1183 wake_up_interruptible(&info->event_wait_q);
1184
1185 if (info->flags & ASYNC_CHECK_CD) {
1186 if (debug_level >= DEBUG_LEVEL_ISR)
1187 printk("%s CD now %s...", info->device_name,
1188 (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1189 if (info->serial_signals & SerialSignal_DCD)
1190 wake_up_interruptible(&info->open_wait);
1191 else {
1192 if (debug_level >= DEBUG_LEVEL_ISR)
1193 printk("doing serial hangup...");
1194 if (info->tty)
1195 tty_hangup(info->tty);
1196 }
1197 }
1198 info->pending_bh |= BH_STATUS;
1199 }
1200
1201 static void dsr_change(MGSLPC_INFO *info)
1202 {
1203 get_signals(info);
1204 if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1205 port_irq_disable(info, PVR_DSR);
1206 info->icount.dsr++;
1207 if (info->serial_signals & SerialSignal_DSR)
1208 info->input_signal_events.dsr_up++;
1209 else
1210 info->input_signal_events.dsr_down++;
1211 wake_up_interruptible(&info->status_event_wait_q);
1212 wake_up_interruptible(&info->event_wait_q);
1213 info->pending_bh |= BH_STATUS;
1214 }
1215
1216 static void ri_change(MGSLPC_INFO *info)
1217 {
1218 get_signals(info);
1219 if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1220 port_irq_disable(info, PVR_RI);
1221 info->icount.rng++;
1222 if (info->serial_signals & SerialSignal_RI)
1223 info->input_signal_events.ri_up++;
1224 else
1225 info->input_signal_events.ri_down++;
1226 wake_up_interruptible(&info->status_event_wait_q);
1227 wake_up_interruptible(&info->event_wait_q);
1228 info->pending_bh |= BH_STATUS;
1229 }
1230
1231 /* Interrupt service routine entry point.
1232 *
1233 * Arguments:
1234 *
1235 * irq interrupt number that caused interrupt
1236 * dev_id device ID supplied during interrupt registration
1237 */
1238 static irqreturn_t mgslpc_isr(int irq, void *dev_id)
1239 {
1240 MGSLPC_INFO * info = (MGSLPC_INFO *)dev_id;
1241 unsigned short isr;
1242 unsigned char gis, pis;
1243 int count=0;
1244
1245 if (debug_level >= DEBUG_LEVEL_ISR)
1246 printk("mgslpc_isr(%d) entry.\n", irq);
1247 if (!info)
1248 return IRQ_NONE;
1249
1250 if (!(info->p_dev->_locked))
1251 return IRQ_HANDLED;
1252
1253 spin_lock(&info->lock);
1254
1255 while ((gis = read_reg(info, CHA + GIS))) {
1256 if (debug_level >= DEBUG_LEVEL_ISR)
1257 printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1258
1259 if ((gis & 0x70) || count > 1000) {
1260 printk("synclink_cs:hardware failed or ejected\n");
1261 break;
1262 }
1263 count++;
1264
1265 if (gis & (BIT1 + BIT0)) {
1266 isr = read_reg16(info, CHB + ISR);
1267 if (isr & IRQ_DCD)
1268 dcd_change(info);
1269 if (isr & IRQ_CTS)
1270 cts_change(info);
1271 }
1272 if (gis & (BIT3 + BIT2))
1273 {
1274 isr = read_reg16(info, CHA + ISR);
1275 if (isr & IRQ_TIMER) {
1276 info->irq_occurred = 1;
1277 irq_disable(info, CHA, IRQ_TIMER);
1278 }
1279
1280 /* receive IRQs */
1281 if (isr & IRQ_EXITHUNT) {
1282 info->icount.exithunt++;
1283 wake_up_interruptible(&info->event_wait_q);
1284 }
1285 if (isr & IRQ_BREAK_ON) {
1286 info->icount.brk++;
1287 if (info->flags & ASYNC_SAK)
1288 do_SAK(info->tty);
1289 }
1290 if (isr & IRQ_RXTIME) {
1291 issue_command(info, CHA, CMD_RXFIFO_READ);
1292 }
1293 if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1294 if (info->params.mode == MGSL_MODE_HDLC)
1295 rx_ready_hdlc(info, isr & IRQ_RXEOM);
1296 else
1297 rx_ready_async(info, isr & IRQ_RXEOM);
1298 }
1299
1300 /* transmit IRQs */
1301 if (isr & IRQ_UNDERRUN) {
1302 if (info->tx_aborting)
1303 info->icount.txabort++;
1304 else
1305 info->icount.txunder++;
1306 tx_done(info);
1307 }
1308 else if (isr & IRQ_ALLSENT) {
1309 info->icount.txok++;
1310 tx_done(info);
1311 }
1312 else if (isr & IRQ_TXFIFO)
1313 tx_ready(info);
1314 }
1315 if (gis & BIT7) {
1316 pis = read_reg(info, CHA + PIS);
1317 if (pis & BIT1)
1318 dsr_change(info);
1319 if (pis & BIT2)
1320 ri_change(info);
1321 }
1322 }
1323
1324 /* Request bottom half processing if there's something
1325 * for it to do and the bh is not already running
1326 */
1327
1328 if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1329 if ( debug_level >= DEBUG_LEVEL_ISR )
1330 printk("%s(%d):%s queueing bh task.\n",
1331 __FILE__,__LINE__,info->device_name);
1332 schedule_work(&info->task);
1333 info->bh_requested = 1;
1334 }
1335
1336 spin_unlock(&info->lock);
1337
1338 if (debug_level >= DEBUG_LEVEL_ISR)
1339 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1340 __FILE__,__LINE__,irq);
1341
1342 return IRQ_HANDLED;
1343 }
1344
1345 /* Initialize and start device.
1346 */
1347 static int startup(MGSLPC_INFO * info)
1348 {
1349 int retval = 0;
1350
1351 if (debug_level >= DEBUG_LEVEL_INFO)
1352 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1353
1354 if (info->flags & ASYNC_INITIALIZED)
1355 return 0;
1356
1357 if (!info->tx_buf) {
1358 /* allocate a page of memory for a transmit buffer */
1359 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1360 if (!info->tx_buf) {
1361 printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1362 __FILE__,__LINE__,info->device_name);
1363 return -ENOMEM;
1364 }
1365 }
1366
1367 info->pending_bh = 0;
1368
1369 memset(&info->icount, 0, sizeof(info->icount));
1370
1371 init_timer(&info->tx_timer);
1372 info->tx_timer.data = (unsigned long)info;
1373 info->tx_timer.function = tx_timeout;
1374
1375 /* Allocate and claim adapter resources */
1376 retval = claim_resources(info);
1377
1378 /* perform existance check and diagnostics */
1379 if ( !retval )
1380 retval = adapter_test(info);
1381
1382 if ( retval ) {
1383 if (capable(CAP_SYS_ADMIN) && info->tty)
1384 set_bit(TTY_IO_ERROR, &info->tty->flags);
1385 release_resources(info);
1386 return retval;
1387 }
1388
1389 /* program hardware for current parameters */
1390 mgslpc_change_params(info);
1391
1392 if (info->tty)
1393 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1394
1395 info->flags |= ASYNC_INITIALIZED;
1396
1397 return 0;
1398 }
1399
1400 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1401 */
1402 static void shutdown(MGSLPC_INFO * info)
1403 {
1404 unsigned long flags;
1405
1406 if (!(info->flags & ASYNC_INITIALIZED))
1407 return;
1408
1409 if (debug_level >= DEBUG_LEVEL_INFO)
1410 printk("%s(%d):mgslpc_shutdown(%s)\n",
1411 __FILE__,__LINE__, info->device_name );
1412
1413 /* clear status wait queue because status changes */
1414 /* can't happen after shutting down the hardware */
1415 wake_up_interruptible(&info->status_event_wait_q);
1416 wake_up_interruptible(&info->event_wait_q);
1417
1418 del_timer(&info->tx_timer);
1419
1420 if (info->tx_buf) {
1421 free_page((unsigned long) info->tx_buf);
1422 info->tx_buf = NULL;
1423 }
1424
1425 spin_lock_irqsave(&info->lock,flags);
1426
1427 rx_stop(info);
1428 tx_stop(info);
1429
1430 /* TODO:disable interrupts instead of reset to preserve signal states */
1431 reset_device(info);
1432
1433 if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
1434 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1435 set_signals(info);
1436 }
1437
1438 spin_unlock_irqrestore(&info->lock,flags);
1439
1440 release_resources(info);
1441
1442 if (info->tty)
1443 set_bit(TTY_IO_ERROR, &info->tty->flags);
1444
1445 info->flags &= ~ASYNC_INITIALIZED;
1446 }
1447
1448 static void mgslpc_program_hw(MGSLPC_INFO *info)
1449 {
1450 unsigned long flags;
1451
1452 spin_lock_irqsave(&info->lock,flags);
1453
1454 rx_stop(info);
1455 tx_stop(info);
1456 info->tx_count = info->tx_put = info->tx_get = 0;
1457
1458 if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1459 hdlc_mode(info);
1460 else
1461 async_mode(info);
1462
1463 set_signals(info);
1464
1465 info->dcd_chkcount = 0;
1466 info->cts_chkcount = 0;
1467 info->ri_chkcount = 0;
1468 info->dsr_chkcount = 0;
1469
1470 irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1471 port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1472 get_signals(info);
1473
1474 if (info->netcount || info->tty->termios->c_cflag & CREAD)
1475 rx_start(info);
1476
1477 spin_unlock_irqrestore(&info->lock,flags);
1478 }
1479
1480 /* Reconfigure adapter based on new parameters
1481 */
1482 static void mgslpc_change_params(MGSLPC_INFO *info)
1483 {
1484 unsigned cflag;
1485 int bits_per_char;
1486
1487 if (!info->tty || !info->tty->termios)
1488 return;
1489
1490 if (debug_level >= DEBUG_LEVEL_INFO)
1491 printk("%s(%d):mgslpc_change_params(%s)\n",
1492 __FILE__,__LINE__, info->device_name );
1493
1494 cflag = info->tty->termios->c_cflag;
1495
1496 /* if B0 rate (hangup) specified then negate DTR and RTS */
1497 /* otherwise assert DTR and RTS */
1498 if (cflag & CBAUD)
1499 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1500 else
1501 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1502
1503 /* byte size and parity */
1504
1505 switch (cflag & CSIZE) {
1506 case CS5: info->params.data_bits = 5; break;
1507 case CS6: info->params.data_bits = 6; break;
1508 case CS7: info->params.data_bits = 7; break;
1509 case CS8: info->params.data_bits = 8; break;
1510 default: info->params.data_bits = 7; break;
1511 }
1512
1513 if (cflag & CSTOPB)
1514 info->params.stop_bits = 2;
1515 else
1516 info->params.stop_bits = 1;
1517
1518 info->params.parity = ASYNC_PARITY_NONE;
1519 if (cflag & PARENB) {
1520 if (cflag & PARODD)
1521 info->params.parity = ASYNC_PARITY_ODD;
1522 else
1523 info->params.parity = ASYNC_PARITY_EVEN;
1524 #ifdef CMSPAR
1525 if (cflag & CMSPAR)
1526 info->params.parity = ASYNC_PARITY_SPACE;
1527 #endif
1528 }
1529
1530 /* calculate number of jiffies to transmit a full
1531 * FIFO (32 bytes) at specified data rate
1532 */
1533 bits_per_char = info->params.data_bits +
1534 info->params.stop_bits + 1;
1535
1536 /* if port data rate is set to 460800 or less then
1537 * allow tty settings to override, otherwise keep the
1538 * current data rate.
1539 */
1540 if (info->params.data_rate <= 460800) {
1541 info->params.data_rate = tty_get_baud_rate(info->tty);
1542 }
1543
1544 if ( info->params.data_rate ) {
1545 info->timeout = (32*HZ*bits_per_char) /
1546 info->params.data_rate;
1547 }
1548 info->timeout += HZ/50; /* Add .02 seconds of slop */
1549
1550 if (cflag & CRTSCTS)
1551 info->flags |= ASYNC_CTS_FLOW;
1552 else
1553 info->flags &= ~ASYNC_CTS_FLOW;
1554
1555 if (cflag & CLOCAL)
1556 info->flags &= ~ASYNC_CHECK_CD;
1557 else
1558 info->flags |= ASYNC_CHECK_CD;
1559
1560 /* process tty input control flags */
1561
1562 info->read_status_mask = 0;
1563 if (I_INPCK(info->tty))
1564 info->read_status_mask |= BIT7 | BIT6;
1565 if (I_IGNPAR(info->tty))
1566 info->ignore_status_mask |= BIT7 | BIT6;
1567
1568 mgslpc_program_hw(info);
1569 }
1570
1571 /* Add a character to the transmit buffer
1572 */
1573 static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1574 {
1575 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1576 unsigned long flags;
1577
1578 if (debug_level >= DEBUG_LEVEL_INFO) {
1579 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1580 __FILE__,__LINE__,ch,info->device_name);
1581 }
1582
1583 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1584 return;
1585
1586 if (!info->tx_buf)
1587 return;
1588
1589 spin_lock_irqsave(&info->lock,flags);
1590
1591 if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1592 if (info->tx_count < TXBUFSIZE - 1) {
1593 info->tx_buf[info->tx_put++] = ch;
1594 info->tx_put &= TXBUFSIZE-1;
1595 info->tx_count++;
1596 }
1597 }
1598
1599 spin_unlock_irqrestore(&info->lock,flags);
1600 }
1601
1602 /* Enable transmitter so remaining characters in the
1603 * transmit buffer are sent.
1604 */
1605 static void mgslpc_flush_chars(struct tty_struct *tty)
1606 {
1607 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1608 unsigned long flags;
1609
1610 if (debug_level >= DEBUG_LEVEL_INFO)
1611 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1612 __FILE__,__LINE__,info->device_name,info->tx_count);
1613
1614 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1615 return;
1616
1617 if (info->tx_count <= 0 || tty->stopped ||
1618 tty->hw_stopped || !info->tx_buf)
1619 return;
1620
1621 if (debug_level >= DEBUG_LEVEL_INFO)
1622 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1623 __FILE__,__LINE__,info->device_name);
1624
1625 spin_lock_irqsave(&info->lock,flags);
1626 if (!info->tx_active)
1627 tx_start(info);
1628 spin_unlock_irqrestore(&info->lock,flags);
1629 }
1630
1631 /* Send a block of data
1632 *
1633 * Arguments:
1634 *
1635 * tty pointer to tty information structure
1636 * buf pointer to buffer containing send data
1637 * count size of send data in bytes
1638 *
1639 * Returns: number of characters written
1640 */
1641 static int mgslpc_write(struct tty_struct * tty,
1642 const unsigned char *buf, int count)
1643 {
1644 int c, ret = 0;
1645 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1646 unsigned long flags;
1647
1648 if (debug_level >= DEBUG_LEVEL_INFO)
1649 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1650 __FILE__,__LINE__,info->device_name,count);
1651
1652 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1653 !info->tx_buf)
1654 goto cleanup;
1655
1656 if (info->params.mode == MGSL_MODE_HDLC) {
1657 if (count > TXBUFSIZE) {
1658 ret = -EIO;
1659 goto cleanup;
1660 }
1661 if (info->tx_active)
1662 goto cleanup;
1663 else if (info->tx_count)
1664 goto start;
1665 }
1666
1667 for (;;) {
1668 c = min(count,
1669 min(TXBUFSIZE - info->tx_count - 1,
1670 TXBUFSIZE - info->tx_put));
1671 if (c <= 0)
1672 break;
1673
1674 memcpy(info->tx_buf + info->tx_put, buf, c);
1675
1676 spin_lock_irqsave(&info->lock,flags);
1677 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1678 info->tx_count += c;
1679 spin_unlock_irqrestore(&info->lock,flags);
1680
1681 buf += c;
1682 count -= c;
1683 ret += c;
1684 }
1685 start:
1686 if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1687 spin_lock_irqsave(&info->lock,flags);
1688 if (!info->tx_active)
1689 tx_start(info);
1690 spin_unlock_irqrestore(&info->lock,flags);
1691 }
1692 cleanup:
1693 if (debug_level >= DEBUG_LEVEL_INFO)
1694 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1695 __FILE__,__LINE__,info->device_name,ret);
1696 return ret;
1697 }
1698
1699 /* Return the count of free bytes in transmit buffer
1700 */
1701 static int mgslpc_write_room(struct tty_struct *tty)
1702 {
1703 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1704 int ret;
1705
1706 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1707 return 0;
1708
1709 if (info->params.mode == MGSL_MODE_HDLC) {
1710 /* HDLC (frame oriented) mode */
1711 if (info->tx_active)
1712 return 0;
1713 else
1714 return HDLC_MAX_FRAME_SIZE;
1715 } else {
1716 ret = TXBUFSIZE - info->tx_count - 1;
1717 if (ret < 0)
1718 ret = 0;
1719 }
1720
1721 if (debug_level >= DEBUG_LEVEL_INFO)
1722 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1723 __FILE__,__LINE__, info->device_name, ret);
1724 return ret;
1725 }
1726
1727 /* Return the count of bytes in transmit buffer
1728 */
1729 static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1730 {
1731 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1732 int rc;
1733
1734 if (debug_level >= DEBUG_LEVEL_INFO)
1735 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1736 __FILE__,__LINE__, info->device_name );
1737
1738 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1739 return 0;
1740
1741 if (info->params.mode == MGSL_MODE_HDLC)
1742 rc = info->tx_active ? info->max_frame_size : 0;
1743 else
1744 rc = info->tx_count;
1745
1746 if (debug_level >= DEBUG_LEVEL_INFO)
1747 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1748 __FILE__,__LINE__, info->device_name, rc);
1749
1750 return rc;
1751 }
1752
1753 /* Discard all data in the send buffer
1754 */
1755 static void mgslpc_flush_buffer(struct tty_struct *tty)
1756 {
1757 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1758 unsigned long flags;
1759
1760 if (debug_level >= DEBUG_LEVEL_INFO)
1761 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1762 __FILE__,__LINE__, info->device_name );
1763
1764 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1765 return;
1766
1767 spin_lock_irqsave(&info->lock,flags);
1768 info->tx_count = info->tx_put = info->tx_get = 0;
1769 del_timer(&info->tx_timer);
1770 spin_unlock_irqrestore(&info->lock,flags);
1771
1772 wake_up_interruptible(&tty->write_wait);
1773 tty_wakeup(tty);
1774 }
1775
1776 /* Send a high-priority XON/XOFF character
1777 */
1778 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1779 {
1780 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1781 unsigned long flags;
1782
1783 if (debug_level >= DEBUG_LEVEL_INFO)
1784 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1785 __FILE__,__LINE__, info->device_name, ch );
1786
1787 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1788 return;
1789
1790 info->x_char = ch;
1791 if (ch) {
1792 spin_lock_irqsave(&info->lock,flags);
1793 if (!info->tx_enabled)
1794 tx_start(info);
1795 spin_unlock_irqrestore(&info->lock,flags);
1796 }
1797 }
1798
1799 /* Signal remote device to throttle send data (our receive data)
1800 */
1801 static void mgslpc_throttle(struct tty_struct * tty)
1802 {
1803 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1804 unsigned long flags;
1805
1806 if (debug_level >= DEBUG_LEVEL_INFO)
1807 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1808 __FILE__,__LINE__, info->device_name );
1809
1810 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1811 return;
1812
1813 if (I_IXOFF(tty))
1814 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1815
1816 if (tty->termios->c_cflag & CRTSCTS) {
1817 spin_lock_irqsave(&info->lock,flags);
1818 info->serial_signals &= ~SerialSignal_RTS;
1819 set_signals(info);
1820 spin_unlock_irqrestore(&info->lock,flags);
1821 }
1822 }
1823
1824 /* Signal remote device to stop throttling send data (our receive data)
1825 */
1826 static void mgslpc_unthrottle(struct tty_struct * tty)
1827 {
1828 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1829 unsigned long flags;
1830
1831 if (debug_level >= DEBUG_LEVEL_INFO)
1832 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1833 __FILE__,__LINE__, info->device_name );
1834
1835 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1836 return;
1837
1838 if (I_IXOFF(tty)) {
1839 if (info->x_char)
1840 info->x_char = 0;
1841 else
1842 mgslpc_send_xchar(tty, START_CHAR(tty));
1843 }
1844
1845 if (tty->termios->c_cflag & CRTSCTS) {
1846 spin_lock_irqsave(&info->lock,flags);
1847 info->serial_signals |= SerialSignal_RTS;
1848 set_signals(info);
1849 spin_unlock_irqrestore(&info->lock,flags);
1850 }
1851 }
1852
1853 /* get the current serial statistics
1854 */
1855 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1856 {
1857 int err;
1858 if (debug_level >= DEBUG_LEVEL_INFO)
1859 printk("get_params(%s)\n", info->device_name);
1860 if (!user_icount) {
1861 memset(&info->icount, 0, sizeof(info->icount));
1862 } else {
1863 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1864 if (err)
1865 return -EFAULT;
1866 }
1867 return 0;
1868 }
1869
1870 /* get the current serial parameters
1871 */
1872 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1873 {
1874 int err;
1875 if (debug_level >= DEBUG_LEVEL_INFO)
1876 printk("get_params(%s)\n", info->device_name);
1877 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1878 if (err)
1879 return -EFAULT;
1880 return 0;
1881 }
1882
1883 /* set the serial parameters
1884 *
1885 * Arguments:
1886 *
1887 * info pointer to device instance data
1888 * new_params user buffer containing new serial params
1889 *
1890 * Returns: 0 if success, otherwise error code
1891 */
1892 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
1893 {
1894 unsigned long flags;
1895 MGSL_PARAMS tmp_params;
1896 int err;
1897
1898 if (debug_level >= DEBUG_LEVEL_INFO)
1899 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1900 info->device_name );
1901 COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1902 if (err) {
1903 if ( debug_level >= DEBUG_LEVEL_INFO )
1904 printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1905 __FILE__,__LINE__,info->device_name);
1906 return -EFAULT;
1907 }
1908
1909 spin_lock_irqsave(&info->lock,flags);
1910 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1911 spin_unlock_irqrestore(&info->lock,flags);
1912
1913 mgslpc_change_params(info);
1914
1915 return 0;
1916 }
1917
1918 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1919 {
1920 int err;
1921 if (debug_level >= DEBUG_LEVEL_INFO)
1922 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1923 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1924 if (err)
1925 return -EFAULT;
1926 return 0;
1927 }
1928
1929 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1930 {
1931 unsigned long flags;
1932 if (debug_level >= DEBUG_LEVEL_INFO)
1933 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1934 spin_lock_irqsave(&info->lock,flags);
1935 info->idle_mode = idle_mode;
1936 tx_set_idle(info);
1937 spin_unlock_irqrestore(&info->lock,flags);
1938 return 0;
1939 }
1940
1941 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1942 {
1943 int err;
1944 if (debug_level >= DEBUG_LEVEL_INFO)
1945 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1946 COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1947 if (err)
1948 return -EFAULT;
1949 return 0;
1950 }
1951
1952 static int set_interface(MGSLPC_INFO * info, int if_mode)
1953 {
1954 unsigned long flags;
1955 unsigned char val;
1956 if (debug_level >= DEBUG_LEVEL_INFO)
1957 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1958 spin_lock_irqsave(&info->lock,flags);
1959 info->if_mode = if_mode;
1960
1961 val = read_reg(info, PVR) & 0x0f;
1962 switch (info->if_mode)
1963 {
1964 case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1965 case MGSL_INTERFACE_V35: val |= PVR_V35; break;
1966 case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1967 }
1968 write_reg(info, PVR, val);
1969
1970 spin_unlock_irqrestore(&info->lock,flags);
1971 return 0;
1972 }
1973
1974 static int set_txenable(MGSLPC_INFO * info, int enable)
1975 {
1976 unsigned long flags;
1977
1978 if (debug_level >= DEBUG_LEVEL_INFO)
1979 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1980
1981 spin_lock_irqsave(&info->lock,flags);
1982 if (enable) {
1983 if (!info->tx_enabled)
1984 tx_start(info);
1985 } else {
1986 if (info->tx_enabled)
1987 tx_stop(info);
1988 }
1989 spin_unlock_irqrestore(&info->lock,flags);
1990 return 0;
1991 }
1992
1993 static int tx_abort(MGSLPC_INFO * info)
1994 {
1995 unsigned long flags;
1996
1997 if (debug_level >= DEBUG_LEVEL_INFO)
1998 printk("tx_abort(%s)\n", info->device_name);
1999
2000 spin_lock_irqsave(&info->lock,flags);
2001 if (info->tx_active && info->tx_count &&
2002 info->params.mode == MGSL_MODE_HDLC) {
2003 /* clear data count so FIFO is not filled on next IRQ.
2004 * This results in underrun and abort transmission.
2005 */
2006 info->tx_count = info->tx_put = info->tx_get = 0;
2007 info->tx_aborting = TRUE;
2008 }
2009 spin_unlock_irqrestore(&info->lock,flags);
2010 return 0;
2011 }
2012
2013 static int set_rxenable(MGSLPC_INFO * info, int enable)
2014 {
2015 unsigned long flags;
2016
2017 if (debug_level >= DEBUG_LEVEL_INFO)
2018 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
2019
2020 spin_lock_irqsave(&info->lock,flags);
2021 if (enable) {
2022 if (!info->rx_enabled)
2023 rx_start(info);
2024 } else {
2025 if (info->rx_enabled)
2026 rx_stop(info);
2027 }
2028 spin_unlock_irqrestore(&info->lock,flags);
2029 return 0;
2030 }
2031
2032 /* wait for specified event to occur
2033 *
2034 * Arguments: info pointer to device instance data
2035 * mask pointer to bitmask of events to wait for
2036 * Return Value: 0 if successful and bit mask updated with
2037 * of events triggerred,
2038 * otherwise error code
2039 */
2040 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
2041 {
2042 unsigned long flags;
2043 int s;
2044 int rc=0;
2045 struct mgsl_icount cprev, cnow;
2046 int events;
2047 int mask;
2048 struct _input_signal_events oldsigs, newsigs;
2049 DECLARE_WAITQUEUE(wait, current);
2050
2051 COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
2052 if (rc)
2053 return -EFAULT;
2054
2055 if (debug_level >= DEBUG_LEVEL_INFO)
2056 printk("wait_events(%s,%d)\n", info->device_name, mask);
2057
2058 spin_lock_irqsave(&info->lock,flags);
2059
2060 /* return immediately if state matches requested events */
2061 get_signals(info);
2062 s = info->serial_signals;
2063 events = mask &
2064 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2065 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2066 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2067 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2068 if (events) {
2069 spin_unlock_irqrestore(&info->lock,flags);
2070 goto exit;
2071 }
2072
2073 /* save current irq counts */
2074 cprev = info->icount;
2075 oldsigs = info->input_signal_events;
2076
2077 if ((info->params.mode == MGSL_MODE_HDLC) &&
2078 (mask & MgslEvent_ExitHuntMode))
2079 irq_enable(info, CHA, IRQ_EXITHUNT);
2080
2081 set_current_state(TASK_INTERRUPTIBLE);
2082 add_wait_queue(&info->event_wait_q, &wait);
2083
2084 spin_unlock_irqrestore(&info->lock,flags);
2085
2086
2087 for(;;) {
2088 schedule();
2089 if (signal_pending(current)) {
2090 rc = -ERESTARTSYS;
2091 break;
2092 }
2093
2094 /* get current irq counts */
2095 spin_lock_irqsave(&info->lock,flags);
2096 cnow = info->icount;
2097 newsigs = info->input_signal_events;
2098 set_current_state(TASK_INTERRUPTIBLE);
2099 spin_unlock_irqrestore(&info->lock,flags);
2100
2101 /* if no change, wait aborted for some reason */
2102 if (newsigs.dsr_up == oldsigs.dsr_up &&
2103 newsigs.dsr_down == oldsigs.dsr_down &&
2104 newsigs.dcd_up == oldsigs.dcd_up &&
2105 newsigs.dcd_down == oldsigs.dcd_down &&
2106 newsigs.cts_up == oldsigs.cts_up &&
2107 newsigs.cts_down == oldsigs.cts_down &&
2108 newsigs.ri_up == oldsigs.ri_up &&
2109 newsigs.ri_down == oldsigs.ri_down &&
2110 cnow.exithunt == cprev.exithunt &&
2111 cnow.rxidle == cprev.rxidle) {
2112 rc = -EIO;
2113 break;
2114 }
2115
2116 events = mask &
2117 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
2118 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2119 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
2120 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2121 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
2122 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2123 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
2124 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
2125 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
2126 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
2127 if (events)
2128 break;
2129
2130 cprev = cnow;
2131 oldsigs = newsigs;
2132 }
2133
2134 remove_wait_queue(&info->event_wait_q, &wait);
2135 set_current_state(TASK_RUNNING);
2136
2137 if (mask & MgslEvent_ExitHuntMode) {
2138 spin_lock_irqsave(&info->lock,flags);
2139 if (!waitqueue_active(&info->event_wait_q))
2140 irq_disable(info, CHA, IRQ_EXITHUNT);
2141 spin_unlock_irqrestore(&info->lock,flags);
2142 }
2143 exit:
2144 if (rc == 0)
2145 PUT_USER(rc, events, mask_ptr);
2146 return rc;
2147 }
2148
2149 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2150 {
2151 unsigned long flags;
2152 int rc;
2153 struct mgsl_icount cprev, cnow;
2154 DECLARE_WAITQUEUE(wait, current);
2155
2156 /* save current irq counts */
2157 spin_lock_irqsave(&info->lock,flags);
2158 cprev = info->icount;
2159 add_wait_queue(&info->status_event_wait_q, &wait);
2160 set_current_state(TASK_INTERRUPTIBLE);
2161 spin_unlock_irqrestore(&info->lock,flags);
2162
2163 for(;;) {
2164 schedule();
2165 if (signal_pending(current)) {
2166 rc = -ERESTARTSYS;
2167 break;
2168 }
2169
2170 /* get new irq counts */
2171 spin_lock_irqsave(&info->lock,flags);
2172 cnow = info->icount;
2173 set_current_state(TASK_INTERRUPTIBLE);
2174 spin_unlock_irqrestore(&info->lock,flags);
2175
2176 /* if no change, wait aborted for some reason */
2177 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2178 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2179 rc = -EIO;
2180 break;
2181 }
2182
2183 /* check for change in caller specified modem input */
2184 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2185 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2186 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
2187 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2188 rc = 0;
2189 break;
2190 }
2191
2192 cprev = cnow;
2193 }
2194 remove_wait_queue(&info->status_event_wait_q, &wait);
2195 set_current_state(TASK_RUNNING);
2196 return rc;
2197 }
2198
2199 /* return the state of the serial control and status signals
2200 */
2201 static int tiocmget(struct tty_struct *tty, struct file *file)
2202 {
2203 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2204 unsigned int result;
2205 unsigned long flags;
2206
2207 spin_lock_irqsave(&info->lock,flags);
2208 get_signals(info);
2209 spin_unlock_irqrestore(&info->lock,flags);
2210
2211 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2212 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2213 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2214 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
2215 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2216 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2217
2218 if (debug_level >= DEBUG_LEVEL_INFO)
2219 printk("%s(%d):%s tiocmget() value=%08X\n",
2220 __FILE__,__LINE__, info->device_name, result );
2221 return result;
2222 }
2223
2224 /* set modem control signals (DTR/RTS)
2225 */
2226 static int tiocmset(struct tty_struct *tty, struct file *file,
2227 unsigned int set, unsigned int clear)
2228 {
2229 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2230 unsigned long flags;
2231
2232 if (debug_level >= DEBUG_LEVEL_INFO)
2233 printk("%s(%d):%s tiocmset(%x,%x)\n",
2234 __FILE__,__LINE__,info->device_name, set, clear);
2235
2236 if (set & TIOCM_RTS)
2237 info->serial_signals |= SerialSignal_RTS;
2238 if (set & TIOCM_DTR)
2239 info->serial_signals |= SerialSignal_DTR;
2240 if (clear & TIOCM_RTS)
2241 info->serial_signals &= ~SerialSignal_RTS;
2242 if (clear & TIOCM_DTR)
2243 info->serial_signals &= ~SerialSignal_DTR;
2244
2245 spin_lock_irqsave(&info->lock,flags);
2246 set_signals(info);
2247 spin_unlock_irqrestore(&info->lock,flags);
2248
2249 return 0;
2250 }
2251
2252 /* Set or clear transmit break condition
2253 *
2254 * Arguments: tty pointer to tty instance data
2255 * break_state -1=set break condition, 0=clear
2256 */
2257 static void mgslpc_break(struct tty_struct *tty, int break_state)
2258 {
2259 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2260 unsigned long flags;
2261
2262 if (debug_level >= DEBUG_LEVEL_INFO)
2263 printk("%s(%d):mgslpc_break(%s,%d)\n",
2264 __FILE__,__LINE__, info->device_name, break_state);
2265
2266 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2267 return;
2268
2269 spin_lock_irqsave(&info->lock,flags);
2270 if (break_state == -1)
2271 set_reg_bits(info, CHA+DAFO, BIT6);
2272 else
2273 clear_reg_bits(info, CHA+DAFO, BIT6);
2274 spin_unlock_irqrestore(&info->lock,flags);
2275 }
2276
2277 /* Service an IOCTL request
2278 *
2279 * Arguments:
2280 *
2281 * tty pointer to tty instance data
2282 * file pointer to associated file object for device
2283 * cmd IOCTL command code
2284 * arg command argument/context
2285 *
2286 * Return Value: 0 if success, otherwise error code
2287 */
2288 static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2289 unsigned int cmd, unsigned long arg)
2290 {
2291 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2292
2293 if (debug_level >= DEBUG_LEVEL_INFO)
2294 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2295 info->device_name, cmd );
2296
2297 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2298 return -ENODEV;
2299
2300 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2301 (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
2302 if (tty->flags & (1 << TTY_IO_ERROR))
2303 return -EIO;
2304 }
2305
2306 return ioctl_common(info, cmd, arg);
2307 }
2308
2309 static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
2310 {
2311 int error;
2312 struct mgsl_icount cnow; /* kernel counter temps */
2313 struct serial_icounter_struct __user *p_cuser; /* user space */
2314 void __user *argp = (void __user *)arg;
2315 unsigned long flags;
2316
2317 switch (cmd) {
2318 case MGSL_IOCGPARAMS:
2319 return get_params(info, argp);
2320 case MGSL_IOCSPARAMS:
2321 return set_params(info, argp);
2322 case MGSL_IOCGTXIDLE:
2323 return get_txidle(info, argp);
2324 case MGSL_IOCSTXIDLE:
2325 return set_txidle(info, (int)arg);
2326 case MGSL_IOCGIF:
2327 return get_interface(info, argp);
2328 case MGSL_IOCSIF:
2329 return set_interface(info,(int)arg);
2330 case MGSL_IOCTXENABLE:
2331 return set_txenable(info,(int)arg);
2332 case MGSL_IOCRXENABLE:
2333 return set_rxenable(info,(int)arg);
2334 case MGSL_IOCTXABORT:
2335 return tx_abort(info);
2336 case MGSL_IOCGSTATS:
2337 return get_stats(info, argp);
2338 case MGSL_IOCWAITEVENT:
2339 return wait_events(info, argp);
2340 case TIOCMIWAIT:
2341 return modem_input_wait(info,(int)arg);
2342 case TIOCGICOUNT:
2343 spin_lock_irqsave(&info->lock,flags);
2344 cnow = info->icount;
2345 spin_unlock_irqrestore(&info->lock,flags);
2346 p_cuser = argp;
2347 PUT_USER(error,cnow.cts, &p_cuser->cts);
2348 if (error) return error;
2349 PUT_USER(error,cnow.dsr, &p_cuser->dsr);
2350 if (error) return error;
2351 PUT_USER(error,cnow.rng, &p_cuser->rng);
2352 if (error) return error;
2353 PUT_USER(error,cnow.dcd, &p_cuser->dcd);
2354 if (error) return error;
2355 PUT_USER(error,cnow.rx, &p_cuser->rx);
2356 if (error) return error;
2357 PUT_USER(error,cnow.tx, &p_cuser->tx);
2358 if (error) return error;
2359 PUT_USER(error,cnow.frame, &p_cuser->frame);
2360 if (error) return error;
2361 PUT_USER(error,cnow.overrun, &p_cuser->overrun);
2362 if (error) return error;
2363 PUT_USER(error,cnow.parity, &p_cuser->parity);
2364 if (error) return error;
2365 PUT_USER(error,cnow.brk, &p_cuser->brk);
2366 if (error) return error;
2367 PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
2368 if (error) return error;
2369 return 0;
2370 default:
2371 return -ENOIOCTLCMD;
2372 }
2373 return 0;
2374 }
2375
2376 /* Set new termios settings
2377 *
2378 * Arguments:
2379 *
2380 * tty pointer to tty structure
2381 * termios pointer to buffer to hold returned old termios
2382 */
2383 static void mgslpc_set_termios(struct tty_struct *tty, struct termios *old_termios)
2384 {
2385 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2386 unsigned long flags;
2387
2388 if (debug_level >= DEBUG_LEVEL_INFO)
2389 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2390 tty->driver->name );
2391
2392 /* just return if nothing has changed */
2393 if ((tty->termios->c_cflag == old_termios->c_cflag)
2394 && (RELEVANT_IFLAG(tty->termios->c_iflag)
2395 == RELEVANT_IFLAG(old_termios->c_iflag)))
2396 return;
2397
2398 mgslpc_change_params(info);
2399
2400 /* Handle transition to B0 status */
2401 if (old_termios->c_cflag & CBAUD &&
2402 !(tty->termios->c_cflag & CBAUD)) {
2403 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2404 spin_lock_irqsave(&info->lock,flags);
2405 set_signals(info);
2406 spin_unlock_irqrestore(&info->lock,flags);
2407 }
2408
2409 /* Handle transition away from B0 status */
2410 if (!(old_termios->c_cflag & CBAUD) &&
2411 tty->termios->c_cflag & CBAUD) {
2412 info->serial_signals |= SerialSignal_DTR;
2413 if (!(tty->termios->c_cflag & CRTSCTS) ||
2414 !test_bit(TTY_THROTTLED, &tty->flags)) {
2415 info->serial_signals |= SerialSignal_RTS;
2416 }
2417 spin_lock_irqsave(&info->lock,flags);
2418 set_signals(info);
2419 spin_unlock_irqrestore(&info->lock,flags);
2420 }
2421
2422 /* Handle turning off CRTSCTS */
2423 if (old_termios->c_cflag & CRTSCTS &&
2424 !(tty->termios->c_cflag & CRTSCTS)) {
2425 tty->hw_stopped = 0;
2426 tx_release(tty);
2427 }
2428 }
2429
2430 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2431 {
2432 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2433
2434 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2435 return;
2436
2437 if (debug_level >= DEBUG_LEVEL_INFO)
2438 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2439 __FILE__,__LINE__, info->device_name, info->count);
2440
2441 if (!info->count)
2442 return;
2443
2444 if (tty_hung_up_p(filp))
2445 goto cleanup;
2446
2447 if ((tty->count == 1) && (info->count != 1)) {
2448 /*
2449 * tty->count is 1 and the tty structure will be freed.
2450 * info->count should be one in this case.
2451 * if it's not, correct it so that the port is shutdown.
2452 */
2453 printk("mgslpc_close: bad refcount; tty->count is 1, "
2454 "info->count is %d\n", info->count);
2455 info->count = 1;
2456 }
2457
2458 info->count--;
2459
2460 /* if at least one open remaining, leave hardware active */
2461 if (info->count)
2462 goto cleanup;
2463
2464 info->flags |= ASYNC_CLOSING;
2465
2466 /* set tty->closing to notify line discipline to
2467 * only process XON/XOFF characters. Only the N_TTY
2468 * discipline appears to use this (ppp does not).
2469 */
2470 tty->closing = 1;
2471
2472 /* wait for transmit data to clear all layers */
2473
2474 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
2475 if (debug_level >= DEBUG_LEVEL_INFO)
2476 printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
2477 __FILE__,__LINE__, info->device_name );
2478 tty_wait_until_sent(tty, info->closing_wait);
2479 }
2480
2481 if (info->flags & ASYNC_INITIALIZED)
2482 mgslpc_wait_until_sent(tty, info->timeout);
2483
2484 if (tty->driver->flush_buffer)
2485 tty->driver->flush_buffer(tty);
2486
2487 ldisc_flush_buffer(tty);
2488
2489 shutdown(info);
2490
2491 tty->closing = 0;
2492 info->tty = NULL;
2493
2494 if (info->blocked_open) {
2495 if (info->close_delay) {
2496 msleep_interruptible(jiffies_to_msecs(info->close_delay));
2497 }
2498 wake_up_interruptible(&info->open_wait);
2499 }
2500
2501 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
2502
2503 wake_up_interruptible(&info->close_wait);
2504
2505 cleanup:
2506 if (debug_level >= DEBUG_LEVEL_INFO)
2507 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2508 tty->driver->name, info->count);
2509 }
2510
2511 /* Wait until the transmitter is empty.
2512 */
2513 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2514 {
2515 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2516 unsigned long orig_jiffies, char_time;
2517
2518 if (!info )
2519 return;
2520
2521 if (debug_level >= DEBUG_LEVEL_INFO)
2522 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2523 __FILE__,__LINE__, info->device_name );
2524
2525 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2526 return;
2527
2528 if (!(info->flags & ASYNC_INITIALIZED))
2529 goto exit;
2530
2531 orig_jiffies = jiffies;
2532
2533 /* Set check interval to 1/5 of estimated time to
2534 * send a character, and make it at least 1. The check
2535 * interval should also be less than the timeout.
2536 * Note: use tight timings here to satisfy the NIST-PCTS.
2537 */
2538
2539 if ( info->params.data_rate ) {
2540 char_time = info->timeout/(32 * 5);
2541 if (!char_time)
2542 char_time++;
2543 } else
2544 char_time = 1;
2545
2546 if (timeout)
2547 char_time = min_t(unsigned long, char_time, timeout);
2548
2549 if (info->params.mode == MGSL_MODE_HDLC) {
2550 while (info->tx_active) {
2551 msleep_interruptible(jiffies_to_msecs(char_time));
2552 if (signal_pending(current))
2553 break;
2554 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2555 break;
2556 }
2557 } else {
2558 while ((info->tx_count || info->tx_active) &&
2559 info->tx_enabled) {
2560 msleep_interruptible(jiffies_to_msecs(char_time));
2561 if (signal_pending(current))
2562 break;
2563 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2564 break;
2565 }
2566 }
2567
2568 exit:
2569 if (debug_level >= DEBUG_LEVEL_INFO)
2570 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2571 __FILE__,__LINE__, info->device_name );
2572 }
2573
2574 /* Called by tty_hangup() when a hangup is signaled.
2575 * This is the same as closing all open files for the port.
2576 */
2577 static void mgslpc_hangup(struct tty_struct *tty)
2578 {
2579 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2580
2581 if (debug_level >= DEBUG_LEVEL_INFO)
2582 printk("%s(%d):mgslpc_hangup(%s)\n",
2583 __FILE__,__LINE__, info->device_name );
2584
2585 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2586 return;
2587
2588 mgslpc_flush_buffer(tty);
2589 shutdown(info);
2590
2591 info->count = 0;
2592 info->flags &= ~ASYNC_NORMAL_ACTIVE;
2593 info->tty = NULL;
2594
2595 wake_up_interruptible(&info->open_wait);
2596 }
2597
2598 /* Block the current process until the specified port
2599 * is ready to be opened.
2600 */
2601 static int block_til_ready(struct tty_struct *tty, struct file *filp,
2602 MGSLPC_INFO *info)
2603 {
2604 DECLARE_WAITQUEUE(wait, current);
2605 int retval;
2606 int do_clocal = 0, extra_count = 0;
2607 unsigned long flags;
2608
2609 if (debug_level >= DEBUG_LEVEL_INFO)
2610 printk("%s(%d):block_til_ready on %s\n",
2611 __FILE__,__LINE__, tty->driver->name );
2612
2613 if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
2614 /* nonblock mode is set or port is not enabled */
2615 /* just verify that callout device is not active */
2616 info->flags |= ASYNC_NORMAL_ACTIVE;
2617 return 0;
2618 }
2619
2620 if (tty->termios->c_cflag & CLOCAL)
2621 do_clocal = 1;
2622
2623 /* Wait for carrier detect and the line to become
2624 * free (i.e., not in use by the callout). While we are in
2625 * this loop, info->count is dropped by one, so that
2626 * mgslpc_close() knows when to free things. We restore it upon
2627 * exit, either normal or abnormal.
2628 */
2629
2630 retval = 0;
2631 add_wait_queue(&info->open_wait, &wait);
2632
2633 if (debug_level >= DEBUG_LEVEL_INFO)
2634 printk("%s(%d):block_til_ready before block on %s count=%d\n",
2635 __FILE__,__LINE__, tty->driver->name, info->count );
2636
2637 spin_lock_irqsave(&info->lock, flags);
2638 if (!tty_hung_up_p(filp)) {
2639 extra_count = 1;
2640 info->count--;
2641 }
2642 spin_unlock_irqrestore(&info->lock, flags);
2643 info->blocked_open++;
2644
2645 while (1) {
2646 if ((tty->termios->c_cflag & CBAUD)) {
2647 spin_lock_irqsave(&info->lock,flags);
2648 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2649 set_signals(info);
2650 spin_unlock_irqrestore(&info->lock,flags);
2651 }
2652
2653 set_current_state(TASK_INTERRUPTIBLE);
2654
2655 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
2656 retval = (info->flags & ASYNC_HUP_NOTIFY) ?
2657 -EAGAIN : -ERESTARTSYS;
2658 break;
2659 }
2660
2661 spin_lock_irqsave(&info->lock,flags);
2662 get_signals(info);
2663 spin_unlock_irqrestore(&info->lock,flags);
2664
2665 if (!(info->flags & ASYNC_CLOSING) &&
2666 (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
2667 break;
2668 }
2669
2670 if (signal_pending(current)) {
2671 retval = -ERESTARTSYS;
2672 break;
2673 }
2674
2675 if (debug_level >= DEBUG_LEVEL_INFO)
2676 printk("%s(%d):block_til_ready blocking on %s count=%d\n",
2677 __FILE__,__LINE__, tty->driver->name, info->count );
2678
2679 schedule();
2680 }
2681
2682 set_current_state(TASK_RUNNING);
2683 remove_wait_queue(&info->open_wait, &wait);
2684
2685 if (extra_count)
2686 info->count++;
2687 info->blocked_open--;
2688
2689 if (debug_level >= DEBUG_LEVEL_INFO)
2690 printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
2691 __FILE__,__LINE__, tty->driver->name, info->count );
2692
2693 if (!retval)
2694 info->flags |= ASYNC_NORMAL_ACTIVE;
2695
2696 return retval;
2697 }
2698
2699 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2700 {
2701 MGSLPC_INFO *info;
2702 int retval, line;
2703 unsigned long flags;
2704
2705 /* verify range of specified line number */
2706 line = tty->index;
2707 if ((line < 0) || (line >= mgslpc_device_count)) {
2708 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2709 __FILE__,__LINE__,line);
2710 return -ENODEV;
2711 }
2712
2713 /* find the info structure for the specified line */
2714 info = mgslpc_device_list;
2715 while(info && info->line != line)
2716 info = info->next_device;
2717 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2718 return -ENODEV;
2719
2720 tty->driver_data = info;
2721 info->tty = tty;
2722
2723 if (debug_level >= DEBUG_LEVEL_INFO)
2724 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2725 __FILE__,__LINE__,tty->driver->name, info->count);
2726
2727 /* If port is closing, signal caller to try again */
2728 if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
2729 if (info->flags & ASYNC_CLOSING)
2730 interruptible_sleep_on(&info->close_wait);
2731 retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
2732 -EAGAIN : -ERESTARTSYS);
2733 goto cleanup;
2734 }
2735
2736 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2737
2738 spin_lock_irqsave(&info->netlock, flags);
2739 if (info->netcount) {
2740 retval = -EBUSY;
2741 spin_unlock_irqrestore(&info->netlock, flags);
2742 goto cleanup;
2743 }
2744 info->count++;
2745 spin_unlock_irqrestore(&info->netlock, flags);
2746
2747 if (info->count == 1) {
2748 /* 1st open on this device, init hardware */
2749 retval = startup(info);
2750 if (retval < 0)
2751 goto cleanup;
2752 }
2753
2754 retval = block_til_ready(tty, filp, info);
2755 if (retval) {
2756 if (debug_level >= DEBUG_LEVEL_INFO)
2757 printk("%s(%d):block_til_ready(%s) returned %d\n",
2758 __FILE__,__LINE__, info->device_name, retval);
2759 goto cleanup;
2760 }
2761
2762 if (debug_level >= DEBUG_LEVEL_INFO)
2763 printk("%s(%d):mgslpc_open(%s) success\n",
2764 __FILE__,__LINE__, info->device_name);
2765 retval = 0;
2766
2767 cleanup:
2768 if (retval) {
2769 if (tty->count == 1)
2770 info->tty = NULL; /* tty layer will release tty struct */
2771 if(info->count)
2772 info->count--;
2773 }
2774
2775 return retval;
2776 }
2777
2778 /*
2779 * /proc fs routines....
2780 */
2781
2782 static inline int line_info(char *buf, MGSLPC_INFO *info)
2783 {
2784 char stat_buf[30];
2785 int ret;
2786 unsigned long flags;
2787
2788 ret = sprintf(buf, "%s:io:%04X irq:%d",
2789 info->device_name, info->io_base, info->irq_level);
2790
2791 /* output current serial signal states */
2792 spin_lock_irqsave(&info->lock,flags);
2793 get_signals(info);
2794 spin_unlock_irqrestore(&info->lock,flags);
2795
2796 stat_buf[0] = 0;
2797 stat_buf[1] = 0;
2798 if (info->serial_signals & SerialSignal_RTS)
2799 strcat(stat_buf, "|RTS");
2800 if (info->serial_signals & SerialSignal_CTS)
2801 strcat(stat_buf, "|CTS");
2802 if (info->serial_signals & SerialSignal_DTR)
2803 strcat(stat_buf, "|DTR");
2804 if (info->serial_signals & SerialSignal_DSR)
2805 strcat(stat_buf, "|DSR");
2806 if (info->serial_signals & SerialSignal_DCD)
2807 strcat(stat_buf, "|CD");
2808 if (info->serial_signals & SerialSignal_RI)
2809 strcat(stat_buf, "|RI");
2810
2811 if (info->params.mode == MGSL_MODE_HDLC) {
2812 ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
2813 info->icount.txok, info->icount.rxok);
2814 if (info->icount.txunder)
2815 ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
2816 if (info->icount.txabort)
2817 ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
2818 if (info->icount.rxshort)
2819 ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
2820 if (info->icount.rxlong)
2821 ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
2822 if (info->icount.rxover)
2823 ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
2824 if (info->icount.rxcrc)
2825 ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
2826 } else {
2827 ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
2828 info->icount.tx, info->icount.rx);
2829 if (info->icount.frame)
2830 ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
2831 if (info->icount.parity)
2832 ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
2833 if (info->icount.brk)
2834 ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
2835 if (info->icount.overrun)
2836 ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
2837 }
2838
2839 /* Append serial signal status to end */
2840 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2841
2842 ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2843 info->tx_active,info->bh_requested,info->bh_running,
2844 info->pending_bh);
2845
2846 return ret;
2847 }
2848
2849 /* Called to print information about devices
2850 */
2851 static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
2852 int *eof, void *data)
2853 {
2854 int len = 0, l;
2855 off_t begin = 0;
2856 MGSLPC_INFO *info;
2857
2858 len += sprintf(page, "synclink driver:%s\n", driver_version);
2859
2860 info = mgslpc_device_list;
2861 while( info ) {
2862 l = line_info(page + len, info);
2863 len += l;
2864 if (len+begin > off+count)
2865 goto done;
2866 if (len+begin < off) {
2867 begin += len;
2868 len = 0;
2869 }
2870 info = info->next_device;
2871 }
2872
2873 *eof = 1;
2874 done:
2875 if (off >= len+begin)
2876 return 0;
2877 *start = page + (off-begin);
2878 return ((count < begin+len-off) ? count : begin+len-off);
2879 }
2880
2881 static int rx_alloc_buffers(MGSLPC_INFO *info)
2882 {
2883 /* each buffer has header and data */
2884 info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2885
2886 /* calculate total allocation size for 8 buffers */
2887 info->rx_buf_total_size = info->rx_buf_size * 8;
2888
2889 /* limit total allocated memory */
2890 if (info->rx_buf_total_size > 0x10000)
2891 info->rx_buf_total_size = 0x10000;
2892
2893 /* calculate number of buffers */
2894 info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2895
2896 info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2897 if (info->rx_buf == NULL)
2898 return -ENOMEM;
2899
2900 rx_reset_buffers(info);
2901 return 0;
2902 }
2903
2904 static void rx_free_buffers(MGSLPC_INFO *info)
2905 {
2906 kfree(info->rx_buf);
2907 info->rx_buf = NULL;
2908 }
2909
2910 static int claim_resources(MGSLPC_INFO *info)
2911 {
2912 if (rx_alloc_buffers(info) < 0 ) {
2913 printk( "Cant allocate rx buffer %s\n", info->device_name);
2914 release_resources(info);
2915 return -ENODEV;
2916 }
2917 return 0;
2918 }
2919
2920 static void release_resources(MGSLPC_INFO *info)
2921 {
2922 if (debug_level >= DEBUG_LEVEL_INFO)
2923 printk("release_resources(%s)\n", info->device_name);
2924 rx_free_buffers(info);
2925 }
2926
2927 /* Add the specified device instance data structure to the
2928 * global linked list of devices and increment the device count.
2929 *
2930 * Arguments: info pointer to device instance data
2931 */
2932 static void mgslpc_add_device(MGSLPC_INFO *info)
2933 {
2934 info->next_device = NULL;
2935 info->line = mgslpc_device_count;
2936 sprintf(info->device_name,"ttySLP%d",info->line);
2937
2938 if (info->line < MAX_DEVICE_COUNT) {
2939 if (maxframe[info->line])
2940 info->max_frame_size = maxframe[info->line];
2941 info->dosyncppp = dosyncppp[info->line];
2942 }
2943
2944 mgslpc_device_count++;
2945
2946 if (!mgslpc_device_list)
2947 mgslpc_device_list = info;
2948 else {
2949 MGSLPC_INFO *current_dev = mgslpc_device_list;
2950 while( current_dev->next_device )
2951 current_dev = current_dev->next_device;
2952 current_dev->next_device = info;
2953 }
2954
2955 if (info->max_frame_size < 4096)
2956 info->max_frame_size = 4096;
2957 else if (info->max_frame_size > 65535)
2958 info->max_frame_size = 65535;
2959
2960 printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2961 info->device_name, info->io_base, info->irq_level);
2962
2963 #ifdef CONFIG_HDLC
2964 hdlcdev_init(info);
2965 #endif
2966 }
2967
2968 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2969 {
2970 MGSLPC_INFO *info = mgslpc_device_list;
2971 MGSLPC_INFO *last = NULL;
2972
2973 while(info) {
2974 if (info == remove_info) {
2975 if (last)
2976 last->next_device = info->next_device;
2977 else
2978 mgslpc_device_list = info->next_device;
2979 #ifdef CONFIG_HDLC
2980 hdlcdev_exit(info);
2981 #endif
2982 release_resources(info);
2983 kfree(info);
2984 mgslpc_device_count--;
2985 return;
2986 }
2987 last = info;
2988 info = info->next_device;
2989 }
2990 }
2991
2992 static struct pcmcia_device_id mgslpc_ids[] = {
2993 PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2994 PCMCIA_DEVICE_NULL
2995 };
2996 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2997
2998 static struct pcmcia_driver mgslpc_driver = {
2999 .owner = THIS_MODULE,
3000 .drv = {
3001 .name = "synclink_cs",
3002 },
3003 .probe = mgslpc_probe,
3004 .remove = mgslpc_detach,
3005 .id_table = mgslpc_ids,
3006 .suspend = mgslpc_suspend,
3007 .resume = mgslpc_resume,
3008 };
3009
3010 static const struct tty_operations mgslpc_ops = {
3011 .open = mgslpc_open,
3012 .close = mgslpc_close,
3013 .write = mgslpc_write,
3014 .put_char = mgslpc_put_char,
3015 .flush_chars = mgslpc_flush_chars,
3016 .write_room = mgslpc_write_room,
3017 .chars_in_buffer = mgslpc_chars_in_buffer,
3018 .flush_buffer = mgslpc_flush_buffer,
3019 .ioctl = mgslpc_ioctl,
3020 .throttle = mgslpc_throttle,
3021 .unthrottle = mgslpc_unthrottle,
3022 .send_xchar = mgslpc_send_xchar,
3023 .break_ctl = mgslpc_break,
3024 .wait_until_sent = mgslpc_wait_until_sent,
3025 .read_proc = mgslpc_read_proc,
3026 .set_termios = mgslpc_set_termios,
3027 .stop = tx_pause,
3028 .start = tx_release,
3029 .hangup = mgslpc_hangup,
3030 .tiocmget = tiocmget,
3031 .tiocmset = tiocmset,
3032 };
3033
3034 static void synclink_cs_cleanup(void)
3035 {
3036 int rc;
3037
3038 printk("Unloading %s: version %s\n", driver_name, driver_version);
3039
3040 while(mgslpc_device_list)
3041 mgslpc_remove_device(mgslpc_device_list);
3042
3043 if (serial_driver) {
3044 if ((rc = tty_unregister_driver(serial_driver)))
3045 printk("%s(%d) failed to unregister tty driver err=%d\n",
3046 __FILE__,__LINE__,rc);
3047 put_tty_driver(serial_driver);
3048 }
3049
3050 pcmcia_unregister_driver(&mgslpc_driver);
3051 }
3052
3053 static int __init synclink_cs_init(void)
3054 {
3055 int rc;
3056
3057 if (break_on_load) {
3058 mgslpc_get_text_ptr();
3059 BREAKPOINT();
3060 }
3061
3062 printk("%s %s\n", driver_name, driver_version);
3063
3064 if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
3065 return rc;
3066
3067 serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
3068 if (!serial_driver) {
3069 rc = -ENOMEM;
3070 goto error;
3071 }
3072
3073 /* Initialize the tty_driver structure */
3074
3075 serial_driver->owner = THIS_MODULE;
3076 serial_driver->driver_name = "synclink_cs";
3077 serial_driver->name = "ttySLP";
3078 serial_driver->major = ttymajor;
3079 serial_driver->minor_start = 64;
3080 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
3081 serial_driver->subtype = SERIAL_TYPE_NORMAL;
3082 serial_driver->init_termios = tty_std_termios;
3083 serial_driver->init_termios.c_cflag =
3084 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
3085 serial_driver->flags = TTY_DRIVER_REAL_RAW;
3086 tty_set_operations(serial_driver, &mgslpc_ops);
3087
3088 if ((rc = tty_register_driver(serial_driver)) < 0) {
3089 printk("%s(%d):Couldn't register serial driver\n",
3090 __FILE__,__LINE__);
3091 put_tty_driver(serial_driver);
3092 serial_driver = NULL;
3093 goto error;
3094 }
3095
3096 printk("%s %s, tty major#%d\n",
3097 driver_name, driver_version,
3098 serial_driver->major);
3099
3100 return 0;
3101
3102 error:
3103 synclink_cs_cleanup();
3104 return rc;
3105 }
3106
3107 static void __exit synclink_cs_exit(void)
3108 {
3109 synclink_cs_cleanup();
3110 }
3111
3112 module_init(synclink_cs_init);
3113 module_exit(synclink_cs_exit);
3114
3115 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
3116 {
3117 unsigned int M, N;
3118 unsigned char val;
3119
3120 /* note:standard BRG mode is broken in V3.2 chip
3121 * so enhanced mode is always used
3122 */
3123
3124 if (rate) {
3125 N = 3686400 / rate;
3126 if (!N)
3127 N = 1;
3128 N >>= 1;
3129 for (M = 1; N > 64 && M < 16; M++)
3130 N >>= 1;
3131 N--;
3132
3133 /* BGR[5..0] = N
3134 * BGR[9..6] = M
3135 * BGR[7..0] contained in BGR register
3136 * BGR[9..8] contained in CCR2[7..6]
3137 * divisor = (N+1)*2^M
3138 *
3139 * Note: M *must* not be zero (causes asymetric duty cycle)
3140 */
3141 write_reg(info, (unsigned char) (channel + BGR),
3142 (unsigned char) ((M << 6) + N));
3143 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
3144 val |= ((M << 4) & 0xc0);
3145 write_reg(info, (unsigned char) (channel + CCR2), val);
3146 }
3147 }
3148
3149 /* Enabled the AUX clock output at the specified frequency.
3150 */
3151 static void enable_auxclk(MGSLPC_INFO *info)
3152 {
3153 unsigned char val;
3154
3155 /* MODE
3156 *
3157 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3158 * 05 ADM Address Mode, 0 = no addr recognition
3159 * 04 TMD Timer Mode, 0 = external
3160 * 03 RAC Receiver Active, 0 = inactive
3161 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3162 * 01 TRS Timer Resolution, 1=512
3163 * 00 TLP Test Loop, 0 = no loop
3164 *
3165 * 1000 0010
3166 */
3167 val = 0x82;
3168
3169 /* channel B RTS is used to enable AUXCLK driver on SP505 */
3170 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3171 val |= BIT2;
3172 write_reg(info, CHB + MODE, val);
3173
3174 /* CCR0
3175 *
3176 * 07 PU Power Up, 1=active, 0=power down
3177 * 06 MCE Master Clock Enable, 1=enabled
3178 * 05 Reserved, 0
3179 * 04..02 SC[2..0] Encoding
3180 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3181 *
3182 * 11000000
3183 */
3184 write_reg(info, CHB + CCR0, 0xc0);
3185
3186 /* CCR1
3187 *
3188 * 07 SFLG Shared Flag, 0 = disable shared flags
3189 * 06 GALP Go Active On Loop, 0 = not used
3190 * 05 GLP Go On Loop, 0 = not used
3191 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3192 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3193 * 02..00 CM[2..0] Clock Mode
3194 *
3195 * 0001 0111
3196 */
3197 write_reg(info, CHB + CCR1, 0x17);
3198
3199 /* CCR2 (Channel B)
3200 *
3201 * 07..06 BGR[9..8] Baud rate bits 9..8
3202 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3203 * 04 SSEL Clock source select, 1=submode b
3204 * 03 TOE 0=TxCLK is input, 1=TxCLK is output
3205 * 02 RWX Read/Write Exchange 0=disabled
3206 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3207 * 00 DIV, data inversion 0=disabled, 1=enabled
3208 *
3209 * 0011 1000
3210 */
3211 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3212 write_reg(info, CHB + CCR2, 0x38);
3213 else
3214 write_reg(info, CHB + CCR2, 0x30);
3215
3216 /* CCR4
3217 *
3218 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3219 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3220 * 05 TST1 Test Pin, 0=normal operation
3221 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3222 * 03..02 Reserved, must be 0
3223 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3224 *
3225 * 0101 0000
3226 */
3227 write_reg(info, CHB + CCR4, 0x50);
3228
3229 /* if auxclk not enabled, set internal BRG so
3230 * CTS transitions can be detected (requires TxC)
3231 */
3232 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3233 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3234 else
3235 mgslpc_set_rate(info, CHB, 921600);
3236 }
3237
3238 static void loopback_enable(MGSLPC_INFO *info)
3239 {
3240 unsigned char val;
3241
3242 /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
3243 val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3244 write_reg(info, CHA + CCR1, val);
3245
3246 /* CCR2:04 SSEL Clock source select, 1=submode b */
3247 val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3248 write_reg(info, CHA + CCR2, val);
3249
3250 /* set LinkSpeed if available, otherwise default to 2Mbps */
3251 if (info->params.clock_speed)
3252 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3253 else
3254 mgslpc_set_rate(info, CHA, 1843200);
3255
3256 /* MODE:00 TLP Test Loop, 1=loopback enabled */
3257 val = read_reg(info, CHA + MODE) | BIT0;
3258 write_reg(info, CHA + MODE, val);
3259 }
3260
3261 static void hdlc_mode(MGSLPC_INFO *info)
3262 {
3263 unsigned char val;
3264 unsigned char clkmode, clksubmode;
3265
3266 /* disable all interrupts */
3267 irq_disable(info, CHA, 0xffff);
3268 irq_disable(info, CHB, 0xffff);
3269 port_irq_disable(info, 0xff);
3270
3271 /* assume clock mode 0a, rcv=RxC xmt=TxC */
3272 clkmode = clksubmode = 0;
3273 if (info->params.flags & HDLC_FLAG_RXC_DPLL
3274 && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3275 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3276 clkmode = 7;
3277 } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3278 && info->params.flags & HDLC_FLAG_TXC_BRG) {
3279 /* clock mode 7b, rcv = BRG, xmt = BRG */
3280 clkmode = 7;
3281 clksubmode = 1;
3282 } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3283 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3284 /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3285 clkmode = 6;
3286 clksubmode = 1;
3287 } else {
3288 /* clock mode 6a, rcv = DPLL, xmt = TxC */
3289 clkmode = 6;
3290 }
3291 } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3292 /* clock mode 0b, rcv = RxC, xmt = BRG */
3293 clksubmode = 1;
3294 }
3295
3296 /* MODE
3297 *
3298 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3299 * 05 ADM Address Mode, 0 = no addr recognition
3300 * 04 TMD Timer Mode, 0 = external
3301 * 03 RAC Receiver Active, 0 = inactive
3302 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3303 * 01 TRS Timer Resolution, 1=512
3304 * 00 TLP Test Loop, 0 = no loop
3305 *
3306 * 1000 0010
3307 */
3308 val = 0x82;
3309 if (info->params.loopback)
3310 val |= BIT0;
3311
3312 /* preserve RTS state */
3313 if (info->serial_signals & SerialSignal_RTS)
3314 val |= BIT2;
3315 write_reg(info, CHA + MODE, val);
3316
3317 /* CCR0
3318 *
3319 * 07 PU Power Up, 1=active, 0=power down
3320 * 06 MCE Master Clock Enable, 1=enabled
3321 * 05 Reserved, 0
3322 * 04..02 SC[2..0] Encoding
3323 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3324 *
3325 * 11000000
3326 */
3327 val = 0xc0;
3328 switch (info->params.encoding)
3329 {
3330 case HDLC_ENCODING_NRZI:
3331 val |= BIT3;
3332 break;
3333 case HDLC_ENCODING_BIPHASE_SPACE:
3334 val |= BIT4;
3335 break; // FM0
3336 case HDLC_ENCODING_BIPHASE_MARK:
3337 val |= BIT4 + BIT2;
3338 break; // FM1
3339 case HDLC_ENCODING_BIPHASE_LEVEL:
3340 val |= BIT4 + BIT3;
3341 break; // Manchester
3342 }
3343 write_reg(info, CHA + CCR0, val);
3344
3345 /* CCR1
3346 *
3347 * 07 SFLG Shared Flag, 0 = disable shared flags
3348 * 06 GALP Go Active On Loop, 0 = not used
3349 * 05 GLP Go On Loop, 0 = not used
3350 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3351 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3352 * 02..00 CM[2..0] Clock Mode
3353 *
3354 * 0001 0000
3355 */
3356 val = 0x10 + clkmode;
3357 write_reg(info, CHA + CCR1, val);
3358
3359 /* CCR2
3360 *
3361 * 07..06 BGR[9..8] Baud rate bits 9..8
3362 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3363 * 04 SSEL Clock source select, 1=submode b
3364 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3365 * 02 RWX Read/Write Exchange 0=disabled
3366 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3367 * 00 DIV, data inversion 0=disabled, 1=enabled
3368 *
3369 * 0000 0000
3370 */
3371 val = 0x00;
3372 if (clkmode == 2 || clkmode == 3 || clkmode == 6
3373 || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3374 val |= BIT5;
3375 if (clksubmode)
3376 val |= BIT4;
3377 if (info->params.crc_type == HDLC_CRC_32_CCITT)
3378 val |= BIT1;
3379 if (info->params.encoding == HDLC_ENCODING_NRZB)
3380 val |= BIT0;
3381 write_reg(info, CHA + CCR2, val);
3382
3383 /* CCR3
3384 *
3385 * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3386 * 05 EPT Enable preamble transmission, 1=enabled
3387 * 04 RADD Receive address pushed to FIFO, 0=disabled
3388 * 03 CRL CRC Reset Level, 0=FFFF
3389 * 02 RCRC Rx CRC 0=On 1=Off
3390 * 01 TCRC Tx CRC 0=On 1=Off
3391 * 00 PSD DPLL Phase Shift Disable
3392 *
3393 * 0000 0000
3394 */
3395 val = 0x00;
3396 if (info->params.crc_type == HDLC_CRC_NONE)
3397 val |= BIT2 + BIT1;
3398 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3399 val |= BIT5;
3400 switch (info->params.preamble_length)
3401 {
3402 case HDLC_PREAMBLE_LENGTH_16BITS:
3403 val |= BIT6;
3404 break;
3405 case HDLC_PREAMBLE_LENGTH_32BITS:
3406 val |= BIT6;
3407 break;
3408 case HDLC_PREAMBLE_LENGTH_64BITS:
3409 val |= BIT7 + BIT6;
3410 break;
3411 }
3412 write_reg(info, CHA + CCR3, val);
3413
3414 /* PRE - Preamble pattern */
3415 val = 0;
3416 switch (info->params.preamble)
3417 {
3418 case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3419 case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
3420 case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
3421 case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
3422 }
3423 write_reg(info, CHA + PRE, val);
3424
3425 /* CCR4
3426 *
3427 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3428 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3429 * 05 TST1 Test Pin, 0=normal operation
3430 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3431 * 03..02 Reserved, must be 0
3432 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3433 *
3434 * 0101 0000
3435 */
3436 val = 0x50;
3437 write_reg(info, CHA + CCR4, val);
3438 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3439 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3440 else
3441 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3442
3443 /* RLCR Receive length check register
3444 *
3445 * 7 1=enable receive length check
3446 * 6..0 Max frame length = (RL + 1) * 32
3447 */
3448 write_reg(info, CHA + RLCR, 0);
3449
3450 /* XBCH Transmit Byte Count High
3451 *
3452 * 07 DMA mode, 0 = interrupt driven
3453 * 06 NRM, 0=ABM (ignored)
3454 * 05 CAS Carrier Auto Start
3455 * 04 XC Transmit Continuously (ignored)
3456 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3457 *
3458 * 0000 0000
3459 */
3460 val = 0x00;
3461 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3462 val |= BIT5;
3463 write_reg(info, CHA + XBCH, val);
3464 enable_auxclk(info);
3465 if (info->params.loopback || info->testing_irq)
3466 loopback_enable(info);
3467 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3468 {
3469 irq_enable(info, CHB, IRQ_CTS);
3470 /* PVR[3] 1=AUTO CTS active */
3471 set_reg_bits(info, CHA + PVR, BIT3);
3472 } else
3473 clear_reg_bits(info, CHA + PVR, BIT3);
3474
3475 irq_enable(info, CHA,
3476 IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3477 IRQ_UNDERRUN + IRQ_TXFIFO);
3478 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3479 wait_command_complete(info, CHA);
3480 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3481
3482 /* Master clock mode enabled above to allow reset commands
3483 * to complete even if no data clocks are present.
3484 *
3485 * Disable master clock mode for normal communications because
3486 * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3487 * IRQ when in master clock mode.
3488 *
3489 * Leave master clock mode enabled for IRQ test because the
3490 * timer IRQ used by the test can only happen in master clock mode.
3491 */
3492 if (!info->testing_irq)
3493 clear_reg_bits(info, CHA + CCR0, BIT6);
3494
3495 tx_set_idle(info);
3496
3497 tx_stop(info);
3498 rx_stop(info);
3499 }
3500
3501 static void rx_stop(MGSLPC_INFO *info)
3502 {
3503 if (debug_level >= DEBUG_LEVEL_ISR)
3504 printk("%s(%d):rx_stop(%s)\n",
3505 __FILE__,__LINE__, info->device_name );
3506
3507 /* MODE:03 RAC Receiver Active, 0=inactive */
3508 clear_reg_bits(info, CHA + MODE, BIT3);
3509
3510 info->rx_enabled = 0;
3511 info->rx_overflow = 0;
3512 }
3513
3514 static void rx_start(MGSLPC_INFO *info)
3515 {
3516 if (debug_level >= DEBUG_LEVEL_ISR)
3517 printk("%s(%d):rx_start(%s)\n",
3518 __FILE__,__LINE__, info->device_name );
3519
3520 rx_reset_buffers(info);
3521 info->rx_enabled = 0;
3522 info->rx_overflow = 0;
3523
3524 /* MODE:03 RAC Receiver Active, 1=active */
3525 set_reg_bits(info, CHA + MODE, BIT3);
3526
3527 info->rx_enabled = 1;
3528 }
3529
3530 static void tx_start(MGSLPC_INFO *info)
3531 {
3532 if (debug_level >= DEBUG_LEVEL_ISR)
3533 printk("%s(%d):tx_start(%s)\n",
3534 __FILE__,__LINE__, info->device_name );
3535
3536 if (info->tx_count) {
3537 /* If auto RTS enabled and RTS is inactive, then assert */
3538 /* RTS and set a flag indicating that the driver should */
3539 /* negate RTS when the transmission completes. */
3540 info->drop_rts_on_tx_done = 0;
3541
3542 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3543 get_signals(info);
3544 if (!(info->serial_signals & SerialSignal_RTS)) {
3545 info->serial_signals |= SerialSignal_RTS;
3546 set_signals(info);
3547 info->drop_rts_on_tx_done = 1;
3548 }
3549 }
3550
3551 if (info->params.mode == MGSL_MODE_ASYNC) {
3552 if (!info->tx_active) {
3553 info->tx_active = 1;
3554 tx_ready(info);
3555 }
3556 } else {
3557 info->tx_active = 1;
3558 tx_ready(info);
3559 info->tx_timer.expires = jiffies + msecs_to_jiffies(5000);
3560 add_timer(&info->tx_timer);
3561 }
3562 }
3563
3564 if (!info->tx_enabled)
3565 info->tx_enabled = 1;
3566 }
3567
3568 static void tx_stop(MGSLPC_INFO *info)
3569 {
3570 if (debug_level >= DEBUG_LEVEL_ISR)
3571 printk("%s(%d):tx_stop(%s)\n",
3572 __FILE__,__LINE__, info->device_name );
3573
3574 del_timer(&info->tx_timer);
3575
3576 info->tx_enabled = 0;
3577 info->tx_active = 0;
3578 }
3579
3580 /* Reset the adapter to a known state and prepare it for further use.
3581 */
3582 static void reset_device(MGSLPC_INFO *info)
3583 {
3584 /* power up both channels (set BIT7) */
3585 write_reg(info, CHA + CCR0, 0x80);
3586 write_reg(info, CHB + CCR0, 0x80);
3587 write_reg(info, CHA + MODE, 0);
3588 write_reg(info, CHB + MODE, 0);
3589
3590 /* disable all interrupts */
3591 irq_disable(info, CHA, 0xffff);
3592 irq_disable(info, CHB, 0xffff);
3593 port_irq_disable(info, 0xff);
3594
3595 /* PCR Port Configuration Register
3596 *
3597 * 07..04 DEC[3..0] Serial I/F select outputs
3598 * 03 output, 1=AUTO CTS control enabled
3599 * 02 RI Ring Indicator input 0=active
3600 * 01 DSR input 0=active
3601 * 00 DTR output 0=active
3602 *
3603 * 0000 0110
3604 */
3605 write_reg(info, PCR, 0x06);
3606
3607 /* PVR Port Value Register
3608 *
3609 * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
3610 * 03 AUTO CTS output 1=enabled
3611 * 02 RI Ring Indicator input
3612 * 01 DSR input
3613 * 00 DTR output (1=inactive)
3614 *
3615 * 0000 0001
3616 */
3617 // write_reg(info, PVR, PVR_DTR);
3618
3619 /* IPC Interrupt Port Configuration
3620 *
3621 * 07 VIS 1=Masked interrupts visible
3622 * 06..05 Reserved, 0
3623 * 04..03 SLA Slave address, 00 ignored
3624 * 02 CASM Cascading Mode, 1=daisy chain
3625 * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
3626 *
3627 * 0000 0101
3628 */
3629 write_reg(info, IPC, 0x05);
3630 }
3631
3632 static void async_mode(MGSLPC_INFO *info)
3633 {
3634 unsigned char val;
3635
3636 /* disable all interrupts */
3637 irq_disable(info, CHA, 0xffff);
3638 irq_disable(info, CHB, 0xffff);
3639 port_irq_disable(info, 0xff);
3640
3641 /* MODE
3642 *
3643 * 07 Reserved, 0
3644 * 06 FRTS RTS State, 0=active
3645 * 05 FCTS Flow Control on CTS
3646 * 04 FLON Flow Control Enable
3647 * 03 RAC Receiver Active, 0 = inactive
3648 * 02 RTS 0=Auto RTS, 1=manual RTS
3649 * 01 TRS Timer Resolution, 1=512
3650 * 00 TLP Test Loop, 0 = no loop
3651 *
3652 * 0000 0110
3653 */
3654 val = 0x06;
3655 if (info->params.loopback)
3656 val |= BIT0;
3657
3658 /* preserve RTS state */
3659 if (!(info->serial_signals & SerialSignal_RTS))
3660 val |= BIT6;
3661 write_reg(info, CHA + MODE, val);
3662
3663 /* CCR0
3664 *
3665 * 07 PU Power Up, 1=active, 0=power down
3666 * 06 MCE Master Clock Enable, 1=enabled
3667 * 05 Reserved, 0
3668 * 04..02 SC[2..0] Encoding, 000=NRZ
3669 * 01..00 SM[1..0] Serial Mode, 11=Async
3670 *
3671 * 1000 0011
3672 */
3673 write_reg(info, CHA + CCR0, 0x83);
3674
3675 /* CCR1
3676 *
3677 * 07..05 Reserved, 0
3678 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3679 * 03 BCR Bit Clock Rate, 1=16x
3680 * 02..00 CM[2..0] Clock Mode, 111=BRG
3681 *
3682 * 0001 1111
3683 */
3684 write_reg(info, CHA + CCR1, 0x1f);
3685
3686 /* CCR2 (channel A)
3687 *
3688 * 07..06 BGR[9..8] Baud rate bits 9..8
3689 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3690 * 04 SSEL Clock source select, 1=submode b
3691 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3692 * 02 RWX Read/Write Exchange 0=disabled
3693 * 01 Reserved, 0
3694 * 00 DIV, data inversion 0=disabled, 1=enabled
3695 *
3696 * 0001 0000
3697 */
3698 write_reg(info, CHA + CCR2, 0x10);
3699
3700 /* CCR3
3701 *
3702 * 07..01 Reserved, 0
3703 * 00 PSD DPLL Phase Shift Disable
3704 *
3705 * 0000 0000
3706 */
3707 write_reg(info, CHA + CCR3, 0);
3708
3709 /* CCR4
3710 *
3711 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3712 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3713 * 05 TST1 Test Pin, 0=normal operation
3714 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3715 * 03..00 Reserved, must be 0
3716 *
3717 * 0101 0000
3718 */
3719 write_reg(info, CHA + CCR4, 0x50);
3720 mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3721
3722 /* DAFO Data Format
3723 *
3724 * 07 Reserved, 0
3725 * 06 XBRK transmit break, 0=normal operation
3726 * 05 Stop bits (0=1, 1=2)
3727 * 04..03 PAR[1..0] Parity (01=odd, 10=even)
3728 * 02 PAREN Parity Enable
3729 * 01..00 CHL[1..0] Character Length (00=8, 01=7)
3730 *
3731 */
3732 val = 0x00;
3733 if (info->params.data_bits != 8)
3734 val |= BIT0; /* 7 bits */
3735 if (info->params.stop_bits != 1)
3736 val |= BIT5;
3737 if (info->params.parity != ASYNC_PARITY_NONE)
3738 {
3739 val |= BIT2; /* Parity enable */
3740 if (info->params.parity == ASYNC_PARITY_ODD)
3741 val |= BIT3;
3742 else
3743 val |= BIT4;
3744 }
3745 write_reg(info, CHA + DAFO, val);
3746
3747 /* RFC Rx FIFO Control
3748 *
3749 * 07 Reserved, 0
3750 * 06 DPS, 1=parity bit not stored in data byte
3751 * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
3752 * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3753 * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3754 * 01 Reserved, 0
3755 * 00 TCDE Terminate Char Detect Enable, 0=disabled
3756 *
3757 * 0101 1100
3758 */
3759 write_reg(info, CHA + RFC, 0x5c);
3760
3761 /* RLCR Receive length check register
3762 *
3763 * Max frame length = (RL + 1) * 32
3764 */
3765 write_reg(info, CHA + RLCR, 0);
3766
3767 /* XBCH Transmit Byte Count High
3768 *
3769 * 07 DMA mode, 0 = interrupt driven
3770 * 06 NRM, 0=ABM (ignored)
3771 * 05 CAS Carrier Auto Start
3772 * 04 XC Transmit Continuously (ignored)
3773 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3774 *
3775 * 0000 0000
3776 */
3777 val = 0x00;
3778 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3779 val |= BIT5;
3780 write_reg(info, CHA + XBCH, val);
3781 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3782 irq_enable(info, CHA, IRQ_CTS);
3783
3784 /* MODE:03 RAC Receiver Active, 1=active */
3785 set_reg_bits(info, CHA + MODE, BIT3);
3786 enable_auxclk(info);
3787 if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3788 irq_enable(info, CHB, IRQ_CTS);
3789 /* PVR[3] 1=AUTO CTS active */
3790 set_reg_bits(info, CHA + PVR, BIT3);
3791 } else
3792 clear_reg_bits(info, CHA + PVR, BIT3);
3793 irq_enable(info, CHA,
3794 IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3795 IRQ_ALLSENT + IRQ_TXFIFO);
3796 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3797 wait_command_complete(info, CHA);
3798 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3799 }
3800
3801 /* Set the HDLC idle mode for the transmitter.
3802 */
3803 static void tx_set_idle(MGSLPC_INFO *info)
3804 {
3805 /* Note: ESCC2 only supports flags and one idle modes */
3806 if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3807 set_reg_bits(info, CHA + CCR1, BIT3);
3808 else
3809 clear_reg_bits(info, CHA + CCR1, BIT3);
3810 }
3811
3812 /* get state of the V24 status (input) signals.
3813 */
3814 static void get_signals(MGSLPC_INFO *info)
3815 {
3816 unsigned char status = 0;
3817
3818 /* preserve DTR and RTS */
3819 info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3820
3821 if (read_reg(info, CHB + VSTR) & BIT7)
3822 info->serial_signals |= SerialSignal_DCD;
3823 if (read_reg(info, CHB + STAR) & BIT1)
3824 info->serial_signals |= SerialSignal_CTS;
3825
3826 status = read_reg(info, CHA + PVR);
3827 if (!(status & PVR_RI))
3828 info->serial_signals |= SerialSignal_RI;
3829 if (!(status & PVR_DSR))
3830 info->serial_signals |= SerialSignal_DSR;
3831 }
3832
3833 /* Set the state of DTR and RTS based on contents of
3834 * serial_signals member of device extension.
3835 */
3836 static void set_signals(MGSLPC_INFO *info)
3837 {
3838 unsigned char val;
3839
3840 val = read_reg(info, CHA + MODE);
3841 if (info->params.mode == MGSL_MODE_ASYNC) {
3842 if (info->serial_signals & SerialSignal_RTS)
3843 val &= ~BIT6;
3844 else
3845 val |= BIT6;
3846 } else {
3847 if (info->serial_signals & SerialSignal_RTS)
3848 val |= BIT2;
3849 else
3850 val &= ~BIT2;
3851 }
3852 write_reg(info, CHA + MODE, val);
3853
3854 if (info->serial_signals & SerialSignal_DTR)
3855 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3856 else
3857 set_reg_bits(info, CHA + PVR, PVR_DTR);
3858 }
3859
3860 static void rx_reset_buffers(MGSLPC_INFO *info)
3861 {
3862 RXBUF *buf;
3863 int i;
3864
3865 info->rx_put = 0;
3866 info->rx_get = 0;
3867 info->rx_frame_count = 0;
3868 for (i=0 ; i < info->rx_buf_count ; i++) {
3869 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3870 buf->status = buf->count = 0;
3871 }
3872 }
3873
3874 /* Attempt to return a received HDLC frame
3875 * Only frames received without errors are returned.
3876 *
3877 * Returns 1 if frame returned, otherwise 0
3878 */
3879 static int rx_get_frame(MGSLPC_INFO *info)
3880 {
3881 unsigned short status;
3882 RXBUF *buf;
3883 unsigned int framesize = 0;
3884 unsigned long flags;
3885 struct tty_struct *tty = info->tty;
3886 int return_frame = 0;
3887
3888 if (info->rx_frame_count == 0)
3889 return 0;
3890
3891 buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3892
3893 status = buf->status;
3894
3895 /* 07 VFR 1=valid frame
3896 * 06 RDO 1=data overrun
3897 * 05 CRC 1=OK, 0=error
3898 * 04 RAB 1=frame aborted
3899 */
3900 if ((status & 0xf0) != 0xA0) {
3901 if (!(status & BIT7) || (status & BIT4))
3902 info->icount.rxabort++;
3903 else if (status & BIT6)
3904 info->icount.rxover++;
3905 else if (!(status & BIT5)) {
3906 info->icount.rxcrc++;
3907 if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3908 return_frame = 1;
3909 }
3910 framesize = 0;
3911 #ifdef CONFIG_HDLC
3912 {
3913 struct net_device_stats *stats = hdlc_stats(info->netdev);
3914 stats->rx_errors++;
3915 stats->rx_frame_errors++;
3916 }
3917 #endif
3918 } else
3919 return_frame = 1;
3920
3921 if (return_frame)
3922 framesize = buf->count;
3923
3924 if (debug_level >= DEBUG_LEVEL_BH)
3925 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3926 __FILE__,__LINE__,info->device_name,status,framesize);
3927
3928 if (debug_level >= DEBUG_LEVEL_DATA)
3929 trace_block(info, buf->data, framesize, 0);
3930
3931 if (framesize) {
3932 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3933 framesize+1 > info->max_frame_size) ||
3934 framesize > info->max_frame_size)
3935 info->icount.rxlong++;
3936 else {
3937 if (status & BIT5)
3938 info->icount.rxok++;
3939
3940 if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3941 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3942 ++framesize;
3943 }
3944
3945 #ifdef CONFIG_HDLC
3946 if (info->netcount)
3947 hdlcdev_rx(info, buf->data, framesize);
3948 else
3949 #endif
3950 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3951 }
3952 }
3953
3954 spin_lock_irqsave(&info->lock,flags);
3955 buf->status = buf->count = 0;
3956 info->rx_frame_count--;
3957 info->rx_get++;
3958 if (info->rx_get >= info->rx_buf_count)
3959 info->rx_get = 0;
3960 spin_unlock_irqrestore(&info->lock,flags);
3961
3962 return 1;
3963 }
3964
3965 static BOOLEAN register_test(MGSLPC_INFO *info)
3966 {
3967 static unsigned char patterns[] =
3968 { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3969 static unsigned int count = ARRAY_SIZE(patterns);
3970 unsigned int i;
3971 BOOLEAN rc = TRUE;
3972 unsigned long flags;
3973
3974 spin_lock_irqsave(&info->lock,flags);
3975 reset_device(info);
3976
3977 for (i = 0; i < count; i++) {
3978 write_reg(info, XAD1, patterns[i]);
3979 write_reg(info, XAD2, patterns[(i + 1) % count]);
3980 if ((read_reg(info, XAD1) != patterns[i]) ||
3981 (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3982 rc = FALSE;
3983 break;
3984 }
3985 }
3986
3987 spin_unlock_irqrestore(&info->lock,flags);
3988 return rc;
3989 }
3990
3991 static BOOLEAN irq_test(MGSLPC_INFO *info)
3992 {
3993 unsigned long end_time;
3994 unsigned long flags;
3995
3996 spin_lock_irqsave(&info->lock,flags);
3997 reset_device(info);
3998
3999 info->testing_irq = TRUE;
4000 hdlc_mode(info);
4001
4002 info->irq_occurred = FALSE;
4003
4004 /* init hdlc mode */
4005
4006 irq_enable(info, CHA, IRQ_TIMER);
4007 write_reg(info, CHA + TIMR, 0); /* 512 cycles */
4008 issue_command(info, CHA, CMD_START_TIMER);
4009
4010 spin_unlock_irqrestore(&info->lock,flags);
4011
4012 end_time=100;
4013 while(end_time-- && !info->irq_occurred) {
4014 msleep_interruptible(10);
4015 }
4016
4017 info->testing_irq = FALSE;
4018
4019 spin_lock_irqsave(&info->lock,flags);
4020 reset_device(info);
4021 spin_unlock_irqrestore(&info->lock,flags);
4022
4023 return info->irq_occurred ? TRUE : FALSE;
4024 }
4025
4026 static int adapter_test(MGSLPC_INFO *info)
4027 {
4028 if (!register_test(info)) {
4029 info->init_error = DiagStatus_AddressFailure;
4030 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
4031 __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
4032 return -ENODEV;
4033 }
4034
4035 if (!irq_test(info)) {
4036 info->init_error = DiagStatus_IrqFailure;
4037 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
4038 __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
4039 return -ENODEV;
4040 }
4041
4042 if (debug_level >= DEBUG_LEVEL_INFO)
4043 printk("%s(%d):device %s passed diagnostics\n",
4044 __FILE__,__LINE__,info->device_name);
4045 return 0;
4046 }
4047
4048 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
4049 {
4050 int i;
4051 int linecount;
4052 if (xmit)
4053 printk("%s tx data:\n",info->device_name);
4054 else
4055 printk("%s rx data:\n",info->device_name);
4056
4057 while(count) {
4058 if (count > 16)
4059 linecount = 16;
4060 else
4061 linecount = count;
4062
4063 for(i=0;i<linecount;i++)
4064 printk("%02X ",(unsigned char)data[i]);
4065 for(;i<17;i++)
4066 printk(" ");
4067 for(i=0;i<linecount;i++) {
4068 if (data[i]>=040 && data[i]<=0176)
4069 printk("%c",data[i]);
4070 else
4071 printk(".");
4072 }
4073 printk("\n");
4074
4075 data += linecount;
4076 count -= linecount;
4077 }
4078 }
4079
4080 /* HDLC frame time out
4081 * update stats and do tx completion processing
4082 */
4083 static void tx_timeout(unsigned long context)
4084 {
4085 MGSLPC_INFO *info = (MGSLPC_INFO*)context;
4086 unsigned long flags;
4087
4088 if ( debug_level >= DEBUG_LEVEL_INFO )
4089 printk( "%s(%d):tx_timeout(%s)\n",
4090 __FILE__,__LINE__,info->device_name);
4091 if(info->tx_active &&
4092 info->params.mode == MGSL_MODE_HDLC) {
4093 info->icount.txtimeout++;
4094 }
4095 spin_lock_irqsave(&info->lock,flags);
4096 info->tx_active = 0;
4097 info->tx_count = info->tx_put = info->tx_get = 0;
4098
4099 spin_unlock_irqrestore(&info->lock,flags);
4100
4101 #ifdef CONFIG_HDLC
4102 if (info->netcount)
4103 hdlcdev_tx_done(info);
4104 else
4105 #endif
4106 bh_transmit(info);
4107 }
4108
4109 #ifdef CONFIG_HDLC
4110
4111 /**
4112 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
4113 * set encoding and frame check sequence (FCS) options
4114 *
4115 * dev pointer to network device structure
4116 * encoding serial encoding setting
4117 * parity FCS setting
4118 *
4119 * returns 0 if success, otherwise error code
4120 */
4121 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
4122 unsigned short parity)
4123 {
4124 MGSLPC_INFO *info = dev_to_port(dev);
4125 unsigned char new_encoding;
4126 unsigned short new_crctype;
4127
4128 /* return error if TTY interface open */
4129 if (info->count)
4130 return -EBUSY;
4131
4132 switch (encoding)
4133 {
4134 case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
4135 case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
4136 case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
4137 case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
4138 case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
4139 default: return -EINVAL;
4140 }
4141
4142 switch (parity)
4143 {
4144 case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
4145 case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
4146 case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
4147 default: return -EINVAL;
4148 }
4149
4150 info->params.encoding = new_encoding;
4151 info->params.crc_type = new_crctype;
4152
4153 /* if network interface up, reprogram hardware */
4154 if (info->netcount)
4155 mgslpc_program_hw(info);
4156
4157 return 0;
4158 }
4159
4160 /**
4161 * called by generic HDLC layer to send frame
4162 *
4163 * skb socket buffer containing HDLC frame
4164 * dev pointer to network device structure
4165 *
4166 * returns 0 if success, otherwise error code
4167 */
4168 static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
4169 {
4170 MGSLPC_INFO *info = dev_to_port(dev);
4171 struct net_device_stats *stats = hdlc_stats(dev);
4172 unsigned long flags;
4173
4174 if (debug_level >= DEBUG_LEVEL_INFO)
4175 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
4176
4177 /* stop sending until this frame completes */
4178 netif_stop_queue(dev);
4179
4180 /* copy data to device buffers */
4181 memcpy(info->tx_buf, skb->data, skb->len);
4182 info->tx_get = 0;
4183 info->tx_put = info->tx_count = skb->len;
4184
4185 /* update network statistics */
4186 stats->tx_packets++;
4187 stats->tx_bytes += skb->len;
4188
4189 /* done with socket buffer, so free it */
4190 dev_kfree_skb(skb);
4191
4192 /* save start time for transmit timeout detection */
4193 dev->trans_start = jiffies;
4194
4195 /* start hardware transmitter if necessary */
4196 spin_lock_irqsave(&info->lock,flags);
4197 if (!info->tx_active)
4198 tx_start(info);
4199 spin_unlock_irqrestore(&info->lock,flags);
4200
4201 return 0;
4202 }
4203
4204 /**
4205 * called by network layer when interface enabled
4206 * claim resources and initialize hardware
4207 *
4208 * dev pointer to network device structure
4209 *
4210 * returns 0 if success, otherwise error code
4211 */
4212 static int hdlcdev_open(struct net_device *dev)
4213 {
4214 MGSLPC_INFO *info = dev_to_port(dev);
4215 int rc;
4216 unsigned long flags;
4217
4218 if (debug_level >= DEBUG_LEVEL_INFO)
4219 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4220
4221 /* generic HDLC layer open processing */
4222 if ((rc = hdlc_open(dev)))
4223 return rc;
4224
4225 /* arbitrate between network and tty opens */
4226 spin_lock_irqsave(&info->netlock, flags);
4227 if (info->count != 0 || info->netcount != 0) {
4228 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4229 spin_unlock_irqrestore(&info->netlock, flags);
4230 return -EBUSY;
4231 }
4232 info->netcount=1;
4233 spin_unlock_irqrestore(&info->netlock, flags);
4234
4235 /* claim resources and init adapter */
4236 if ((rc = startup(info)) != 0) {
4237 spin_lock_irqsave(&info->netlock, flags);
4238 info->netcount=0;
4239 spin_unlock_irqrestore(&info->netlock, flags);
4240 return rc;
4241 }
4242
4243 /* assert DTR and RTS, apply hardware settings */
4244 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4245 mgslpc_program_hw(info);
4246
4247 /* enable network layer transmit */
4248 dev->trans_start = jiffies;
4249 netif_start_queue(dev);
4250
4251 /* inform generic HDLC layer of current DCD status */
4252 spin_lock_irqsave(&info->lock, flags);
4253 get_signals(info);
4254 spin_unlock_irqrestore(&info->lock, flags);
4255 if (info->serial_signals & SerialSignal_DCD)
4256 netif_carrier_on(dev);
4257 else
4258 netif_carrier_off(dev);
4259 return 0;
4260 }
4261
4262 /**
4263 * called by network layer when interface is disabled
4264 * shutdown hardware and release resources
4265 *
4266 * dev pointer to network device structure
4267 *
4268 * returns 0 if success, otherwise error code
4269 */
4270 static int hdlcdev_close(struct net_device *dev)
4271 {
4272 MGSLPC_INFO *info = dev_to_port(dev);
4273 unsigned long flags;
4274
4275 if (debug_level >= DEBUG_LEVEL_INFO)
4276 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4277
4278 netif_stop_queue(dev);
4279
4280 /* shutdown adapter and release resources */
4281 shutdown(info);
4282
4283 hdlc_close(dev);
4284
4285 spin_lock_irqsave(&info->netlock, flags);
4286 info->netcount=0;
4287 spin_unlock_irqrestore(&info->netlock, flags);
4288
4289 return 0;
4290 }
4291
4292 /**
4293 * called by network layer to process IOCTL call to network device
4294 *
4295 * dev pointer to network device structure
4296 * ifr pointer to network interface request structure
4297 * cmd IOCTL command code
4298 *
4299 * returns 0 if success, otherwise error code
4300 */
4301 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4302 {
4303 const size_t size = sizeof(sync_serial_settings);
4304 sync_serial_settings new_line;
4305 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4306 MGSLPC_INFO *info = dev_to_port(dev);
4307 unsigned int flags;
4308
4309 if (debug_level >= DEBUG_LEVEL_INFO)
4310 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4311
4312 /* return error if TTY interface open */
4313 if (info->count)
4314 return -EBUSY;
4315
4316 if (cmd != SIOCWANDEV)
4317 return hdlc_ioctl(dev, ifr, cmd);
4318
4319 switch(ifr->ifr_settings.type) {
4320 case IF_GET_IFACE: /* return current sync_serial_settings */
4321
4322 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4323 if (ifr->ifr_settings.size < size) {
4324 ifr->ifr_settings.size = size; /* data size wanted */
4325 return -ENOBUFS;
4326 }
4327
4328 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4329 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4330 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4331 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4332
4333 switch (flags){
4334 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4335 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
4336 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
4337 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4338 default: new_line.clock_type = CLOCK_DEFAULT;
4339 }
4340
4341 new_line.clock_rate = info->params.clock_speed;
4342 new_line.loopback = info->params.loopback ? 1:0;
4343
4344 if (copy_to_user(line, &new_line, size))
4345 return -EFAULT;
4346 return 0;
4347
4348 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4349
4350 if(!capable(CAP_NET_ADMIN))
4351 return -EPERM;
4352 if (copy_from_user(&new_line, line, size))
4353 return -EFAULT;
4354
4355 switch (new_line.clock_type)
4356 {
4357 case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4358 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4359 case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
4360 case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
4361 case CLOCK_DEFAULT: flags = info->params.flags &
4362 (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4363 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4364 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4365 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
4366 default: return -EINVAL;
4367 }
4368
4369 if (new_line.loopback != 0 && new_line.loopback != 1)
4370 return -EINVAL;
4371
4372 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4373 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4374 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4375 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4376 info->params.flags |= flags;
4377
4378 info->params.loopback = new_line.loopback;
4379
4380 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4381 info->params.clock_speed = new_line.clock_rate;
4382 else
4383 info->params.clock_speed = 0;
4384
4385 /* if network interface up, reprogram hardware */
4386 if (info->netcount)
4387 mgslpc_program_hw(info);
4388 return 0;
4389
4390 default:
4391 return hdlc_ioctl(dev, ifr, cmd);
4392 }
4393 }
4394
4395 /**
4396 * called by network layer when transmit timeout is detected
4397 *
4398 * dev pointer to network device structure
4399 */
4400 static void hdlcdev_tx_timeout(struct net_device *dev)
4401 {
4402 MGSLPC_INFO *info = dev_to_port(dev);
4403 struct net_device_stats *stats = hdlc_stats(dev);
4404 unsigned long flags;
4405
4406 if (debug_level >= DEBUG_LEVEL_INFO)
4407 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4408
4409 stats->tx_errors++;
4410 stats->tx_aborted_errors++;
4411
4412 spin_lock_irqsave(&info->lock,flags);
4413 tx_stop(info);
4414 spin_unlock_irqrestore(&info->lock,flags);
4415
4416 netif_wake_queue(dev);
4417 }
4418
4419 /**
4420 * called by device driver when transmit completes
4421 * reenable network layer transmit if stopped
4422 *
4423 * info pointer to device instance information
4424 */
4425 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4426 {
4427 if (netif_queue_stopped(info->netdev))
4428 netif_wake_queue(info->netdev);
4429 }
4430
4431 /**
4432 * called by device driver when frame received
4433 * pass frame to network layer
4434 *
4435 * info pointer to device instance information
4436 * buf pointer to buffer contianing frame data
4437 * size count of data bytes in buf
4438 */
4439 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4440 {
4441 struct sk_buff *skb = dev_alloc_skb(size);
4442 struct net_device *dev = info->netdev;
4443 struct net_device_stats *stats = hdlc_stats(dev);
4444
4445 if (debug_level >= DEBUG_LEVEL_INFO)
4446 printk("hdlcdev_rx(%s)\n",dev->name);
4447
4448 if (skb == NULL) {
4449 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4450 stats->rx_dropped++;
4451 return;
4452 }
4453
4454 memcpy(skb_put(skb, size),buf,size);
4455
4456 skb->protocol = hdlc_type_trans(skb, info->netdev);
4457
4458 stats->rx_packets++;
4459 stats->rx_bytes += size;
4460
4461 netif_rx(skb);
4462
4463 info->netdev->last_rx = jiffies;
4464 }
4465
4466 /**
4467 * called by device driver when adding device instance
4468 * do generic HDLC initialization
4469 *
4470 * info pointer to device instance information
4471 *
4472 * returns 0 if success, otherwise error code
4473 */
4474 static int hdlcdev_init(MGSLPC_INFO *info)
4475 {
4476 int rc;
4477 struct net_device *dev;
4478 hdlc_device *hdlc;
4479
4480 /* allocate and initialize network and HDLC layer objects */
4481
4482 if (!(dev = alloc_hdlcdev(info))) {
4483 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4484 return -ENOMEM;
4485 }
4486
4487 /* for network layer reporting purposes only */
4488 dev->base_addr = info->io_base;
4489 dev->irq = info->irq_level;
4490
4491 /* network layer callbacks and settings */
4492 dev->do_ioctl = hdlcdev_ioctl;
4493 dev->open = hdlcdev_open;
4494 dev->stop = hdlcdev_close;
4495 dev->tx_timeout = hdlcdev_tx_timeout;
4496 dev->watchdog_timeo = 10*HZ;
4497 dev->tx_queue_len = 50;
4498
4499 /* generic HDLC layer callbacks and settings */
4500 hdlc = dev_to_hdlc(dev);
4501 hdlc->attach = hdlcdev_attach;
4502 hdlc->xmit = hdlcdev_xmit;
4503
4504 /* register objects with HDLC layer */
4505 if ((rc = register_hdlc_device(dev))) {
4506 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4507 free_netdev(dev);
4508 return rc;
4509 }
4510
4511 info->netdev = dev;
4512 return 0;
4513 }
4514
4515 /**
4516 * called by device driver when removing device instance
4517 * do generic HDLC cleanup
4518 *
4519 * info pointer to device instance information
4520 */
4521 static void hdlcdev_exit(MGSLPC_INFO *info)
4522 {
4523 unregister_hdlc_device(info->netdev);
4524 free_netdev(info->netdev);
4525 info->netdev = NULL;
4526 }
4527
4528 #endif /* CONFIG_HDLC */
4529
Linux kernel - Deliverables
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