2 * RocketPort device driver for Linux
4 * Written by Theodore Ts'o, 1995, 1996, 1997, 1998, 1999, 2000.
6 * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2003 by Comtrol, Inc.
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of the
11 * License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 * Kernel Synchronization:
26 * This driver has 2 kernel control paths - exception handlers (calls into the driver
27 * from user mode) and the timer bottom half (tasklet). This is a polled driver, interrupts
31 * - rp_table[], accessed through passed "info" pointers, is a global (static) array of
32 * serial port state information and the xmit_buf circular buffer. Protected by
33 * a per port spinlock.
34 * - xmit_flags[], an array of ints indexed by line (port) number, indicating that there
35 * is data to be transmitted. Protected by atomic bit operations.
36 * - rp_num_ports, int indicating number of open ports, protected by atomic operations.
38 * rp_write() and rp_write_char() functions use a per port semaphore to protect against
39 * simultaneous access to the same port by more than one process.
42 /****** Defines ******/
43 #ifdef PCI_NUM_RESOURCES
44 #define PCI_BASE_ADDRESS(dev, r) ((dev)->resource[r].start)
46 #define PCI_BASE_ADDRESS(dev, r) ((dev)->base_address[r])
49 #define ROCKET_PARANOIA_CHECK
50 #define ROCKET_DISABLE_SIMUSAGE
52 #undef ROCKET_SOFT_FLOW
53 #undef ROCKET_DEBUG_OPEN
54 #undef ROCKET_DEBUG_INTR
55 #undef ROCKET_DEBUG_WRITE
56 #undef ROCKET_DEBUG_FLOW
57 #undef ROCKET_DEBUG_THROTTLE
58 #undef ROCKET_DEBUG_WAIT_UNTIL_SENT
59 #undef ROCKET_DEBUG_RECEIVE
60 #undef ROCKET_DEBUG_HANGUP
62 #undef ROCKET_DEBUG_IO
64 #define POLL_PERIOD HZ/100 /* Polling period .01 seconds (10ms) */
66 /****** Kernel includes ******/
68 #include <linux/module.h>
69 #include <linux/errno.h>
70 #include <linux/major.h>
71 #include <linux/kernel.h>
72 #include <linux/signal.h>
73 #include <linux/slab.h>
75 #include <linux/sched.h>
76 #include <linux/timer.h>
77 #include <linux/interrupt.h>
78 #include <linux/tty.h>
79 #include <linux/tty_driver.h>
80 #include <linux/tty_flip.h>
81 #include <linux/string.h>
82 #include <linux/fcntl.h>
83 #include <linux/ptrace.h>
84 #include <linux/mutex.h>
85 #include <linux/ioport.h>
86 #include <linux/delay.h>
87 #include <linux/completion.h>
88 #include <linux/wait.h>
89 #include <linux/pci.h>
90 #include <asm/uaccess.h>
91 #include <asm/atomic.h>
92 #include <linux/bitops.h>
93 #include <linux/spinlock.h>
94 #include <linux/init.h>
96 /****** RocketPort includes ******/
98 #include "rocket_int.h"
101 #define ROCKET_VERSION "2.09"
102 #define ROCKET_DATE "12-June-2003"
104 /****** RocketPort Local Variables ******/
106 static void rp_do_poll(unsigned long dummy
);
108 static struct tty_driver
*rocket_driver
;
110 static struct rocket_version driver_version
= {
111 ROCKET_VERSION
, ROCKET_DATE
114 static struct r_port
*rp_table
[MAX_RP_PORTS
]; /* The main repository of serial port state information. */
115 static unsigned int xmit_flags
[NUM_BOARDS
]; /* Bit significant, indicates port had data to transmit. */
116 /* eg. Bit 0 indicates port 0 has xmit data, ... */
117 static atomic_t rp_num_ports_open
; /* Number of serial ports open */
118 static DEFINE_TIMER(rocket_timer
, rp_do_poll
, 0, 0);
120 static unsigned long board1
; /* ISA addresses, retrieved from rocketport.conf */
121 static unsigned long board2
;
122 static unsigned long board3
;
123 static unsigned long board4
;
124 static unsigned long controller
;
125 static int support_low_speed
;
126 static unsigned long modem1
;
127 static unsigned long modem2
;
128 static unsigned long modem3
;
129 static unsigned long modem4
;
130 static unsigned long pc104_1
[8];
131 static unsigned long pc104_2
[8];
132 static unsigned long pc104_3
[8];
133 static unsigned long pc104_4
[8];
134 static unsigned long *pc104
[4] = { pc104_1
, pc104_2
, pc104_3
, pc104_4
};
136 static int rp_baud_base
[NUM_BOARDS
]; /* Board config info (Someday make a per-board structure) */
137 static unsigned long rcktpt_io_addr
[NUM_BOARDS
];
138 static int rcktpt_type
[NUM_BOARDS
];
139 static int is_PCI
[NUM_BOARDS
];
140 static rocketModel_t rocketModel
[NUM_BOARDS
];
141 static int max_board
;
144 * The following arrays define the interrupt bits corresponding to each AIOP.
145 * These bits are different between the ISA and regular PCI boards and the
146 * Universal PCI boards.
149 static Word_t aiop_intr_bits
[AIOP_CTL_SIZE
] = {
156 static Word_t upci_aiop_intr_bits
[AIOP_CTL_SIZE
] = {
157 UPCI_AIOP_INTR_BIT_0
,
158 UPCI_AIOP_INTR_BIT_1
,
159 UPCI_AIOP_INTR_BIT_2
,
163 static Byte_t RData
[RDATASIZE
] = {
164 0x00, 0x09, 0xf6, 0x82,
165 0x02, 0x09, 0x86, 0xfb,
166 0x04, 0x09, 0x00, 0x0a,
167 0x06, 0x09, 0x01, 0x0a,
168 0x08, 0x09, 0x8a, 0x13,
169 0x0a, 0x09, 0xc5, 0x11,
170 0x0c, 0x09, 0x86, 0x85,
171 0x0e, 0x09, 0x20, 0x0a,
172 0x10, 0x09, 0x21, 0x0a,
173 0x12, 0x09, 0x41, 0xff,
174 0x14, 0x09, 0x82, 0x00,
175 0x16, 0x09, 0x82, 0x7b,
176 0x18, 0x09, 0x8a, 0x7d,
177 0x1a, 0x09, 0x88, 0x81,
178 0x1c, 0x09, 0x86, 0x7a,
179 0x1e, 0x09, 0x84, 0x81,
180 0x20, 0x09, 0x82, 0x7c,
181 0x22, 0x09, 0x0a, 0x0a
184 static Byte_t RRegData
[RREGDATASIZE
] = {
185 0x00, 0x09, 0xf6, 0x82, /* 00: Stop Rx processor */
186 0x08, 0x09, 0x8a, 0x13, /* 04: Tx software flow control */
187 0x0a, 0x09, 0xc5, 0x11, /* 08: XON char */
188 0x0c, 0x09, 0x86, 0x85, /* 0c: XANY */
189 0x12, 0x09, 0x41, 0xff, /* 10: Rx mask char */
190 0x14, 0x09, 0x82, 0x00, /* 14: Compare/Ignore #0 */
191 0x16, 0x09, 0x82, 0x7b, /* 18: Compare #1 */
192 0x18, 0x09, 0x8a, 0x7d, /* 1c: Compare #2 */
193 0x1a, 0x09, 0x88, 0x81, /* 20: Interrupt #1 */
194 0x1c, 0x09, 0x86, 0x7a, /* 24: Ignore/Replace #1 */
195 0x1e, 0x09, 0x84, 0x81, /* 28: Interrupt #2 */
196 0x20, 0x09, 0x82, 0x7c, /* 2c: Ignore/Replace #2 */
197 0x22, 0x09, 0x0a, 0x0a /* 30: Rx FIFO Enable */
200 static CONTROLLER_T sController
[CTL_SIZE
] = {
201 {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
202 {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
203 {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
204 {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
205 {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
206 {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
207 {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
208 {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}}
211 static Byte_t sBitMapClrTbl
[8] = {
212 0xfe, 0xfd, 0xfb, 0xf7, 0xef, 0xdf, 0xbf, 0x7f
215 static Byte_t sBitMapSetTbl
[8] = {
216 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80
219 static int sClockPrescale
= 0x14;
222 * Line number is the ttySIx number (x), the Minor number. We
223 * assign them sequentially, starting at zero. The following
224 * array keeps track of the line number assigned to a given board/aiop/channel.
226 static unsigned char lineNumbers
[MAX_RP_PORTS
];
227 static unsigned long nextLineNumber
;
229 /***** RocketPort Static Prototypes *********/
230 static int __init
init_ISA(int i
);
231 static void rp_wait_until_sent(struct tty_struct
*tty
, int timeout
);
232 static void rp_flush_buffer(struct tty_struct
*tty
);
233 static void rmSpeakerReset(CONTROLLER_T
* CtlP
, unsigned long model
);
234 static unsigned char GetLineNumber(int ctrl
, int aiop
, int ch
);
235 static unsigned char SetLineNumber(int ctrl
, int aiop
, int ch
);
236 static void rp_start(struct tty_struct
*tty
);
237 static int sInitChan(CONTROLLER_T
* CtlP
, CHANNEL_T
* ChP
, int AiopNum
,
239 static void sSetInterfaceMode(CHANNEL_T
* ChP
, Byte_t mode
);
240 static void sFlushRxFIFO(CHANNEL_T
* ChP
);
241 static void sFlushTxFIFO(CHANNEL_T
* ChP
);
242 static void sEnInterrupts(CHANNEL_T
* ChP
, Word_t Flags
);
243 static void sDisInterrupts(CHANNEL_T
* ChP
, Word_t Flags
);
244 static void sModemReset(CONTROLLER_T
* CtlP
, int chan
, int on
);
245 static void sPCIModemReset(CONTROLLER_T
* CtlP
, int chan
, int on
);
246 static int sWriteTxPrioByte(CHANNEL_T
* ChP
, Byte_t Data
);
247 static int sPCIInitController(CONTROLLER_T
* CtlP
, int CtlNum
,
248 ByteIO_t
* AiopIOList
, int AiopIOListSize
,
249 WordIO_t ConfigIO
, int IRQNum
, Byte_t Frequency
,
250 int PeriodicOnly
, int altChanRingIndicator
,
252 static int sInitController(CONTROLLER_T
* CtlP
, int CtlNum
, ByteIO_t MudbacIO
,
253 ByteIO_t
* AiopIOList
, int AiopIOListSize
,
254 int IRQNum
, Byte_t Frequency
, int PeriodicOnly
);
255 static int sReadAiopID(ByteIO_t io
);
256 static int sReadAiopNumChan(WordIO_t io
);
258 MODULE_AUTHOR("Theodore Ts'o");
259 MODULE_DESCRIPTION("Comtrol RocketPort driver");
260 module_param(board1
, ulong
, 0);
261 MODULE_PARM_DESC(board1
, "I/O port for (ISA) board #1");
262 module_param(board2
, ulong
, 0);
263 MODULE_PARM_DESC(board2
, "I/O port for (ISA) board #2");
264 module_param(board3
, ulong
, 0);
265 MODULE_PARM_DESC(board3
, "I/O port for (ISA) board #3");
266 module_param(board4
, ulong
, 0);
267 MODULE_PARM_DESC(board4
, "I/O port for (ISA) board #4");
268 module_param(controller
, ulong
, 0);
269 MODULE_PARM_DESC(controller
, "I/O port for (ISA) rocketport controller");
270 module_param(support_low_speed
, bool, 0);
271 MODULE_PARM_DESC(support_low_speed
, "1 means support 50 baud, 0 means support 460400 baud");
272 module_param(modem1
, ulong
, 0);
273 MODULE_PARM_DESC(modem1
, "1 means (ISA) board #1 is a RocketModem");
274 module_param(modem2
, ulong
, 0);
275 MODULE_PARM_DESC(modem2
, "1 means (ISA) board #2 is a RocketModem");
276 module_param(modem3
, ulong
, 0);
277 MODULE_PARM_DESC(modem3
, "1 means (ISA) board #3 is a RocketModem");
278 module_param(modem4
, ulong
, 0);
279 MODULE_PARM_DESC(modem4
, "1 means (ISA) board #4 is a RocketModem");
280 module_param_array(pc104_1
, ulong
, NULL
, 0);
281 MODULE_PARM_DESC(pc104_1
, "set interface types for ISA(PC104) board #1 (e.g. pc104_1=232,232,485,485,...");
282 module_param_array(pc104_2
, ulong
, NULL
, 0);
283 MODULE_PARM_DESC(pc104_2
, "set interface types for ISA(PC104) board #2 (e.g. pc104_2=232,232,485,485,...");
284 module_param_array(pc104_3
, ulong
, NULL
, 0);
285 MODULE_PARM_DESC(pc104_3
, "set interface types for ISA(PC104) board #3 (e.g. pc104_3=232,232,485,485,...");
286 module_param_array(pc104_4
, ulong
, NULL
, 0);
287 MODULE_PARM_DESC(pc104_4
, "set interface types for ISA(PC104) board #4 (e.g. pc104_4=232,232,485,485,...");
289 static int rp_init(void);
290 static void rp_cleanup_module(void);
292 module_init(rp_init
);
293 module_exit(rp_cleanup_module
);
296 MODULE_LICENSE("Dual BSD/GPL");
298 /*************************************************************************/
299 /* Module code starts here */
301 static inline int rocket_paranoia_check(struct r_port
*info
,
304 #ifdef ROCKET_PARANOIA_CHECK
307 if (info
->magic
!= RPORT_MAGIC
) {
308 printk(KERN_INFO
"Warning: bad magic number for rocketport struct in %s\n",
317 /* Serial port receive data function. Called (from timer poll) when an AIOPIC signals
318 * that receive data is present on a serial port. Pulls data from FIFO, moves it into the
321 static void rp_do_receive(struct r_port
*info
,
322 struct tty_struct
*tty
,
323 CHANNEL_t
* cp
, unsigned int ChanStatus
)
325 unsigned int CharNStat
;
326 int ToRecv
, wRecv
, space
;
329 ToRecv
= sGetRxCnt(cp
);
330 #ifdef ROCKET_DEBUG_INTR
331 printk(KERN_INFO
"rp_do_receive(%d)...", ToRecv
);
337 * if status indicates there are errored characters in the
338 * FIFO, then enter status mode (a word in FIFO holds
339 * character and status).
341 if (ChanStatus
& (RXFOVERFL
| RXBREAK
| RXFRAME
| RXPARITY
)) {
342 if (!(ChanStatus
& STATMODE
)) {
343 #ifdef ROCKET_DEBUG_RECEIVE
344 printk(KERN_INFO
"Entering STATMODE...");
346 ChanStatus
|= STATMODE
;
352 * if we previously entered status mode, then read down the
353 * FIFO one word at a time, pulling apart the character and
354 * the status. Update error counters depending on status
356 if (ChanStatus
& STATMODE
) {
357 #ifdef ROCKET_DEBUG_RECEIVE
358 printk(KERN_INFO
"Ignore %x, read %x...", info
->ignore_status_mask
,
359 info
->read_status_mask
);
364 CharNStat
= sInW(sGetTxRxDataIO(cp
));
365 #ifdef ROCKET_DEBUG_RECEIVE
366 printk(KERN_INFO
"%x...", CharNStat
);
368 if (CharNStat
& STMBREAKH
)
369 CharNStat
&= ~(STMFRAMEH
| STMPARITYH
);
370 if (CharNStat
& info
->ignore_status_mask
) {
374 CharNStat
&= info
->read_status_mask
;
375 if (CharNStat
& STMBREAKH
)
377 else if (CharNStat
& STMPARITYH
)
379 else if (CharNStat
& STMFRAMEH
)
381 else if (CharNStat
& STMRCVROVRH
)
385 tty_insert_flip_char(tty
, CharNStat
& 0xff, flag
);
390 * after we've emptied the FIFO in status mode, turn
391 * status mode back off
393 if (sGetRxCnt(cp
) == 0) {
394 #ifdef ROCKET_DEBUG_RECEIVE
395 printk(KERN_INFO
"Status mode off.\n");
397 sDisRxStatusMode(cp
);
401 * we aren't in status mode, so read down the FIFO two
402 * characters at time by doing repeated word IO
405 space
= tty_prepare_flip_string(tty
, &cbuf
, ToRecv
);
406 if (space
< ToRecv
) {
407 #ifdef ROCKET_DEBUG_RECEIVE
408 printk(KERN_INFO
"rp_do_receive:insufficient space ToRecv=%d space=%d\n", ToRecv
, space
);
416 sInStrW(sGetTxRxDataIO(cp
), (unsigned short *) cbuf
, wRecv
);
418 cbuf
[ToRecv
- 1] = sInB(sGetTxRxDataIO(cp
));
420 /* Push the data up to the tty layer */
421 tty_flip_buffer_push(tty
);
425 * Serial port transmit data function. Called from the timer polling loop as a
426 * result of a bit set in xmit_flags[], indicating data (from the tty layer) is ready
427 * to be sent out the serial port. Data is buffered in rp_table[line].xmit_buf, it is
428 * moved to the port's xmit FIFO. *info is critical data, protected by spinlocks.
430 static void rp_do_transmit(struct r_port
*info
)
433 CHANNEL_t
*cp
= &info
->channel
;
434 struct tty_struct
*tty
;
437 #ifdef ROCKET_DEBUG_INTR
438 printk(KERN_INFO
"rp_do_transmit ");
443 printk(KERN_INFO
"rp: WARNING rp_do_transmit called with info->tty==NULL\n");
444 clear_bit((info
->aiop
* 8) + info
->chan
, (void *) &xmit_flags
[info
->board
]);
448 spin_lock_irqsave(&info
->slock
, flags
);
450 info
->xmit_fifo_room
= TXFIFO_SIZE
- sGetTxCnt(cp
);
452 /* Loop sending data to FIFO until done or FIFO full */
454 if (tty
->stopped
|| tty
->hw_stopped
)
456 c
= min(info
->xmit_fifo_room
, min(info
->xmit_cnt
, XMIT_BUF_SIZE
- info
->xmit_tail
));
457 if (c
<= 0 || info
->xmit_fifo_room
<= 0)
459 sOutStrW(sGetTxRxDataIO(cp
), (unsigned short *) (info
->xmit_buf
+ info
->xmit_tail
), c
/ 2);
461 sOutB(sGetTxRxDataIO(cp
), info
->xmit_buf
[info
->xmit_tail
+ c
- 1]);
462 info
->xmit_tail
+= c
;
463 info
->xmit_tail
&= XMIT_BUF_SIZE
- 1;
465 info
->xmit_fifo_room
-= c
;
466 #ifdef ROCKET_DEBUG_INTR
467 printk(KERN_INFO
"tx %d chars...", c
);
471 if (info
->xmit_cnt
== 0)
472 clear_bit((info
->aiop
* 8) + info
->chan
, (void *) &xmit_flags
[info
->board
]);
474 if (info
->xmit_cnt
< WAKEUP_CHARS
) {
476 #ifdef ROCKETPORT_HAVE_POLL_WAIT
477 wake_up_interruptible(&tty
->poll_wait
);
481 spin_unlock_irqrestore(&info
->slock
, flags
);
483 #ifdef ROCKET_DEBUG_INTR
484 printk(KERN_INFO
"(%d,%d,%d,%d)...", info
->xmit_cnt
, info
->xmit_head
,
485 info
->xmit_tail
, info
->xmit_fifo_room
);
490 * Called when a serial port signals it has read data in it's RX FIFO.
491 * It checks what interrupts are pending and services them, including
492 * receiving serial data.
494 static void rp_handle_port(struct r_port
*info
)
497 struct tty_struct
*tty
;
498 unsigned int IntMask
, ChanStatus
;
503 if ((info
->flags
& ROCKET_INITIALIZED
) == 0) {
504 printk(KERN_INFO
"rp: WARNING: rp_handle_port called with info->flags & NOT_INIT\n");
508 printk(KERN_INFO
"rp: WARNING: rp_handle_port called with info->tty==NULL\n");
514 IntMask
= sGetChanIntID(cp
) & info
->intmask
;
515 #ifdef ROCKET_DEBUG_INTR
516 printk(KERN_INFO
"rp_interrupt %02x...", IntMask
);
518 ChanStatus
= sGetChanStatus(cp
);
519 if (IntMask
& RXF_TRIG
) { /* Rx FIFO trigger level */
520 rp_do_receive(info
, tty
, cp
, ChanStatus
);
522 if (IntMask
& DELTA_CD
) { /* CD change */
523 #if (defined(ROCKET_DEBUG_OPEN) || defined(ROCKET_DEBUG_INTR) || defined(ROCKET_DEBUG_HANGUP))
524 printk(KERN_INFO
"ttyR%d CD now %s...", info
->line
,
525 (ChanStatus
& CD_ACT
) ? "on" : "off");
527 if (!(ChanStatus
& CD_ACT
) && info
->cd_status
) {
528 #ifdef ROCKET_DEBUG_HANGUP
529 printk(KERN_INFO
"CD drop, calling hangup.\n");
533 info
->cd_status
= (ChanStatus
& CD_ACT
) ? 1 : 0;
534 wake_up_interruptible(&info
->open_wait
);
536 #ifdef ROCKET_DEBUG_INTR
537 if (IntMask
& DELTA_CTS
) { /* CTS change */
538 printk(KERN_INFO
"CTS change...\n");
540 if (IntMask
& DELTA_DSR
) { /* DSR change */
541 printk(KERN_INFO
"DSR change...\n");
547 * The top level polling routine. Repeats every 1/100 HZ (10ms).
549 static void rp_do_poll(unsigned long dummy
)
552 int ctrl
, aiop
, ch
, line
, i
;
553 unsigned int xmitmask
;
554 unsigned int CtlMask
;
555 unsigned char AiopMask
;
558 /* Walk through all the boards (ctrl's) */
559 for (ctrl
= 0; ctrl
< max_board
; ctrl
++) {
560 if (rcktpt_io_addr
[ctrl
] <= 0)
563 /* Get a ptr to the board's control struct */
564 ctlp
= sCtlNumToCtlPtr(ctrl
);
566 /* Get the interupt status from the board */
568 if (ctlp
->BusType
== isPCI
)
569 CtlMask
= sPCIGetControllerIntStatus(ctlp
);
572 CtlMask
= sGetControllerIntStatus(ctlp
);
574 /* Check if any AIOP read bits are set */
575 for (aiop
= 0; CtlMask
; aiop
++) {
576 bit
= ctlp
->AiopIntrBits
[aiop
];
579 AiopMask
= sGetAiopIntStatus(ctlp
, aiop
);
581 /* Check if any port read bits are set */
582 for (ch
= 0; AiopMask
; AiopMask
>>= 1, ch
++) {
585 /* Get the line number (/dev/ttyRx number). */
586 /* Read the data from the port. */
587 line
= GetLineNumber(ctrl
, aiop
, ch
);
588 rp_handle_port(rp_table
[line
]);
594 xmitmask
= xmit_flags
[ctrl
];
597 * xmit_flags contains bit-significant flags, indicating there is data
598 * to xmit on the port. Bit 0 is port 0 on this board, bit 1 is port
599 * 1, ... (32 total possible). The variable i has the aiop and ch
600 * numbers encoded in it (port 0-7 are aiop0, 8-15 are aiop1, etc).
603 for (i
= 0; i
< rocketModel
[ctrl
].numPorts
; i
++) {
604 if (xmitmask
& (1 << i
)) {
605 aiop
= (i
& 0x18) >> 3;
607 line
= GetLineNumber(ctrl
, aiop
, ch
);
608 rp_do_transmit(rp_table
[line
]);
615 * Reset the timer so we get called at the next clock tick (10ms).
617 if (atomic_read(&rp_num_ports_open
))
618 mod_timer(&rocket_timer
, jiffies
+ POLL_PERIOD
);
622 * Initializes the r_port structure for a port, as well as enabling the port on
624 * Inputs: board, aiop, chan numbers
626 static void init_r_port(int board
, int aiop
, int chan
, struct pci_dev
*pci_dev
)
633 /* Get the next available line number */
634 line
= SetLineNumber(board
, aiop
, chan
);
636 ctlp
= sCtlNumToCtlPtr(board
);
638 /* Get a r_port struct for the port, fill it in and save it globally, indexed by line number */
639 info
= kzalloc(sizeof (struct r_port
), GFP_KERNEL
);
641 printk(KERN_INFO
"Couldn't allocate info struct for line #%d\n", line
);
645 info
->magic
= RPORT_MAGIC
;
651 info
->closing_wait
= 3000;
652 info
->close_delay
= 50;
653 init_waitqueue_head(&info
->open_wait
);
654 init_completion(&info
->close_wait
);
655 info
->flags
&= ~ROCKET_MODE_MASK
;
656 switch (pc104
[board
][line
]) {
658 info
->flags
|= ROCKET_MODE_RS422
;
661 info
->flags
|= ROCKET_MODE_RS485
;
665 info
->flags
|= ROCKET_MODE_RS232
;
669 info
->intmask
= RXF_TRIG
| TXFIFO_MT
| SRC_INT
| DELTA_CD
| DELTA_CTS
| DELTA_DSR
;
670 if (sInitChan(ctlp
, &info
->channel
, aiop
, chan
) == 0) {
671 printk(KERN_INFO
"RocketPort sInitChan(%d, %d, %d) failed!\n", board
, aiop
, chan
);
676 rocketMode
= info
->flags
& ROCKET_MODE_MASK
;
678 if ((info
->flags
& ROCKET_RTS_TOGGLE
) || (rocketMode
== ROCKET_MODE_RS485
))
679 sEnRTSToggle(&info
->channel
);
681 sDisRTSToggle(&info
->channel
);
683 if (ctlp
->boardType
== ROCKET_TYPE_PC104
) {
684 switch (rocketMode
) {
685 case ROCKET_MODE_RS485
:
686 sSetInterfaceMode(&info
->channel
, InterfaceModeRS485
);
688 case ROCKET_MODE_RS422
:
689 sSetInterfaceMode(&info
->channel
, InterfaceModeRS422
);
691 case ROCKET_MODE_RS232
:
693 if (info
->flags
& ROCKET_RTS_TOGGLE
)
694 sSetInterfaceMode(&info
->channel
, InterfaceModeRS232T
);
696 sSetInterfaceMode(&info
->channel
, InterfaceModeRS232
);
700 spin_lock_init(&info
->slock
);
701 mutex_init(&info
->write_mtx
);
702 rp_table
[line
] = info
;
704 tty_register_device(rocket_driver
, line
, &pci_dev
->dev
);
708 * Configures a rocketport port according to its termio settings. Called from
709 * user mode into the driver (exception handler). *info CD manipulation is spinlock protected.
711 static void configure_r_port(struct r_port
*info
,
712 struct ktermios
*old_termios
)
717 int bits
, baud
, divisor
;
720 if (!info
->tty
|| !info
->tty
->termios
)
723 cflag
= info
->tty
->termios
->c_cflag
;
725 /* Byte size and parity */
726 if ((cflag
& CSIZE
) == CS8
) {
733 if (cflag
& CSTOPB
) {
740 if (cflag
& PARENB
) {
743 if (cflag
& PARODD
) {
753 baud
= tty_get_baud_rate(info
->tty
);
756 divisor
= ((rp_baud_base
[info
->board
] + (baud
>> 1)) / baud
) - 1;
757 if ((divisor
>= 8192 || divisor
< 0) && old_termios
) {
758 info
->tty
->termios
->c_cflag
&= ~CBAUD
;
759 info
->tty
->termios
->c_cflag
|=
760 (old_termios
->c_cflag
& CBAUD
);
761 baud
= tty_get_baud_rate(info
->tty
);
764 divisor
= (rp_baud_base
[info
->board
] / baud
) - 1;
766 if (divisor
>= 8192 || divisor
< 0) {
768 divisor
= (rp_baud_base
[info
->board
] / baud
) - 1;
770 info
->cps
= baud
/ bits
;
771 sSetBaud(cp
, divisor
);
773 if (cflag
& CRTSCTS
) {
774 info
->intmask
|= DELTA_CTS
;
777 info
->intmask
&= ~DELTA_CTS
;
780 if (cflag
& CLOCAL
) {
781 info
->intmask
&= ~DELTA_CD
;
783 spin_lock_irqsave(&info
->slock
, flags
);
784 if (sGetChanStatus(cp
) & CD_ACT
)
788 info
->intmask
|= DELTA_CD
;
789 spin_unlock_irqrestore(&info
->slock
, flags
);
793 * Handle software flow control in the board
795 #ifdef ROCKET_SOFT_FLOW
796 if (I_IXON(info
->tty
)) {
797 sEnTxSoftFlowCtl(cp
);
798 if (I_IXANY(info
->tty
)) {
803 sSetTxXONChar(cp
, START_CHAR(info
->tty
));
804 sSetTxXOFFChar(cp
, STOP_CHAR(info
->tty
));
806 sDisTxSoftFlowCtl(cp
);
813 * Set up ignore/read mask words
815 info
->read_status_mask
= STMRCVROVRH
| 0xFF;
816 if (I_INPCK(info
->tty
))
817 info
->read_status_mask
|= STMFRAMEH
| STMPARITYH
;
818 if (I_BRKINT(info
->tty
) || I_PARMRK(info
->tty
))
819 info
->read_status_mask
|= STMBREAKH
;
822 * Characters to ignore
824 info
->ignore_status_mask
= 0;
825 if (I_IGNPAR(info
->tty
))
826 info
->ignore_status_mask
|= STMFRAMEH
| STMPARITYH
;
827 if (I_IGNBRK(info
->tty
)) {
828 info
->ignore_status_mask
|= STMBREAKH
;
830 * If we're ignoring parity and break indicators,
831 * ignore overruns too. (For real raw support).
833 if (I_IGNPAR(info
->tty
))
834 info
->ignore_status_mask
|= STMRCVROVRH
;
837 rocketMode
= info
->flags
& ROCKET_MODE_MASK
;
839 if ((info
->flags
& ROCKET_RTS_TOGGLE
)
840 || (rocketMode
== ROCKET_MODE_RS485
))
845 sSetRTS(&info
->channel
);
847 if (cp
->CtlP
->boardType
== ROCKET_TYPE_PC104
) {
848 switch (rocketMode
) {
849 case ROCKET_MODE_RS485
:
850 sSetInterfaceMode(cp
, InterfaceModeRS485
);
852 case ROCKET_MODE_RS422
:
853 sSetInterfaceMode(cp
, InterfaceModeRS422
);
855 case ROCKET_MODE_RS232
:
857 if (info
->flags
& ROCKET_RTS_TOGGLE
)
858 sSetInterfaceMode(cp
, InterfaceModeRS232T
);
860 sSetInterfaceMode(cp
, InterfaceModeRS232
);
866 /* info->count is considered critical, protected by spinlocks. */
867 static int block_til_ready(struct tty_struct
*tty
, struct file
*filp
,
870 DECLARE_WAITQUEUE(wait
, current
);
872 int do_clocal
= 0, extra_count
= 0;
876 * If the device is in the middle of being closed, then block
877 * until it's done, and then try again.
879 if (tty_hung_up_p(filp
))
880 return ((info
->flags
& ROCKET_HUP_NOTIFY
) ? -EAGAIN
: -ERESTARTSYS
);
881 if (info
->flags
& ROCKET_CLOSING
) {
882 if (wait_for_completion_interruptible(&info
->close_wait
))
884 return ((info
->flags
& ROCKET_HUP_NOTIFY
) ? -EAGAIN
: -ERESTARTSYS
);
888 * If non-blocking mode is set, or the port is not enabled,
889 * then make the check up front and then exit.
891 if ((filp
->f_flags
& O_NONBLOCK
) || (tty
->flags
& (1 << TTY_IO_ERROR
))) {
892 info
->flags
|= ROCKET_NORMAL_ACTIVE
;
895 if (tty
->termios
->c_cflag
& CLOCAL
)
899 * Block waiting for the carrier detect and the line to become free. While we are in
900 * this loop, info->count is dropped by one, so that rp_close() knows when to free things.
901 * We restore it upon exit, either normal or abnormal.
904 add_wait_queue(&info
->open_wait
, &wait
);
905 #ifdef ROCKET_DEBUG_OPEN
906 printk(KERN_INFO
"block_til_ready before block: ttyR%d, count = %d\n", info
->line
, info
->count
);
908 spin_lock_irqsave(&info
->slock
, flags
);
910 #ifdef ROCKET_DISABLE_SIMUSAGE
911 info
->flags
|= ROCKET_NORMAL_ACTIVE
;
913 if (!tty_hung_up_p(filp
)) {
918 info
->blocked_open
++;
920 spin_unlock_irqrestore(&info
->slock
, flags
);
923 if (tty
->termios
->c_cflag
& CBAUD
) {
924 sSetDTR(&info
->channel
);
925 sSetRTS(&info
->channel
);
927 set_current_state(TASK_INTERRUPTIBLE
);
928 if (tty_hung_up_p(filp
) || !(info
->flags
& ROCKET_INITIALIZED
)) {
929 if (info
->flags
& ROCKET_HUP_NOTIFY
)
932 retval
= -ERESTARTSYS
;
935 if (!(info
->flags
& ROCKET_CLOSING
) && (do_clocal
|| (sGetChanStatusLo(&info
->channel
) & CD_ACT
)))
937 if (signal_pending(current
)) {
938 retval
= -ERESTARTSYS
;
941 #ifdef ROCKET_DEBUG_OPEN
942 printk(KERN_INFO
"block_til_ready blocking: ttyR%d, count = %d, flags=0x%0x\n",
943 info
->line
, info
->count
, info
->flags
);
945 schedule(); /* Don't hold spinlock here, will hang PC */
947 __set_current_state(TASK_RUNNING
);
948 remove_wait_queue(&info
->open_wait
, &wait
);
950 spin_lock_irqsave(&info
->slock
, flags
);
954 info
->blocked_open
--;
956 spin_unlock_irqrestore(&info
->slock
, flags
);
958 #ifdef ROCKET_DEBUG_OPEN
959 printk(KERN_INFO
"block_til_ready after blocking: ttyR%d, count = %d\n",
960 info
->line
, info
->count
);
964 info
->flags
|= ROCKET_NORMAL_ACTIVE
;
969 * Exception handler that opens a serial port. Creates xmit_buf storage, fills in
970 * port's r_port struct. Initializes the port hardware.
972 static int rp_open(struct tty_struct
*tty
, struct file
*filp
)
975 int line
= 0, retval
;
979 line
= TTY_GET_LINE(tty
);
980 if ((line
< 0) || (line
>= MAX_RP_PORTS
) || ((info
= rp_table
[line
]) == NULL
))
983 page
= __get_free_page(GFP_KERNEL
);
987 if (info
->flags
& ROCKET_CLOSING
) {
988 retval
= wait_for_completion_interruptible(&info
->close_wait
);
992 return ((info
->flags
& ROCKET_HUP_NOTIFY
) ? -EAGAIN
: -ERESTARTSYS
);
996 * We must not sleep from here until the port is marked fully in use.
1001 info
->xmit_buf
= (unsigned char *) page
;
1003 tty
->driver_data
= info
;
1006 if (info
->count
++ == 0) {
1007 atomic_inc(&rp_num_ports_open
);
1009 #ifdef ROCKET_DEBUG_OPEN
1010 printk(KERN_INFO
"rocket mod++ = %d...", atomic_read(&rp_num_ports_open
));
1013 #ifdef ROCKET_DEBUG_OPEN
1014 printk(KERN_INFO
"rp_open ttyR%d, count=%d\n", info
->line
, info
->count
);
1018 * Info->count is now 1; so it's safe to sleep now.
1020 if ((info
->flags
& ROCKET_INITIALIZED
) == 0) {
1021 cp
= &info
->channel
;
1022 sSetRxTrigger(cp
, TRIG_1
);
1023 if (sGetChanStatus(cp
) & CD_ACT
)
1024 info
->cd_status
= 1;
1026 info
->cd_status
= 0;
1027 sDisRxStatusMode(cp
);
1031 sEnInterrupts(cp
, (TXINT_EN
| MCINT_EN
| RXINT_EN
| SRCINT_EN
| CHANINT_EN
));
1032 sSetRxTrigger(cp
, TRIG_1
);
1035 sDisRxStatusMode(cp
);
1039 sDisTxSoftFlowCtl(cp
);
1044 info
->flags
|= ROCKET_INITIALIZED
;
1047 * Set up the tty->alt_speed kludge
1049 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_HI
)
1050 info
->tty
->alt_speed
= 57600;
1051 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_VHI
)
1052 info
->tty
->alt_speed
= 115200;
1053 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_SHI
)
1054 info
->tty
->alt_speed
= 230400;
1055 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_WARP
)
1056 info
->tty
->alt_speed
= 460800;
1058 configure_r_port(info
, NULL
);
1059 if (tty
->termios
->c_cflag
& CBAUD
) {
1064 /* Starts (or resets) the maint polling loop */
1065 mod_timer(&rocket_timer
, jiffies
+ POLL_PERIOD
);
1067 retval
= block_til_ready(tty
, filp
, info
);
1069 #ifdef ROCKET_DEBUG_OPEN
1070 printk(KERN_INFO
"rp_open returning after block_til_ready with %d\n", retval
);
1078 * Exception handler that closes a serial port. info->count is considered critical.
1080 static void rp_close(struct tty_struct
*tty
, struct file
*filp
)
1082 struct r_port
*info
= (struct r_port
*) tty
->driver_data
;
1083 unsigned long flags
;
1087 if (rocket_paranoia_check(info
, "rp_close"))
1090 #ifdef ROCKET_DEBUG_OPEN
1091 printk(KERN_INFO
"rp_close ttyR%d, count = %d\n", info
->line
, info
->count
);
1094 if (tty_hung_up_p(filp
))
1096 spin_lock_irqsave(&info
->slock
, flags
);
1098 if ((tty
->count
== 1) && (info
->count
!= 1)) {
1100 * Uh, oh. tty->count is 1, which means that the tty
1101 * structure will be freed. Info->count should always
1102 * be one in these conditions. If it's greater than
1103 * one, we've got real problems, since it means the
1104 * serial port won't be shutdown.
1106 printk(KERN_INFO
"rp_close: bad serial port count; tty->count is 1, "
1107 "info->count is %d\n", info
->count
);
1110 if (--info
->count
< 0) {
1111 printk(KERN_INFO
"rp_close: bad serial port count for ttyR%d: %d\n",
1112 info
->line
, info
->count
);
1116 spin_unlock_irqrestore(&info
->slock
, flags
);
1119 info
->flags
|= ROCKET_CLOSING
;
1120 spin_unlock_irqrestore(&info
->slock
, flags
);
1122 cp
= &info
->channel
;
1125 * Notify the line discpline to only process XON/XOFF characters
1130 * If transmission was throttled by the application request,
1131 * just flush the xmit buffer.
1133 if (tty
->flow_stopped
)
1134 rp_flush_buffer(tty
);
1137 * Wait for the transmit buffer to clear
1139 if (info
->closing_wait
!= ROCKET_CLOSING_WAIT_NONE
)
1140 tty_wait_until_sent(tty
, info
->closing_wait
);
1142 * Before we drop DTR, make sure the UART transmitter
1143 * has completely drained; this is especially
1144 * important if there is a transmit FIFO!
1146 timeout
= (sGetTxCnt(cp
) + 1) * HZ
/ info
->cps
;
1149 rp_wait_until_sent(tty
, timeout
);
1150 clear_bit((info
->aiop
* 8) + info
->chan
, (void *) &xmit_flags
[info
->board
]);
1153 sDisInterrupts(cp
, (TXINT_EN
| MCINT_EN
| RXINT_EN
| SRCINT_EN
| CHANINT_EN
));
1155 sDisTxSoftFlowCtl(cp
);
1163 if (TTY_DRIVER_FLUSH_BUFFER_EXISTS(tty
))
1164 TTY_DRIVER_FLUSH_BUFFER(tty
);
1166 tty_ldisc_flush(tty
);
1168 clear_bit((info
->aiop
* 8) + info
->chan
, (void *) &xmit_flags
[info
->board
]);
1170 if (info
->blocked_open
) {
1171 if (info
->close_delay
) {
1172 msleep_interruptible(jiffies_to_msecs(info
->close_delay
));
1174 wake_up_interruptible(&info
->open_wait
);
1176 if (info
->xmit_buf
) {
1177 free_page((unsigned long) info
->xmit_buf
);
1178 info
->xmit_buf
= NULL
;
1181 info
->flags
&= ~(ROCKET_INITIALIZED
| ROCKET_CLOSING
| ROCKET_NORMAL_ACTIVE
);
1183 complete_all(&info
->close_wait
);
1184 atomic_dec(&rp_num_ports_open
);
1186 #ifdef ROCKET_DEBUG_OPEN
1187 printk(KERN_INFO
"rocket mod-- = %d...", atomic_read(&rp_num_ports_open
));
1188 printk(KERN_INFO
"rp_close ttyR%d complete shutdown\n", info
->line
);
1193 static void rp_set_termios(struct tty_struct
*tty
,
1194 struct ktermios
*old_termios
)
1196 struct r_port
*info
= (struct r_port
*) tty
->driver_data
;
1200 if (rocket_paranoia_check(info
, "rp_set_termios"))
1203 cflag
= tty
->termios
->c_cflag
;
1205 if (cflag
== old_termios
->c_cflag
)
1209 * This driver doesn't support CS5 or CS6
1211 if (((cflag
& CSIZE
) == CS5
) || ((cflag
& CSIZE
) == CS6
))
1212 tty
->termios
->c_cflag
=
1213 ((cflag
& ~CSIZE
) | (old_termios
->c_cflag
& CSIZE
));
1215 configure_r_port(info
, old_termios
);
1217 cp
= &info
->channel
;
1219 /* Handle transition to B0 status */
1220 if ((old_termios
->c_cflag
& CBAUD
) && !(tty
->termios
->c_cflag
& CBAUD
)) {
1225 /* Handle transition away from B0 status */
1226 if (!(old_termios
->c_cflag
& CBAUD
) && (tty
->termios
->c_cflag
& CBAUD
)) {
1227 if (!tty
->hw_stopped
|| !(tty
->termios
->c_cflag
& CRTSCTS
))
1232 if ((old_termios
->c_cflag
& CRTSCTS
) && !(tty
->termios
->c_cflag
& CRTSCTS
)) {
1233 tty
->hw_stopped
= 0;
1238 static void rp_break(struct tty_struct
*tty
, int break_state
)
1240 struct r_port
*info
= (struct r_port
*) tty
->driver_data
;
1241 unsigned long flags
;
1243 if (rocket_paranoia_check(info
, "rp_break"))
1246 spin_lock_irqsave(&info
->slock
, flags
);
1247 if (break_state
== -1)
1248 sSendBreak(&info
->channel
);
1250 sClrBreak(&info
->channel
);
1251 spin_unlock_irqrestore(&info
->slock
, flags
);
1255 * sGetChanRI used to be a macro in rocket_int.h. When the functionality for
1256 * the UPCI boards was added, it was decided to make this a function because
1257 * the macro was getting too complicated. All cases except the first one
1258 * (UPCIRingInd) are taken directly from the original macro.
1260 static int sGetChanRI(CHANNEL_T
* ChP
)
1262 CONTROLLER_t
*CtlP
= ChP
->CtlP
;
1263 int ChanNum
= ChP
->ChanNum
;
1266 if (CtlP
->UPCIRingInd
)
1267 RingInd
= !(sInB(CtlP
->UPCIRingInd
) & sBitMapSetTbl
[ChanNum
]);
1268 else if (CtlP
->AltChanRingIndicator
)
1269 RingInd
= sInB((ByteIO_t
) (ChP
->ChanStat
+ 8)) & DSR_ACT
;
1270 else if (CtlP
->boardType
== ROCKET_TYPE_PC104
)
1271 RingInd
= !(sInB(CtlP
->AiopIO
[3]) & sBitMapSetTbl
[ChanNum
]);
1276 /********************************************************************************************/
1277 /* Here are the routines used by rp_ioctl. These are all called from exception handlers. */
1280 * Returns the state of the serial modem control lines. These next 2 functions
1281 * are the way kernel versions > 2.5 handle modem control lines rather than IOCTLs.
1283 static int rp_tiocmget(struct tty_struct
*tty
, struct file
*file
)
1285 struct r_port
*info
= (struct r_port
*)tty
->driver_data
;
1286 unsigned int control
, result
, ChanStatus
;
1288 ChanStatus
= sGetChanStatusLo(&info
->channel
);
1289 control
= info
->channel
.TxControl
[3];
1290 result
= ((control
& SET_RTS
) ? TIOCM_RTS
: 0) |
1291 ((control
& SET_DTR
) ? TIOCM_DTR
: 0) |
1292 ((ChanStatus
& CD_ACT
) ? TIOCM_CAR
: 0) |
1293 (sGetChanRI(&info
->channel
) ? TIOCM_RNG
: 0) |
1294 ((ChanStatus
& DSR_ACT
) ? TIOCM_DSR
: 0) |
1295 ((ChanStatus
& CTS_ACT
) ? TIOCM_CTS
: 0);
1301 * Sets the modem control lines
1303 static int rp_tiocmset(struct tty_struct
*tty
, struct file
*file
,
1304 unsigned int set
, unsigned int clear
)
1306 struct r_port
*info
= (struct r_port
*)tty
->driver_data
;
1308 if (set
& TIOCM_RTS
)
1309 info
->channel
.TxControl
[3] |= SET_RTS
;
1310 if (set
& TIOCM_DTR
)
1311 info
->channel
.TxControl
[3] |= SET_DTR
;
1312 if (clear
& TIOCM_RTS
)
1313 info
->channel
.TxControl
[3] &= ~SET_RTS
;
1314 if (clear
& TIOCM_DTR
)
1315 info
->channel
.TxControl
[3] &= ~SET_DTR
;
1317 sOutDW(info
->channel
.IndexAddr
, *(DWord_t
*) & (info
->channel
.TxControl
[0]));
1321 static int get_config(struct r_port
*info
, struct rocket_config __user
*retinfo
)
1323 struct rocket_config tmp
;
1327 memset(&tmp
, 0, sizeof (tmp
));
1328 tmp
.line
= info
->line
;
1329 tmp
.flags
= info
->flags
;
1330 tmp
.close_delay
= info
->close_delay
;
1331 tmp
.closing_wait
= info
->closing_wait
;
1332 tmp
.port
= rcktpt_io_addr
[(info
->line
>> 5) & 3];
1334 if (copy_to_user(retinfo
, &tmp
, sizeof (*retinfo
)))
1339 static int set_config(struct r_port
*info
, struct rocket_config __user
*new_info
)
1341 struct rocket_config new_serial
;
1343 if (copy_from_user(&new_serial
, new_info
, sizeof (new_serial
)))
1346 if (!capable(CAP_SYS_ADMIN
))
1348 if ((new_serial
.flags
& ~ROCKET_USR_MASK
) != (info
->flags
& ~ROCKET_USR_MASK
))
1350 info
->flags
= ((info
->flags
& ~ROCKET_USR_MASK
) | (new_serial
.flags
& ROCKET_USR_MASK
));
1351 configure_r_port(info
, NULL
);
1355 info
->flags
= ((info
->flags
& ~ROCKET_FLAGS
) | (new_serial
.flags
& ROCKET_FLAGS
));
1356 info
->close_delay
= new_serial
.close_delay
;
1357 info
->closing_wait
= new_serial
.closing_wait
;
1359 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_HI
)
1360 info
->tty
->alt_speed
= 57600;
1361 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_VHI
)
1362 info
->tty
->alt_speed
= 115200;
1363 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_SHI
)
1364 info
->tty
->alt_speed
= 230400;
1365 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_WARP
)
1366 info
->tty
->alt_speed
= 460800;
1368 configure_r_port(info
, NULL
);
1373 * This function fills in a rocket_ports struct with information
1374 * about what boards/ports are in the system. This info is passed
1375 * to user space. See setrocket.c where the info is used to create
1376 * the /dev/ttyRx ports.
1378 static int get_ports(struct r_port
*info
, struct rocket_ports __user
*retports
)
1380 struct rocket_ports tmp
;
1385 memset(&tmp
, 0, sizeof (tmp
));
1386 tmp
.tty_major
= rocket_driver
->major
;
1388 for (board
= 0; board
< 4; board
++) {
1389 tmp
.rocketModel
[board
].model
= rocketModel
[board
].model
;
1390 strcpy(tmp
.rocketModel
[board
].modelString
, rocketModel
[board
].modelString
);
1391 tmp
.rocketModel
[board
].numPorts
= rocketModel
[board
].numPorts
;
1392 tmp
.rocketModel
[board
].loadrm2
= rocketModel
[board
].loadrm2
;
1393 tmp
.rocketModel
[board
].startingPortNumber
= rocketModel
[board
].startingPortNumber
;
1395 if (copy_to_user(retports
, &tmp
, sizeof (*retports
)))
1400 static int reset_rm2(struct r_port
*info
, void __user
*arg
)
1404 if (copy_from_user(&reset
, arg
, sizeof (int)))
1409 if (rcktpt_type
[info
->board
] != ROCKET_TYPE_MODEMII
&&
1410 rcktpt_type
[info
->board
] != ROCKET_TYPE_MODEMIII
)
1413 if (info
->ctlp
->BusType
== isISA
)
1414 sModemReset(info
->ctlp
, info
->chan
, reset
);
1416 sPCIModemReset(info
->ctlp
, info
->chan
, reset
);
1421 static int get_version(struct r_port
*info
, struct rocket_version __user
*retvers
)
1423 if (copy_to_user(retvers
, &driver_version
, sizeof (*retvers
)))
1428 /* IOCTL call handler into the driver */
1429 static int rp_ioctl(struct tty_struct
*tty
, struct file
*file
,
1430 unsigned int cmd
, unsigned long arg
)
1432 struct r_port
*info
= (struct r_port
*) tty
->driver_data
;
1433 void __user
*argp
= (void __user
*)arg
;
1435 if (cmd
!= RCKP_GET_PORTS
&& rocket_paranoia_check(info
, "rp_ioctl"))
1439 case RCKP_GET_STRUCT
:
1440 if (copy_to_user(argp
, info
, sizeof (struct r_port
)))
1443 case RCKP_GET_CONFIG
:
1444 return get_config(info
, argp
);
1445 case RCKP_SET_CONFIG
:
1446 return set_config(info
, argp
);
1447 case RCKP_GET_PORTS
:
1448 return get_ports(info
, argp
);
1449 case RCKP_RESET_RM2
:
1450 return reset_rm2(info
, argp
);
1451 case RCKP_GET_VERSION
:
1452 return get_version(info
, argp
);
1454 return -ENOIOCTLCMD
;
1459 static void rp_send_xchar(struct tty_struct
*tty
, char ch
)
1461 struct r_port
*info
= (struct r_port
*) tty
->driver_data
;
1464 if (rocket_paranoia_check(info
, "rp_send_xchar"))
1467 cp
= &info
->channel
;
1469 sWriteTxPrioByte(cp
, ch
);
1471 sWriteTxByte(sGetTxRxDataIO(cp
), ch
);
1474 static void rp_throttle(struct tty_struct
*tty
)
1476 struct r_port
*info
= (struct r_port
*) tty
->driver_data
;
1479 #ifdef ROCKET_DEBUG_THROTTLE
1480 printk(KERN_INFO
"throttle %s: %d....\n", tty
->name
,
1481 tty
->ldisc
.chars_in_buffer(tty
));
1484 if (rocket_paranoia_check(info
, "rp_throttle"))
1487 cp
= &info
->channel
;
1489 rp_send_xchar(tty
, STOP_CHAR(tty
));
1491 sClrRTS(&info
->channel
);
1494 static void rp_unthrottle(struct tty_struct
*tty
)
1496 struct r_port
*info
= (struct r_port
*) tty
->driver_data
;
1498 #ifdef ROCKET_DEBUG_THROTTLE
1499 printk(KERN_INFO
"unthrottle %s: %d....\n", tty
->name
,
1500 tty
->ldisc
.chars_in_buffer(tty
));
1503 if (rocket_paranoia_check(info
, "rp_throttle"))
1506 cp
= &info
->channel
;
1508 rp_send_xchar(tty
, START_CHAR(tty
));
1510 sSetRTS(&info
->channel
);
1514 * ------------------------------------------------------------
1515 * rp_stop() and rp_start()
1517 * This routines are called before setting or resetting tty->stopped.
1518 * They enable or disable transmitter interrupts, as necessary.
1519 * ------------------------------------------------------------
1521 static void rp_stop(struct tty_struct
*tty
)
1523 struct r_port
*info
= (struct r_port
*) tty
->driver_data
;
1525 #ifdef ROCKET_DEBUG_FLOW
1526 printk(KERN_INFO
"stop %s: %d %d....\n", tty
->name
,
1527 info
->xmit_cnt
, info
->xmit_fifo_room
);
1530 if (rocket_paranoia_check(info
, "rp_stop"))
1533 if (sGetTxCnt(&info
->channel
))
1534 sDisTransmit(&info
->channel
);
1537 static void rp_start(struct tty_struct
*tty
)
1539 struct r_port
*info
= (struct r_port
*) tty
->driver_data
;
1541 #ifdef ROCKET_DEBUG_FLOW
1542 printk(KERN_INFO
"start %s: %d %d....\n", tty
->name
,
1543 info
->xmit_cnt
, info
->xmit_fifo_room
);
1546 if (rocket_paranoia_check(info
, "rp_stop"))
1549 sEnTransmit(&info
->channel
);
1550 set_bit((info
->aiop
* 8) + info
->chan
,
1551 (void *) &xmit_flags
[info
->board
]);
1555 * rp_wait_until_sent() --- wait until the transmitter is empty
1557 static void rp_wait_until_sent(struct tty_struct
*tty
, int timeout
)
1559 struct r_port
*info
= (struct r_port
*) tty
->driver_data
;
1561 unsigned long orig_jiffies
;
1562 int check_time
, exit_time
;
1565 if (rocket_paranoia_check(info
, "rp_wait_until_sent"))
1568 cp
= &info
->channel
;
1570 orig_jiffies
= jiffies
;
1571 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1572 printk(KERN_INFO
"In RP_wait_until_sent(%d) (jiff=%lu)...", timeout
,
1574 printk(KERN_INFO
"cps=%d...", info
->cps
);
1577 txcnt
= sGetTxCnt(cp
);
1579 if (sGetChanStatusLo(cp
) & TXSHRMT
)
1581 check_time
= (HZ
/ info
->cps
) / 5;
1583 check_time
= HZ
* txcnt
/ info
->cps
;
1586 exit_time
= orig_jiffies
+ timeout
- jiffies
;
1589 if (exit_time
< check_time
)
1590 check_time
= exit_time
;
1592 if (check_time
== 0)
1594 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1595 printk(KERN_INFO
"txcnt = %d (jiff=%lu,check=%d)...", txcnt
, jiffies
, check_time
);
1597 msleep_interruptible(jiffies_to_msecs(check_time
));
1598 if (signal_pending(current
))
1601 __set_current_state(TASK_RUNNING
);
1602 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1603 printk(KERN_INFO
"txcnt = %d (jiff=%lu)...done\n", txcnt
, jiffies
);
1608 * rp_hangup() --- called by tty_hangup() when a hangup is signaled.
1610 static void rp_hangup(struct tty_struct
*tty
)
1613 struct r_port
*info
= (struct r_port
*) tty
->driver_data
;
1615 if (rocket_paranoia_check(info
, "rp_hangup"))
1618 #if (defined(ROCKET_DEBUG_OPEN) || defined(ROCKET_DEBUG_HANGUP))
1619 printk(KERN_INFO
"rp_hangup of ttyR%d...", info
->line
);
1621 rp_flush_buffer(tty
);
1622 if (info
->flags
& ROCKET_CLOSING
)
1625 atomic_dec(&rp_num_ports_open
);
1626 clear_bit((info
->aiop
* 8) + info
->chan
, (void *) &xmit_flags
[info
->board
]);
1629 info
->flags
&= ~ROCKET_NORMAL_ACTIVE
;
1632 cp
= &info
->channel
;
1635 sDisInterrupts(cp
, (TXINT_EN
| MCINT_EN
| RXINT_EN
| SRCINT_EN
| CHANINT_EN
));
1637 sDisTxSoftFlowCtl(cp
);
1639 info
->flags
&= ~ROCKET_INITIALIZED
;
1641 wake_up_interruptible(&info
->open_wait
);
1645 * Exception handler - write char routine. The RocketPort driver uses a
1646 * double-buffering strategy, with the twist that if the in-memory CPU
1647 * buffer is empty, and there's space in the transmit FIFO, the
1648 * writing routines will write directly to transmit FIFO.
1649 * Write buffer and counters protected by spinlocks
1651 static void rp_put_char(struct tty_struct
*tty
, unsigned char ch
)
1653 struct r_port
*info
= (struct r_port
*) tty
->driver_data
;
1655 unsigned long flags
;
1657 if (rocket_paranoia_check(info
, "rp_put_char"))
1661 * Grab the port write mutex, locking out other processes that try to
1662 * write to this port
1664 mutex_lock(&info
->write_mtx
);
1666 #ifdef ROCKET_DEBUG_WRITE
1667 printk(KERN_INFO
"rp_put_char %c...", ch
);
1670 spin_lock_irqsave(&info
->slock
, flags
);
1671 cp
= &info
->channel
;
1673 if (!tty
->stopped
&& !tty
->hw_stopped
&& info
->xmit_fifo_room
== 0)
1674 info
->xmit_fifo_room
= TXFIFO_SIZE
- sGetTxCnt(cp
);
1676 if (tty
->stopped
|| tty
->hw_stopped
|| info
->xmit_fifo_room
== 0 || info
->xmit_cnt
!= 0) {
1677 info
->xmit_buf
[info
->xmit_head
++] = ch
;
1678 info
->xmit_head
&= XMIT_BUF_SIZE
- 1;
1680 set_bit((info
->aiop
* 8) + info
->chan
, (void *) &xmit_flags
[info
->board
]);
1682 sOutB(sGetTxRxDataIO(cp
), ch
);
1683 info
->xmit_fifo_room
--;
1685 spin_unlock_irqrestore(&info
->slock
, flags
);
1686 mutex_unlock(&info
->write_mtx
);
1690 * Exception handler - write routine, called when user app writes to the device.
1691 * A per port write mutex is used to protect from another process writing to
1692 * this port at the same time. This other process could be running on the other CPU
1693 * or get control of the CPU if the copy_from_user() blocks due to a page fault (swapped out).
1694 * Spinlocks protect the info xmit members.
1696 static int rp_write(struct tty_struct
*tty
,
1697 const unsigned char *buf
, int count
)
1699 struct r_port
*info
= (struct r_port
*) tty
->driver_data
;
1701 const unsigned char *b
;
1703 unsigned long flags
;
1705 if (count
<= 0 || rocket_paranoia_check(info
, "rp_write"))
1708 if (mutex_lock_interruptible(&info
->write_mtx
))
1709 return -ERESTARTSYS
;
1711 #ifdef ROCKET_DEBUG_WRITE
1712 printk(KERN_INFO
"rp_write %d chars...", count
);
1714 cp
= &info
->channel
;
1716 if (!tty
->stopped
&& !tty
->hw_stopped
&& info
->xmit_fifo_room
< count
)
1717 info
->xmit_fifo_room
= TXFIFO_SIZE
- sGetTxCnt(cp
);
1720 * If the write queue for the port is empty, and there is FIFO space, stuff bytes
1721 * into FIFO. Use the write queue for temp storage.
1723 if (!tty
->stopped
&& !tty
->hw_stopped
&& info
->xmit_cnt
== 0 && info
->xmit_fifo_room
> 0) {
1724 c
= min(count
, info
->xmit_fifo_room
);
1727 /* Push data into FIFO, 2 bytes at a time */
1728 sOutStrW(sGetTxRxDataIO(cp
), (unsigned short *) b
, c
/ 2);
1730 /* If there is a byte remaining, write it */
1732 sOutB(sGetTxRxDataIO(cp
), b
[c
- 1]);
1738 spin_lock_irqsave(&info
->slock
, flags
);
1739 info
->xmit_fifo_room
-= c
;
1740 spin_unlock_irqrestore(&info
->slock
, flags
);
1743 /* If count is zero, we wrote it all and are done */
1747 /* Write remaining data into the port's xmit_buf */
1749 if (info
->tty
== 0) /* Seemingly obligatory check... */
1752 c
= min(count
, min(XMIT_BUF_SIZE
- info
->xmit_cnt
- 1, XMIT_BUF_SIZE
- info
->xmit_head
));
1757 memcpy(info
->xmit_buf
+ info
->xmit_head
, b
, c
);
1759 spin_lock_irqsave(&info
->slock
, flags
);
1761 (info
->xmit_head
+ c
) & (XMIT_BUF_SIZE
- 1);
1762 info
->xmit_cnt
+= c
;
1763 spin_unlock_irqrestore(&info
->slock
, flags
);
1770 if ((retval
> 0) && !tty
->stopped
&& !tty
->hw_stopped
)
1771 set_bit((info
->aiop
* 8) + info
->chan
, (void *) &xmit_flags
[info
->board
]);
1774 if (info
->xmit_cnt
< WAKEUP_CHARS
) {
1776 #ifdef ROCKETPORT_HAVE_POLL_WAIT
1777 wake_up_interruptible(&tty
->poll_wait
);
1780 mutex_unlock(&info
->write_mtx
);
1785 * Return the number of characters that can be sent. We estimate
1786 * only using the in-memory transmit buffer only, and ignore the
1787 * potential space in the transmit FIFO.
1789 static int rp_write_room(struct tty_struct
*tty
)
1791 struct r_port
*info
= (struct r_port
*) tty
->driver_data
;
1794 if (rocket_paranoia_check(info
, "rp_write_room"))
1797 ret
= XMIT_BUF_SIZE
- info
->xmit_cnt
- 1;
1800 #ifdef ROCKET_DEBUG_WRITE
1801 printk(KERN_INFO
"rp_write_room returns %d...", ret
);
1807 * Return the number of characters in the buffer. Again, this only
1808 * counts those characters in the in-memory transmit buffer.
1810 static int rp_chars_in_buffer(struct tty_struct
*tty
)
1812 struct r_port
*info
= (struct r_port
*) tty
->driver_data
;
1815 if (rocket_paranoia_check(info
, "rp_chars_in_buffer"))
1818 cp
= &info
->channel
;
1820 #ifdef ROCKET_DEBUG_WRITE
1821 printk(KERN_INFO
"rp_chars_in_buffer returns %d...", info
->xmit_cnt
);
1823 return info
->xmit_cnt
;
1827 * Flushes the TX fifo for a port, deletes data in the xmit_buf stored in the
1828 * r_port struct for the port. Note that spinlock are used to protect info members,
1829 * do not call this function if the spinlock is already held.
1831 static void rp_flush_buffer(struct tty_struct
*tty
)
1833 struct r_port
*info
= (struct r_port
*) tty
->driver_data
;
1835 unsigned long flags
;
1837 if (rocket_paranoia_check(info
, "rp_flush_buffer"))
1840 spin_lock_irqsave(&info
->slock
, flags
);
1841 info
->xmit_cnt
= info
->xmit_head
= info
->xmit_tail
= 0;
1842 spin_unlock_irqrestore(&info
->slock
, flags
);
1844 #ifdef ROCKETPORT_HAVE_POLL_WAIT
1845 wake_up_interruptible(&tty
->poll_wait
);
1849 cp
= &info
->channel
;
1855 static struct pci_device_id __devinitdata rocket_pci_ids
[] = {
1856 { PCI_DEVICE(PCI_VENDOR_ID_RP
, PCI_ANY_ID
) },
1859 MODULE_DEVICE_TABLE(pci
, rocket_pci_ids
);
1862 * Called when a PCI card is found. Retrieves and stores model information,
1863 * init's aiopic and serial port hardware.
1864 * Inputs: i is the board number (0-n)
1866 static __init
int register_PCI(int i
, struct pci_dev
*dev
)
1868 int num_aiops
, aiop
, max_num_aiops
, num_chan
, chan
;
1869 unsigned int aiopio
[MAX_AIOPS_PER_BOARD
];
1870 char *str
, *board_type
;
1874 int altChanRingIndicator
= 0;
1875 int ports_per_aiop
= 8;
1877 unsigned int class_rev
;
1878 WordIO_t ConfigIO
= 0;
1879 ByteIO_t UPCIRingInd
= 0;
1881 if (!dev
|| pci_enable_device(dev
))
1884 rcktpt_io_addr
[i
] = pci_resource_start(dev
, 0);
1885 ret
= pci_read_config_dword(dev
, PCI_CLASS_REVISION
, &class_rev
);
1888 printk(KERN_INFO
" Error during register_PCI(), unable to read config dword \n");
1892 rcktpt_type
[i
] = ROCKET_TYPE_NORMAL
;
1893 rocketModel
[i
].loadrm2
= 0;
1894 rocketModel
[i
].startingPortNumber
= nextLineNumber
;
1896 /* Depending on the model, set up some config variables */
1897 switch (dev
->device
) {
1898 case PCI_DEVICE_ID_RP4QUAD
:
1902 rocketModel
[i
].model
= MODEL_RP4QUAD
;
1903 strcpy(rocketModel
[i
].modelString
, "RocketPort 4 port w/quad cable");
1904 rocketModel
[i
].numPorts
= 4;
1906 case PCI_DEVICE_ID_RP8OCTA
:
1909 rocketModel
[i
].model
= MODEL_RP8OCTA
;
1910 strcpy(rocketModel
[i
].modelString
, "RocketPort 8 port w/octa cable");
1911 rocketModel
[i
].numPorts
= 8;
1913 case PCI_DEVICE_ID_URP8OCTA
:
1916 rocketModel
[i
].model
= MODEL_UPCI_RP8OCTA
;
1917 strcpy(rocketModel
[i
].modelString
, "RocketPort UPCI 8 port w/octa cable");
1918 rocketModel
[i
].numPorts
= 8;
1920 case PCI_DEVICE_ID_RP8INTF
:
1923 rocketModel
[i
].model
= MODEL_RP8INTF
;
1924 strcpy(rocketModel
[i
].modelString
, "RocketPort 8 port w/external I/F");
1925 rocketModel
[i
].numPorts
= 8;
1927 case PCI_DEVICE_ID_URP8INTF
:
1930 rocketModel
[i
].model
= MODEL_UPCI_RP8INTF
;
1931 strcpy(rocketModel
[i
].modelString
, "RocketPort UPCI 8 port w/external I/F");
1932 rocketModel
[i
].numPorts
= 8;
1934 case PCI_DEVICE_ID_RP8J
:
1937 rocketModel
[i
].model
= MODEL_RP8J
;
1938 strcpy(rocketModel
[i
].modelString
, "RocketPort 8 port w/RJ11 connectors");
1939 rocketModel
[i
].numPorts
= 8;
1941 case PCI_DEVICE_ID_RP4J
:
1945 rocketModel
[i
].model
= MODEL_RP4J
;
1946 strcpy(rocketModel
[i
].modelString
, "RocketPort 4 port w/RJ45 connectors");
1947 rocketModel
[i
].numPorts
= 4;
1949 case PCI_DEVICE_ID_RP8SNI
:
1950 str
= "8 (DB78 Custom)";
1952 rocketModel
[i
].model
= MODEL_RP8SNI
;
1953 strcpy(rocketModel
[i
].modelString
, "RocketPort 8 port w/ custom DB78");
1954 rocketModel
[i
].numPorts
= 8;
1956 case PCI_DEVICE_ID_RP16SNI
:
1957 str
= "16 (DB78 Custom)";
1959 rocketModel
[i
].model
= MODEL_RP16SNI
;
1960 strcpy(rocketModel
[i
].modelString
, "RocketPort 16 port w/ custom DB78");
1961 rocketModel
[i
].numPorts
= 16;
1963 case PCI_DEVICE_ID_RP16INTF
:
1966 rocketModel
[i
].model
= MODEL_RP16INTF
;
1967 strcpy(rocketModel
[i
].modelString
, "RocketPort 16 port w/external I/F");
1968 rocketModel
[i
].numPorts
= 16;
1970 case PCI_DEVICE_ID_URP16INTF
:
1973 rocketModel
[i
].model
= MODEL_UPCI_RP16INTF
;
1974 strcpy(rocketModel
[i
].modelString
, "RocketPort UPCI 16 port w/external I/F");
1975 rocketModel
[i
].numPorts
= 16;
1977 case PCI_DEVICE_ID_CRP16INTF
:
1980 rocketModel
[i
].model
= MODEL_CPCI_RP16INTF
;
1981 strcpy(rocketModel
[i
].modelString
, "RocketPort Compact PCI 16 port w/external I/F");
1982 rocketModel
[i
].numPorts
= 16;
1984 case PCI_DEVICE_ID_RP32INTF
:
1987 rocketModel
[i
].model
= MODEL_RP32INTF
;
1988 strcpy(rocketModel
[i
].modelString
, "RocketPort 32 port w/external I/F");
1989 rocketModel
[i
].numPorts
= 32;
1991 case PCI_DEVICE_ID_URP32INTF
:
1994 rocketModel
[i
].model
= MODEL_UPCI_RP32INTF
;
1995 strcpy(rocketModel
[i
].modelString
, "RocketPort UPCI 32 port w/external I/F");
1996 rocketModel
[i
].numPorts
= 32;
1998 case PCI_DEVICE_ID_RPP4
:
1999 str
= "Plus Quadcable";
2002 altChanRingIndicator
++;
2004 rocketModel
[i
].model
= MODEL_RPP4
;
2005 strcpy(rocketModel
[i
].modelString
, "RocketPort Plus 4 port");
2006 rocketModel
[i
].numPorts
= 4;
2008 case PCI_DEVICE_ID_RPP8
:
2009 str
= "Plus Octacable";
2012 altChanRingIndicator
++;
2014 rocketModel
[i
].model
= MODEL_RPP8
;
2015 strcpy(rocketModel
[i
].modelString
, "RocketPort Plus 8 port");
2016 rocketModel
[i
].numPorts
= 8;
2018 case PCI_DEVICE_ID_RP2_232
:
2019 str
= "Plus 2 (RS-232)";
2022 altChanRingIndicator
++;
2024 rocketModel
[i
].model
= MODEL_RP2_232
;
2025 strcpy(rocketModel
[i
].modelString
, "RocketPort Plus 2 port RS232");
2026 rocketModel
[i
].numPorts
= 2;
2028 case PCI_DEVICE_ID_RP2_422
:
2029 str
= "Plus 2 (RS-422)";
2032 altChanRingIndicator
++;
2034 rocketModel
[i
].model
= MODEL_RP2_422
;
2035 strcpy(rocketModel
[i
].modelString
, "RocketPort Plus 2 port RS422");
2036 rocketModel
[i
].numPorts
= 2;
2038 case PCI_DEVICE_ID_RP6M
:
2044 /* If class_rev is 1, the rocketmodem flash must be loaded. If it is 2 it is a "socketed" version. */
2045 if ((class_rev
& 0xFF) == 1) {
2046 rcktpt_type
[i
] = ROCKET_TYPE_MODEMII
;
2047 rocketModel
[i
].loadrm2
= 1;
2049 rcktpt_type
[i
] = ROCKET_TYPE_MODEM
;
2052 rocketModel
[i
].model
= MODEL_RP6M
;
2053 strcpy(rocketModel
[i
].modelString
, "RocketModem 6 port");
2054 rocketModel
[i
].numPorts
= 6;
2056 case PCI_DEVICE_ID_RP4M
:
2060 if ((class_rev
& 0xFF) == 1) {
2061 rcktpt_type
[i
] = ROCKET_TYPE_MODEMII
;
2062 rocketModel
[i
].loadrm2
= 1;
2064 rcktpt_type
[i
] = ROCKET_TYPE_MODEM
;
2067 rocketModel
[i
].model
= MODEL_RP4M
;
2068 strcpy(rocketModel
[i
].modelString
, "RocketModem 4 port");
2069 rocketModel
[i
].numPorts
= 4;
2072 str
= "(unknown/unsupported)";
2078 * Check for UPCI boards.
2081 switch (dev
->device
) {
2082 case PCI_DEVICE_ID_URP32INTF
:
2083 case PCI_DEVICE_ID_URP8INTF
:
2084 case PCI_DEVICE_ID_URP16INTF
:
2085 case PCI_DEVICE_ID_CRP16INTF
:
2086 case PCI_DEVICE_ID_URP8OCTA
:
2087 rcktpt_io_addr
[i
] = pci_resource_start(dev
, 2);
2088 ConfigIO
= pci_resource_start(dev
, 1);
2089 if (dev
->device
== PCI_DEVICE_ID_URP8OCTA
) {
2090 UPCIRingInd
= rcktpt_io_addr
[i
] + _PCI_9030_RING_IND
;
2093 * Check for octa or quad cable.
2096 (sInW(ConfigIO
+ _PCI_9030_GPIO_CTRL
) &
2097 PCI_GPIO_CTRL_8PORT
)) {
2100 rocketModel
[i
].numPorts
= 4;
2104 case PCI_DEVICE_ID_UPCI_RM3_8PORT
:
2107 rocketModel
[i
].model
= MODEL_UPCI_RM3_8PORT
;
2108 strcpy(rocketModel
[i
].modelString
, "RocketModem III 8 port");
2109 rocketModel
[i
].numPorts
= 8;
2110 rcktpt_io_addr
[i
] = pci_resource_start(dev
, 2);
2111 UPCIRingInd
= rcktpt_io_addr
[i
] + _PCI_9030_RING_IND
;
2112 ConfigIO
= pci_resource_start(dev
, 1);
2113 rcktpt_type
[i
] = ROCKET_TYPE_MODEMIII
;
2115 case PCI_DEVICE_ID_UPCI_RM3_4PORT
:
2118 rocketModel
[i
].model
= MODEL_UPCI_RM3_4PORT
;
2119 strcpy(rocketModel
[i
].modelString
, "RocketModem III 4 port");
2120 rocketModel
[i
].numPorts
= 4;
2121 rcktpt_io_addr
[i
] = pci_resource_start(dev
, 2);
2122 UPCIRingInd
= rcktpt_io_addr
[i
] + _PCI_9030_RING_IND
;
2123 ConfigIO
= pci_resource_start(dev
, 1);
2124 rcktpt_type
[i
] = ROCKET_TYPE_MODEMIII
;
2130 switch (rcktpt_type
[i
]) {
2131 case ROCKET_TYPE_MODEM
:
2132 board_type
= "RocketModem";
2134 case ROCKET_TYPE_MODEMII
:
2135 board_type
= "RocketModem II";
2137 case ROCKET_TYPE_MODEMIII
:
2138 board_type
= "RocketModem III";
2141 board_type
= "RocketPort";
2146 sClockPrescale
= 0x12; /* mod 2 (divide by 3) */
2147 rp_baud_base
[i
] = 921600;
2150 * If support_low_speed is set, use the slow clock
2151 * prescale, which supports 50 bps
2153 if (support_low_speed
) {
2154 /* mod 9 (divide by 10) prescale */
2155 sClockPrescale
= 0x19;
2156 rp_baud_base
[i
] = 230400;
2158 /* mod 4 (devide by 5) prescale */
2159 sClockPrescale
= 0x14;
2160 rp_baud_base
[i
] = 460800;
2164 for (aiop
= 0; aiop
< max_num_aiops
; aiop
++)
2165 aiopio
[aiop
] = rcktpt_io_addr
[i
] + (aiop
* 0x40);
2166 ctlp
= sCtlNumToCtlPtr(i
);
2167 num_aiops
= sPCIInitController(ctlp
, i
, aiopio
, max_num_aiops
, ConfigIO
, 0, FREQ_DIS
, 0, altChanRingIndicator
, UPCIRingInd
);
2168 for (aiop
= 0; aiop
< max_num_aiops
; aiop
++)
2169 ctlp
->AiopNumChan
[aiop
] = ports_per_aiop
;
2171 printk("Comtrol PCI controller #%d ID 0x%x found in bus:slot:fn %s at address %04lx, "
2172 "%d AIOP(s) (%s)\n", i
, dev
->device
, pci_name(dev
),
2173 rcktpt_io_addr
[i
], num_aiops
, rocketModel
[i
].modelString
);
2174 printk(KERN_INFO
"Installing %s, creating /dev/ttyR%d - %ld\n",
2175 rocketModel
[i
].modelString
,
2176 rocketModel
[i
].startingPortNumber
,
2177 rocketModel
[i
].startingPortNumber
+
2178 rocketModel
[i
].numPorts
- 1);
2180 if (num_aiops
<= 0) {
2181 rcktpt_io_addr
[i
] = 0;
2186 /* Reset the AIOPIC, init the serial ports */
2187 for (aiop
= 0; aiop
< num_aiops
; aiop
++) {
2188 sResetAiopByNum(ctlp
, aiop
);
2189 num_chan
= ports_per_aiop
;
2190 for (chan
= 0; chan
< num_chan
; chan
++)
2191 init_r_port(i
, aiop
, chan
, dev
);
2194 /* Rocket modems must be reset */
2195 if ((rcktpt_type
[i
] == ROCKET_TYPE_MODEM
) ||
2196 (rcktpt_type
[i
] == ROCKET_TYPE_MODEMII
) ||
2197 (rcktpt_type
[i
] == ROCKET_TYPE_MODEMIII
)) {
2198 num_chan
= ports_per_aiop
;
2199 for (chan
= 0; chan
< num_chan
; chan
++)
2200 sPCIModemReset(ctlp
, chan
, 1);
2202 for (chan
= 0; chan
< num_chan
; chan
++)
2203 sPCIModemReset(ctlp
, chan
, 0);
2205 rmSpeakerReset(ctlp
, rocketModel
[i
].model
);
2211 * Probes for PCI cards, inits them if found
2212 * Input: board_found = number of ISA boards already found, or the
2213 * starting board number
2214 * Returns: Number of PCI boards found
2216 static int __init
init_PCI(int boards_found
)
2218 struct pci_dev
*dev
= NULL
;
2221 /* Work through the PCI device list, pulling out ours */
2222 while ((dev
= pci_get_device(PCI_VENDOR_ID_RP
, PCI_ANY_ID
, dev
))) {
2223 if (register_PCI(count
+ boards_found
, dev
))
2229 #endif /* CONFIG_PCI */
2232 * Probes for ISA cards
2233 * Input: i = the board number to look for
2234 * Returns: 1 if board found, 0 else
2236 static int __init
init_ISA(int i
)
2238 int num_aiops
, num_chan
= 0, total_num_chan
= 0;
2240 unsigned int aiopio
[MAX_AIOPS_PER_BOARD
];
2244 /* If io_addr is zero, no board configured */
2245 if (rcktpt_io_addr
[i
] == 0)
2248 /* Reserve the IO region */
2249 if (!request_region(rcktpt_io_addr
[i
], 64, "Comtrol RocketPort")) {
2250 printk(KERN_INFO
"Unable to reserve IO region for configured ISA RocketPort at address 0x%lx, board not installed...\n", rcktpt_io_addr
[i
]);
2251 rcktpt_io_addr
[i
] = 0;
2255 ctlp
= sCtlNumToCtlPtr(i
);
2257 ctlp
->boardType
= rcktpt_type
[i
];
2259 switch (rcktpt_type
[i
]) {
2260 case ROCKET_TYPE_PC104
:
2261 type_string
= "(PC104)";
2263 case ROCKET_TYPE_MODEM
:
2264 type_string
= "(RocketModem)";
2266 case ROCKET_TYPE_MODEMII
:
2267 type_string
= "(RocketModem II)";
2275 * If support_low_speed is set, use the slow clock prescale,
2276 * which supports 50 bps
2278 if (support_low_speed
) {
2279 sClockPrescale
= 0x19; /* mod 9 (divide by 10) prescale */
2280 rp_baud_base
[i
] = 230400;
2282 sClockPrescale
= 0x14; /* mod 4 (devide by 5) prescale */
2283 rp_baud_base
[i
] = 460800;
2286 for (aiop
= 0; aiop
< MAX_AIOPS_PER_BOARD
; aiop
++)
2287 aiopio
[aiop
] = rcktpt_io_addr
[i
] + (aiop
* 0x400);
2289 num_aiops
= sInitController(ctlp
, i
, controller
+ (i
* 0x400), aiopio
, MAX_AIOPS_PER_BOARD
, 0, FREQ_DIS
, 0);
2291 if (ctlp
->boardType
== ROCKET_TYPE_PC104
) {
2292 sEnAiop(ctlp
, 2); /* only one AIOPIC, but these */
2293 sEnAiop(ctlp
, 3); /* CSels used for other stuff */
2296 /* If something went wrong initing the AIOP's release the ISA IO memory */
2297 if (num_aiops
<= 0) {
2298 release_region(rcktpt_io_addr
[i
], 64);
2299 rcktpt_io_addr
[i
] = 0;
2303 rocketModel
[i
].startingPortNumber
= nextLineNumber
;
2305 for (aiop
= 0; aiop
< num_aiops
; aiop
++) {
2306 sResetAiopByNum(ctlp
, aiop
);
2307 sEnAiop(ctlp
, aiop
);
2308 num_chan
= sGetAiopNumChan(ctlp
, aiop
);
2309 total_num_chan
+= num_chan
;
2310 for (chan
= 0; chan
< num_chan
; chan
++)
2311 init_r_port(i
, aiop
, chan
, NULL
);
2314 if ((rcktpt_type
[i
] == ROCKET_TYPE_MODEM
) || (rcktpt_type
[i
] == ROCKET_TYPE_MODEMII
)) {
2315 num_chan
= sGetAiopNumChan(ctlp
, 0);
2316 total_num_chan
= num_chan
;
2317 for (chan
= 0; chan
< num_chan
; chan
++)
2318 sModemReset(ctlp
, chan
, 1);
2320 for (chan
= 0; chan
< num_chan
; chan
++)
2321 sModemReset(ctlp
, chan
, 0);
2323 strcpy(rocketModel
[i
].modelString
, "RocketModem ISA");
2325 strcpy(rocketModel
[i
].modelString
, "RocketPort ISA");
2327 rocketModel
[i
].numPorts
= total_num_chan
;
2328 rocketModel
[i
].model
= MODEL_ISA
;
2330 printk(KERN_INFO
"RocketPort ISA card #%d found at 0x%lx - %d AIOPs %s\n",
2331 i
, rcktpt_io_addr
[i
], num_aiops
, type_string
);
2333 printk(KERN_INFO
"Installing %s, creating /dev/ttyR%d - %ld\n",
2334 rocketModel
[i
].modelString
,
2335 rocketModel
[i
].startingPortNumber
,
2336 rocketModel
[i
].startingPortNumber
+
2337 rocketModel
[i
].numPorts
- 1);
2342 static const struct tty_operations rocket_ops
= {
2346 .put_char
= rp_put_char
,
2347 .write_room
= rp_write_room
,
2348 .chars_in_buffer
= rp_chars_in_buffer
,
2349 .flush_buffer
= rp_flush_buffer
,
2351 .throttle
= rp_throttle
,
2352 .unthrottle
= rp_unthrottle
,
2353 .set_termios
= rp_set_termios
,
2356 .hangup
= rp_hangup
,
2357 .break_ctl
= rp_break
,
2358 .send_xchar
= rp_send_xchar
,
2359 .wait_until_sent
= rp_wait_until_sent
,
2360 .tiocmget
= rp_tiocmget
,
2361 .tiocmset
= rp_tiocmset
,
2365 * The module "startup" routine; it's run when the module is loaded.
2367 static int __init
rp_init(void)
2369 int retval
, pci_boards_found
, isa_boards_found
, i
;
2371 printk(KERN_INFO
"RocketPort device driver module, version %s, %s\n",
2372 ROCKET_VERSION
, ROCKET_DATE
);
2374 rocket_driver
= alloc_tty_driver(MAX_RP_PORTS
);
2379 * Initialize the array of pointers to our own internal state
2382 memset(rp_table
, 0, sizeof (rp_table
));
2383 memset(xmit_flags
, 0, sizeof (xmit_flags
));
2385 for (i
= 0; i
< MAX_RP_PORTS
; i
++)
2388 memset(rocketModel
, 0, sizeof (rocketModel
));
2391 * If board 1 is non-zero, there is at least one ISA configured. If controller is
2392 * zero, use the default controller IO address of board1 + 0x40.
2395 if (controller
== 0)
2396 controller
= board1
+ 0x40;
2398 controller
= 0; /* Used as a flag, meaning no ISA boards */
2401 /* If an ISA card is configured, reserve the 4 byte IO space for the Mudbac controller */
2402 if (controller
&& (!request_region(controller
, 4, "Comtrol RocketPort"))) {
2403 printk(KERN_INFO
"Unable to reserve IO region for first configured ISA RocketPort controller 0x%lx. Driver exiting \n", controller
);
2407 /* Store ISA variable retrieved from command line or .conf file. */
2408 rcktpt_io_addr
[0] = board1
;
2409 rcktpt_io_addr
[1] = board2
;
2410 rcktpt_io_addr
[2] = board3
;
2411 rcktpt_io_addr
[3] = board4
;
2413 rcktpt_type
[0] = modem1
? ROCKET_TYPE_MODEM
: ROCKET_TYPE_NORMAL
;
2414 rcktpt_type
[0] = pc104_1
[0] ? ROCKET_TYPE_PC104
: rcktpt_type
[0];
2415 rcktpt_type
[1] = modem2
? ROCKET_TYPE_MODEM
: ROCKET_TYPE_NORMAL
;
2416 rcktpt_type
[1] = pc104_2
[0] ? ROCKET_TYPE_PC104
: rcktpt_type
[1];
2417 rcktpt_type
[2] = modem3
? ROCKET_TYPE_MODEM
: ROCKET_TYPE_NORMAL
;
2418 rcktpt_type
[2] = pc104_3
[0] ? ROCKET_TYPE_PC104
: rcktpt_type
[2];
2419 rcktpt_type
[3] = modem4
? ROCKET_TYPE_MODEM
: ROCKET_TYPE_NORMAL
;
2420 rcktpt_type
[3] = pc104_4
[0] ? ROCKET_TYPE_PC104
: rcktpt_type
[3];
2423 * Set up the tty driver structure and then register this
2424 * driver with the tty layer.
2427 rocket_driver
->owner
= THIS_MODULE
;
2428 rocket_driver
->flags
= TTY_DRIVER_DYNAMIC_DEV
;
2429 rocket_driver
->name
= "ttyR";
2430 rocket_driver
->driver_name
= "Comtrol RocketPort";
2431 rocket_driver
->major
= TTY_ROCKET_MAJOR
;
2432 rocket_driver
->minor_start
= 0;
2433 rocket_driver
->type
= TTY_DRIVER_TYPE_SERIAL
;
2434 rocket_driver
->subtype
= SERIAL_TYPE_NORMAL
;
2435 rocket_driver
->init_termios
= tty_std_termios
;
2436 rocket_driver
->init_termios
.c_cflag
=
2437 B9600
| CS8
| CREAD
| HUPCL
| CLOCAL
;
2438 rocket_driver
->init_termios
.c_ispeed
= 9600;
2439 rocket_driver
->init_termios
.c_ospeed
= 9600;
2440 #ifdef ROCKET_SOFT_FLOW
2441 rocket_driver
->flags
|= TTY_DRIVER_REAL_RAW
| TTY_DRIVER_DYNAMIC_DEV
;
2443 tty_set_operations(rocket_driver
, &rocket_ops
);
2445 retval
= tty_register_driver(rocket_driver
);
2447 printk(KERN_INFO
"Couldn't install tty RocketPort driver (error %d)\n", -retval
);
2448 put_tty_driver(rocket_driver
);
2452 #ifdef ROCKET_DEBUG_OPEN
2453 printk(KERN_INFO
"RocketPort driver is major %d\n", rocket_driver
.major
);
2457 * OK, let's probe each of the controllers looking for boards. Any boards found
2458 * will be initialized here.
2460 isa_boards_found
= 0;
2461 pci_boards_found
= 0;
2463 for (i
= 0; i
< NUM_BOARDS
; i
++) {
2469 if (isa_boards_found
< NUM_BOARDS
)
2470 pci_boards_found
= init_PCI(isa_boards_found
);
2473 max_board
= pci_boards_found
+ isa_boards_found
;
2475 if (max_board
== 0) {
2476 printk(KERN_INFO
"No rocketport ports found; unloading driver.\n");
2477 del_timer_sync(&rocket_timer
);
2478 tty_unregister_driver(rocket_driver
);
2479 put_tty_driver(rocket_driver
);
2487 static void rp_cleanup_module(void)
2492 del_timer_sync(&rocket_timer
);
2494 retval
= tty_unregister_driver(rocket_driver
);
2496 printk(KERN_INFO
"Error %d while trying to unregister "
2497 "rocketport driver\n", -retval
);
2498 put_tty_driver(rocket_driver
);
2500 for (i
= 0; i
< MAX_RP_PORTS
; i
++)
2503 for (i
= 0; i
< NUM_BOARDS
; i
++) {
2504 if (rcktpt_io_addr
[i
] <= 0 || is_PCI
[i
])
2506 release_region(rcktpt_io_addr
[i
], 64);
2509 release_region(controller
, 4);
2512 /***************************************************************************
2513 Function: sInitController
2514 Purpose: Initialization of controller global registers and controller
2516 Call: sInitController(CtlP,CtlNum,MudbacIO,AiopIOList,AiopIOListSize,
2517 IRQNum,Frequency,PeriodicOnly)
2518 CONTROLLER_T *CtlP; Ptr to controller structure
2519 int CtlNum; Controller number
2520 ByteIO_t MudbacIO; Mudbac base I/O address.
2521 ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
2522 This list must be in the order the AIOPs will be found on the
2523 controller. Once an AIOP in the list is not found, it is
2524 assumed that there are no more AIOPs on the controller.
2525 int AiopIOListSize; Number of addresses in AiopIOList
2526 int IRQNum; Interrupt Request number. Can be any of the following:
2527 0: Disable global interrupts
2536 Byte_t Frequency: A flag identifying the frequency
2537 of the periodic interrupt, can be any one of the following:
2538 FREQ_DIS - periodic interrupt disabled
2539 FREQ_137HZ - 137 Hertz
2540 FREQ_69HZ - 69 Hertz
2541 FREQ_34HZ - 34 Hertz
2542 FREQ_17HZ - 17 Hertz
2545 If IRQNum is set to 0 the Frequency parameter is
2546 overidden, it is forced to a value of FREQ_DIS.
2547 int PeriodicOnly: 1 if all interrupts except the periodic
2548 interrupt are to be blocked.
2549 0 is both the periodic interrupt and
2550 other channel interrupts are allowed.
2551 If IRQNum is set to 0 the PeriodicOnly parameter is
2552 overidden, it is forced to a value of 0.
2553 Return: int: Number of AIOPs on the controller, or CTLID_NULL if controller
2554 initialization failed.
2557 If periodic interrupts are to be disabled but AIOP interrupts
2558 are allowed, set Frequency to FREQ_DIS and PeriodicOnly to 0.
2560 If interrupts are to be completely disabled set IRQNum to 0.
2562 Setting Frequency to FREQ_DIS and PeriodicOnly to 1 is an
2563 invalid combination.
2565 This function performs initialization of global interrupt modes,
2566 but it does not actually enable global interrupts. To enable
2567 and disable global interrupts use functions sEnGlobalInt() and
2568 sDisGlobalInt(). Enabling of global interrupts is normally not
2569 done until all other initializations are complete.
2571 Even if interrupts are globally enabled, they must also be
2572 individually enabled for each channel that is to generate
2575 Warnings: No range checking on any of the parameters is done.
2577 No context switches are allowed while executing this function.
2579 After this function all AIOPs on the controller are disabled,
2580 they can be enabled with sEnAiop().
2582 static int sInitController(CONTROLLER_T
* CtlP
, int CtlNum
, ByteIO_t MudbacIO
,
2583 ByteIO_t
* AiopIOList
, int AiopIOListSize
,
2584 int IRQNum
, Byte_t Frequency
, int PeriodicOnly
)
2590 CtlP
->AiopIntrBits
= aiop_intr_bits
;
2591 CtlP
->AltChanRingIndicator
= 0;
2592 CtlP
->CtlNum
= CtlNum
;
2593 CtlP
->CtlID
= CTLID_0001
; /* controller release 1 */
2594 CtlP
->BusType
= isISA
;
2595 CtlP
->MBaseIO
= MudbacIO
;
2596 CtlP
->MReg1IO
= MudbacIO
+ 1;
2597 CtlP
->MReg2IO
= MudbacIO
+ 2;
2598 CtlP
->MReg3IO
= MudbacIO
+ 3;
2600 CtlP
->MReg2
= 0; /* interrupt disable */
2601 CtlP
->MReg3
= 0; /* no periodic interrupts */
2603 if (sIRQMap
[IRQNum
] == 0) { /* interrupts globally disabled */
2604 CtlP
->MReg2
= 0; /* interrupt disable */
2605 CtlP
->MReg3
= 0; /* no periodic interrupts */
2607 CtlP
->MReg2
= sIRQMap
[IRQNum
]; /* set IRQ number */
2608 CtlP
->MReg3
= Frequency
; /* set frequency */
2609 if (PeriodicOnly
) { /* periodic interrupt only */
2610 CtlP
->MReg3
|= PERIODIC_ONLY
;
2614 sOutB(CtlP
->MReg2IO
, CtlP
->MReg2
);
2615 sOutB(CtlP
->MReg3IO
, CtlP
->MReg3
);
2616 sControllerEOI(CtlP
); /* clear EOI if warm init */
2619 for (i
= done
= 0; i
< AiopIOListSize
; i
++) {
2621 CtlP
->AiopIO
[i
] = (WordIO_t
) io
;
2622 CtlP
->AiopIntChanIO
[i
] = io
+ _INT_CHAN
;
2623 sOutB(CtlP
->MReg2IO
, CtlP
->MReg2
| (i
& 0x03)); /* AIOP index */
2624 sOutB(MudbacIO
, (Byte_t
) (io
>> 6)); /* set up AIOP I/O in MUDBAC */
2627 sEnAiop(CtlP
, i
); /* enable the AIOP */
2628 CtlP
->AiopID
[i
] = sReadAiopID(io
); /* read AIOP ID */
2629 if (CtlP
->AiopID
[i
] == AIOPID_NULL
) /* if AIOP does not exist */
2630 done
= 1; /* done looking for AIOPs */
2632 CtlP
->AiopNumChan
[i
] = sReadAiopNumChan((WordIO_t
) io
); /* num channels in AIOP */
2633 sOutW((WordIO_t
) io
+ _INDX_ADDR
, _CLK_PRE
); /* clock prescaler */
2634 sOutB(io
+ _INDX_DATA
, sClockPrescale
);
2635 CtlP
->NumAiop
++; /* bump count of AIOPs */
2637 sDisAiop(CtlP
, i
); /* disable AIOP */
2640 if (CtlP
->NumAiop
== 0)
2643 return (CtlP
->NumAiop
);
2646 /***************************************************************************
2647 Function: sPCIInitController
2648 Purpose: Initialization of controller global registers and controller
2650 Call: sPCIInitController(CtlP,CtlNum,AiopIOList,AiopIOListSize,
2651 IRQNum,Frequency,PeriodicOnly)
2652 CONTROLLER_T *CtlP; Ptr to controller structure
2653 int CtlNum; Controller number
2654 ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
2655 This list must be in the order the AIOPs will be found on the
2656 controller. Once an AIOP in the list is not found, it is
2657 assumed that there are no more AIOPs on the controller.
2658 int AiopIOListSize; Number of addresses in AiopIOList
2659 int IRQNum; Interrupt Request number. Can be any of the following:
2660 0: Disable global interrupts
2669 Byte_t Frequency: A flag identifying the frequency
2670 of the periodic interrupt, can be any one of the following:
2671 FREQ_DIS - periodic interrupt disabled
2672 FREQ_137HZ - 137 Hertz
2673 FREQ_69HZ - 69 Hertz
2674 FREQ_34HZ - 34 Hertz
2675 FREQ_17HZ - 17 Hertz
2678 If IRQNum is set to 0 the Frequency parameter is
2679 overidden, it is forced to a value of FREQ_DIS.
2680 int PeriodicOnly: 1 if all interrupts except the periodic
2681 interrupt are to be blocked.
2682 0 is both the periodic interrupt and
2683 other channel interrupts are allowed.
2684 If IRQNum is set to 0 the PeriodicOnly parameter is
2685 overidden, it is forced to a value of 0.
2686 Return: int: Number of AIOPs on the controller, or CTLID_NULL if controller
2687 initialization failed.
2690 If periodic interrupts are to be disabled but AIOP interrupts
2691 are allowed, set Frequency to FREQ_DIS and PeriodicOnly to 0.
2693 If interrupts are to be completely disabled set IRQNum to 0.
2695 Setting Frequency to FREQ_DIS and PeriodicOnly to 1 is an
2696 invalid combination.
2698 This function performs initialization of global interrupt modes,
2699 but it does not actually enable global interrupts. To enable
2700 and disable global interrupts use functions sEnGlobalInt() and
2701 sDisGlobalInt(). Enabling of global interrupts is normally not
2702 done until all other initializations are complete.
2704 Even if interrupts are globally enabled, they must also be
2705 individually enabled for each channel that is to generate
2708 Warnings: No range checking on any of the parameters is done.
2710 No context switches are allowed while executing this function.
2712 After this function all AIOPs on the controller are disabled,
2713 they can be enabled with sEnAiop().
2715 static int sPCIInitController(CONTROLLER_T
* CtlP
, int CtlNum
,
2716 ByteIO_t
* AiopIOList
, int AiopIOListSize
,
2717 WordIO_t ConfigIO
, int IRQNum
, Byte_t Frequency
,
2718 int PeriodicOnly
, int altChanRingIndicator
,
2724 CtlP
->AltChanRingIndicator
= altChanRingIndicator
;
2725 CtlP
->UPCIRingInd
= UPCIRingInd
;
2726 CtlP
->CtlNum
= CtlNum
;
2727 CtlP
->CtlID
= CTLID_0001
; /* controller release 1 */
2728 CtlP
->BusType
= isPCI
; /* controller release 1 */
2732 CtlP
->PCIIO
= ConfigIO
+ _PCI_9030_INT_CTRL
;
2733 CtlP
->PCIIO2
= ConfigIO
+ _PCI_9030_GPIO_CTRL
;
2734 CtlP
->AiopIntrBits
= upci_aiop_intr_bits
;
2738 (WordIO_t
) ((ByteIO_t
) AiopIOList
[0] + _PCI_INT_FUNC
);
2739 CtlP
->AiopIntrBits
= aiop_intr_bits
;
2742 sPCIControllerEOI(CtlP
); /* clear EOI if warm init */
2745 for (i
= 0; i
< AiopIOListSize
; i
++) {
2747 CtlP
->AiopIO
[i
] = (WordIO_t
) io
;
2748 CtlP
->AiopIntChanIO
[i
] = io
+ _INT_CHAN
;
2750 CtlP
->AiopID
[i
] = sReadAiopID(io
); /* read AIOP ID */
2751 if (CtlP
->AiopID
[i
] == AIOPID_NULL
) /* if AIOP does not exist */
2752 break; /* done looking for AIOPs */
2754 CtlP
->AiopNumChan
[i
] = sReadAiopNumChan((WordIO_t
) io
); /* num channels in AIOP */
2755 sOutW((WordIO_t
) io
+ _INDX_ADDR
, _CLK_PRE
); /* clock prescaler */
2756 sOutB(io
+ _INDX_DATA
, sClockPrescale
);
2757 CtlP
->NumAiop
++; /* bump count of AIOPs */
2760 if (CtlP
->NumAiop
== 0)
2763 return (CtlP
->NumAiop
);
2766 /***************************************************************************
2767 Function: sReadAiopID
2768 Purpose: Read the AIOP idenfication number directly from an AIOP.
2769 Call: sReadAiopID(io)
2770 ByteIO_t io: AIOP base I/O address
2771 Return: int: Flag AIOPID_XXXX if a valid AIOP is found, where X
2772 is replace by an identifying number.
2773 Flag AIOPID_NULL if no valid AIOP is found
2774 Warnings: No context switches are allowed while executing this function.
2777 static int sReadAiopID(ByteIO_t io
)
2779 Byte_t AiopID
; /* ID byte from AIOP */
2781 sOutB(io
+ _CMD_REG
, RESET_ALL
); /* reset AIOP */
2782 sOutB(io
+ _CMD_REG
, 0x0);
2783 AiopID
= sInW(io
+ _CHN_STAT0
) & 0x07;
2786 else /* AIOP does not exist */
2790 /***************************************************************************
2791 Function: sReadAiopNumChan
2792 Purpose: Read the number of channels available in an AIOP directly from
2794 Call: sReadAiopNumChan(io)
2795 WordIO_t io: AIOP base I/O address
2796 Return: int: The number of channels available
2797 Comments: The number of channels is determined by write/reads from identical
2798 offsets within the SRAM address spaces for channels 0 and 4.
2799 If the channel 4 space is mirrored to channel 0 it is a 4 channel
2800 AIOP, otherwise it is an 8 channel.
2801 Warnings: No context switches are allowed while executing this function.
2803 static int sReadAiopNumChan(WordIO_t io
)
2806 static Byte_t R
[4] = { 0x00, 0x00, 0x34, 0x12 };
2808 /* write to chan 0 SRAM */
2809 sOutDW((DWordIO_t
) io
+ _INDX_ADDR
, *((DWord_t
*) & R
[0]));
2810 sOutW(io
+ _INDX_ADDR
, 0); /* read from SRAM, chan 0 */
2811 x
= sInW(io
+ _INDX_DATA
);
2812 sOutW(io
+ _INDX_ADDR
, 0x4000); /* read from SRAM, chan 4 */
2813 if (x
!= sInW(io
+ _INDX_DATA
)) /* if different must be 8 chan */
2819 /***************************************************************************
2821 Purpose: Initialization of a channel and channel structure
2822 Call: sInitChan(CtlP,ChP,AiopNum,ChanNum)
2823 CONTROLLER_T *CtlP; Ptr to controller structure
2824 CHANNEL_T *ChP; Ptr to channel structure
2825 int AiopNum; AIOP number within controller
2826 int ChanNum; Channel number within AIOP
2827 Return: int: 1 if initialization succeeded, 0 if it fails because channel
2828 number exceeds number of channels available in AIOP.
2829 Comments: This function must be called before a channel can be used.
2830 Warnings: No range checking on any of the parameters is done.
2832 No context switches are allowed while executing this function.
2834 static int sInitChan(CONTROLLER_T
* CtlP
, CHANNEL_T
* ChP
, int AiopNum
,
2845 if (ChanNum
>= CtlP
->AiopNumChan
[AiopNum
])
2846 return 0; /* exceeds num chans in AIOP */
2848 /* Channel, AIOP, and controller identifiers */
2850 ChP
->ChanID
= CtlP
->AiopID
[AiopNum
];
2851 ChP
->AiopNum
= AiopNum
;
2852 ChP
->ChanNum
= ChanNum
;
2854 /* Global direct addresses */
2855 AiopIO
= CtlP
->AiopIO
[AiopNum
];
2856 ChP
->Cmd
= (ByteIO_t
) AiopIO
+ _CMD_REG
;
2857 ChP
->IntChan
= (ByteIO_t
) AiopIO
+ _INT_CHAN
;
2858 ChP
->IntMask
= (ByteIO_t
) AiopIO
+ _INT_MASK
;
2859 ChP
->IndexAddr
= (DWordIO_t
) AiopIO
+ _INDX_ADDR
;
2860 ChP
->IndexData
= AiopIO
+ _INDX_DATA
;
2862 /* Channel direct addresses */
2863 ChIOOff
= AiopIO
+ ChP
->ChanNum
* 2;
2864 ChP
->TxRxData
= ChIOOff
+ _TD0
;
2865 ChP
->ChanStat
= ChIOOff
+ _CHN_STAT0
;
2866 ChP
->TxRxCount
= ChIOOff
+ _FIFO_CNT0
;
2867 ChP
->IntID
= (ByteIO_t
) AiopIO
+ ChP
->ChanNum
+ _INT_ID0
;
2869 /* Initialize the channel from the RData array */
2870 for (i
= 0; i
< RDATASIZE
; i
+= 4) {
2872 R
[1] = RData
[i
+ 1] + 0x10 * ChanNum
;
2873 R
[2] = RData
[i
+ 2];
2874 R
[3] = RData
[i
+ 3];
2875 sOutDW(ChP
->IndexAddr
, *((DWord_t
*) & R
[0]));
2879 for (i
= 0; i
< RREGDATASIZE
; i
+= 4) {
2880 ChR
[i
] = RRegData
[i
];
2881 ChR
[i
+ 1] = RRegData
[i
+ 1] + 0x10 * ChanNum
;
2882 ChR
[i
+ 2] = RRegData
[i
+ 2];
2883 ChR
[i
+ 3] = RRegData
[i
+ 3];
2886 /* Indexed registers */
2887 ChOff
= (Word_t
) ChanNum
*0x1000;
2889 if (sClockPrescale
== 0x14)
2894 ChP
->BaudDiv
[0] = (Byte_t
) (ChOff
+ _BAUD
);
2895 ChP
->BaudDiv
[1] = (Byte_t
) ((ChOff
+ _BAUD
) >> 8);
2896 ChP
->BaudDiv
[2] = (Byte_t
) brd9600
;
2897 ChP
->BaudDiv
[3] = (Byte_t
) (brd9600
>> 8);
2898 sOutDW(ChP
->IndexAddr
, *(DWord_t
*) & ChP
->BaudDiv
[0]);
2900 ChP
->TxControl
[0] = (Byte_t
) (ChOff
+ _TX_CTRL
);
2901 ChP
->TxControl
[1] = (Byte_t
) ((ChOff
+ _TX_CTRL
) >> 8);
2902 ChP
->TxControl
[2] = 0;
2903 ChP
->TxControl
[3] = 0;
2904 sOutDW(ChP
->IndexAddr
, *(DWord_t
*) & ChP
->TxControl
[0]);
2906 ChP
->RxControl
[0] = (Byte_t
) (ChOff
+ _RX_CTRL
);
2907 ChP
->RxControl
[1] = (Byte_t
) ((ChOff
+ _RX_CTRL
) >> 8);
2908 ChP
->RxControl
[2] = 0;
2909 ChP
->RxControl
[3] = 0;
2910 sOutDW(ChP
->IndexAddr
, *(DWord_t
*) & ChP
->RxControl
[0]);
2912 ChP
->TxEnables
[0] = (Byte_t
) (ChOff
+ _TX_ENBLS
);
2913 ChP
->TxEnables
[1] = (Byte_t
) ((ChOff
+ _TX_ENBLS
) >> 8);
2914 ChP
->TxEnables
[2] = 0;
2915 ChP
->TxEnables
[3] = 0;
2916 sOutDW(ChP
->IndexAddr
, *(DWord_t
*) & ChP
->TxEnables
[0]);
2918 ChP
->TxCompare
[0] = (Byte_t
) (ChOff
+ _TXCMP1
);
2919 ChP
->TxCompare
[1] = (Byte_t
) ((ChOff
+ _TXCMP1
) >> 8);
2920 ChP
->TxCompare
[2] = 0;
2921 ChP
->TxCompare
[3] = 0;
2922 sOutDW(ChP
->IndexAddr
, *(DWord_t
*) & ChP
->TxCompare
[0]);
2924 ChP
->TxReplace1
[0] = (Byte_t
) (ChOff
+ _TXREP1B1
);
2925 ChP
->TxReplace1
[1] = (Byte_t
) ((ChOff
+ _TXREP1B1
) >> 8);
2926 ChP
->TxReplace1
[2] = 0;
2927 ChP
->TxReplace1
[3] = 0;
2928 sOutDW(ChP
->IndexAddr
, *(DWord_t
*) & ChP
->TxReplace1
[0]);
2930 ChP
->TxReplace2
[0] = (Byte_t
) (ChOff
+ _TXREP2
);
2931 ChP
->TxReplace2
[1] = (Byte_t
) ((ChOff
+ _TXREP2
) >> 8);
2932 ChP
->TxReplace2
[2] = 0;
2933 ChP
->TxReplace2
[3] = 0;
2934 sOutDW(ChP
->IndexAddr
, *(DWord_t
*) & ChP
->TxReplace2
[0]);
2936 ChP
->TxFIFOPtrs
= ChOff
+ _TXF_OUTP
;
2937 ChP
->TxFIFO
= ChOff
+ _TX_FIFO
;
2939 sOutB(ChP
->Cmd
, (Byte_t
) ChanNum
| RESTXFCNT
); /* apply reset Tx FIFO count */
2940 sOutB(ChP
->Cmd
, (Byte_t
) ChanNum
); /* remove reset Tx FIFO count */
2941 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->TxFIFOPtrs
); /* clear Tx in/out ptrs */
2942 sOutW(ChP
->IndexData
, 0);
2943 ChP
->RxFIFOPtrs
= ChOff
+ _RXF_OUTP
;
2944 ChP
->RxFIFO
= ChOff
+ _RX_FIFO
;
2946 sOutB(ChP
->Cmd
, (Byte_t
) ChanNum
| RESRXFCNT
); /* apply reset Rx FIFO count */
2947 sOutB(ChP
->Cmd
, (Byte_t
) ChanNum
); /* remove reset Rx FIFO count */
2948 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->RxFIFOPtrs
); /* clear Rx out ptr */
2949 sOutW(ChP
->IndexData
, 0);
2950 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->RxFIFOPtrs
+ 2); /* clear Rx in ptr */
2951 sOutW(ChP
->IndexData
, 0);
2952 ChP
->TxPrioCnt
= ChOff
+ _TXP_CNT
;
2953 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->TxPrioCnt
);
2954 sOutB(ChP
->IndexData
, 0);
2955 ChP
->TxPrioPtr
= ChOff
+ _TXP_PNTR
;
2956 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->TxPrioPtr
);
2957 sOutB(ChP
->IndexData
, 0);
2958 ChP
->TxPrioBuf
= ChOff
+ _TXP_BUF
;
2959 sEnRxProcessor(ChP
); /* start the Rx processor */
2964 /***************************************************************************
2965 Function: sStopRxProcessor
2966 Purpose: Stop the receive processor from processing a channel.
2967 Call: sStopRxProcessor(ChP)
2968 CHANNEL_T *ChP; Ptr to channel structure
2970 Comments: The receive processor can be started again with sStartRxProcessor().
2971 This function causes the receive processor to skip over the
2972 stopped channel. It does not stop it from processing other channels.
2974 Warnings: No context switches are allowed while executing this function.
2976 Do not leave the receive processor stopped for more than one
2979 After calling this function a delay of 4 uS is required to ensure
2980 that the receive processor is no longer processing this channel.
2982 static void sStopRxProcessor(CHANNEL_T
* ChP
)
2990 sOutDW(ChP
->IndexAddr
, *(DWord_t
*) & R
[0]);
2993 /***************************************************************************
2994 Function: sFlushRxFIFO
2995 Purpose: Flush the Rx FIFO
2996 Call: sFlushRxFIFO(ChP)
2997 CHANNEL_T *ChP; Ptr to channel structure
2999 Comments: To prevent data from being enqueued or dequeued in the Tx FIFO
3000 while it is being flushed the receive processor is stopped
3001 and the transmitter is disabled. After these operations a
3002 4 uS delay is done before clearing the pointers to allow
3003 the receive processor to stop. These items are handled inside
3005 Warnings: No context switches are allowed while executing this function.
3007 static void sFlushRxFIFO(CHANNEL_T
* ChP
)
3010 Byte_t Ch
; /* channel number within AIOP */
3011 int RxFIFOEnabled
; /* 1 if Rx FIFO enabled */
3013 if (sGetRxCnt(ChP
) == 0) /* Rx FIFO empty */
3014 return; /* don't need to flush */
3017 if (ChP
->R
[0x32] == 0x08) { /* Rx FIFO is enabled */
3019 sDisRxFIFO(ChP
); /* disable it */
3020 for (i
= 0; i
< 2000 / 200; i
++) /* delay 2 uS to allow proc to disable FIFO */
3021 sInB(ChP
->IntChan
); /* depends on bus i/o timing */
3023 sGetChanStatus(ChP
); /* clear any pending Rx errors in chan stat */
3024 Ch
= (Byte_t
) sGetChanNum(ChP
);
3025 sOutB(ChP
->Cmd
, Ch
| RESRXFCNT
); /* apply reset Rx FIFO count */
3026 sOutB(ChP
->Cmd
, Ch
); /* remove reset Rx FIFO count */
3027 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->RxFIFOPtrs
); /* clear Rx out ptr */
3028 sOutW(ChP
->IndexData
, 0);
3029 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->RxFIFOPtrs
+ 2); /* clear Rx in ptr */
3030 sOutW(ChP
->IndexData
, 0);
3032 sEnRxFIFO(ChP
); /* enable Rx FIFO */
3035 /***************************************************************************
3036 Function: sFlushTxFIFO
3037 Purpose: Flush the Tx FIFO
3038 Call: sFlushTxFIFO(ChP)
3039 CHANNEL_T *ChP; Ptr to channel structure
3041 Comments: To prevent data from being enqueued or dequeued in the Tx FIFO
3042 while it is being flushed the receive processor is stopped
3043 and the transmitter is disabled. After these operations a
3044 4 uS delay is done before clearing the pointers to allow
3045 the receive processor to stop. These items are handled inside
3047 Warnings: No context switches are allowed while executing this function.
3049 static void sFlushTxFIFO(CHANNEL_T
* ChP
)
3052 Byte_t Ch
; /* channel number within AIOP */
3053 int TxEnabled
; /* 1 if transmitter enabled */
3055 if (sGetTxCnt(ChP
) == 0) /* Tx FIFO empty */
3056 return; /* don't need to flush */
3059 if (ChP
->TxControl
[3] & TX_ENABLE
) {
3061 sDisTransmit(ChP
); /* disable transmitter */
3063 sStopRxProcessor(ChP
); /* stop Rx processor */
3064 for (i
= 0; i
< 4000 / 200; i
++) /* delay 4 uS to allow proc to stop */
3065 sInB(ChP
->IntChan
); /* depends on bus i/o timing */
3066 Ch
= (Byte_t
) sGetChanNum(ChP
);
3067 sOutB(ChP
->Cmd
, Ch
| RESTXFCNT
); /* apply reset Tx FIFO count */
3068 sOutB(ChP
->Cmd
, Ch
); /* remove reset Tx FIFO count */
3069 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->TxFIFOPtrs
); /* clear Tx in/out ptrs */
3070 sOutW(ChP
->IndexData
, 0);
3072 sEnTransmit(ChP
); /* enable transmitter */
3073 sStartRxProcessor(ChP
); /* restart Rx processor */
3076 /***************************************************************************
3077 Function: sWriteTxPrioByte
3078 Purpose: Write a byte of priority transmit data to a channel
3079 Call: sWriteTxPrioByte(ChP,Data)
3080 CHANNEL_T *ChP; Ptr to channel structure
3081 Byte_t Data; The transmit data byte
3083 Return: int: 1 if the bytes is successfully written, otherwise 0.
3085 Comments: The priority byte is transmitted before any data in the Tx FIFO.
3087 Warnings: No context switches are allowed while executing this function.
3089 static int sWriteTxPrioByte(CHANNEL_T
* ChP
, Byte_t Data
)
3091 Byte_t DWBuf
[4]; /* buffer for double word writes */
3092 Word_t
*WordPtr
; /* must be far because Win SS != DS */
3093 register DWordIO_t IndexAddr
;
3095 if (sGetTxCnt(ChP
) > 1) { /* write it to Tx priority buffer */
3096 IndexAddr
= ChP
->IndexAddr
;
3097 sOutW((WordIO_t
) IndexAddr
, ChP
->TxPrioCnt
); /* get priority buffer status */
3098 if (sInB((ByteIO_t
) ChP
->IndexData
) & PRI_PEND
) /* priority buffer busy */
3099 return (0); /* nothing sent */
3101 WordPtr
= (Word_t
*) (&DWBuf
[0]);
3102 *WordPtr
= ChP
->TxPrioBuf
; /* data byte address */
3104 DWBuf
[2] = Data
; /* data byte value */
3105 sOutDW(IndexAddr
, *((DWord_t
*) (&DWBuf
[0]))); /* write it out */
3107 *WordPtr
= ChP
->TxPrioCnt
; /* Tx priority count address */
3109 DWBuf
[2] = PRI_PEND
+ 1; /* indicate 1 byte pending */
3110 DWBuf
[3] = 0; /* priority buffer pointer */
3111 sOutDW(IndexAddr
, *((DWord_t
*) (&DWBuf
[0]))); /* write it out */
3112 } else { /* write it to Tx FIFO */
3114 sWriteTxByte(sGetTxRxDataIO(ChP
), Data
);
3116 return (1); /* 1 byte sent */
3119 /***************************************************************************
3120 Function: sEnInterrupts
3121 Purpose: Enable one or more interrupts for a channel
3122 Call: sEnInterrupts(ChP,Flags)
3123 CHANNEL_T *ChP; Ptr to channel structure
3124 Word_t Flags: Interrupt enable flags, can be any combination
3125 of the following flags:
3126 TXINT_EN: Interrupt on Tx FIFO empty
3127 RXINT_EN: Interrupt on Rx FIFO at trigger level (see
3129 SRCINT_EN: Interrupt on SRC (Special Rx Condition)
3130 MCINT_EN: Interrupt on modem input change
3131 CHANINT_EN: Allow channel interrupt signal to the AIOP's
3132 Interrupt Channel Register.
3134 Comments: If an interrupt enable flag is set in Flags, that interrupt will be
3135 enabled. If an interrupt enable flag is not set in Flags, that
3136 interrupt will not be changed. Interrupts can be disabled with
3137 function sDisInterrupts().
3139 This function sets the appropriate bit for the channel in the AIOP's
3140 Interrupt Mask Register if the CHANINT_EN flag is set. This allows
3141 this channel's bit to be set in the AIOP's Interrupt Channel Register.
3143 Interrupts must also be globally enabled before channel interrupts
3144 will be passed on to the host. This is done with function
3147 In some cases it may be desirable to disable interrupts globally but
3148 enable channel interrupts. This would allow the global interrupt
3149 status register to be used to determine which AIOPs need service.
3151 static void sEnInterrupts(CHANNEL_T
* ChP
, Word_t Flags
)
3153 Byte_t Mask
; /* Interrupt Mask Register */
3155 ChP
->RxControl
[2] |=
3156 ((Byte_t
) Flags
& (RXINT_EN
| SRCINT_EN
| MCINT_EN
));
3158 sOutDW(ChP
->IndexAddr
, *(DWord_t
*) & ChP
->RxControl
[0]);
3160 ChP
->TxControl
[2] |= ((Byte_t
) Flags
& TXINT_EN
);
3162 sOutDW(ChP
->IndexAddr
, *(DWord_t
*) & ChP
->TxControl
[0]);
3164 if (Flags
& CHANINT_EN
) {
3165 Mask
= sInB(ChP
->IntMask
) | sBitMapSetTbl
[ChP
->ChanNum
];
3166 sOutB(ChP
->IntMask
, Mask
);
3170 /***************************************************************************
3171 Function: sDisInterrupts
3172 Purpose: Disable one or more interrupts for a channel
3173 Call: sDisInterrupts(ChP,Flags)
3174 CHANNEL_T *ChP; Ptr to channel structure
3175 Word_t Flags: Interrupt flags, can be any combination
3176 of the following flags:
3177 TXINT_EN: Interrupt on Tx FIFO empty
3178 RXINT_EN: Interrupt on Rx FIFO at trigger level (see
3180 SRCINT_EN: Interrupt on SRC (Special Rx Condition)
3181 MCINT_EN: Interrupt on modem input change
3182 CHANINT_EN: Disable channel interrupt signal to the
3183 AIOP's Interrupt Channel Register.
3185 Comments: If an interrupt flag is set in Flags, that interrupt will be
3186 disabled. If an interrupt flag is not set in Flags, that
3187 interrupt will not be changed. Interrupts can be enabled with
3188 function sEnInterrupts().
3190 This function clears the appropriate bit for the channel in the AIOP's
3191 Interrupt Mask Register if the CHANINT_EN flag is set. This blocks
3192 this channel's bit from being set in the AIOP's Interrupt Channel
3195 static void sDisInterrupts(CHANNEL_T
* ChP
, Word_t Flags
)
3197 Byte_t Mask
; /* Interrupt Mask Register */
3199 ChP
->RxControl
[2] &=
3200 ~((Byte_t
) Flags
& (RXINT_EN
| SRCINT_EN
| MCINT_EN
));
3201 sOutDW(ChP
->IndexAddr
, *(DWord_t
*) & ChP
->RxControl
[0]);
3202 ChP
->TxControl
[2] &= ~((Byte_t
) Flags
& TXINT_EN
);
3203 sOutDW(ChP
->IndexAddr
, *(DWord_t
*) & ChP
->TxControl
[0]);
3205 if (Flags
& CHANINT_EN
) {
3206 Mask
= sInB(ChP
->IntMask
) & sBitMapClrTbl
[ChP
->ChanNum
];
3207 sOutB(ChP
->IntMask
, Mask
);
3211 static void sSetInterfaceMode(CHANNEL_T
* ChP
, Byte_t mode
)
3213 sOutB(ChP
->CtlP
->AiopIO
[2], (mode
& 0x18) | ChP
->ChanNum
);
3217 * Not an official SSCI function, but how to reset RocketModems.
3220 static void sModemReset(CONTROLLER_T
* CtlP
, int chan
, int on
)
3225 addr
= CtlP
->AiopIO
[0] + 0x400;
3226 val
= sInB(CtlP
->MReg3IO
);
3227 /* if AIOP[1] is not enabled, enable it */
3228 if ((val
& 2) == 0) {
3229 val
= sInB(CtlP
->MReg2IO
);
3230 sOutB(CtlP
->MReg2IO
, (val
& 0xfc) | (1 & 0x03));
3231 sOutB(CtlP
->MBaseIO
, (unsigned char) (addr
>> 6));
3237 sOutB(addr
+ chan
, 0); /* apply or remove reset */
3242 * Not an official SSCI function, but how to reset RocketModems.
3245 static void sPCIModemReset(CONTROLLER_T
* CtlP
, int chan
, int on
)
3249 addr
= CtlP
->AiopIO
[0] + 0x40; /* 2nd AIOP */
3252 sOutB(addr
+ chan
, 0); /* apply or remove reset */
3255 /* Resets the speaker controller on RocketModem II and III devices */
3256 static void rmSpeakerReset(CONTROLLER_T
* CtlP
, unsigned long model
)
3260 /* RocketModem II speaker control is at the 8th port location of offset 0x40 */
3261 if ((model
== MODEL_RP4M
) || (model
== MODEL_RP6M
)) {
3262 addr
= CtlP
->AiopIO
[0] + 0x4F;
3266 /* RocketModem III speaker control is at the 1st port location of offset 0x80 */
3267 if ((model
== MODEL_UPCI_RM3_8PORT
)
3268 || (model
== MODEL_UPCI_RM3_4PORT
)) {
3269 addr
= CtlP
->AiopIO
[0] + 0x88;
3274 /* Returns the line number given the controller (board), aiop and channel number */
3275 static unsigned char GetLineNumber(int ctrl
, int aiop
, int ch
)
3277 return lineNumbers
[(ctrl
<< 5) | (aiop
<< 3) | ch
];
3281 * Stores the line number associated with a given controller (board), aiop
3282 * and channel number.
3283 * Returns: The line number assigned
3285 static unsigned char SetLineNumber(int ctrl
, int aiop
, int ch
)
3287 lineNumbers
[(ctrl
<< 5) | (aiop
<< 3) | ch
] = nextLineNumber
++;
3288 return (nextLineNumber
- 1);