2 * $Id: synclink_gt.c,v 4.20 2005/11/08 19:51:55 paulkf Exp $
4 * Device driver for Microgate SyncLink GT serial adapters.
6 * written by Paul Fulghum for Microgate Corporation
9 * Microgate and SyncLink are trademarks of Microgate Corporation
11 * This code is released under the GNU General Public License (GPL)
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
16 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
17 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
18 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
19 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
21 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
22 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
23 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 * DEBUG OUTPUT DEFINITIONS
29 * uncomment lines below to enable specific types of debug output
31 * DBGINFO information - most verbose output
32 * DBGERR serious errors
33 * DBGBH bottom half service routine debugging
34 * DBGISR interrupt service routine debugging
35 * DBGDATA output receive and transmit data
36 * DBGTBUF output transmit DMA buffers and registers
37 * DBGRBUF output receive DMA buffers and registers
40 #define DBGINFO(fmt) if (debug_level >= DEBUG_LEVEL_INFO) printk fmt
41 #define DBGERR(fmt) if (debug_level >= DEBUG_LEVEL_ERROR) printk fmt
42 #define DBGBH(fmt) if (debug_level >= DEBUG_LEVEL_BH) printk fmt
43 #define DBGISR(fmt) if (debug_level >= DEBUG_LEVEL_ISR) printk fmt
44 #define DBGDATA(info, buf, size, label) if (debug_level >= DEBUG_LEVEL_DATA) trace_block((info), (buf), (size), (label))
45 //#define DBGTBUF(info) dump_tbufs(info)
46 //#define DBGRBUF(info) dump_rbufs(info)
49 #include <linux/config.h>
50 #include <linux/module.h>
51 #include <linux/version.h>
52 #include <linux/errno.h>
53 #include <linux/signal.h>
54 #include <linux/sched.h>
55 #include <linux/timer.h>
56 #include <linux/interrupt.h>
57 #include <linux/pci.h>
58 #include <linux/tty.h>
59 #include <linux/tty_flip.h>
60 #include <linux/serial.h>
61 #include <linux/major.h>
62 #include <linux/string.h>
63 #include <linux/fcntl.h>
64 #include <linux/ptrace.h>
65 #include <linux/ioport.h>
67 #include <linux/slab.h>
68 #include <linux/netdevice.h>
69 #include <linux/vmalloc.h>
70 #include <linux/init.h>
71 #include <linux/delay.h>
72 #include <linux/ioctl.h>
73 #include <linux/termios.h>
74 #include <linux/bitops.h>
75 #include <linux/workqueue.h>
76 #include <linux/hdlc.h>
78 #include <asm/system.h>
82 #include <asm/types.h>
83 #include <asm/uaccess.h>
85 #include "linux/synclink.h"
87 #ifdef CONFIG_HDLC_MODULE
92 * module identification
94 static char *driver_name
= "SyncLink GT";
95 static char *driver_version
= "$Revision: 4.20 $";
96 static char *tty_driver_name
= "synclink_gt";
97 static char *tty_dev_prefix
= "ttySLG";
98 MODULE_LICENSE("GPL");
99 #define MGSL_MAGIC 0x5401
100 #define MAX_DEVICES 12
102 static struct pci_device_id pci_table
[] = {
103 {PCI_VENDOR_ID_MICROGATE
, SYNCLINK_GT_DEVICE_ID
, PCI_ANY_ID
, PCI_ANY_ID
,},
104 {PCI_VENDOR_ID_MICROGATE
, SYNCLINK_GT4_DEVICE_ID
, PCI_ANY_ID
, PCI_ANY_ID
,},
105 {PCI_VENDOR_ID_MICROGATE
, SYNCLINK_AC_DEVICE_ID
, PCI_ANY_ID
, PCI_ANY_ID
,},
106 {0,}, /* terminate list */
108 MODULE_DEVICE_TABLE(pci
, pci_table
);
110 static int init_one(struct pci_dev
*dev
,const struct pci_device_id
*ent
);
111 static void remove_one(struct pci_dev
*dev
);
112 static struct pci_driver pci_driver
= {
113 .name
= "synclink_gt",
114 .id_table
= pci_table
,
116 .remove
= __devexit_p(remove_one
),
119 static int pci_registered
;
122 * module configuration and status
124 static struct slgt_info
*slgt_device_list
;
125 static int slgt_device_count
;
128 static int debug_level
;
129 static int maxframe
[MAX_DEVICES
];
130 static int dosyncppp
[MAX_DEVICES
];
132 module_param(ttymajor
, int, 0);
133 module_param(debug_level
, int, 0);
134 module_param_array(maxframe
, int, NULL
, 0);
135 module_param_array(dosyncppp
, int, NULL
, 0);
137 MODULE_PARM_DESC(ttymajor
, "TTY major device number override: 0=auto assigned");
138 MODULE_PARM_DESC(debug_level
, "Debug syslog output: 0=disabled, 1 to 5=increasing detail");
139 MODULE_PARM_DESC(maxframe
, "Maximum frame size used by device (4096 to 65535)");
140 MODULE_PARM_DESC(dosyncppp
, "Enable synchronous net device, 0=disable 1=enable");
143 * tty support and callbacks
145 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
147 static struct tty_driver
*serial_driver
;
149 static int open(struct tty_struct
*tty
, struct file
* filp
);
150 static void close(struct tty_struct
*tty
, struct file
* filp
);
151 static void hangup(struct tty_struct
*tty
);
152 static void set_termios(struct tty_struct
*tty
, struct termios
*old_termios
);
154 static int write(struct tty_struct
*tty
, const unsigned char *buf
, int count
);
155 static void put_char(struct tty_struct
*tty
, unsigned char ch
);
156 static void send_xchar(struct tty_struct
*tty
, char ch
);
157 static void wait_until_sent(struct tty_struct
*tty
, int timeout
);
158 static int write_room(struct tty_struct
*tty
);
159 static void flush_chars(struct tty_struct
*tty
);
160 static void flush_buffer(struct tty_struct
*tty
);
161 static void tx_hold(struct tty_struct
*tty
);
162 static void tx_release(struct tty_struct
*tty
);
164 static int ioctl(struct tty_struct
*tty
, struct file
*file
, unsigned int cmd
, unsigned long arg
);
165 static int read_proc(char *page
, char **start
, off_t off
, int count
,int *eof
, void *data
);
166 static int chars_in_buffer(struct tty_struct
*tty
);
167 static void throttle(struct tty_struct
* tty
);
168 static void unthrottle(struct tty_struct
* tty
);
169 static void set_break(struct tty_struct
*tty
, int break_state
);
172 * generic HDLC support and callbacks
175 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
176 static void hdlcdev_tx_done(struct slgt_info
*info
);
177 static void hdlcdev_rx(struct slgt_info
*info
, char *buf
, int size
);
178 static int hdlcdev_init(struct slgt_info
*info
);
179 static void hdlcdev_exit(struct slgt_info
*info
);
184 * device specific structures, macros and functions
187 #define SLGT_MAX_PORTS 4
188 #define SLGT_REG_SIZE 256
191 * DMA buffer descriptor and access macros
195 unsigned short count
;
196 unsigned short status
;
197 unsigned int pbuf
; /* physical address of data buffer */
198 unsigned int next
; /* physical address of next descriptor */
200 /* driver book keeping */
201 char *buf
; /* virtual address of data buffer */
202 unsigned int pdesc
; /* physical address of this descriptor */
203 dma_addr_t buf_dma_addr
;
206 #define set_desc_buffer(a,b) (a).pbuf = cpu_to_le32((unsigned int)(b))
207 #define set_desc_next(a,b) (a).next = cpu_to_le32((unsigned int)(b))
208 #define set_desc_count(a,b)(a).count = cpu_to_le16((unsigned short)(b))
209 #define set_desc_eof(a,b) (a).status = cpu_to_le16((b) ? (le16_to_cpu((a).status) | BIT0) : (le16_to_cpu((a).status) & ~BIT0))
210 #define desc_count(a) (le16_to_cpu((a).count))
211 #define desc_status(a) (le16_to_cpu((a).status))
212 #define desc_complete(a) (le16_to_cpu((a).status) & BIT15)
213 #define desc_eof(a) (le16_to_cpu((a).status) & BIT2)
214 #define desc_crc_error(a) (le16_to_cpu((a).status) & BIT1)
215 #define desc_abort(a) (le16_to_cpu((a).status) & BIT0)
216 #define desc_residue(a) ((le16_to_cpu((a).status) & 0x38) >> 3)
218 struct _input_signal_events
{
230 * device instance data structure
233 void *if_ptr
; /* General purpose pointer (used by SPPP) */
235 struct slgt_info
*next_device
; /* device list link */
240 char device_name
[25];
241 struct pci_dev
*pdev
;
243 int port_count
; /* count of ports on adapter */
244 int adapter_num
; /* adapter instance number */
245 int port_num
; /* port instance number */
247 /* array of pointers to port contexts on this adapter */
248 struct slgt_info
*port_array
[SLGT_MAX_PORTS
];
250 int count
; /* count of opens */
251 int line
; /* tty line instance number */
252 unsigned short close_delay
;
253 unsigned short closing_wait
; /* time to wait before closing */
255 struct mgsl_icount icount
;
257 struct tty_struct
*tty
;
259 int x_char
; /* xon/xoff character */
260 int blocked_open
; /* # of blocked opens */
261 unsigned int read_status_mask
;
262 unsigned int ignore_status_mask
;
264 wait_queue_head_t open_wait
;
265 wait_queue_head_t close_wait
;
267 wait_queue_head_t status_event_wait_q
;
268 wait_queue_head_t event_wait_q
;
269 struct timer_list tx_timer
;
270 struct timer_list rx_timer
;
272 spinlock_t lock
; /* spinlock for synchronizing with ISR */
274 struct work_struct task
;
280 int irq_requested
; /* nonzero if IRQ requested */
281 int irq_occurred
; /* for diagnostics use */
283 /* device configuration */
285 unsigned int bus_type
;
286 unsigned int irq_level
;
287 unsigned long irq_flags
;
289 unsigned char __iomem
* reg_addr
; /* memory mapped registers address */
292 int reg_addr_requested
;
294 MGSL_PARAMS params
; /* communications parameters */
296 u32 max_frame_size
; /* as set by device config */
298 unsigned int raw_rx_size
;
299 unsigned int if_mode
;
309 unsigned char signals
; /* serial signal states */
310 unsigned int init_error
; /* initialization error */
312 unsigned char *tx_buf
;
315 char flag_buf
[MAX_ASYNC_BUFFER_SIZE
];
316 char char_buf
[MAX_ASYNC_BUFFER_SIZE
];
317 BOOLEAN drop_rts_on_tx_done
;
318 struct _input_signal_events input_signal_events
;
320 int dcd_chkcount
; /* check counts to prevent */
321 int cts_chkcount
; /* too many IRQs if a signal */
322 int dsr_chkcount
; /* is floating */
325 char *bufs
; /* virtual address of DMA buffer lists */
326 dma_addr_t bufs_dma_addr
; /* physical address of buffer descriptors */
328 unsigned int rbuf_count
;
329 struct slgt_desc
*rbufs
;
330 unsigned int rbuf_current
;
331 unsigned int rbuf_index
;
333 unsigned int tbuf_count
;
334 struct slgt_desc
*tbufs
;
335 unsigned int tbuf_current
;
336 unsigned int tbuf_start
;
338 unsigned char *tmp_rbuf
;
339 unsigned int tmp_rbuf_count
;
341 /* SPPP/Cisco HDLC device parts */
347 struct net_device
*netdev
;
352 static MGSL_PARAMS default_params
= {
353 .mode
= MGSL_MODE_HDLC
,
355 .flags
= HDLC_FLAG_UNDERRUN_ABORT15
,
356 .encoding
= HDLC_ENCODING_NRZI_SPACE
,
359 .crc_type
= HDLC_CRC_16_CCITT
,
360 .preamble_length
= HDLC_PREAMBLE_LENGTH_8BITS
,
361 .preamble
= HDLC_PREAMBLE_PATTERN_NONE
,
365 .parity
= ASYNC_PARITY_NONE
370 #define BH_TRANSMIT 2
372 #define IO_PIN_SHUTDOWN_LIMIT 100
374 #define DMABUFSIZE 256
375 #define DESC_LIST_SIZE 4096
377 #define MASK_PARITY BIT1
378 #define MASK_FRAMING BIT2
379 #define MASK_BREAK BIT3
380 #define MASK_OVERRUN BIT4
382 #define GSR 0x00 /* global status */
383 #define TDR 0x80 /* tx data */
384 #define RDR 0x80 /* rx data */
385 #define TCR 0x82 /* tx control */
386 #define TIR 0x84 /* tx idle */
387 #define TPR 0x85 /* tx preamble */
388 #define RCR 0x86 /* rx control */
389 #define VCR 0x88 /* V.24 control */
390 #define CCR 0x89 /* clock control */
391 #define BDR 0x8a /* baud divisor */
392 #define SCR 0x8c /* serial control */
393 #define SSR 0x8e /* serial status */
394 #define RDCSR 0x90 /* rx DMA control/status */
395 #define TDCSR 0x94 /* tx DMA control/status */
396 #define RDDAR 0x98 /* rx DMA descriptor address */
397 #define TDDAR 0x9c /* tx DMA descriptor address */
400 #define RXBREAK BIT14
401 #define IRQ_TXDATA BIT13
402 #define IRQ_TXIDLE BIT12
403 #define IRQ_TXUNDER BIT11 /* HDLC */
404 #define IRQ_RXDATA BIT10
405 #define IRQ_RXIDLE BIT9 /* HDLC */
406 #define IRQ_RXBREAK BIT9 /* async */
407 #define IRQ_RXOVER BIT8
412 #define IRQ_ALL 0x3ff0
413 #define IRQ_MASTER BIT0
415 #define slgt_irq_on(info, mask) \
416 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) | (mask)))
417 #define slgt_irq_off(info, mask) \
418 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) & ~(mask)))
420 static __u8
rd_reg8(struct slgt_info
*info
, unsigned int addr
);
421 static void wr_reg8(struct slgt_info
*info
, unsigned int addr
, __u8 value
);
422 static __u16
rd_reg16(struct slgt_info
*info
, unsigned int addr
);
423 static void wr_reg16(struct slgt_info
*info
, unsigned int addr
, __u16 value
);
424 static __u32
rd_reg32(struct slgt_info
*info
, unsigned int addr
);
425 static void wr_reg32(struct slgt_info
*info
, unsigned int addr
, __u32 value
);
427 static void msc_set_vcr(struct slgt_info
*info
);
429 static int startup(struct slgt_info
*info
);
430 static int block_til_ready(struct tty_struct
*tty
, struct file
* filp
,struct slgt_info
*info
);
431 static void shutdown(struct slgt_info
*info
);
432 static void program_hw(struct slgt_info
*info
);
433 static void change_params(struct slgt_info
*info
);
435 static int register_test(struct slgt_info
*info
);
436 static int irq_test(struct slgt_info
*info
);
437 static int loopback_test(struct slgt_info
*info
);
438 static int adapter_test(struct slgt_info
*info
);
440 static void reset_adapter(struct slgt_info
*info
);
441 static void reset_port(struct slgt_info
*info
);
442 static void async_mode(struct slgt_info
*info
);
443 static void hdlc_mode(struct slgt_info
*info
);
445 static void rx_stop(struct slgt_info
*info
);
446 static void rx_start(struct slgt_info
*info
);
447 static void reset_rbufs(struct slgt_info
*info
);
448 static void free_rbufs(struct slgt_info
*info
, unsigned int first
, unsigned int last
);
449 static void rdma_reset(struct slgt_info
*info
);
450 static int rx_get_frame(struct slgt_info
*info
);
451 static int rx_get_buf(struct slgt_info
*info
);
453 static void tx_start(struct slgt_info
*info
);
454 static void tx_stop(struct slgt_info
*info
);
455 static void tx_set_idle(struct slgt_info
*info
);
456 static unsigned int free_tbuf_count(struct slgt_info
*info
);
457 static void reset_tbufs(struct slgt_info
*info
);
458 static void tdma_reset(struct slgt_info
*info
);
459 static void tx_load(struct slgt_info
*info
, const char *buf
, unsigned int count
);
461 static void get_signals(struct slgt_info
*info
);
462 static void set_signals(struct slgt_info
*info
);
463 static void enable_loopback(struct slgt_info
*info
);
464 static void set_rate(struct slgt_info
*info
, u32 data_rate
);
466 static int bh_action(struct slgt_info
*info
);
467 static void bh_handler(void* context
);
468 static void bh_transmit(struct slgt_info
*info
);
469 static void isr_serial(struct slgt_info
*info
);
470 static void isr_rdma(struct slgt_info
*info
);
471 static void isr_txeom(struct slgt_info
*info
, unsigned short status
);
472 static void isr_tdma(struct slgt_info
*info
);
473 static irqreturn_t
slgt_interrupt(int irq
, void *dev_id
, struct pt_regs
* regs
);
475 static int alloc_dma_bufs(struct slgt_info
*info
);
476 static void free_dma_bufs(struct slgt_info
*info
);
477 static int alloc_desc(struct slgt_info
*info
);
478 static void free_desc(struct slgt_info
*info
);
479 static int alloc_bufs(struct slgt_info
*info
, struct slgt_desc
*bufs
, int count
);
480 static void free_bufs(struct slgt_info
*info
, struct slgt_desc
*bufs
, int count
);
482 static int alloc_tmp_rbuf(struct slgt_info
*info
);
483 static void free_tmp_rbuf(struct slgt_info
*info
);
485 static void tx_timeout(unsigned long context
);
486 static void rx_timeout(unsigned long context
);
491 static int get_stats(struct slgt_info
*info
, struct mgsl_icount __user
*user_icount
);
492 static int get_params(struct slgt_info
*info
, MGSL_PARAMS __user
*params
);
493 static int set_params(struct slgt_info
*info
, MGSL_PARAMS __user
*params
);
494 static int get_txidle(struct slgt_info
*info
, int __user
*idle_mode
);
495 static int set_txidle(struct slgt_info
*info
, int idle_mode
);
496 static int tx_enable(struct slgt_info
*info
, int enable
);
497 static int tx_abort(struct slgt_info
*info
);
498 static int rx_enable(struct slgt_info
*info
, int enable
);
499 static int modem_input_wait(struct slgt_info
*info
,int arg
);
500 static int wait_mgsl_event(struct slgt_info
*info
, int __user
*mask_ptr
);
501 static int tiocmget(struct tty_struct
*tty
, struct file
*file
);
502 static int tiocmset(struct tty_struct
*tty
, struct file
*file
,
503 unsigned int set
, unsigned int clear
);
504 static void set_break(struct tty_struct
*tty
, int break_state
);
505 static int get_interface(struct slgt_info
*info
, int __user
*if_mode
);
506 static int set_interface(struct slgt_info
*info
, int if_mode
);
511 static void add_device(struct slgt_info
*info
);
512 static void device_init(int adapter_num
, struct pci_dev
*pdev
);
513 static int claim_resources(struct slgt_info
*info
);
514 static void release_resources(struct slgt_info
*info
);
533 static void trace_block(struct slgt_info
*info
, const char *data
, int count
, const char *label
)
537 printk("%s %s data:\n",info
->device_name
, label
);
539 linecount
= (count
> 16) ? 16 : count
;
540 for(i
=0; i
< linecount
; i
++)
541 printk("%02X ",(unsigned char)data
[i
]);
544 for(i
=0;i
<linecount
;i
++) {
545 if (data
[i
]>=040 && data
[i
]<=0176)
546 printk("%c",data
[i
]);
556 #define DBGDATA(info, buf, size, label)
560 static void dump_tbufs(struct slgt_info
*info
)
563 printk("tbuf_current=%d\n", info
->tbuf_current
);
564 for (i
=0 ; i
< info
->tbuf_count
; i
++) {
565 printk("%d: count=%04X status=%04X\n",
566 i
, le16_to_cpu(info
->tbufs
[i
].count
), le16_to_cpu(info
->tbufs
[i
].status
));
570 #define DBGTBUF(info)
574 static void dump_rbufs(struct slgt_info
*info
)
577 printk("rbuf_current=%d\n", info
->rbuf_current
);
578 for (i
=0 ; i
< info
->rbuf_count
; i
++) {
579 printk("%d: count=%04X status=%04X\n",
580 i
, le16_to_cpu(info
->rbufs
[i
].count
), le16_to_cpu(info
->rbufs
[i
].status
));
584 #define DBGRBUF(info)
587 static inline int sanity_check(struct slgt_info
*info
, char *devname
, const char *name
)
591 printk("null struct slgt_info for (%s) in %s\n", devname
, name
);
594 if (info
->magic
!= MGSL_MAGIC
) {
595 printk("bad magic number struct slgt_info (%s) in %s\n", devname
, name
);
606 * line discipline callback wrappers
608 * The wrappers maintain line discipline references
609 * while calling into the line discipline.
611 * ldisc_receive_buf - pass receive data to line discipline
613 static void ldisc_receive_buf(struct tty_struct
*tty
,
614 const __u8
*data
, char *flags
, int count
)
616 struct tty_ldisc
*ld
;
619 ld
= tty_ldisc_ref(tty
);
622 ld
->receive_buf(tty
, data
, flags
, count
);
629 static int open(struct tty_struct
*tty
, struct file
*filp
)
631 struct slgt_info
*info
;
636 if ((line
< 0) || (line
>= slgt_device_count
)) {
637 DBGERR(("%s: open with invalid line #%d.\n", driver_name
, line
));
641 info
= slgt_device_list
;
642 while(info
&& info
->line
!= line
)
643 info
= info
->next_device
;
644 if (sanity_check(info
, tty
->name
, "open"))
646 if (info
->init_error
) {
647 DBGERR(("%s init error=%d\n", info
->device_name
, info
->init_error
));
651 tty
->driver_data
= info
;
654 DBGINFO(("%s open, old ref count = %d\n", info
->device_name
, info
->count
));
656 /* If port is closing, signal caller to try again */
657 if (tty_hung_up_p(filp
) || info
->flags
& ASYNC_CLOSING
){
658 if (info
->flags
& ASYNC_CLOSING
)
659 interruptible_sleep_on(&info
->close_wait
);
660 retval
= ((info
->flags
& ASYNC_HUP_NOTIFY
) ?
661 -EAGAIN
: -ERESTARTSYS
);
665 info
->tty
->low_latency
= (info
->flags
& ASYNC_LOW_LATENCY
) ? 1 : 0;
667 spin_lock_irqsave(&info
->netlock
, flags
);
668 if (info
->netcount
) {
670 spin_unlock_irqrestore(&info
->netlock
, flags
);
674 spin_unlock_irqrestore(&info
->netlock
, flags
);
676 if (info
->count
== 1) {
677 /* 1st open on this device, init hardware */
678 retval
= startup(info
);
683 retval
= block_til_ready(tty
, filp
, info
);
685 DBGINFO(("%s block_til_ready rc=%d\n", info
->device_name
, retval
));
694 info
->tty
= NULL
; /* tty layer will release tty struct */
699 DBGINFO(("%s open rc=%d\n", info
->device_name
, retval
));
703 static void close(struct tty_struct
*tty
, struct file
*filp
)
705 struct slgt_info
*info
= tty
->driver_data
;
707 if (sanity_check(info
, tty
->name
, "close"))
709 DBGINFO(("%s close entry, count=%d\n", info
->device_name
, info
->count
));
714 if (tty_hung_up_p(filp
))
717 if ((tty
->count
== 1) && (info
->count
!= 1)) {
719 * tty->count is 1 and the tty structure will be freed.
720 * info->count should be one in this case.
721 * if it's not, correct it so that the port is shutdown.
723 DBGERR(("%s close: bad refcount; tty->count=1, "
724 "info->count=%d\n", info
->device_name
, info
->count
));
730 /* if at least one open remaining, leave hardware active */
734 info
->flags
|= ASYNC_CLOSING
;
736 /* set tty->closing to notify line discipline to
737 * only process XON/XOFF characters. Only the N_TTY
738 * discipline appears to use this (ppp does not).
742 /* wait for transmit data to clear all layers */
744 if (info
->closing_wait
!= ASYNC_CLOSING_WAIT_NONE
) {
745 DBGINFO(("%s call tty_wait_until_sent\n", info
->device_name
));
746 tty_wait_until_sent(tty
, info
->closing_wait
);
749 if (info
->flags
& ASYNC_INITIALIZED
)
750 wait_until_sent(tty
, info
->timeout
);
751 if (tty
->driver
->flush_buffer
)
752 tty
->driver
->flush_buffer(tty
);
753 tty_ldisc_flush(tty
);
760 if (info
->blocked_open
) {
761 if (info
->close_delay
) {
762 msleep_interruptible(jiffies_to_msecs(info
->close_delay
));
764 wake_up_interruptible(&info
->open_wait
);
767 info
->flags
&= ~(ASYNC_NORMAL_ACTIVE
|ASYNC_CLOSING
);
769 wake_up_interruptible(&info
->close_wait
);
772 DBGINFO(("%s close exit, count=%d\n", tty
->driver
->name
, info
->count
));
775 static void hangup(struct tty_struct
*tty
)
777 struct slgt_info
*info
= tty
->driver_data
;
779 if (sanity_check(info
, tty
->name
, "hangup"))
781 DBGINFO(("%s hangup\n", info
->device_name
));
787 info
->flags
&= ~ASYNC_NORMAL_ACTIVE
;
790 wake_up_interruptible(&info
->open_wait
);
793 static void set_termios(struct tty_struct
*tty
, struct termios
*old_termios
)
795 struct slgt_info
*info
= tty
->driver_data
;
798 DBGINFO(("%s set_termios\n", tty
->driver
->name
));
800 /* just return if nothing has changed */
801 if ((tty
->termios
->c_cflag
== old_termios
->c_cflag
)
802 && (RELEVANT_IFLAG(tty
->termios
->c_iflag
)
803 == RELEVANT_IFLAG(old_termios
->c_iflag
)))
808 /* Handle transition to B0 status */
809 if (old_termios
->c_cflag
& CBAUD
&&
810 !(tty
->termios
->c_cflag
& CBAUD
)) {
811 info
->signals
&= ~(SerialSignal_RTS
+ SerialSignal_DTR
);
812 spin_lock_irqsave(&info
->lock
,flags
);
814 spin_unlock_irqrestore(&info
->lock
,flags
);
817 /* Handle transition away from B0 status */
818 if (!(old_termios
->c_cflag
& CBAUD
) &&
819 tty
->termios
->c_cflag
& CBAUD
) {
820 info
->signals
|= SerialSignal_DTR
;
821 if (!(tty
->termios
->c_cflag
& CRTSCTS
) ||
822 !test_bit(TTY_THROTTLED
, &tty
->flags
)) {
823 info
->signals
|= SerialSignal_RTS
;
825 spin_lock_irqsave(&info
->lock
,flags
);
827 spin_unlock_irqrestore(&info
->lock
,flags
);
830 /* Handle turning off CRTSCTS */
831 if (old_termios
->c_cflag
& CRTSCTS
&&
832 !(tty
->termios
->c_cflag
& CRTSCTS
)) {
838 static int write(struct tty_struct
*tty
,
839 const unsigned char *buf
, int count
)
842 struct slgt_info
*info
= tty
->driver_data
;
845 if (sanity_check(info
, tty
->name
, "write"))
847 DBGINFO(("%s write count=%d\n", info
->device_name
, count
));
849 if (!tty
|| !info
->tx_buf
)
852 if (count
> info
->max_frame_size
) {
860 if (info
->params
.mode
== MGSL_MODE_RAW
) {
861 unsigned int bufs_needed
= (count
/DMABUFSIZE
);
862 unsigned int bufs_free
= free_tbuf_count(info
);
863 if (count
% DMABUFSIZE
)
865 if (bufs_needed
> bufs_free
)
870 if (info
->tx_count
) {
871 /* send accumulated data from send_char() calls */
872 /* as frame and wait before accepting more data. */
873 tx_load(info
, info
->tx_buf
, info
->tx_count
);
878 ret
= info
->tx_count
= count
;
879 tx_load(info
, buf
, count
);
883 if (info
->tx_count
&& !tty
->stopped
&& !tty
->hw_stopped
) {
884 spin_lock_irqsave(&info
->lock
,flags
);
885 if (!info
->tx_active
)
887 spin_unlock_irqrestore(&info
->lock
,flags
);
891 DBGINFO(("%s write rc=%d\n", info
->device_name
, ret
));
895 static void put_char(struct tty_struct
*tty
, unsigned char ch
)
897 struct slgt_info
*info
= tty
->driver_data
;
900 if (sanity_check(info
, tty
->name
, "put_char"))
902 DBGINFO(("%s put_char(%d)\n", info
->device_name
, ch
));
903 if (!tty
|| !info
->tx_buf
)
905 spin_lock_irqsave(&info
->lock
,flags
);
906 if (!info
->tx_active
&& (info
->tx_count
< info
->max_frame_size
))
907 info
->tx_buf
[info
->tx_count
++] = ch
;
908 spin_unlock_irqrestore(&info
->lock
,flags
);
911 static void send_xchar(struct tty_struct
*tty
, char ch
)
913 struct slgt_info
*info
= tty
->driver_data
;
916 if (sanity_check(info
, tty
->name
, "send_xchar"))
918 DBGINFO(("%s send_xchar(%d)\n", info
->device_name
, ch
));
921 spin_lock_irqsave(&info
->lock
,flags
);
922 if (!info
->tx_enabled
)
924 spin_unlock_irqrestore(&info
->lock
,flags
);
928 static void wait_until_sent(struct tty_struct
*tty
, int timeout
)
930 struct slgt_info
*info
= tty
->driver_data
;
931 unsigned long orig_jiffies
, char_time
;
935 if (sanity_check(info
, tty
->name
, "wait_until_sent"))
937 DBGINFO(("%s wait_until_sent entry\n", info
->device_name
));
938 if (!(info
->flags
& ASYNC_INITIALIZED
))
941 orig_jiffies
= jiffies
;
943 /* Set check interval to 1/5 of estimated time to
944 * send a character, and make it at least 1. The check
945 * interval should also be less than the timeout.
946 * Note: use tight timings here to satisfy the NIST-PCTS.
949 if (info
->params
.data_rate
) {
950 char_time
= info
->timeout
/(32 * 5);
957 char_time
= min_t(unsigned long, char_time
, timeout
);
959 while (info
->tx_active
) {
960 msleep_interruptible(jiffies_to_msecs(char_time
));
961 if (signal_pending(current
))
963 if (timeout
&& time_after(jiffies
, orig_jiffies
+ timeout
))
968 DBGINFO(("%s wait_until_sent exit\n", info
->device_name
));
971 static int write_room(struct tty_struct
*tty
)
973 struct slgt_info
*info
= tty
->driver_data
;
976 if (sanity_check(info
, tty
->name
, "write_room"))
978 ret
= (info
->tx_active
) ? 0 : HDLC_MAX_FRAME_SIZE
;
979 DBGINFO(("%s write_room=%d\n", info
->device_name
, ret
));
983 static void flush_chars(struct tty_struct
*tty
)
985 struct slgt_info
*info
= tty
->driver_data
;
988 if (sanity_check(info
, tty
->name
, "flush_chars"))
990 DBGINFO(("%s flush_chars entry tx_count=%d\n", info
->device_name
, info
->tx_count
));
992 if (info
->tx_count
<= 0 || tty
->stopped
||
993 tty
->hw_stopped
|| !info
->tx_buf
)
996 DBGINFO(("%s flush_chars start transmit\n", info
->device_name
));
998 spin_lock_irqsave(&info
->lock
,flags
);
999 if (!info
->tx_active
&& info
->tx_count
) {
1000 tx_load(info
, info
->tx_buf
,info
->tx_count
);
1003 spin_unlock_irqrestore(&info
->lock
,flags
);
1006 static void flush_buffer(struct tty_struct
*tty
)
1008 struct slgt_info
*info
= tty
->driver_data
;
1009 unsigned long flags
;
1011 if (sanity_check(info
, tty
->name
, "flush_buffer"))
1013 DBGINFO(("%s flush_buffer\n", info
->device_name
));
1015 spin_lock_irqsave(&info
->lock
,flags
);
1016 if (!info
->tx_active
)
1018 spin_unlock_irqrestore(&info
->lock
,flags
);
1020 wake_up_interruptible(&tty
->write_wait
);
1025 * throttle (stop) transmitter
1027 static void tx_hold(struct tty_struct
*tty
)
1029 struct slgt_info
*info
= tty
->driver_data
;
1030 unsigned long flags
;
1032 if (sanity_check(info
, tty
->name
, "tx_hold"))
1034 DBGINFO(("%s tx_hold\n", info
->device_name
));
1035 spin_lock_irqsave(&info
->lock
,flags
);
1036 if (info
->tx_enabled
&& info
->params
.mode
== MGSL_MODE_ASYNC
)
1038 spin_unlock_irqrestore(&info
->lock
,flags
);
1042 * release (start) transmitter
1044 static void tx_release(struct tty_struct
*tty
)
1046 struct slgt_info
*info
= tty
->driver_data
;
1047 unsigned long flags
;
1049 if (sanity_check(info
, tty
->name
, "tx_release"))
1051 DBGINFO(("%s tx_release\n", info
->device_name
));
1052 spin_lock_irqsave(&info
->lock
,flags
);
1053 if (!info
->tx_active
&& info
->tx_count
) {
1054 tx_load(info
, info
->tx_buf
, info
->tx_count
);
1057 spin_unlock_irqrestore(&info
->lock
,flags
);
1061 * Service an IOCTL request
1065 * tty pointer to tty instance data
1066 * file pointer to associated file object for device
1067 * cmd IOCTL command code
1068 * arg command argument/context
1070 * Return 0 if success, otherwise error code
1072 static int ioctl(struct tty_struct
*tty
, struct file
*file
,
1073 unsigned int cmd
, unsigned long arg
)
1075 struct slgt_info
*info
= tty
->driver_data
;
1076 struct mgsl_icount cnow
; /* kernel counter temps */
1077 struct serial_icounter_struct __user
*p_cuser
; /* user space */
1078 unsigned long flags
;
1079 void __user
*argp
= (void __user
*)arg
;
1081 if (sanity_check(info
, tty
->name
, "ioctl"))
1083 DBGINFO(("%s ioctl() cmd=%08X\n", info
->device_name
, cmd
));
1085 if ((cmd
!= TIOCGSERIAL
) && (cmd
!= TIOCSSERIAL
) &&
1086 (cmd
!= TIOCMIWAIT
) && (cmd
!= TIOCGICOUNT
)) {
1087 if (tty
->flags
& (1 << TTY_IO_ERROR
))
1092 case MGSL_IOCGPARAMS
:
1093 return get_params(info
, argp
);
1094 case MGSL_IOCSPARAMS
:
1095 return set_params(info
, argp
);
1096 case MGSL_IOCGTXIDLE
:
1097 return get_txidle(info
, argp
);
1098 case MGSL_IOCSTXIDLE
:
1099 return set_txidle(info
, (int)arg
);
1100 case MGSL_IOCTXENABLE
:
1101 return tx_enable(info
, (int)arg
);
1102 case MGSL_IOCRXENABLE
:
1103 return rx_enable(info
, (int)arg
);
1104 case MGSL_IOCTXABORT
:
1105 return tx_abort(info
);
1106 case MGSL_IOCGSTATS
:
1107 return get_stats(info
, argp
);
1108 case MGSL_IOCWAITEVENT
:
1109 return wait_mgsl_event(info
, argp
);
1111 return modem_input_wait(info
,(int)arg
);
1113 return get_interface(info
, argp
);
1115 return set_interface(info
,(int)arg
);
1117 spin_lock_irqsave(&info
->lock
,flags
);
1118 cnow
= info
->icount
;
1119 spin_unlock_irqrestore(&info
->lock
,flags
);
1121 if (put_user(cnow
.cts
, &p_cuser
->cts
) ||
1122 put_user(cnow
.dsr
, &p_cuser
->dsr
) ||
1123 put_user(cnow
.rng
, &p_cuser
->rng
) ||
1124 put_user(cnow
.dcd
, &p_cuser
->dcd
) ||
1125 put_user(cnow
.rx
, &p_cuser
->rx
) ||
1126 put_user(cnow
.tx
, &p_cuser
->tx
) ||
1127 put_user(cnow
.frame
, &p_cuser
->frame
) ||
1128 put_user(cnow
.overrun
, &p_cuser
->overrun
) ||
1129 put_user(cnow
.parity
, &p_cuser
->parity
) ||
1130 put_user(cnow
.brk
, &p_cuser
->brk
) ||
1131 put_user(cnow
.buf_overrun
, &p_cuser
->buf_overrun
))
1135 return -ENOIOCTLCMD
;
1143 static inline int line_info(char *buf
, struct slgt_info
*info
)
1147 unsigned long flags
;
1149 ret
= sprintf(buf
, "%s: IO=%08X IRQ=%d MaxFrameSize=%u\n",
1150 info
->device_name
, info
->phys_reg_addr
,
1151 info
->irq_level
, info
->max_frame_size
);
1153 /* output current serial signal states */
1154 spin_lock_irqsave(&info
->lock
,flags
);
1156 spin_unlock_irqrestore(&info
->lock
,flags
);
1160 if (info
->signals
& SerialSignal_RTS
)
1161 strcat(stat_buf
, "|RTS");
1162 if (info
->signals
& SerialSignal_CTS
)
1163 strcat(stat_buf
, "|CTS");
1164 if (info
->signals
& SerialSignal_DTR
)
1165 strcat(stat_buf
, "|DTR");
1166 if (info
->signals
& SerialSignal_DSR
)
1167 strcat(stat_buf
, "|DSR");
1168 if (info
->signals
& SerialSignal_DCD
)
1169 strcat(stat_buf
, "|CD");
1170 if (info
->signals
& SerialSignal_RI
)
1171 strcat(stat_buf
, "|RI");
1173 if (info
->params
.mode
!= MGSL_MODE_ASYNC
) {
1174 ret
+= sprintf(buf
+ret
, "\tHDLC txok:%d rxok:%d",
1175 info
->icount
.txok
, info
->icount
.rxok
);
1176 if (info
->icount
.txunder
)
1177 ret
+= sprintf(buf
+ret
, " txunder:%d", info
->icount
.txunder
);
1178 if (info
->icount
.txabort
)
1179 ret
+= sprintf(buf
+ret
, " txabort:%d", info
->icount
.txabort
);
1180 if (info
->icount
.rxshort
)
1181 ret
+= sprintf(buf
+ret
, " rxshort:%d", info
->icount
.rxshort
);
1182 if (info
->icount
.rxlong
)
1183 ret
+= sprintf(buf
+ret
, " rxlong:%d", info
->icount
.rxlong
);
1184 if (info
->icount
.rxover
)
1185 ret
+= sprintf(buf
+ret
, " rxover:%d", info
->icount
.rxover
);
1186 if (info
->icount
.rxcrc
)
1187 ret
+= sprintf(buf
+ret
, " rxcrc:%d", info
->icount
.rxcrc
);
1189 ret
+= sprintf(buf
+ret
, "\tASYNC tx:%d rx:%d",
1190 info
->icount
.tx
, info
->icount
.rx
);
1191 if (info
->icount
.frame
)
1192 ret
+= sprintf(buf
+ret
, " fe:%d", info
->icount
.frame
);
1193 if (info
->icount
.parity
)
1194 ret
+= sprintf(buf
+ret
, " pe:%d", info
->icount
.parity
);
1195 if (info
->icount
.brk
)
1196 ret
+= sprintf(buf
+ret
, " brk:%d", info
->icount
.brk
);
1197 if (info
->icount
.overrun
)
1198 ret
+= sprintf(buf
+ret
, " oe:%d", info
->icount
.overrun
);
1201 /* Append serial signal status to end */
1202 ret
+= sprintf(buf
+ret
, " %s\n", stat_buf
+1);
1204 ret
+= sprintf(buf
+ret
, "\ttxactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
1205 info
->tx_active
,info
->bh_requested
,info
->bh_running
,
1211 /* Called to print information about devices
1213 static int read_proc(char *page
, char **start
, off_t off
, int count
,
1214 int *eof
, void *data
)
1218 struct slgt_info
*info
;
1220 len
+= sprintf(page
, "synclink_gt driver:%s\n", driver_version
);
1222 info
= slgt_device_list
;
1224 l
= line_info(page
+ len
, info
);
1226 if (len
+begin
> off
+count
)
1228 if (len
+begin
< off
) {
1232 info
= info
->next_device
;
1237 if (off
>= len
+begin
)
1239 *start
= page
+ (off
-begin
);
1240 return ((count
< begin
+len
-off
) ? count
: begin
+len
-off
);
1244 * return count of bytes in transmit buffer
1246 static int chars_in_buffer(struct tty_struct
*tty
)
1248 struct slgt_info
*info
= tty
->driver_data
;
1249 if (sanity_check(info
, tty
->name
, "chars_in_buffer"))
1251 DBGINFO(("%s chars_in_buffer()=%d\n", info
->device_name
, info
->tx_count
));
1252 return info
->tx_count
;
1256 * signal remote device to throttle send data (our receive data)
1258 static void throttle(struct tty_struct
* tty
)
1260 struct slgt_info
*info
= tty
->driver_data
;
1261 unsigned long flags
;
1263 if (sanity_check(info
, tty
->name
, "throttle"))
1265 DBGINFO(("%s throttle\n", info
->device_name
));
1267 send_xchar(tty
, STOP_CHAR(tty
));
1268 if (tty
->termios
->c_cflag
& CRTSCTS
) {
1269 spin_lock_irqsave(&info
->lock
,flags
);
1270 info
->signals
&= ~SerialSignal_RTS
;
1272 spin_unlock_irqrestore(&info
->lock
,flags
);
1277 * signal remote device to stop throttling send data (our receive data)
1279 static void unthrottle(struct tty_struct
* tty
)
1281 struct slgt_info
*info
= tty
->driver_data
;
1282 unsigned long flags
;
1284 if (sanity_check(info
, tty
->name
, "unthrottle"))
1286 DBGINFO(("%s unthrottle\n", info
->device_name
));
1291 send_xchar(tty
, START_CHAR(tty
));
1293 if (tty
->termios
->c_cflag
& CRTSCTS
) {
1294 spin_lock_irqsave(&info
->lock
,flags
);
1295 info
->signals
|= SerialSignal_RTS
;
1297 spin_unlock_irqrestore(&info
->lock
,flags
);
1302 * set or clear transmit break condition
1303 * break_state -1=set break condition, 0=clear
1305 static void set_break(struct tty_struct
*tty
, int break_state
)
1307 struct slgt_info
*info
= tty
->driver_data
;
1308 unsigned short value
;
1309 unsigned long flags
;
1311 if (sanity_check(info
, tty
->name
, "set_break"))
1313 DBGINFO(("%s set_break(%d)\n", info
->device_name
, break_state
));
1315 spin_lock_irqsave(&info
->lock
,flags
);
1316 value
= rd_reg16(info
, TCR
);
1317 if (break_state
== -1)
1321 wr_reg16(info
, TCR
, value
);
1322 spin_unlock_irqrestore(&info
->lock
,flags
);
1328 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
1329 * set encoding and frame check sequence (FCS) options
1331 * dev pointer to network device structure
1332 * encoding serial encoding setting
1333 * parity FCS setting
1335 * returns 0 if success, otherwise error code
1337 static int hdlcdev_attach(struct net_device
*dev
, unsigned short encoding
,
1338 unsigned short parity
)
1340 struct slgt_info
*info
= dev_to_port(dev
);
1341 unsigned char new_encoding
;
1342 unsigned short new_crctype
;
1344 /* return error if TTY interface open */
1348 DBGINFO(("%s hdlcdev_attach\n", info
->device_name
));
1352 case ENCODING_NRZ
: new_encoding
= HDLC_ENCODING_NRZ
; break;
1353 case ENCODING_NRZI
: new_encoding
= HDLC_ENCODING_NRZI_SPACE
; break;
1354 case ENCODING_FM_MARK
: new_encoding
= HDLC_ENCODING_BIPHASE_MARK
; break;
1355 case ENCODING_FM_SPACE
: new_encoding
= HDLC_ENCODING_BIPHASE_SPACE
; break;
1356 case ENCODING_MANCHESTER
: new_encoding
= HDLC_ENCODING_BIPHASE_LEVEL
; break;
1357 default: return -EINVAL
;
1362 case PARITY_NONE
: new_crctype
= HDLC_CRC_NONE
; break;
1363 case PARITY_CRC16_PR1_CCITT
: new_crctype
= HDLC_CRC_16_CCITT
; break;
1364 case PARITY_CRC32_PR1_CCITT
: new_crctype
= HDLC_CRC_32_CCITT
; break;
1365 default: return -EINVAL
;
1368 info
->params
.encoding
= new_encoding
;
1369 info
->params
.crc_type
= new_crctype
;;
1371 /* if network interface up, reprogram hardware */
1379 * called by generic HDLC layer to send frame
1381 * skb socket buffer containing HDLC frame
1382 * dev pointer to network device structure
1384 * returns 0 if success, otherwise error code
1386 static int hdlcdev_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1388 struct slgt_info
*info
= dev_to_port(dev
);
1389 struct net_device_stats
*stats
= hdlc_stats(dev
);
1390 unsigned long flags
;
1392 DBGINFO(("%s hdlc_xmit\n", dev
->name
));
1394 /* stop sending until this frame completes */
1395 netif_stop_queue(dev
);
1397 /* copy data to device buffers */
1398 info
->tx_count
= skb
->len
;
1399 tx_load(info
, skb
->data
, skb
->len
);
1401 /* update network statistics */
1402 stats
->tx_packets
++;
1403 stats
->tx_bytes
+= skb
->len
;
1405 /* done with socket buffer, so free it */
1408 /* save start time for transmit timeout detection */
1409 dev
->trans_start
= jiffies
;
1411 /* start hardware transmitter if necessary */
1412 spin_lock_irqsave(&info
->lock
,flags
);
1413 if (!info
->tx_active
)
1415 spin_unlock_irqrestore(&info
->lock
,flags
);
1421 * called by network layer when interface enabled
1422 * claim resources and initialize hardware
1424 * dev pointer to network device structure
1426 * returns 0 if success, otherwise error code
1428 static int hdlcdev_open(struct net_device
*dev
)
1430 struct slgt_info
*info
= dev_to_port(dev
);
1432 unsigned long flags
;
1434 DBGINFO(("%s hdlcdev_open\n", dev
->name
));
1436 /* generic HDLC layer open processing */
1437 if ((rc
= hdlc_open(dev
)))
1440 /* arbitrate between network and tty opens */
1441 spin_lock_irqsave(&info
->netlock
, flags
);
1442 if (info
->count
!= 0 || info
->netcount
!= 0) {
1443 DBGINFO(("%s hdlc_open busy\n", dev
->name
));
1444 spin_unlock_irqrestore(&info
->netlock
, flags
);
1448 spin_unlock_irqrestore(&info
->netlock
, flags
);
1450 /* claim resources and init adapter */
1451 if ((rc
= startup(info
)) != 0) {
1452 spin_lock_irqsave(&info
->netlock
, flags
);
1454 spin_unlock_irqrestore(&info
->netlock
, flags
);
1458 /* assert DTR and RTS, apply hardware settings */
1459 info
->signals
|= SerialSignal_RTS
+ SerialSignal_DTR
;
1462 /* enable network layer transmit */
1463 dev
->trans_start
= jiffies
;
1464 netif_start_queue(dev
);
1466 /* inform generic HDLC layer of current DCD status */
1467 spin_lock_irqsave(&info
->lock
, flags
);
1469 spin_unlock_irqrestore(&info
->lock
, flags
);
1470 hdlc_set_carrier(info
->signals
& SerialSignal_DCD
, dev
);
1476 * called by network layer when interface is disabled
1477 * shutdown hardware and release resources
1479 * dev pointer to network device structure
1481 * returns 0 if success, otherwise error code
1483 static int hdlcdev_close(struct net_device
*dev
)
1485 struct slgt_info
*info
= dev_to_port(dev
);
1486 unsigned long flags
;
1488 DBGINFO(("%s hdlcdev_close\n", dev
->name
));
1490 netif_stop_queue(dev
);
1492 /* shutdown adapter and release resources */
1497 spin_lock_irqsave(&info
->netlock
, flags
);
1499 spin_unlock_irqrestore(&info
->netlock
, flags
);
1505 * called by network layer to process IOCTL call to network device
1507 * dev pointer to network device structure
1508 * ifr pointer to network interface request structure
1509 * cmd IOCTL command code
1511 * returns 0 if success, otherwise error code
1513 static int hdlcdev_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
1515 const size_t size
= sizeof(sync_serial_settings
);
1516 sync_serial_settings new_line
;
1517 sync_serial_settings __user
*line
= ifr
->ifr_settings
.ifs_ifsu
.sync
;
1518 struct slgt_info
*info
= dev_to_port(dev
);
1521 DBGINFO(("%s hdlcdev_ioctl\n", dev
->name
));
1523 /* return error if TTY interface open */
1527 if (cmd
!= SIOCWANDEV
)
1528 return hdlc_ioctl(dev
, ifr
, cmd
);
1530 switch(ifr
->ifr_settings
.type
) {
1531 case IF_GET_IFACE
: /* return current sync_serial_settings */
1533 ifr
->ifr_settings
.type
= IF_IFACE_SYNC_SERIAL
;
1534 if (ifr
->ifr_settings
.size
< size
) {
1535 ifr
->ifr_settings
.size
= size
; /* data size wanted */
1539 flags
= info
->params
.flags
& (HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_RXC_DPLL
|
1540 HDLC_FLAG_RXC_BRG
| HDLC_FLAG_RXC_TXCPIN
|
1541 HDLC_FLAG_TXC_TXCPIN
| HDLC_FLAG_TXC_DPLL
|
1542 HDLC_FLAG_TXC_BRG
| HDLC_FLAG_TXC_RXCPIN
);
1545 case (HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_TXCPIN
): new_line
.clock_type
= CLOCK_EXT
; break;
1546 case (HDLC_FLAG_RXC_BRG
| HDLC_FLAG_TXC_BRG
): new_line
.clock_type
= CLOCK_INT
; break;
1547 case (HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_BRG
): new_line
.clock_type
= CLOCK_TXINT
; break;
1548 case (HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_RXCPIN
): new_line
.clock_type
= CLOCK_TXFROMRX
; break;
1549 default: new_line
.clock_type
= CLOCK_DEFAULT
;
1552 new_line
.clock_rate
= info
->params
.clock_speed
;
1553 new_line
.loopback
= info
->params
.loopback
? 1:0;
1555 if (copy_to_user(line
, &new_line
, size
))
1559 case IF_IFACE_SYNC_SERIAL
: /* set sync_serial_settings */
1561 if(!capable(CAP_NET_ADMIN
))
1563 if (copy_from_user(&new_line
, line
, size
))
1566 switch (new_line
.clock_type
)
1568 case CLOCK_EXT
: flags
= HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_TXCPIN
; break;
1569 case CLOCK_TXFROMRX
: flags
= HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_RXCPIN
; break;
1570 case CLOCK_INT
: flags
= HDLC_FLAG_RXC_BRG
| HDLC_FLAG_TXC_BRG
; break;
1571 case CLOCK_TXINT
: flags
= HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_BRG
; break;
1572 case CLOCK_DEFAULT
: flags
= info
->params
.flags
&
1573 (HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_RXC_DPLL
|
1574 HDLC_FLAG_RXC_BRG
| HDLC_FLAG_RXC_TXCPIN
|
1575 HDLC_FLAG_TXC_TXCPIN
| HDLC_FLAG_TXC_DPLL
|
1576 HDLC_FLAG_TXC_BRG
| HDLC_FLAG_TXC_RXCPIN
); break;
1577 default: return -EINVAL
;
1580 if (new_line
.loopback
!= 0 && new_line
.loopback
!= 1)
1583 info
->params
.flags
&= ~(HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_RXC_DPLL
|
1584 HDLC_FLAG_RXC_BRG
| HDLC_FLAG_RXC_TXCPIN
|
1585 HDLC_FLAG_TXC_TXCPIN
| HDLC_FLAG_TXC_DPLL
|
1586 HDLC_FLAG_TXC_BRG
| HDLC_FLAG_TXC_RXCPIN
);
1587 info
->params
.flags
|= flags
;
1589 info
->params
.loopback
= new_line
.loopback
;
1591 if (flags
& (HDLC_FLAG_RXC_BRG
| HDLC_FLAG_TXC_BRG
))
1592 info
->params
.clock_speed
= new_line
.clock_rate
;
1594 info
->params
.clock_speed
= 0;
1596 /* if network interface up, reprogram hardware */
1602 return hdlc_ioctl(dev
, ifr
, cmd
);
1607 * called by network layer when transmit timeout is detected
1609 * dev pointer to network device structure
1611 static void hdlcdev_tx_timeout(struct net_device
*dev
)
1613 struct slgt_info
*info
= dev_to_port(dev
);
1614 struct net_device_stats
*stats
= hdlc_stats(dev
);
1615 unsigned long flags
;
1617 DBGINFO(("%s hdlcdev_tx_timeout\n", dev
->name
));
1620 stats
->tx_aborted_errors
++;
1622 spin_lock_irqsave(&info
->lock
,flags
);
1624 spin_unlock_irqrestore(&info
->lock
,flags
);
1626 netif_wake_queue(dev
);
1630 * called by device driver when transmit completes
1631 * reenable network layer transmit if stopped
1633 * info pointer to device instance information
1635 static void hdlcdev_tx_done(struct slgt_info
*info
)
1637 if (netif_queue_stopped(info
->netdev
))
1638 netif_wake_queue(info
->netdev
);
1642 * called by device driver when frame received
1643 * pass frame to network layer
1645 * info pointer to device instance information
1646 * buf pointer to buffer contianing frame data
1647 * size count of data bytes in buf
1649 static void hdlcdev_rx(struct slgt_info
*info
, char *buf
, int size
)
1651 struct sk_buff
*skb
= dev_alloc_skb(size
);
1652 struct net_device
*dev
= info
->netdev
;
1653 struct net_device_stats
*stats
= hdlc_stats(dev
);
1655 DBGINFO(("%s hdlcdev_rx\n", dev
->name
));
1658 DBGERR(("%s: can't alloc skb, drop packet\n", dev
->name
));
1659 stats
->rx_dropped
++;
1663 memcpy(skb_put(skb
, size
),buf
,size
);
1665 skb
->protocol
= hdlc_type_trans(skb
, info
->netdev
);
1667 stats
->rx_packets
++;
1668 stats
->rx_bytes
+= size
;
1672 info
->netdev
->last_rx
= jiffies
;
1676 * called by device driver when adding device instance
1677 * do generic HDLC initialization
1679 * info pointer to device instance information
1681 * returns 0 if success, otherwise error code
1683 static int hdlcdev_init(struct slgt_info
*info
)
1686 struct net_device
*dev
;
1689 /* allocate and initialize network and HDLC layer objects */
1691 if (!(dev
= alloc_hdlcdev(info
))) {
1692 printk(KERN_ERR
"%s hdlc device alloc failure\n", info
->device_name
);
1696 /* for network layer reporting purposes only */
1697 dev
->mem_start
= info
->phys_reg_addr
;
1698 dev
->mem_end
= info
->phys_reg_addr
+ SLGT_REG_SIZE
- 1;
1699 dev
->irq
= info
->irq_level
;
1701 /* network layer callbacks and settings */
1702 dev
->do_ioctl
= hdlcdev_ioctl
;
1703 dev
->open
= hdlcdev_open
;
1704 dev
->stop
= hdlcdev_close
;
1705 dev
->tx_timeout
= hdlcdev_tx_timeout
;
1706 dev
->watchdog_timeo
= 10*HZ
;
1707 dev
->tx_queue_len
= 50;
1709 /* generic HDLC layer callbacks and settings */
1710 hdlc
= dev_to_hdlc(dev
);
1711 hdlc
->attach
= hdlcdev_attach
;
1712 hdlc
->xmit
= hdlcdev_xmit
;
1714 /* register objects with HDLC layer */
1715 if ((rc
= register_hdlc_device(dev
))) {
1716 printk(KERN_WARNING
"%s:unable to register hdlc device\n",__FILE__
);
1726 * called by device driver when removing device instance
1727 * do generic HDLC cleanup
1729 * info pointer to device instance information
1731 static void hdlcdev_exit(struct slgt_info
*info
)
1733 unregister_hdlc_device(info
->netdev
);
1734 free_netdev(info
->netdev
);
1735 info
->netdev
= NULL
;
1738 #endif /* ifdef CONFIG_HDLC */
1741 * get async data from rx DMA buffers
1743 static void rx_async(struct slgt_info
*info
)
1745 struct tty_struct
*tty
= info
->tty
;
1746 struct mgsl_icount
*icount
= &info
->icount
;
1747 unsigned int start
, end
;
1749 unsigned char status
;
1750 struct slgt_desc
*bufs
= info
->rbufs
;
1753 start
= end
= info
->rbuf_current
;
1755 while(desc_complete(bufs
[end
])) {
1756 count
= desc_count(bufs
[end
]) - info
->rbuf_index
;
1757 p
= bufs
[end
].buf
+ info
->rbuf_index
;
1759 DBGISR(("%s rx_async count=%d\n", info
->device_name
, count
));
1760 DBGDATA(info
, p
, count
, "rx");
1762 for(i
=0 ; i
< count
; i
+=2, p
+=2) {
1764 if (tty
->flip
.count
>= TTY_FLIPBUF_SIZE
)
1765 tty_flip_buffer_push(tty
);
1766 if (tty
->flip
.count
>= TTY_FLIPBUF_SIZE
)
1768 *tty
->flip
.char_buf_ptr
= *p
;
1769 *tty
->flip
.flag_buf_ptr
= 0;
1773 if ((status
= *(p
+1) & (BIT9
+ BIT8
))) {
1776 else if (status
& BIT8
)
1778 /* discard char if tty control flags say so */
1779 if (status
& info
->ignore_status_mask
)
1783 *tty
->flip
.flag_buf_ptr
= TTY_PARITY
;
1784 else if (status
& BIT8
)
1785 *tty
->flip
.flag_buf_ptr
= TTY_FRAME
;
1789 tty
->flip
.flag_buf_ptr
++;
1790 tty
->flip
.char_buf_ptr
++;
1796 /* receive buffer not completed */
1797 info
->rbuf_index
+= i
;
1798 info
->rx_timer
.expires
= jiffies
+ 1;
1799 add_timer(&info
->rx_timer
);
1803 info
->rbuf_index
= 0;
1804 free_rbufs(info
, end
, end
);
1806 if (++end
== info
->rbuf_count
)
1809 /* if entire list searched then no frame available */
1814 if (tty
&& tty
->flip
.count
)
1815 tty_flip_buffer_push(tty
);
1819 * return next bottom half action to perform
1821 static int bh_action(struct slgt_info
*info
)
1823 unsigned long flags
;
1826 spin_lock_irqsave(&info
->lock
,flags
);
1828 if (info
->pending_bh
& BH_RECEIVE
) {
1829 info
->pending_bh
&= ~BH_RECEIVE
;
1831 } else if (info
->pending_bh
& BH_TRANSMIT
) {
1832 info
->pending_bh
&= ~BH_TRANSMIT
;
1834 } else if (info
->pending_bh
& BH_STATUS
) {
1835 info
->pending_bh
&= ~BH_STATUS
;
1838 /* Mark BH routine as complete */
1839 info
->bh_running
= 0;
1840 info
->bh_requested
= 0;
1844 spin_unlock_irqrestore(&info
->lock
,flags
);
1850 * perform bottom half processing
1852 static void bh_handler(void* context
)
1854 struct slgt_info
*info
= context
;
1859 info
->bh_running
= 1;
1861 while((action
= bh_action(info
))) {
1864 DBGBH(("%s bh receive\n", info
->device_name
));
1865 switch(info
->params
.mode
) {
1866 case MGSL_MODE_ASYNC
:
1869 case MGSL_MODE_HDLC
:
1870 while(rx_get_frame(info
));
1873 while(rx_get_buf(info
));
1876 /* restart receiver if rx DMA buffers exhausted */
1877 if (info
->rx_restart
)
1884 DBGBH(("%s bh status\n", info
->device_name
));
1885 info
->ri_chkcount
= 0;
1886 info
->dsr_chkcount
= 0;
1887 info
->dcd_chkcount
= 0;
1888 info
->cts_chkcount
= 0;
1891 DBGBH(("%s unknown action\n", info
->device_name
));
1895 DBGBH(("%s bh_handler exit\n", info
->device_name
));
1898 static void bh_transmit(struct slgt_info
*info
)
1900 struct tty_struct
*tty
= info
->tty
;
1902 DBGBH(("%s bh_transmit\n", info
->device_name
));
1905 wake_up_interruptible(&tty
->write_wait
);
1909 static void dsr_change(struct slgt_info
*info
)
1912 DBGISR(("dsr_change %s signals=%04X\n", info
->device_name
, info
->signals
));
1913 if ((info
->dsr_chkcount
)++ == IO_PIN_SHUTDOWN_LIMIT
) {
1914 slgt_irq_off(info
, IRQ_DSR
);
1918 if (info
->signals
& SerialSignal_DSR
)
1919 info
->input_signal_events
.dsr_up
++;
1921 info
->input_signal_events
.dsr_down
++;
1922 wake_up_interruptible(&info
->status_event_wait_q
);
1923 wake_up_interruptible(&info
->event_wait_q
);
1924 info
->pending_bh
|= BH_STATUS
;
1927 static void cts_change(struct slgt_info
*info
)
1930 DBGISR(("cts_change %s signals=%04X\n", info
->device_name
, info
->signals
));
1931 if ((info
->cts_chkcount
)++ == IO_PIN_SHUTDOWN_LIMIT
) {
1932 slgt_irq_off(info
, IRQ_CTS
);
1936 if (info
->signals
& SerialSignal_CTS
)
1937 info
->input_signal_events
.cts_up
++;
1939 info
->input_signal_events
.cts_down
++;
1940 wake_up_interruptible(&info
->status_event_wait_q
);
1941 wake_up_interruptible(&info
->event_wait_q
);
1942 info
->pending_bh
|= BH_STATUS
;
1944 if (info
->flags
& ASYNC_CTS_FLOW
) {
1946 if (info
->tty
->hw_stopped
) {
1947 if (info
->signals
& SerialSignal_CTS
) {
1948 info
->tty
->hw_stopped
= 0;
1949 info
->pending_bh
|= BH_TRANSMIT
;
1953 if (!(info
->signals
& SerialSignal_CTS
))
1954 info
->tty
->hw_stopped
= 1;
1960 static void dcd_change(struct slgt_info
*info
)
1963 DBGISR(("dcd_change %s signals=%04X\n", info
->device_name
, info
->signals
));
1964 if ((info
->dcd_chkcount
)++ == IO_PIN_SHUTDOWN_LIMIT
) {
1965 slgt_irq_off(info
, IRQ_DCD
);
1969 if (info
->signals
& SerialSignal_DCD
) {
1970 info
->input_signal_events
.dcd_up
++;
1972 info
->input_signal_events
.dcd_down
++;
1976 hdlc_set_carrier(info
->signals
& SerialSignal_DCD
, info
->netdev
);
1978 wake_up_interruptible(&info
->status_event_wait_q
);
1979 wake_up_interruptible(&info
->event_wait_q
);
1980 info
->pending_bh
|= BH_STATUS
;
1982 if (info
->flags
& ASYNC_CHECK_CD
) {
1983 if (info
->signals
& SerialSignal_DCD
)
1984 wake_up_interruptible(&info
->open_wait
);
1987 tty_hangup(info
->tty
);
1992 static void ri_change(struct slgt_info
*info
)
1995 DBGISR(("ri_change %s signals=%04X\n", info
->device_name
, info
->signals
));
1996 if ((info
->ri_chkcount
)++ == IO_PIN_SHUTDOWN_LIMIT
) {
1997 slgt_irq_off(info
, IRQ_RI
);
2001 if (info
->signals
& SerialSignal_RI
) {
2002 info
->input_signal_events
.ri_up
++;
2004 info
->input_signal_events
.ri_down
++;
2006 wake_up_interruptible(&info
->status_event_wait_q
);
2007 wake_up_interruptible(&info
->event_wait_q
);
2008 info
->pending_bh
|= BH_STATUS
;
2011 static void isr_serial(struct slgt_info
*info
)
2013 unsigned short status
= rd_reg16(info
, SSR
);
2015 DBGISR(("%s isr_serial status=%04X\n", info
->device_name
, status
));
2017 wr_reg16(info
, SSR
, status
); /* clear pending */
2019 info
->irq_occurred
= 1;
2021 if (info
->params
.mode
== MGSL_MODE_ASYNC
) {
2022 if (status
& IRQ_TXIDLE
) {
2024 isr_txeom(info
, status
);
2026 if ((status
& IRQ_RXBREAK
) && (status
& RXBREAK
)) {
2028 /* process break detection if tty control allows */
2030 if (!(status
& info
->ignore_status_mask
)) {
2031 if (info
->read_status_mask
& MASK_BREAK
) {
2032 *info
->tty
->flip
.flag_buf_ptr
= TTY_BREAK
;
2033 if (info
->flags
& ASYNC_SAK
)
2040 if (status
& (IRQ_TXIDLE
+ IRQ_TXUNDER
))
2041 isr_txeom(info
, status
);
2043 if (status
& IRQ_RXIDLE
) {
2044 if (status
& RXIDLE
)
2045 info
->icount
.rxidle
++;
2047 info
->icount
.exithunt
++;
2048 wake_up_interruptible(&info
->event_wait_q
);
2051 if (status
& IRQ_RXOVER
)
2055 if (status
& IRQ_DSR
)
2057 if (status
& IRQ_CTS
)
2059 if (status
& IRQ_DCD
)
2061 if (status
& IRQ_RI
)
2065 static void isr_rdma(struct slgt_info
*info
)
2067 unsigned int status
= rd_reg32(info
, RDCSR
);
2069 DBGISR(("%s isr_rdma status=%08x\n", info
->device_name
, status
));
2071 /* RDCSR (rx DMA control/status)
2074 * 06 save status byte to DMA buffer
2076 * 04 eol (end of list)
2077 * 03 eob (end of buffer)
2082 wr_reg32(info
, RDCSR
, status
); /* clear pending */
2084 if (status
& (BIT5
+ BIT4
)) {
2085 DBGISR(("%s isr_rdma rx_restart=1\n", info
->device_name
));
2086 info
->rx_restart
= 1;
2088 info
->pending_bh
|= BH_RECEIVE
;
2091 static void isr_tdma(struct slgt_info
*info
)
2093 unsigned int status
= rd_reg32(info
, TDCSR
);
2095 DBGISR(("%s isr_tdma status=%08x\n", info
->device_name
, status
));
2097 /* TDCSR (tx DMA control/status)
2101 * 04 eol (end of list)
2102 * 03 eob (end of buffer)
2107 wr_reg32(info
, TDCSR
, status
); /* clear pending */
2109 if (status
& (BIT5
+ BIT4
+ BIT3
)) {
2110 // another transmit buffer has completed
2111 // run bottom half to get more send data from user
2112 info
->pending_bh
|= BH_TRANSMIT
;
2116 static void isr_txeom(struct slgt_info
*info
, unsigned short status
)
2118 DBGISR(("%s txeom status=%04x\n", info
->device_name
, status
));
2120 slgt_irq_off(info
, IRQ_TXDATA
+ IRQ_TXIDLE
+ IRQ_TXUNDER
);
2123 if (status
& IRQ_TXUNDER
) {
2124 unsigned short val
= rd_reg16(info
, TCR
);
2125 wr_reg16(info
, TCR
, (unsigned short)(val
| BIT2
)); /* set reset bit */
2126 wr_reg16(info
, TCR
, val
); /* clear reset bit */
2129 if (info
->tx_active
) {
2130 if (info
->params
.mode
!= MGSL_MODE_ASYNC
) {
2131 if (status
& IRQ_TXUNDER
)
2132 info
->icount
.txunder
++;
2133 else if (status
& IRQ_TXIDLE
)
2134 info
->icount
.txok
++;
2137 info
->tx_active
= 0;
2140 del_timer(&info
->tx_timer
);
2142 if (info
->params
.mode
!= MGSL_MODE_ASYNC
&& info
->drop_rts_on_tx_done
) {
2143 info
->signals
&= ~SerialSignal_RTS
;
2144 info
->drop_rts_on_tx_done
= 0;
2150 hdlcdev_tx_done(info
);
2154 if (info
->tty
&& (info
->tty
->stopped
|| info
->tty
->hw_stopped
)) {
2158 info
->pending_bh
|= BH_TRANSMIT
;
2163 /* interrupt service routine
2165 * irq interrupt number
2166 * dev_id device ID supplied during interrupt registration
2167 * regs interrupted processor context
2169 static irqreturn_t
slgt_interrupt(int irq
, void *dev_id
, struct pt_regs
* regs
)
2171 struct slgt_info
*info
;
2175 DBGISR(("slgt_interrupt irq=%d entry\n", irq
));
2181 spin_lock(&info
->lock
);
2183 while((gsr
= rd_reg32(info
, GSR
) & 0xffffff00)) {
2184 DBGISR(("%s gsr=%08x\n", info
->device_name
, gsr
));
2185 info
->irq_occurred
= 1;
2186 for(i
=0; i
< info
->port_count
; i
++) {
2187 if (info
->port_array
[i
] == NULL
)
2189 if (gsr
& (BIT8
<< i
))
2190 isr_serial(info
->port_array
[i
]);
2191 if (gsr
& (BIT16
<< (i
*2)))
2192 isr_rdma(info
->port_array
[i
]);
2193 if (gsr
& (BIT17
<< (i
*2)))
2194 isr_tdma(info
->port_array
[i
]);
2198 for(i
=0; i
< info
->port_count
; i
++) {
2199 struct slgt_info
*port
= info
->port_array
[i
];
2201 if (port
&& (port
->count
|| port
->netcount
) &&
2202 port
->pending_bh
&& !port
->bh_running
&&
2203 !port
->bh_requested
) {
2204 DBGISR(("%s bh queued\n", port
->device_name
));
2205 schedule_work(&port
->task
);
2206 port
->bh_requested
= 1;
2210 spin_unlock(&info
->lock
);
2212 DBGISR(("slgt_interrupt irq=%d exit\n", irq
));
2216 static int startup(struct slgt_info
*info
)
2218 DBGINFO(("%s startup\n", info
->device_name
));
2220 if (info
->flags
& ASYNC_INITIALIZED
)
2223 if (!info
->tx_buf
) {
2224 info
->tx_buf
= kmalloc(info
->max_frame_size
, GFP_KERNEL
);
2225 if (!info
->tx_buf
) {
2226 DBGERR(("%s can't allocate tx buffer\n", info
->device_name
));
2231 info
->pending_bh
= 0;
2233 memset(&info
->icount
, 0, sizeof(info
->icount
));
2235 /* program hardware for current parameters */
2236 change_params(info
);
2239 clear_bit(TTY_IO_ERROR
, &info
->tty
->flags
);
2241 info
->flags
|= ASYNC_INITIALIZED
;
2247 * called by close() and hangup() to shutdown hardware
2249 static void shutdown(struct slgt_info
*info
)
2251 unsigned long flags
;
2253 if (!(info
->flags
& ASYNC_INITIALIZED
))
2256 DBGINFO(("%s shutdown\n", info
->device_name
));
2258 /* clear status wait queue because status changes */
2259 /* can't happen after shutting down the hardware */
2260 wake_up_interruptible(&info
->status_event_wait_q
);
2261 wake_up_interruptible(&info
->event_wait_q
);
2263 del_timer_sync(&info
->tx_timer
);
2264 del_timer_sync(&info
->rx_timer
);
2266 kfree(info
->tx_buf
);
2267 info
->tx_buf
= NULL
;
2269 spin_lock_irqsave(&info
->lock
,flags
);
2274 slgt_irq_off(info
, IRQ_ALL
| IRQ_MASTER
);
2276 if (!info
->tty
|| info
->tty
->termios
->c_cflag
& HUPCL
) {
2277 info
->signals
&= ~(SerialSignal_DTR
+ SerialSignal_RTS
);
2281 spin_unlock_irqrestore(&info
->lock
,flags
);
2284 set_bit(TTY_IO_ERROR
, &info
->tty
->flags
);
2286 info
->flags
&= ~ASYNC_INITIALIZED
;
2289 static void program_hw(struct slgt_info
*info
)
2291 unsigned long flags
;
2293 spin_lock_irqsave(&info
->lock
,flags
);
2298 if (info
->params
.mode
== MGSL_MODE_HDLC
||
2299 info
->params
.mode
== MGSL_MODE_RAW
||
2307 info
->dcd_chkcount
= 0;
2308 info
->cts_chkcount
= 0;
2309 info
->ri_chkcount
= 0;
2310 info
->dsr_chkcount
= 0;
2312 slgt_irq_on(info
, IRQ_DCD
| IRQ_CTS
| IRQ_DSR
);
2315 if (info
->netcount
||
2316 (info
->tty
&& info
->tty
->termios
->c_cflag
& CREAD
))
2319 spin_unlock_irqrestore(&info
->lock
,flags
);
2323 * reconfigure adapter based on new parameters
2325 static void change_params(struct slgt_info
*info
)
2330 if (!info
->tty
|| !info
->tty
->termios
)
2332 DBGINFO(("%s change_params\n", info
->device_name
));
2334 cflag
= info
->tty
->termios
->c_cflag
;
2336 /* if B0 rate (hangup) specified then negate DTR and RTS */
2337 /* otherwise assert DTR and RTS */
2339 info
->signals
|= SerialSignal_RTS
+ SerialSignal_DTR
;
2341 info
->signals
&= ~(SerialSignal_RTS
+ SerialSignal_DTR
);
2343 /* byte size and parity */
2345 switch (cflag
& CSIZE
) {
2346 case CS5
: info
->params
.data_bits
= 5; break;
2347 case CS6
: info
->params
.data_bits
= 6; break;
2348 case CS7
: info
->params
.data_bits
= 7; break;
2349 case CS8
: info
->params
.data_bits
= 8; break;
2350 default: info
->params
.data_bits
= 7; break;
2353 info
->params
.stop_bits
= (cflag
& CSTOPB
) ? 2 : 1;
2356 info
->params
.parity
= (cflag
& PARODD
) ? ASYNC_PARITY_ODD
: ASYNC_PARITY_EVEN
;
2358 info
->params
.parity
= ASYNC_PARITY_NONE
;
2360 /* calculate number of jiffies to transmit a full
2361 * FIFO (32 bytes) at specified data rate
2363 bits_per_char
= info
->params
.data_bits
+
2364 info
->params
.stop_bits
+ 1;
2366 info
->params
.data_rate
= tty_get_baud_rate(info
->tty
);
2368 if (info
->params
.data_rate
) {
2369 info
->timeout
= (32*HZ
*bits_per_char
) /
2370 info
->params
.data_rate
;
2372 info
->timeout
+= HZ
/50; /* Add .02 seconds of slop */
2374 if (cflag
& CRTSCTS
)
2375 info
->flags
|= ASYNC_CTS_FLOW
;
2377 info
->flags
&= ~ASYNC_CTS_FLOW
;
2380 info
->flags
&= ~ASYNC_CHECK_CD
;
2382 info
->flags
|= ASYNC_CHECK_CD
;
2384 /* process tty input control flags */
2386 info
->read_status_mask
= IRQ_RXOVER
;
2387 if (I_INPCK(info
->tty
))
2388 info
->read_status_mask
|= MASK_PARITY
| MASK_FRAMING
;
2389 if (I_BRKINT(info
->tty
) || I_PARMRK(info
->tty
))
2390 info
->read_status_mask
|= MASK_BREAK
;
2391 if (I_IGNPAR(info
->tty
))
2392 info
->ignore_status_mask
|= MASK_PARITY
| MASK_FRAMING
;
2393 if (I_IGNBRK(info
->tty
)) {
2394 info
->ignore_status_mask
|= MASK_BREAK
;
2395 /* If ignoring parity and break indicators, ignore
2396 * overruns too. (For real raw support).
2398 if (I_IGNPAR(info
->tty
))
2399 info
->ignore_status_mask
|= MASK_OVERRUN
;
2405 static int get_stats(struct slgt_info
*info
, struct mgsl_icount __user
*user_icount
)
2407 DBGINFO(("%s get_stats\n", info
->device_name
));
2409 memset(&info
->icount
, 0, sizeof(info
->icount
));
2411 if (copy_to_user(user_icount
, &info
->icount
, sizeof(struct mgsl_icount
)))
2417 static int get_params(struct slgt_info
*info
, MGSL_PARAMS __user
*user_params
)
2419 DBGINFO(("%s get_params\n", info
->device_name
));
2420 if (copy_to_user(user_params
, &info
->params
, sizeof(MGSL_PARAMS
)))
2425 static int set_params(struct slgt_info
*info
, MGSL_PARAMS __user
*new_params
)
2427 unsigned long flags
;
2428 MGSL_PARAMS tmp_params
;
2430 DBGINFO(("%s set_params\n", info
->device_name
));
2431 if (copy_from_user(&tmp_params
, new_params
, sizeof(MGSL_PARAMS
)))
2434 spin_lock_irqsave(&info
->lock
, flags
);
2435 memcpy(&info
->params
, &tmp_params
, sizeof(MGSL_PARAMS
));
2436 spin_unlock_irqrestore(&info
->lock
, flags
);
2438 change_params(info
);
2443 static int get_txidle(struct slgt_info
*info
, int __user
*idle_mode
)
2445 DBGINFO(("%s get_txidle=%d\n", info
->device_name
, info
->idle_mode
));
2446 if (put_user(info
->idle_mode
, idle_mode
))
2451 static int set_txidle(struct slgt_info
*info
, int idle_mode
)
2453 unsigned long flags
;
2454 DBGINFO(("%s set_txidle(%d)\n", info
->device_name
, idle_mode
));
2455 spin_lock_irqsave(&info
->lock
,flags
);
2456 info
->idle_mode
= idle_mode
;
2458 spin_unlock_irqrestore(&info
->lock
,flags
);
2462 static int tx_enable(struct slgt_info
*info
, int enable
)
2464 unsigned long flags
;
2465 DBGINFO(("%s tx_enable(%d)\n", info
->device_name
, enable
));
2466 spin_lock_irqsave(&info
->lock
,flags
);
2468 if (!info
->tx_enabled
)
2471 if (info
->tx_enabled
)
2474 spin_unlock_irqrestore(&info
->lock
,flags
);
2479 * abort transmit HDLC frame
2481 static int tx_abort(struct slgt_info
*info
)
2483 unsigned long flags
;
2484 DBGINFO(("%s tx_abort\n", info
->device_name
));
2485 spin_lock_irqsave(&info
->lock
,flags
);
2487 spin_unlock_irqrestore(&info
->lock
,flags
);
2491 static int rx_enable(struct slgt_info
*info
, int enable
)
2493 unsigned long flags
;
2494 DBGINFO(("%s rx_enable(%d)\n", info
->device_name
, enable
));
2495 spin_lock_irqsave(&info
->lock
,flags
);
2497 if (!info
->rx_enabled
)
2500 if (info
->rx_enabled
)
2503 spin_unlock_irqrestore(&info
->lock
,flags
);
2508 * wait for specified event to occur
2510 static int wait_mgsl_event(struct slgt_info
*info
, int __user
*mask_ptr
)
2512 unsigned long flags
;
2515 struct mgsl_icount cprev
, cnow
;
2518 struct _input_signal_events oldsigs
, newsigs
;
2519 DECLARE_WAITQUEUE(wait
, current
);
2521 if (get_user(mask
, mask_ptr
))
2524 DBGINFO(("%s wait_mgsl_event(%d)\n", info
->device_name
, mask
));
2526 spin_lock_irqsave(&info
->lock
,flags
);
2528 /* return immediately if state matches requested events */
2533 ( ((s
& SerialSignal_DSR
) ? MgslEvent_DsrActive
:MgslEvent_DsrInactive
) +
2534 ((s
& SerialSignal_DCD
) ? MgslEvent_DcdActive
:MgslEvent_DcdInactive
) +
2535 ((s
& SerialSignal_CTS
) ? MgslEvent_CtsActive
:MgslEvent_CtsInactive
) +
2536 ((s
& SerialSignal_RI
) ? MgslEvent_RiActive
:MgslEvent_RiInactive
) );
2538 spin_unlock_irqrestore(&info
->lock
,flags
);
2542 /* save current irq counts */
2543 cprev
= info
->icount
;
2544 oldsigs
= info
->input_signal_events
;
2546 /* enable hunt and idle irqs if needed */
2547 if (mask
& (MgslEvent_ExitHuntMode
+MgslEvent_IdleReceived
)) {
2548 unsigned short val
= rd_reg16(info
, SCR
);
2549 if (!(val
& IRQ_RXIDLE
))
2550 wr_reg16(info
, SCR
, (unsigned short)(val
| IRQ_RXIDLE
));
2553 set_current_state(TASK_INTERRUPTIBLE
);
2554 add_wait_queue(&info
->event_wait_q
, &wait
);
2556 spin_unlock_irqrestore(&info
->lock
,flags
);
2560 if (signal_pending(current
)) {
2565 /* get current irq counts */
2566 spin_lock_irqsave(&info
->lock
,flags
);
2567 cnow
= info
->icount
;
2568 newsigs
= info
->input_signal_events
;
2569 set_current_state(TASK_INTERRUPTIBLE
);
2570 spin_unlock_irqrestore(&info
->lock
,flags
);
2572 /* if no change, wait aborted for some reason */
2573 if (newsigs
.dsr_up
== oldsigs
.dsr_up
&&
2574 newsigs
.dsr_down
== oldsigs
.dsr_down
&&
2575 newsigs
.dcd_up
== oldsigs
.dcd_up
&&
2576 newsigs
.dcd_down
== oldsigs
.dcd_down
&&
2577 newsigs
.cts_up
== oldsigs
.cts_up
&&
2578 newsigs
.cts_down
== oldsigs
.cts_down
&&
2579 newsigs
.ri_up
== oldsigs
.ri_up
&&
2580 newsigs
.ri_down
== oldsigs
.ri_down
&&
2581 cnow
.exithunt
== cprev
.exithunt
&&
2582 cnow
.rxidle
== cprev
.rxidle
) {
2588 ( (newsigs
.dsr_up
!= oldsigs
.dsr_up
? MgslEvent_DsrActive
:0) +
2589 (newsigs
.dsr_down
!= oldsigs
.dsr_down
? MgslEvent_DsrInactive
:0) +
2590 (newsigs
.dcd_up
!= oldsigs
.dcd_up
? MgslEvent_DcdActive
:0) +
2591 (newsigs
.dcd_down
!= oldsigs
.dcd_down
? MgslEvent_DcdInactive
:0) +
2592 (newsigs
.cts_up
!= oldsigs
.cts_up
? MgslEvent_CtsActive
:0) +
2593 (newsigs
.cts_down
!= oldsigs
.cts_down
? MgslEvent_CtsInactive
:0) +
2594 (newsigs
.ri_up
!= oldsigs
.ri_up
? MgslEvent_RiActive
:0) +
2595 (newsigs
.ri_down
!= oldsigs
.ri_down
? MgslEvent_RiInactive
:0) +
2596 (cnow
.exithunt
!= cprev
.exithunt
? MgslEvent_ExitHuntMode
:0) +
2597 (cnow
.rxidle
!= cprev
.rxidle
? MgslEvent_IdleReceived
:0) );
2605 remove_wait_queue(&info
->event_wait_q
, &wait
);
2606 set_current_state(TASK_RUNNING
);
2609 if (mask
& (MgslEvent_ExitHuntMode
+ MgslEvent_IdleReceived
)) {
2610 spin_lock_irqsave(&info
->lock
,flags
);
2611 if (!waitqueue_active(&info
->event_wait_q
)) {
2612 /* disable enable exit hunt mode/idle rcvd IRQs */
2614 (unsigned short)(rd_reg16(info
, SCR
) & ~IRQ_RXIDLE
));
2616 spin_unlock_irqrestore(&info
->lock
,flags
);
2620 rc
= put_user(events
, mask_ptr
);
2624 static int get_interface(struct slgt_info
*info
, int __user
*if_mode
)
2626 DBGINFO(("%s get_interface=%x\n", info
->device_name
, info
->if_mode
));
2627 if (put_user(info
->if_mode
, if_mode
))
2632 static int set_interface(struct slgt_info
*info
, int if_mode
)
2634 unsigned long flags
;
2637 DBGINFO(("%s set_interface=%x)\n", info
->device_name
, if_mode
));
2638 spin_lock_irqsave(&info
->lock
,flags
);
2639 info
->if_mode
= if_mode
;
2643 /* TCR (tx control) 07 1=RTS driver control */
2644 val
= rd_reg16(info
, TCR
);
2645 if (info
->if_mode
& MGSL_INTERFACE_RTS_EN
)
2649 wr_reg16(info
, TCR
, val
);
2651 spin_unlock_irqrestore(&info
->lock
,flags
);
2655 static int modem_input_wait(struct slgt_info
*info
,int arg
)
2657 unsigned long flags
;
2659 struct mgsl_icount cprev
, cnow
;
2660 DECLARE_WAITQUEUE(wait
, current
);
2662 /* save current irq counts */
2663 spin_lock_irqsave(&info
->lock
,flags
);
2664 cprev
= info
->icount
;
2665 add_wait_queue(&info
->status_event_wait_q
, &wait
);
2666 set_current_state(TASK_INTERRUPTIBLE
);
2667 spin_unlock_irqrestore(&info
->lock
,flags
);
2671 if (signal_pending(current
)) {
2676 /* get new irq counts */
2677 spin_lock_irqsave(&info
->lock
,flags
);
2678 cnow
= info
->icount
;
2679 set_current_state(TASK_INTERRUPTIBLE
);
2680 spin_unlock_irqrestore(&info
->lock
,flags
);
2682 /* if no change, wait aborted for some reason */
2683 if (cnow
.rng
== cprev
.rng
&& cnow
.dsr
== cprev
.dsr
&&
2684 cnow
.dcd
== cprev
.dcd
&& cnow
.cts
== cprev
.cts
) {
2689 /* check for change in caller specified modem input */
2690 if ((arg
& TIOCM_RNG
&& cnow
.rng
!= cprev
.rng
) ||
2691 (arg
& TIOCM_DSR
&& cnow
.dsr
!= cprev
.dsr
) ||
2692 (arg
& TIOCM_CD
&& cnow
.dcd
!= cprev
.dcd
) ||
2693 (arg
& TIOCM_CTS
&& cnow
.cts
!= cprev
.cts
)) {
2700 remove_wait_queue(&info
->status_event_wait_q
, &wait
);
2701 set_current_state(TASK_RUNNING
);
2706 * return state of serial control and status signals
2708 static int tiocmget(struct tty_struct
*tty
, struct file
*file
)
2710 struct slgt_info
*info
= tty
->driver_data
;
2711 unsigned int result
;
2712 unsigned long flags
;
2714 spin_lock_irqsave(&info
->lock
,flags
);
2716 spin_unlock_irqrestore(&info
->lock
,flags
);
2718 result
= ((info
->signals
& SerialSignal_RTS
) ? TIOCM_RTS
:0) +
2719 ((info
->signals
& SerialSignal_DTR
) ? TIOCM_DTR
:0) +
2720 ((info
->signals
& SerialSignal_DCD
) ? TIOCM_CAR
:0) +
2721 ((info
->signals
& SerialSignal_RI
) ? TIOCM_RNG
:0) +
2722 ((info
->signals
& SerialSignal_DSR
) ? TIOCM_DSR
:0) +
2723 ((info
->signals
& SerialSignal_CTS
) ? TIOCM_CTS
:0);
2725 DBGINFO(("%s tiocmget value=%08X\n", info
->device_name
, result
));
2730 * set modem control signals (DTR/RTS)
2732 * cmd signal command: TIOCMBIS = set bit TIOCMBIC = clear bit
2733 * TIOCMSET = set/clear signal values
2734 * value bit mask for command
2736 static int tiocmset(struct tty_struct
*tty
, struct file
*file
,
2737 unsigned int set
, unsigned int clear
)
2739 struct slgt_info
*info
= tty
->driver_data
;
2740 unsigned long flags
;
2742 DBGINFO(("%s tiocmset(%x,%x)\n", info
->device_name
, set
, clear
));
2744 if (set
& TIOCM_RTS
)
2745 info
->signals
|= SerialSignal_RTS
;
2746 if (set
& TIOCM_DTR
)
2747 info
->signals
|= SerialSignal_DTR
;
2748 if (clear
& TIOCM_RTS
)
2749 info
->signals
&= ~SerialSignal_RTS
;
2750 if (clear
& TIOCM_DTR
)
2751 info
->signals
&= ~SerialSignal_DTR
;
2753 spin_lock_irqsave(&info
->lock
,flags
);
2755 spin_unlock_irqrestore(&info
->lock
,flags
);
2760 * block current process until the device is ready to open
2762 static int block_til_ready(struct tty_struct
*tty
, struct file
*filp
,
2763 struct slgt_info
*info
)
2765 DECLARE_WAITQUEUE(wait
, current
);
2767 int do_clocal
= 0, extra_count
= 0;
2768 unsigned long flags
;
2770 DBGINFO(("%s block_til_ready\n", tty
->driver
->name
));
2772 if (filp
->f_flags
& O_NONBLOCK
|| tty
->flags
& (1 << TTY_IO_ERROR
)){
2773 /* nonblock mode is set or port is not enabled */
2774 info
->flags
|= ASYNC_NORMAL_ACTIVE
;
2778 if (tty
->termios
->c_cflag
& CLOCAL
)
2781 /* Wait for carrier detect and the line to become
2782 * free (i.e., not in use by the callout). While we are in
2783 * this loop, info->count is dropped by one, so that
2784 * close() knows when to free things. We restore it upon
2785 * exit, either normal or abnormal.
2789 add_wait_queue(&info
->open_wait
, &wait
);
2791 spin_lock_irqsave(&info
->lock
, flags
);
2792 if (!tty_hung_up_p(filp
)) {
2796 spin_unlock_irqrestore(&info
->lock
, flags
);
2797 info
->blocked_open
++;
2800 if ((tty
->termios
->c_cflag
& CBAUD
)) {
2801 spin_lock_irqsave(&info
->lock
,flags
);
2802 info
->signals
|= SerialSignal_RTS
+ SerialSignal_DTR
;
2804 spin_unlock_irqrestore(&info
->lock
,flags
);
2807 set_current_state(TASK_INTERRUPTIBLE
);
2809 if (tty_hung_up_p(filp
) || !(info
->flags
& ASYNC_INITIALIZED
)){
2810 retval
= (info
->flags
& ASYNC_HUP_NOTIFY
) ?
2811 -EAGAIN
: -ERESTARTSYS
;
2815 spin_lock_irqsave(&info
->lock
,flags
);
2817 spin_unlock_irqrestore(&info
->lock
,flags
);
2819 if (!(info
->flags
& ASYNC_CLOSING
) &&
2820 (do_clocal
|| (info
->signals
& SerialSignal_DCD
)) ) {
2824 if (signal_pending(current
)) {
2825 retval
= -ERESTARTSYS
;
2829 DBGINFO(("%s block_til_ready wait\n", tty
->driver
->name
));
2833 set_current_state(TASK_RUNNING
);
2834 remove_wait_queue(&info
->open_wait
, &wait
);
2838 info
->blocked_open
--;
2841 info
->flags
|= ASYNC_NORMAL_ACTIVE
;
2843 DBGINFO(("%s block_til_ready ready, rc=%d\n", tty
->driver
->name
, retval
));
2847 static int alloc_tmp_rbuf(struct slgt_info
*info
)
2849 info
->tmp_rbuf
= kmalloc(info
->max_frame_size
, GFP_KERNEL
);
2850 if (info
->tmp_rbuf
== NULL
)
2855 static void free_tmp_rbuf(struct slgt_info
*info
)
2857 kfree(info
->tmp_rbuf
);
2858 info
->tmp_rbuf
= NULL
;
2862 * allocate DMA descriptor lists.
2864 static int alloc_desc(struct slgt_info
*info
)
2869 /* allocate memory to hold descriptor lists */
2870 info
->bufs
= pci_alloc_consistent(info
->pdev
, DESC_LIST_SIZE
, &info
->bufs_dma_addr
);
2871 if (info
->bufs
== NULL
)
2874 memset(info
->bufs
, 0, DESC_LIST_SIZE
);
2876 info
->rbufs
= (struct slgt_desc
*)info
->bufs
;
2877 info
->tbufs
= ((struct slgt_desc
*)info
->bufs
) + info
->rbuf_count
;
2879 pbufs
= (unsigned int)info
->bufs_dma_addr
;
2882 * Build circular lists of descriptors
2885 for (i
=0; i
< info
->rbuf_count
; i
++) {
2886 /* physical address of this descriptor */
2887 info
->rbufs
[i
].pdesc
= pbufs
+ (i
* sizeof(struct slgt_desc
));
2889 /* physical address of next descriptor */
2890 if (i
== info
->rbuf_count
- 1)
2891 info
->rbufs
[i
].next
= cpu_to_le32(pbufs
);
2893 info
->rbufs
[i
].next
= cpu_to_le32(pbufs
+ ((i
+1) * sizeof(struct slgt_desc
)));
2894 set_desc_count(info
->rbufs
[i
], DMABUFSIZE
);
2897 for (i
=0; i
< info
->tbuf_count
; i
++) {
2898 /* physical address of this descriptor */
2899 info
->tbufs
[i
].pdesc
= pbufs
+ ((info
->rbuf_count
+ i
) * sizeof(struct slgt_desc
));
2901 /* physical address of next descriptor */
2902 if (i
== info
->tbuf_count
- 1)
2903 info
->tbufs
[i
].next
= cpu_to_le32(pbufs
+ info
->rbuf_count
* sizeof(struct slgt_desc
));
2905 info
->tbufs
[i
].next
= cpu_to_le32(pbufs
+ ((info
->rbuf_count
+ i
+ 1) * sizeof(struct slgt_desc
)));
2911 static void free_desc(struct slgt_info
*info
)
2913 if (info
->bufs
!= NULL
) {
2914 pci_free_consistent(info
->pdev
, DESC_LIST_SIZE
, info
->bufs
, info
->bufs_dma_addr
);
2921 static int alloc_bufs(struct slgt_info
*info
, struct slgt_desc
*bufs
, int count
)
2924 for (i
=0; i
< count
; i
++) {
2925 if ((bufs
[i
].buf
= pci_alloc_consistent(info
->pdev
, DMABUFSIZE
, &bufs
[i
].buf_dma_addr
)) == NULL
)
2927 bufs
[i
].pbuf
= cpu_to_le32((unsigned int)bufs
[i
].buf_dma_addr
);
2932 static void free_bufs(struct slgt_info
*info
, struct slgt_desc
*bufs
, int count
)
2935 for (i
=0; i
< count
; i
++) {
2936 if (bufs
[i
].buf
== NULL
)
2938 pci_free_consistent(info
->pdev
, DMABUFSIZE
, bufs
[i
].buf
, bufs
[i
].buf_dma_addr
);
2943 static int alloc_dma_bufs(struct slgt_info
*info
)
2945 info
->rbuf_count
= 32;
2946 info
->tbuf_count
= 32;
2948 if (alloc_desc(info
) < 0 ||
2949 alloc_bufs(info
, info
->rbufs
, info
->rbuf_count
) < 0 ||
2950 alloc_bufs(info
, info
->tbufs
, info
->tbuf_count
) < 0 ||
2951 alloc_tmp_rbuf(info
) < 0) {
2952 DBGERR(("%s DMA buffer alloc fail\n", info
->device_name
));
2959 static void free_dma_bufs(struct slgt_info
*info
)
2962 free_bufs(info
, info
->rbufs
, info
->rbuf_count
);
2963 free_bufs(info
, info
->tbufs
, info
->tbuf_count
);
2966 free_tmp_rbuf(info
);
2969 static int claim_resources(struct slgt_info
*info
)
2971 if (request_mem_region(info
->phys_reg_addr
, SLGT_REG_SIZE
, "synclink_gt") == NULL
) {
2972 DBGERR(("%s reg addr conflict, addr=%08X\n",
2973 info
->device_name
, info
->phys_reg_addr
));
2974 info
->init_error
= DiagStatus_AddressConflict
;
2978 info
->reg_addr_requested
= 1;
2980 info
->reg_addr
= ioremap(info
->phys_reg_addr
, PAGE_SIZE
);
2981 if (!info
->reg_addr
) {
2982 DBGERR(("%s cant map device registers, addr=%08X\n",
2983 info
->device_name
, info
->phys_reg_addr
));
2984 info
->init_error
= DiagStatus_CantAssignPciResources
;
2987 info
->reg_addr
+= info
->reg_offset
;
2991 release_resources(info
);
2995 static void release_resources(struct slgt_info
*info
)
2997 if (info
->irq_requested
) {
2998 free_irq(info
->irq_level
, info
);
2999 info
->irq_requested
= 0;
3002 if (info
->reg_addr_requested
) {
3003 release_mem_region(info
->phys_reg_addr
, SLGT_REG_SIZE
);
3004 info
->reg_addr_requested
= 0;
3007 if (info
->reg_addr
) {
3008 iounmap(info
->reg_addr
- info
->reg_offset
);
3009 info
->reg_addr
= NULL
;
3013 /* Add the specified device instance data structure to the
3014 * global linked list of devices and increment the device count.
3016 static void add_device(struct slgt_info
*info
)
3020 info
->next_device
= NULL
;
3021 info
->line
= slgt_device_count
;
3022 sprintf(info
->device_name
, "%s%d", tty_dev_prefix
, info
->line
);
3024 if (info
->line
< MAX_DEVICES
) {
3025 if (maxframe
[info
->line
])
3026 info
->max_frame_size
= maxframe
[info
->line
];
3027 info
->dosyncppp
= dosyncppp
[info
->line
];
3030 slgt_device_count
++;
3032 if (!slgt_device_list
)
3033 slgt_device_list
= info
;
3035 struct slgt_info
*current_dev
= slgt_device_list
;
3036 while(current_dev
->next_device
)
3037 current_dev
= current_dev
->next_device
;
3038 current_dev
->next_device
= info
;
3041 if (info
->max_frame_size
< 4096)
3042 info
->max_frame_size
= 4096;
3043 else if (info
->max_frame_size
> 65535)
3044 info
->max_frame_size
= 65535;
3046 switch(info
->pdev
->device
) {
3047 case SYNCLINK_GT_DEVICE_ID
:
3050 case SYNCLINK_GT4_DEVICE_ID
:
3053 case SYNCLINK_AC_DEVICE_ID
:
3055 info
->params
.mode
= MGSL_MODE_ASYNC
;
3058 devstr
= "(unknown model)";
3060 printk("SyncLink %s %s IO=%08x IRQ=%d MaxFrameSize=%u\n",
3061 devstr
, info
->device_name
, info
->phys_reg_addr
,
3062 info
->irq_level
, info
->max_frame_size
);
3070 * allocate device instance structure, return NULL on failure
3072 static struct slgt_info
*alloc_dev(int adapter_num
, int port_num
, struct pci_dev
*pdev
)
3074 struct slgt_info
*info
;
3076 info
= kmalloc(sizeof(struct slgt_info
), GFP_KERNEL
);
3079 DBGERR(("%s device alloc failed adapter=%d port=%d\n",
3080 driver_name
, adapter_num
, port_num
));
3082 memset(info
, 0, sizeof(struct slgt_info
));
3083 info
->magic
= MGSL_MAGIC
;
3084 INIT_WORK(&info
->task
, bh_handler
, info
);
3085 info
->max_frame_size
= 4096;
3086 info
->raw_rx_size
= DMABUFSIZE
;
3087 info
->close_delay
= 5*HZ
/10;
3088 info
->closing_wait
= 30*HZ
;
3089 init_waitqueue_head(&info
->open_wait
);
3090 init_waitqueue_head(&info
->close_wait
);
3091 init_waitqueue_head(&info
->status_event_wait_q
);
3092 init_waitqueue_head(&info
->event_wait_q
);
3093 spin_lock_init(&info
->netlock
);
3094 memcpy(&info
->params
,&default_params
,sizeof(MGSL_PARAMS
));
3095 info
->idle_mode
= HDLC_TXIDLE_FLAGS
;
3096 info
->adapter_num
= adapter_num
;
3097 info
->port_num
= port_num
;
3099 init_timer(&info
->tx_timer
);
3100 info
->tx_timer
.data
= (unsigned long)info
;
3101 info
->tx_timer
.function
= tx_timeout
;
3103 init_timer(&info
->rx_timer
);
3104 info
->rx_timer
.data
= (unsigned long)info
;
3105 info
->rx_timer
.function
= rx_timeout
;
3107 /* Copy configuration info to device instance data */
3109 info
->irq_level
= pdev
->irq
;
3110 info
->phys_reg_addr
= pci_resource_start(pdev
,0);
3112 /* veremap works on page boundaries
3113 * map full page starting at the page boundary
3115 info
->reg_offset
= info
->phys_reg_addr
& (PAGE_SIZE
-1);
3116 info
->phys_reg_addr
&= ~(PAGE_SIZE
-1);
3118 info
->bus_type
= MGSL_BUS_TYPE_PCI
;
3119 info
->irq_flags
= SA_SHIRQ
;
3121 info
->init_error
= -1; /* assume error, set to 0 on successful init */
3127 static void device_init(int adapter_num
, struct pci_dev
*pdev
)
3129 struct slgt_info
*port_array
[SLGT_MAX_PORTS
];
3133 if (pdev
->device
== SYNCLINK_GT4_DEVICE_ID
)
3136 /* allocate device instances for all ports */
3137 for (i
=0; i
< port_count
; ++i
) {
3138 port_array
[i
] = alloc_dev(adapter_num
, i
, pdev
);
3139 if (port_array
[i
] == NULL
) {
3140 for (--i
; i
>= 0; --i
)
3141 kfree(port_array
[i
]);
3146 /* give copy of port_array to all ports and add to device list */
3147 for (i
=0; i
< port_count
; ++i
) {
3148 memcpy(port_array
[i
]->port_array
, port_array
, sizeof(port_array
));
3149 add_device(port_array
[i
]);
3150 port_array
[i
]->port_count
= port_count
;
3151 spin_lock_init(&port_array
[i
]->lock
);
3154 /* Allocate and claim adapter resources */
3155 if (!claim_resources(port_array
[0])) {
3157 alloc_dma_bufs(port_array
[0]);
3159 /* copy resource information from first port to others */
3160 for (i
= 1; i
< port_count
; ++i
) {
3161 port_array
[i
]->lock
= port_array
[0]->lock
;
3162 port_array
[i
]->irq_level
= port_array
[0]->irq_level
;
3163 port_array
[i
]->reg_addr
= port_array
[0]->reg_addr
;
3164 alloc_dma_bufs(port_array
[i
]);
3167 if (request_irq(port_array
[0]->irq_level
,
3169 port_array
[0]->irq_flags
,
3170 port_array
[0]->device_name
,
3171 port_array
[0]) < 0) {
3172 DBGERR(("%s request_irq failed IRQ=%d\n",
3173 port_array
[0]->device_name
,
3174 port_array
[0]->irq_level
));
3176 port_array
[0]->irq_requested
= 1;
3177 adapter_test(port_array
[0]);
3178 for (i
=1 ; i
< port_count
; i
++)
3179 port_array
[i
]->init_error
= port_array
[0]->init_error
;
3184 static int __devinit
init_one(struct pci_dev
*dev
,
3185 const struct pci_device_id
*ent
)
3187 if (pci_enable_device(dev
)) {
3188 printk("error enabling pci device %p\n", dev
);
3191 pci_set_master(dev
);
3192 device_init(slgt_device_count
, dev
);
3196 static void __devexit
remove_one(struct pci_dev
*dev
)
3200 static struct tty_operations ops
= {
3204 .put_char
= put_char
,
3205 .flush_chars
= flush_chars
,
3206 .write_room
= write_room
,
3207 .chars_in_buffer
= chars_in_buffer
,
3208 .flush_buffer
= flush_buffer
,
3210 .throttle
= throttle
,
3211 .unthrottle
= unthrottle
,
3212 .send_xchar
= send_xchar
,
3213 .break_ctl
= set_break
,
3214 .wait_until_sent
= wait_until_sent
,
3215 .read_proc
= read_proc
,
3216 .set_termios
= set_termios
,
3218 .start
= tx_release
,
3220 .tiocmget
= tiocmget
,
3221 .tiocmset
= tiocmset
,
3224 static void slgt_cleanup(void)
3227 struct slgt_info
*info
;
3228 struct slgt_info
*tmp
;
3230 printk("unload %s %s\n", driver_name
, driver_version
);
3232 if (serial_driver
) {
3233 if ((rc
= tty_unregister_driver(serial_driver
)))
3234 DBGERR(("tty_unregister_driver error=%d\n", rc
));
3235 put_tty_driver(serial_driver
);
3239 info
= slgt_device_list
;
3242 info
= info
->next_device
;
3245 /* release devices */
3246 info
= slgt_device_list
;
3251 free_dma_bufs(info
);
3252 free_tmp_rbuf(info
);
3253 if (info
->port_num
== 0)
3254 release_resources(info
);
3256 info
= info
->next_device
;
3261 pci_unregister_driver(&pci_driver
);
3265 * Driver initialization entry point.
3267 static int __init
slgt_init(void)
3271 printk("%s %s\n", driver_name
, driver_version
);
3273 slgt_device_count
= 0;
3274 if ((rc
= pci_register_driver(&pci_driver
)) < 0) {
3275 printk("%s pci_register_driver error=%d\n", driver_name
, rc
);
3280 if (!slgt_device_list
) {
3281 printk("%s no devices found\n",driver_name
);
3285 serial_driver
= alloc_tty_driver(MAX_DEVICES
);
3286 if (!serial_driver
) {
3291 /* Initialize the tty_driver structure */
3293 serial_driver
->owner
= THIS_MODULE
;
3294 serial_driver
->driver_name
= tty_driver_name
;
3295 serial_driver
->name
= tty_dev_prefix
;
3296 serial_driver
->major
= ttymajor
;
3297 serial_driver
->minor_start
= 64;
3298 serial_driver
->type
= TTY_DRIVER_TYPE_SERIAL
;
3299 serial_driver
->subtype
= SERIAL_TYPE_NORMAL
;
3300 serial_driver
->init_termios
= tty_std_termios
;
3301 serial_driver
->init_termios
.c_cflag
=
3302 B9600
| CS8
| CREAD
| HUPCL
| CLOCAL
;
3303 serial_driver
->flags
= TTY_DRIVER_REAL_RAW
;
3304 tty_set_operations(serial_driver
, &ops
);
3305 if ((rc
= tty_register_driver(serial_driver
)) < 0) {
3306 DBGERR(("%s can't register serial driver\n", driver_name
));
3307 put_tty_driver(serial_driver
);
3308 serial_driver
= NULL
;
3312 printk("%s %s, tty major#%d\n",
3313 driver_name
, driver_version
,
3314 serial_driver
->major
);
3323 static void __exit
slgt_exit(void)
3328 module_init(slgt_init
);
3329 module_exit(slgt_exit
);
3332 * register access routines
3335 #define CALC_REGADDR() \
3336 unsigned long reg_addr = ((unsigned long)info->reg_addr) + addr; \
3338 reg_addr += (info->port_num) * 32;
3340 static __u8
rd_reg8(struct slgt_info
*info
, unsigned int addr
)
3343 return readb((void __iomem
*)reg_addr
);
3346 static void wr_reg8(struct slgt_info
*info
, unsigned int addr
, __u8 value
)
3349 writeb(value
, (void __iomem
*)reg_addr
);
3352 static __u16
rd_reg16(struct slgt_info
*info
, unsigned int addr
)
3355 return readw((void __iomem
*)reg_addr
);
3358 static void wr_reg16(struct slgt_info
*info
, unsigned int addr
, __u16 value
)
3361 writew(value
, (void __iomem
*)reg_addr
);
3364 static __u32
rd_reg32(struct slgt_info
*info
, unsigned int addr
)
3367 return readl((void __iomem
*)reg_addr
);
3370 static void wr_reg32(struct slgt_info
*info
, unsigned int addr
, __u32 value
)
3373 writel(value
, (void __iomem
*)reg_addr
);
3376 static void rdma_reset(struct slgt_info
*info
)
3381 wr_reg32(info
, RDCSR
, BIT1
);
3383 /* wait for enable bit cleared */
3384 for(i
=0 ; i
< 1000 ; i
++)
3385 if (!(rd_reg32(info
, RDCSR
) & BIT0
))
3389 static void tdma_reset(struct slgt_info
*info
)
3394 wr_reg32(info
, TDCSR
, BIT1
);
3396 /* wait for enable bit cleared */
3397 for(i
=0 ; i
< 1000 ; i
++)
3398 if (!(rd_reg32(info
, TDCSR
) & BIT0
))
3403 * enable internal loopback
3404 * TxCLK and RxCLK are generated from BRG
3405 * and TxD is looped back to RxD internally.
3407 static void enable_loopback(struct slgt_info
*info
)
3409 /* SCR (serial control) BIT2=looopback enable */
3410 wr_reg16(info
, SCR
, (unsigned short)(rd_reg16(info
, SCR
) | BIT2
));
3412 if (info
->params
.mode
!= MGSL_MODE_ASYNC
) {
3413 /* CCR (clock control)
3414 * 07..05 tx clock source (010 = BRG)
3415 * 04..02 rx clock source (010 = BRG)
3416 * 01 auxclk enable (0 = disable)
3417 * 00 BRG enable (1 = enable)
3421 wr_reg8(info
, CCR
, 0x49);
3423 /* set speed if available, otherwise use default */
3424 if (info
->params
.clock_speed
)
3425 set_rate(info
, info
->params
.clock_speed
);
3427 set_rate(info
, 3686400);
3432 * set baud rate generator to specified rate
3434 static void set_rate(struct slgt_info
*info
, u32 rate
)
3437 static unsigned int osc
= 14745600;
3439 /* div = osc/rate - 1
3441 * Round div up if osc/rate is not integer to
3442 * force to next slowest rate.
3447 if (!(osc
% rate
) && div
)
3449 wr_reg16(info
, BDR
, (unsigned short)div
);
3453 static void rx_stop(struct slgt_info
*info
)
3457 /* disable and reset receiver */
3458 val
= rd_reg16(info
, RCR
) & ~BIT1
; /* clear enable bit */
3459 wr_reg16(info
, RCR
, (unsigned short)(val
| BIT2
)); /* set reset bit */
3460 wr_reg16(info
, RCR
, val
); /* clear reset bit */
3462 slgt_irq_off(info
, IRQ_RXOVER
+ IRQ_RXDATA
+ IRQ_RXIDLE
);
3464 /* clear pending rx interrupts */
3465 wr_reg16(info
, SSR
, IRQ_RXIDLE
+ IRQ_RXOVER
);
3469 info
->rx_enabled
= 0;
3470 info
->rx_restart
= 0;
3473 static void rx_start(struct slgt_info
*info
)
3477 slgt_irq_off(info
, IRQ_RXOVER
+ IRQ_RXDATA
);
3479 /* clear pending rx overrun IRQ */
3480 wr_reg16(info
, SSR
, IRQ_RXOVER
);
3482 /* reset and disable receiver */
3483 val
= rd_reg16(info
, RCR
) & ~BIT1
; /* clear enable bit */
3484 wr_reg16(info
, RCR
, (unsigned short)(val
| BIT2
)); /* set reset bit */
3485 wr_reg16(info
, RCR
, val
); /* clear reset bit */
3490 /* set 1st descriptor address */
3491 wr_reg32(info
, RDDAR
, info
->rbufs
[0].pdesc
);
3493 if (info
->params
.mode
!= MGSL_MODE_ASYNC
) {
3494 /* enable rx DMA and DMA interrupt */
3495 wr_reg32(info
, RDCSR
, (BIT2
+ BIT0
));
3497 /* enable saving of rx status, rx DMA and DMA interrupt */
3498 wr_reg32(info
, RDCSR
, (BIT6
+ BIT2
+ BIT0
));
3501 slgt_irq_on(info
, IRQ_RXOVER
);
3503 /* enable receiver */
3504 wr_reg16(info
, RCR
, (unsigned short)(rd_reg16(info
, RCR
) | BIT1
));
3506 info
->rx_restart
= 0;
3507 info
->rx_enabled
= 1;
3510 static void tx_start(struct slgt_info
*info
)
3512 if (!info
->tx_enabled
) {
3514 (unsigned short)(rd_reg16(info
, TCR
) | BIT1
));
3515 info
->tx_enabled
= TRUE
;
3518 if (info
->tx_count
) {
3519 info
->drop_rts_on_tx_done
= 0;
3521 if (info
->params
.mode
!= MGSL_MODE_ASYNC
) {
3522 if (info
->params
.flags
& HDLC_FLAG_AUTO_RTS
) {
3524 if (!(info
->signals
& SerialSignal_RTS
)) {
3525 info
->signals
|= SerialSignal_RTS
;
3527 info
->drop_rts_on_tx_done
= 1;
3531 slgt_irq_off(info
, IRQ_TXDATA
);
3532 slgt_irq_on(info
, IRQ_TXUNDER
+ IRQ_TXIDLE
);
3533 /* clear tx idle and underrun status bits */
3534 wr_reg16(info
, SSR
, (unsigned short)(IRQ_TXIDLE
+ IRQ_TXUNDER
));
3536 if (!(rd_reg32(info
, TDCSR
) & BIT0
)) {
3537 /* tx DMA stopped, restart tx DMA */
3539 /* set 1st descriptor address */
3540 wr_reg32(info
, TDDAR
, info
->tbufs
[info
->tbuf_start
].pdesc
);
3541 if (info
->params
.mode
== MGSL_MODE_RAW
)
3542 wr_reg32(info
, TDCSR
, BIT2
+ BIT0
); /* IRQ + DMA enable */
3544 wr_reg32(info
, TDCSR
, BIT0
); /* DMA enable */
3547 if (info
->params
.mode
!= MGSL_MODE_RAW
) {
3548 info
->tx_timer
.expires
= jiffies
+ msecs_to_jiffies(5000);
3549 add_timer(&info
->tx_timer
);
3553 /* set 1st descriptor address */
3554 wr_reg32(info
, TDDAR
, info
->tbufs
[info
->tbuf_start
].pdesc
);
3556 slgt_irq_off(info
, IRQ_TXDATA
);
3557 slgt_irq_on(info
, IRQ_TXIDLE
);
3558 /* clear tx idle status bit */
3559 wr_reg16(info
, SSR
, IRQ_TXIDLE
);
3562 wr_reg32(info
, TDCSR
, BIT0
);
3565 info
->tx_active
= 1;
3569 static void tx_stop(struct slgt_info
*info
)
3573 del_timer(&info
->tx_timer
);
3577 /* reset and disable transmitter */
3578 val
= rd_reg16(info
, TCR
) & ~BIT1
; /* clear enable bit */
3579 wr_reg16(info
, TCR
, (unsigned short)(val
| BIT2
)); /* set reset bit */
3580 wr_reg16(info
, TCR
, val
); /* clear reset */
3582 slgt_irq_off(info
, IRQ_TXDATA
+ IRQ_TXIDLE
+ IRQ_TXUNDER
);
3584 /* clear tx idle and underrun status bit */
3585 wr_reg16(info
, SSR
, (unsigned short)(IRQ_TXIDLE
+ IRQ_TXUNDER
));
3589 info
->tx_enabled
= 0;
3590 info
->tx_active
= 0;
3593 static void reset_port(struct slgt_info
*info
)
3595 if (!info
->reg_addr
)
3601 info
->signals
&= ~(SerialSignal_DTR
+ SerialSignal_RTS
);
3604 slgt_irq_off(info
, IRQ_ALL
| IRQ_MASTER
);
3607 static void reset_adapter(struct slgt_info
*info
)
3610 for (i
=0; i
< info
->port_count
; ++i
) {
3611 if (info
->port_array
[i
])
3612 reset_port(info
->port_array
[i
]);
3616 static void async_mode(struct slgt_info
*info
)
3620 slgt_irq_off(info
, IRQ_ALL
| IRQ_MASTER
);
3626 * 15..13 mode, 010=async
3627 * 12..10 encoding, 000=NRZ
3629 * 08 1=odd parity, 0=even parity
3630 * 07 1=RTS driver control
3632 * 05..04 character length
3637 * 03 0=1 stop bit, 1=2 stop bits
3640 * 00 auto-CTS enable
3644 if (info
->if_mode
& MGSL_INTERFACE_RTS_EN
)
3647 if (info
->params
.parity
!= ASYNC_PARITY_NONE
) {
3649 if (info
->params
.parity
== ASYNC_PARITY_ODD
)
3653 switch (info
->params
.data_bits
)
3655 case 6: val
|= BIT4
; break;
3656 case 7: val
|= BIT5
; break;
3657 case 8: val
|= BIT5
+ BIT4
; break;
3660 if (info
->params
.stop_bits
!= 1)
3663 if (info
->params
.flags
& HDLC_FLAG_AUTO_CTS
)
3666 wr_reg16(info
, TCR
, val
);
3670 * 15..13 mode, 010=async
3671 * 12..10 encoding, 000=NRZ
3673 * 08 1=odd parity, 0=even parity
3674 * 07..06 reserved, must be 0
3675 * 05..04 character length
3680 * 03 reserved, must be zero
3683 * 00 auto-DCD enable
3687 if (info
->params
.parity
!= ASYNC_PARITY_NONE
) {
3689 if (info
->params
.parity
== ASYNC_PARITY_ODD
)
3693 switch (info
->params
.data_bits
)
3695 case 6: val
|= BIT4
; break;
3696 case 7: val
|= BIT5
; break;
3697 case 8: val
|= BIT5
+ BIT4
; break;
3700 if (info
->params
.flags
& HDLC_FLAG_AUTO_DCD
)
3703 wr_reg16(info
, RCR
, val
);
3705 /* CCR (clock control)
3707 * 07..05 011 = tx clock source is BRG/16
3708 * 04..02 010 = rx clock source is BRG
3709 * 01 0 = auxclk disabled
3710 * 00 1 = BRG enabled
3714 wr_reg8(info
, CCR
, 0x69);
3720 /* SCR (serial control)
3722 * 15 1=tx req on FIFO half empty
3723 * 14 1=rx req on FIFO half full
3724 * 13 tx data IRQ enable
3725 * 12 tx idle IRQ enable
3726 * 11 rx break on IRQ enable
3727 * 10 rx data IRQ enable
3728 * 09 rx break off IRQ enable
3729 * 08 overrun IRQ enable
3734 * 03 reserved, must be zero
3735 * 02 1=txd->rxd internal loopback enable
3736 * 01 reserved, must be zero
3737 * 00 1=master IRQ enable
3739 val
= BIT15
+ BIT14
+ BIT0
;
3740 wr_reg16(info
, SCR
, val
);
3742 slgt_irq_on(info
, IRQ_RXBREAK
| IRQ_RXOVER
);
3744 set_rate(info
, info
->params
.data_rate
* 16);
3746 if (info
->params
.loopback
)
3747 enable_loopback(info
);
3750 static void hdlc_mode(struct slgt_info
*info
)
3754 slgt_irq_off(info
, IRQ_ALL
| IRQ_MASTER
);
3760 * 15..13 mode, 000=HDLC 001=raw sync
3764 * 07 1=RTS driver control
3765 * 06 preamble enable
3766 * 05..04 preamble length
3767 * 03 share open/close flag
3770 * 00 auto-CTS enable
3774 if (info
->params
.mode
== MGSL_MODE_RAW
)
3776 if (info
->if_mode
& MGSL_INTERFACE_RTS_EN
)
3779 switch(info
->params
.encoding
)
3781 case HDLC_ENCODING_NRZB
: val
|= BIT10
; break;
3782 case HDLC_ENCODING_NRZI_MARK
: val
|= BIT11
; break;
3783 case HDLC_ENCODING_NRZI
: val
|= BIT11
+ BIT10
; break;
3784 case HDLC_ENCODING_BIPHASE_MARK
: val
|= BIT12
; break;
3785 case HDLC_ENCODING_BIPHASE_SPACE
: val
|= BIT12
+ BIT10
; break;
3786 case HDLC_ENCODING_BIPHASE_LEVEL
: val
|= BIT12
+ BIT11
; break;
3787 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL
: val
|= BIT12
+ BIT11
+ BIT10
; break;
3790 switch (info
->params
.crc_type
)
3792 case HDLC_CRC_16_CCITT
: val
|= BIT9
; break;
3793 case HDLC_CRC_32_CCITT
: val
|= BIT9
+ BIT8
; break;
3796 if (info
->params
.preamble
!= HDLC_PREAMBLE_PATTERN_NONE
)
3799 switch (info
->params
.preamble_length
)
3801 case HDLC_PREAMBLE_LENGTH_16BITS
: val
|= BIT5
; break;
3802 case HDLC_PREAMBLE_LENGTH_32BITS
: val
|= BIT4
; break;
3803 case HDLC_PREAMBLE_LENGTH_64BITS
: val
|= BIT5
+ BIT4
; break;
3806 if (info
->params
.flags
& HDLC_FLAG_AUTO_CTS
)
3809 wr_reg16(info
, TCR
, val
);
3811 /* TPR (transmit preamble) */
3813 switch (info
->params
.preamble
)
3815 case HDLC_PREAMBLE_PATTERN_FLAGS
: val
= 0x7e; break;
3816 case HDLC_PREAMBLE_PATTERN_ONES
: val
= 0xff; break;
3817 case HDLC_PREAMBLE_PATTERN_ZEROS
: val
= 0x00; break;
3818 case HDLC_PREAMBLE_PATTERN_10
: val
= 0x55; break;
3819 case HDLC_PREAMBLE_PATTERN_01
: val
= 0xaa; break;
3820 default: val
= 0x7e; break;
3822 wr_reg8(info
, TPR
, (unsigned char)val
);
3826 * 15..13 mode, 000=HDLC 001=raw sync
3830 * 07..03 reserved, must be 0
3833 * 00 auto-DCD enable
3837 if (info
->params
.mode
== MGSL_MODE_RAW
)
3840 switch(info
->params
.encoding
)
3842 case HDLC_ENCODING_NRZB
: val
|= BIT10
; break;
3843 case HDLC_ENCODING_NRZI_MARK
: val
|= BIT11
; break;
3844 case HDLC_ENCODING_NRZI
: val
|= BIT11
+ BIT10
; break;
3845 case HDLC_ENCODING_BIPHASE_MARK
: val
|= BIT12
; break;
3846 case HDLC_ENCODING_BIPHASE_SPACE
: val
|= BIT12
+ BIT10
; break;
3847 case HDLC_ENCODING_BIPHASE_LEVEL
: val
|= BIT12
+ BIT11
; break;
3848 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL
: val
|= BIT12
+ BIT11
+ BIT10
; break;
3851 switch (info
->params
.crc_type
)
3853 case HDLC_CRC_16_CCITT
: val
|= BIT9
; break;
3854 case HDLC_CRC_32_CCITT
: val
|= BIT9
+ BIT8
; break;
3857 if (info
->params
.flags
& HDLC_FLAG_AUTO_DCD
)
3860 wr_reg16(info
, RCR
, val
);
3862 /* CCR (clock control)
3864 * 07..05 tx clock source
3865 * 04..02 rx clock source
3871 if (info
->params
.flags
& HDLC_FLAG_TXC_BRG
)
3873 // when RxC source is DPLL, BRG generates 16X DPLL
3874 // reference clock, so take TxC from BRG/16 to get
3875 // transmit clock at actual data rate
3876 if (info
->params
.flags
& HDLC_FLAG_RXC_DPLL
)
3877 val
|= BIT6
+ BIT5
; /* 011, txclk = BRG/16 */
3879 val
|= BIT6
; /* 010, txclk = BRG */
3881 else if (info
->params
.flags
& HDLC_FLAG_TXC_DPLL
)
3882 val
|= BIT7
; /* 100, txclk = DPLL Input */
3883 else if (info
->params
.flags
& HDLC_FLAG_TXC_RXCPIN
)
3884 val
|= BIT5
; /* 001, txclk = RXC Input */
3886 if (info
->params
.flags
& HDLC_FLAG_RXC_BRG
)
3887 val
|= BIT3
; /* 010, rxclk = BRG */
3888 else if (info
->params
.flags
& HDLC_FLAG_RXC_DPLL
)
3889 val
|= BIT4
; /* 100, rxclk = DPLL */
3890 else if (info
->params
.flags
& HDLC_FLAG_RXC_TXCPIN
)
3891 val
|= BIT2
; /* 001, rxclk = TXC Input */
3893 if (info
->params
.clock_speed
)
3896 wr_reg8(info
, CCR
, (unsigned char)val
);
3898 if (info
->params
.flags
& (HDLC_FLAG_TXC_DPLL
+ HDLC_FLAG_RXC_DPLL
))
3900 // program DPLL mode
3901 switch(info
->params
.encoding
)
3903 case HDLC_ENCODING_BIPHASE_MARK
:
3904 case HDLC_ENCODING_BIPHASE_SPACE
:
3906 case HDLC_ENCODING_BIPHASE_LEVEL
:
3907 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL
:
3908 val
= BIT7
+ BIT6
; break;
3909 default: val
= BIT6
; // NRZ encodings
3911 wr_reg16(info
, RCR
, (unsigned short)(rd_reg16(info
, RCR
) | val
));
3913 // DPLL requires a 16X reference clock from BRG
3914 set_rate(info
, info
->params
.clock_speed
* 16);
3917 set_rate(info
, info
->params
.clock_speed
);
3923 /* SCR (serial control)
3925 * 15 1=tx req on FIFO half empty
3926 * 14 1=rx req on FIFO half full
3927 * 13 tx data IRQ enable
3928 * 12 tx idle IRQ enable
3929 * 11 underrun IRQ enable
3930 * 10 rx data IRQ enable
3931 * 09 rx idle IRQ enable
3932 * 08 overrun IRQ enable
3937 * 03 reserved, must be zero
3938 * 02 1=txd->rxd internal loopback enable
3939 * 01 reserved, must be zero
3940 * 00 1=master IRQ enable
3942 wr_reg16(info
, SCR
, BIT15
+ BIT14
+ BIT0
);
3944 if (info
->params
.loopback
)
3945 enable_loopback(info
);
3949 * set transmit idle mode
3951 static void tx_set_idle(struct slgt_info
*info
)
3953 unsigned char val
= 0xff;
3955 switch(info
->idle_mode
)
3957 case HDLC_TXIDLE_FLAGS
: val
= 0x7e; break;
3958 case HDLC_TXIDLE_ALT_ZEROS_ONES
: val
= 0xaa; break;
3959 case HDLC_TXIDLE_ZEROS
: val
= 0x00; break;
3960 case HDLC_TXIDLE_ONES
: val
= 0xff; break;
3961 case HDLC_TXIDLE_ALT_MARK_SPACE
: val
= 0xaa; break;
3962 case HDLC_TXIDLE_SPACE
: val
= 0x00; break;
3963 case HDLC_TXIDLE_MARK
: val
= 0xff; break;
3966 wr_reg8(info
, TIR
, val
);
3970 * get state of V24 status (input) signals
3972 static void get_signals(struct slgt_info
*info
)
3974 unsigned short status
= rd_reg16(info
, SSR
);
3976 /* clear all serial signals except DTR and RTS */
3977 info
->signals
&= SerialSignal_DTR
+ SerialSignal_RTS
;
3980 info
->signals
|= SerialSignal_DSR
;
3982 info
->signals
|= SerialSignal_CTS
;
3984 info
->signals
|= SerialSignal_DCD
;
3986 info
->signals
|= SerialSignal_RI
;
3990 * set V.24 Control Register based on current configuration
3992 static void msc_set_vcr(struct slgt_info
*info
)
3994 unsigned char val
= 0;
3996 /* VCR (V.24 control)
3998 * 07..04 serial IF select
4005 switch(info
->if_mode
& MGSL_INTERFACE_MASK
)
4007 case MGSL_INTERFACE_RS232
:
4008 val
|= BIT5
; /* 0010 */
4010 case MGSL_INTERFACE_V35
:
4011 val
|= BIT7
+ BIT6
+ BIT5
; /* 1110 */
4013 case MGSL_INTERFACE_RS422
:
4014 val
|= BIT6
; /* 0100 */
4018 if (info
->signals
& SerialSignal_DTR
)
4020 if (info
->signals
& SerialSignal_RTS
)
4022 if (info
->if_mode
& MGSL_INTERFACE_LL
)
4024 if (info
->if_mode
& MGSL_INTERFACE_RL
)
4026 wr_reg8(info
, VCR
, val
);
4030 * set state of V24 control (output) signals
4032 static void set_signals(struct slgt_info
*info
)
4034 unsigned char val
= rd_reg8(info
, VCR
);
4035 if (info
->signals
& SerialSignal_DTR
)
4039 if (info
->signals
& SerialSignal_RTS
)
4043 wr_reg8(info
, VCR
, val
);
4047 * free range of receive DMA buffers (i to last)
4049 static void free_rbufs(struct slgt_info
*info
, unsigned int i
, unsigned int last
)
4054 /* reset current buffer for reuse */
4055 info
->rbufs
[i
].status
= 0;
4056 if (info
->params
.mode
== MGSL_MODE_RAW
)
4057 set_desc_count(info
->rbufs
[i
], info
->raw_rx_size
);
4059 set_desc_count(info
->rbufs
[i
], DMABUFSIZE
);
4063 if (++i
== info
->rbuf_count
)
4066 info
->rbuf_current
= i
;
4070 * mark all receive DMA buffers as free
4072 static void reset_rbufs(struct slgt_info
*info
)
4074 free_rbufs(info
, 0, info
->rbuf_count
- 1);
4078 * pass receive HDLC frame to upper layer
4080 * return 1 if frame available, otherwise 0
4082 static int rx_get_frame(struct slgt_info
*info
)
4084 unsigned int start
, end
;
4085 unsigned short status
;
4086 unsigned int framesize
= 0;
4088 unsigned long flags
;
4089 struct tty_struct
*tty
= info
->tty
;
4090 unsigned char addr_field
= 0xff;
4096 start
= end
= info
->rbuf_current
;
4099 if (!desc_complete(info
->rbufs
[end
]))
4102 if (framesize
== 0 && info
->params
.addr_filter
!= 0xff)
4103 addr_field
= info
->rbufs
[end
].buf
[0];
4105 framesize
+= desc_count(info
->rbufs
[end
]);
4107 if (desc_eof(info
->rbufs
[end
]))
4110 if (++end
== info
->rbuf_count
)
4113 if (end
== info
->rbuf_current
) {
4114 if (info
->rx_enabled
){
4115 spin_lock_irqsave(&info
->lock
,flags
);
4117 spin_unlock_irqrestore(&info
->lock
,flags
);
4125 * 15 buffer complete
4128 * 02 eof (end of frame)
4132 status
= desc_status(info
->rbufs
[end
]);
4134 /* ignore CRC bit if not using CRC (bit is undefined) */
4135 if (info
->params
.crc_type
== HDLC_CRC_NONE
)
4138 if (framesize
== 0 ||
4139 (addr_field
!= 0xff && addr_field
!= info
->params
.addr_filter
)) {
4140 free_rbufs(info
, start
, end
);
4144 if (framesize
< 2 || status
& (BIT1
+BIT0
)) {
4145 if (framesize
< 2 || (status
& BIT0
))
4146 info
->icount
.rxshort
++;
4148 info
->icount
.rxcrc
++;
4153 struct net_device_stats
*stats
= hdlc_stats(info
->netdev
);
4155 stats
->rx_frame_errors
++;
4159 /* adjust frame size for CRC, if any */
4160 if (info
->params
.crc_type
== HDLC_CRC_16_CCITT
)
4162 else if (info
->params
.crc_type
== HDLC_CRC_32_CCITT
)
4166 DBGBH(("%s rx frame status=%04X size=%d\n",
4167 info
->device_name
, status
, framesize
));
4168 DBGDATA(info
, info
->rbufs
[start
].buf
, min_t(int, framesize
, DMABUFSIZE
), "rx");
4171 if (framesize
> info
->max_frame_size
)
4172 info
->icount
.rxlong
++;
4174 /* copy dma buffer(s) to contiguous temp buffer */
4175 int copy_count
= framesize
;
4177 unsigned char *p
= info
->tmp_rbuf
;
4178 info
->tmp_rbuf_count
= framesize
;
4180 info
->icount
.rxok
++;
4183 int partial_count
= min(copy_count
, DMABUFSIZE
);
4184 memcpy(p
, info
->rbufs
[i
].buf
, partial_count
);
4186 copy_count
-= partial_count
;
4187 if (++i
== info
->rbuf_count
)
4193 hdlcdev_rx(info
,info
->tmp_rbuf
, framesize
);
4196 ldisc_receive_buf(tty
, info
->tmp_rbuf
, info
->flag_buf
, framesize
);
4199 free_rbufs(info
, start
, end
);
4207 * pass receive buffer (RAW synchronous mode) to tty layer
4208 * return 1 if buffer available, otherwise 0
4210 static int rx_get_buf(struct slgt_info
*info
)
4212 unsigned int i
= info
->rbuf_current
;
4214 if (!desc_complete(info
->rbufs
[i
]))
4216 DBGDATA(info
, info
->rbufs
[i
].buf
, desc_count(info
->rbufs
[i
]), "rx");
4217 DBGINFO(("rx_get_buf size=%d\n", desc_count(info
->rbufs
[i
])));
4218 ldisc_receive_buf(info
->tty
, info
->rbufs
[i
].buf
,
4219 info
->flag_buf
, desc_count(info
->rbufs
[i
]));
4220 free_rbufs(info
, i
, i
);
4224 static void reset_tbufs(struct slgt_info
*info
)
4227 info
->tbuf_current
= 0;
4228 for (i
=0 ; i
< info
->tbuf_count
; i
++) {
4229 info
->tbufs
[i
].status
= 0;
4230 info
->tbufs
[i
].count
= 0;
4235 * return number of free transmit DMA buffers
4237 static unsigned int free_tbuf_count(struct slgt_info
*info
)
4239 unsigned int count
= 0;
4240 unsigned int i
= info
->tbuf_current
;
4244 if (desc_count(info
->tbufs
[i
]))
4245 break; /* buffer in use */
4247 if (++i
== info
->tbuf_count
)
4249 } while (i
!= info
->tbuf_current
);
4251 /* last buffer with zero count may be in use, assume it is */
4259 * load transmit DMA buffer(s) with data
4261 static void tx_load(struct slgt_info
*info
, const char *buf
, unsigned int size
)
4263 unsigned short count
;
4265 struct slgt_desc
*d
;
4270 DBGDATA(info
, buf
, size
, "tx");
4272 info
->tbuf_start
= i
= info
->tbuf_current
;
4275 d
= &info
->tbufs
[i
];
4276 if (++i
== info
->tbuf_count
)
4279 count
= (unsigned short)((size
> DMABUFSIZE
) ? DMABUFSIZE
: size
);
4280 memcpy(d
->buf
, buf
, count
);
4285 if (!size
&& info
->params
.mode
!= MGSL_MODE_RAW
)
4286 set_desc_eof(*d
, 1); /* HDLC: set EOF of last desc */
4288 set_desc_eof(*d
, 0);
4290 set_desc_count(*d
, count
);
4293 info
->tbuf_current
= i
;
4296 static int register_test(struct slgt_info
*info
)
4298 static unsigned short patterns
[] =
4299 {0x0000, 0xffff, 0xaaaa, 0x5555, 0x6969, 0x9696};
4300 static unsigned int count
= sizeof(patterns
)/sizeof(patterns
[0]);
4304 for (i
=0 ; i
< count
; i
++) {
4305 wr_reg16(info
, TIR
, patterns
[i
]);
4306 wr_reg16(info
, BDR
, patterns
[(i
+1)%count
]);
4307 if ((rd_reg16(info
, TIR
) != patterns
[i
]) ||
4308 (rd_reg16(info
, BDR
) != patterns
[(i
+1)%count
])) {
4314 info
->init_error
= rc
? 0 : DiagStatus_AddressFailure
;
4318 static int irq_test(struct slgt_info
*info
)
4320 unsigned long timeout
;
4321 unsigned long flags
;
4322 struct tty_struct
*oldtty
= info
->tty
;
4323 u32 speed
= info
->params
.data_rate
;
4325 info
->params
.data_rate
= 921600;
4328 spin_lock_irqsave(&info
->lock
, flags
);
4330 slgt_irq_on(info
, IRQ_TXIDLE
);
4332 /* enable transmitter */
4334 (unsigned short)(rd_reg16(info
, TCR
) | BIT1
));
4336 /* write one byte and wait for tx idle */
4337 wr_reg16(info
, TDR
, 0);
4339 /* assume failure */
4340 info
->init_error
= DiagStatus_IrqFailure
;
4341 info
->irq_occurred
= FALSE
;
4343 spin_unlock_irqrestore(&info
->lock
, flags
);
4346 while(timeout
-- && !info
->irq_occurred
)
4347 msleep_interruptible(10);
4349 spin_lock_irqsave(&info
->lock
,flags
);
4351 spin_unlock_irqrestore(&info
->lock
,flags
);
4353 info
->params
.data_rate
= speed
;
4356 info
->init_error
= info
->irq_occurred
? 0 : DiagStatus_IrqFailure
;
4357 return info
->irq_occurred
? 0 : -ENODEV
;
4360 static int loopback_test_rx(struct slgt_info
*info
)
4362 unsigned char *src
, *dest
;
4365 if (desc_complete(info
->rbufs
[0])) {
4366 count
= desc_count(info
->rbufs
[0]);
4367 src
= info
->rbufs
[0].buf
;
4368 dest
= info
->tmp_rbuf
;
4370 for( ; count
; count
-=2, src
+=2) {
4371 /* src=data byte (src+1)=status byte */
4372 if (!(*(src
+1) & (BIT9
+ BIT8
))) {
4375 info
->tmp_rbuf_count
++;
4378 DBGDATA(info
, info
->tmp_rbuf
, info
->tmp_rbuf_count
, "rx");
4384 static int loopback_test(struct slgt_info
*info
)
4386 #define TESTFRAMESIZE 20
4388 unsigned long timeout
;
4389 u16 count
= TESTFRAMESIZE
;
4390 unsigned char buf
[TESTFRAMESIZE
];
4392 unsigned long flags
;
4394 struct tty_struct
*oldtty
= info
->tty
;
4397 memcpy(¶ms
, &info
->params
, sizeof(params
));
4399 info
->params
.mode
= MGSL_MODE_ASYNC
;
4400 info
->params
.data_rate
= 921600;
4401 info
->params
.loopback
= 1;
4404 /* build and send transmit frame */
4405 for (count
= 0; count
< TESTFRAMESIZE
; ++count
)
4406 buf
[count
] = (unsigned char)count
;
4408 info
->tmp_rbuf_count
= 0;
4409 memset(info
->tmp_rbuf
, 0, TESTFRAMESIZE
);
4411 /* program hardware for HDLC and enabled receiver */
4412 spin_lock_irqsave(&info
->lock
,flags
);
4415 info
->tx_count
= count
;
4416 tx_load(info
, buf
, count
);
4418 spin_unlock_irqrestore(&info
->lock
, flags
);
4420 /* wait for receive complete */
4421 for (timeout
= 100; timeout
; --timeout
) {
4422 msleep_interruptible(10);
4423 if (loopback_test_rx(info
)) {
4429 /* verify received frame length and contents */
4430 if (!rc
&& (info
->tmp_rbuf_count
!= count
||
4431 memcmp(buf
, info
->tmp_rbuf
, count
))) {
4435 spin_lock_irqsave(&info
->lock
,flags
);
4436 reset_adapter(info
);
4437 spin_unlock_irqrestore(&info
->lock
,flags
);
4439 memcpy(&info
->params
, ¶ms
, sizeof(info
->params
));
4442 info
->init_error
= rc
? DiagStatus_DmaFailure
: 0;
4446 static int adapter_test(struct slgt_info
*info
)
4448 DBGINFO(("testing %s\n", info
->device_name
));
4449 if ((info
->init_error
= register_test(info
)) < 0) {
4450 printk("register test failure %s addr=%08X\n",
4451 info
->device_name
, info
->phys_reg_addr
);
4452 } else if ((info
->init_error
= irq_test(info
)) < 0) {
4453 printk("IRQ test failure %s IRQ=%d\n",
4454 info
->device_name
, info
->irq_level
);
4455 } else if ((info
->init_error
= loopback_test(info
)) < 0) {
4456 printk("loopback test failure %s\n", info
->device_name
);
4458 return info
->init_error
;
4462 * transmit timeout handler
4464 static void tx_timeout(unsigned long context
)
4466 struct slgt_info
*info
= (struct slgt_info
*)context
;
4467 unsigned long flags
;
4469 DBGINFO(("%s tx_timeout\n", info
->device_name
));
4470 if(info
->tx_active
&& info
->params
.mode
== MGSL_MODE_HDLC
) {
4471 info
->icount
.txtimeout
++;
4473 spin_lock_irqsave(&info
->lock
,flags
);
4474 info
->tx_active
= 0;
4476 spin_unlock_irqrestore(&info
->lock
,flags
);
4480 hdlcdev_tx_done(info
);
4487 * receive buffer polling timer
4489 static void rx_timeout(unsigned long context
)
4491 struct slgt_info
*info
= (struct slgt_info
*)context
;
4492 unsigned long flags
;
4494 DBGINFO(("%s rx_timeout\n", info
->device_name
));
4495 spin_lock_irqsave(&info
->lock
, flags
);
4496 info
->pending_bh
|= BH_RECEIVE
;
4497 spin_unlock_irqrestore(&info
->lock
, flags
);