2 * $Id: synclink_gt.c,v 4.50 2007/07/25 19:29:25 paulkf Exp $
4 * Device driver for Microgate SyncLink GT serial adapters.
6 * written by Paul Fulghum for Microgate Corporation
9 * Microgate and SyncLink are trademarks of Microgate Corporation
11 * This code is released under the GNU General Public License (GPL)
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
16 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
17 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
18 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
19 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
21 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
22 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
23 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 * DEBUG OUTPUT DEFINITIONS
29 * uncomment lines below to enable specific types of debug output
31 * DBGINFO information - most verbose output
32 * DBGERR serious errors
33 * DBGBH bottom half service routine debugging
34 * DBGISR interrupt service routine debugging
35 * DBGDATA output receive and transmit data
36 * DBGTBUF output transmit DMA buffers and registers
37 * DBGRBUF output receive DMA buffers and registers
40 #define DBGINFO(fmt) if (debug_level >= DEBUG_LEVEL_INFO) printk fmt
41 #define DBGERR(fmt) if (debug_level >= DEBUG_LEVEL_ERROR) printk fmt
42 #define DBGBH(fmt) if (debug_level >= DEBUG_LEVEL_BH) printk fmt
43 #define DBGISR(fmt) if (debug_level >= DEBUG_LEVEL_ISR) printk fmt
44 #define DBGDATA(info, buf, size, label) if (debug_level >= DEBUG_LEVEL_DATA) trace_block((info), (buf), (size), (label))
45 //#define DBGTBUF(info) dump_tbufs(info)
46 //#define DBGRBUF(info) dump_rbufs(info)
49 #include <linux/module.h>
50 #include <linux/version.h>
51 #include <linux/errno.h>
52 #include <linux/signal.h>
53 #include <linux/sched.h>
54 #include <linux/timer.h>
55 #include <linux/interrupt.h>
56 #include <linux/pci.h>
57 #include <linux/tty.h>
58 #include <linux/tty_flip.h>
59 #include <linux/serial.h>
60 #include <linux/major.h>
61 #include <linux/string.h>
62 #include <linux/fcntl.h>
63 #include <linux/ptrace.h>
64 #include <linux/ioport.h>
66 #include <linux/slab.h>
67 #include <linux/netdevice.h>
68 #include <linux/vmalloc.h>
69 #include <linux/init.h>
70 #include <linux/delay.h>
71 #include <linux/ioctl.h>
72 #include <linux/termios.h>
73 #include <linux/bitops.h>
74 #include <linux/workqueue.h>
75 #include <linux/hdlc.h>
76 #include <linux/synclink.h>
78 #include <asm/system.h>
82 #include <asm/types.h>
83 #include <asm/uaccess.h>
85 #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_GT_MODULE))
86 #define SYNCLINK_GENERIC_HDLC 1
88 #define SYNCLINK_GENERIC_HDLC 0
92 * module identification
94 static char *driver_name
= "SyncLink GT";
95 static char *driver_version
= "$Revision: 4.50 $";
96 static char *tty_driver_name
= "synclink_gt";
97 static char *tty_dev_prefix
= "ttySLG";
98 MODULE_LICENSE("GPL");
99 #define MGSL_MAGIC 0x5401
100 #define MAX_DEVICES 32
102 static struct pci_device_id pci_table
[] = {
103 {PCI_VENDOR_ID_MICROGATE
, SYNCLINK_GT_DEVICE_ID
, PCI_ANY_ID
, PCI_ANY_ID
,},
104 {PCI_VENDOR_ID_MICROGATE
, SYNCLINK_GT2_DEVICE_ID
, PCI_ANY_ID
, PCI_ANY_ID
,},
105 {PCI_VENDOR_ID_MICROGATE
, SYNCLINK_GT4_DEVICE_ID
, PCI_ANY_ID
, PCI_ANY_ID
,},
106 {PCI_VENDOR_ID_MICROGATE
, SYNCLINK_AC_DEVICE_ID
, PCI_ANY_ID
, PCI_ANY_ID
,},
107 {0,}, /* terminate list */
109 MODULE_DEVICE_TABLE(pci
, pci_table
);
111 static int init_one(struct pci_dev
*dev
,const struct pci_device_id
*ent
);
112 static void remove_one(struct pci_dev
*dev
);
113 static struct pci_driver pci_driver
= {
114 .name
= "synclink_gt",
115 .id_table
= pci_table
,
117 .remove
= __devexit_p(remove_one
),
120 static bool pci_registered
;
123 * module configuration and status
125 static struct slgt_info
*slgt_device_list
;
126 static int slgt_device_count
;
129 static int debug_level
;
130 static int maxframe
[MAX_DEVICES
];
131 static int dosyncppp
[MAX_DEVICES
];
133 module_param(ttymajor
, int, 0);
134 module_param(debug_level
, int, 0);
135 module_param_array(maxframe
, int, NULL
, 0);
136 module_param_array(dosyncppp
, int, NULL
, 0);
138 MODULE_PARM_DESC(ttymajor
, "TTY major device number override: 0=auto assigned");
139 MODULE_PARM_DESC(debug_level
, "Debug syslog output: 0=disabled, 1 to 5=increasing detail");
140 MODULE_PARM_DESC(maxframe
, "Maximum frame size used by device (4096 to 65535)");
141 MODULE_PARM_DESC(dosyncppp
, "Enable synchronous net device, 0=disable 1=enable");
144 * tty support and callbacks
146 static struct tty_driver
*serial_driver
;
148 static int open(struct tty_struct
*tty
, struct file
* filp
);
149 static void close(struct tty_struct
*tty
, struct file
* filp
);
150 static void hangup(struct tty_struct
*tty
);
151 static void set_termios(struct tty_struct
*tty
, struct ktermios
*old_termios
);
153 static int write(struct tty_struct
*tty
, const unsigned char *buf
, int count
);
154 static void put_char(struct tty_struct
*tty
, unsigned char ch
);
155 static void send_xchar(struct tty_struct
*tty
, char ch
);
156 static void wait_until_sent(struct tty_struct
*tty
, int timeout
);
157 static int write_room(struct tty_struct
*tty
);
158 static void flush_chars(struct tty_struct
*tty
);
159 static void flush_buffer(struct tty_struct
*tty
);
160 static void tx_hold(struct tty_struct
*tty
);
161 static void tx_release(struct tty_struct
*tty
);
163 static int ioctl(struct tty_struct
*tty
, struct file
*file
, unsigned int cmd
, unsigned long arg
);
164 static int read_proc(char *page
, char **start
, off_t off
, int count
,int *eof
, void *data
);
165 static int chars_in_buffer(struct tty_struct
*tty
);
166 static void throttle(struct tty_struct
* tty
);
167 static void unthrottle(struct tty_struct
* tty
);
168 static void set_break(struct tty_struct
*tty
, int break_state
);
171 * generic HDLC support and callbacks
173 #if SYNCLINK_GENERIC_HDLC
174 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
175 static void hdlcdev_tx_done(struct slgt_info
*info
);
176 static void hdlcdev_rx(struct slgt_info
*info
, char *buf
, int size
);
177 static int hdlcdev_init(struct slgt_info
*info
);
178 static void hdlcdev_exit(struct slgt_info
*info
);
183 * device specific structures, macros and functions
186 #define SLGT_MAX_PORTS 4
187 #define SLGT_REG_SIZE 256
190 * conditional wait facility
193 struct cond_wait
*next
;
198 static void init_cond_wait(struct cond_wait
*w
, unsigned int data
);
199 static void add_cond_wait(struct cond_wait
**head
, struct cond_wait
*w
);
200 static void remove_cond_wait(struct cond_wait
**head
, struct cond_wait
*w
);
201 static void flush_cond_wait(struct cond_wait
**head
);
204 * DMA buffer descriptor and access macros
210 __le32 pbuf
; /* physical address of data buffer */
211 __le32 next
; /* physical address of next descriptor */
213 /* driver book keeping */
214 char *buf
; /* virtual address of data buffer */
215 unsigned int pdesc
; /* physical address of this descriptor */
216 dma_addr_t buf_dma_addr
;
219 #define set_desc_buffer(a,b) (a).pbuf = cpu_to_le32((unsigned int)(b))
220 #define set_desc_next(a,b) (a).next = cpu_to_le32((unsigned int)(b))
221 #define set_desc_count(a,b)(a).count = cpu_to_le16((unsigned short)(b))
222 #define set_desc_eof(a,b) (a).status = cpu_to_le16((b) ? (le16_to_cpu((a).status) | BIT0) : (le16_to_cpu((a).status) & ~BIT0))
223 #define desc_count(a) (le16_to_cpu((a).count))
224 #define desc_status(a) (le16_to_cpu((a).status))
225 #define desc_complete(a) (le16_to_cpu((a).status) & BIT15)
226 #define desc_eof(a) (le16_to_cpu((a).status) & BIT2)
227 #define desc_crc_error(a) (le16_to_cpu((a).status) & BIT1)
228 #define desc_abort(a) (le16_to_cpu((a).status) & BIT0)
229 #define desc_residue(a) ((le16_to_cpu((a).status) & 0x38) >> 3)
231 struct _input_signal_events
{
243 * device instance data structure
246 void *if_ptr
; /* General purpose pointer (used by SPPP) */
248 struct slgt_info
*next_device
; /* device list link */
253 char device_name
[25];
254 struct pci_dev
*pdev
;
256 int port_count
; /* count of ports on adapter */
257 int adapter_num
; /* adapter instance number */
258 int port_num
; /* port instance number */
260 /* array of pointers to port contexts on this adapter */
261 struct slgt_info
*port_array
[SLGT_MAX_PORTS
];
263 int count
; /* count of opens */
264 int line
; /* tty line instance number */
265 unsigned short close_delay
;
266 unsigned short closing_wait
; /* time to wait before closing */
268 struct mgsl_icount icount
;
270 struct tty_struct
*tty
;
272 int x_char
; /* xon/xoff character */
273 int blocked_open
; /* # of blocked opens */
274 unsigned int read_status_mask
;
275 unsigned int ignore_status_mask
;
277 wait_queue_head_t open_wait
;
278 wait_queue_head_t close_wait
;
280 wait_queue_head_t status_event_wait_q
;
281 wait_queue_head_t event_wait_q
;
282 struct timer_list tx_timer
;
283 struct timer_list rx_timer
;
285 unsigned int gpio_present
;
286 struct cond_wait
*gpio_wait_q
;
288 spinlock_t lock
; /* spinlock for synchronizing with ISR */
290 struct work_struct task
;
296 bool irq_requested
; /* true if IRQ requested */
297 bool irq_occurred
; /* for diagnostics use */
299 /* device configuration */
301 unsigned int bus_type
;
302 unsigned int irq_level
;
303 unsigned long irq_flags
;
305 unsigned char __iomem
* reg_addr
; /* memory mapped registers address */
307 bool reg_addr_requested
;
309 MGSL_PARAMS params
; /* communications parameters */
311 u32 max_frame_size
; /* as set by device config */
313 unsigned int raw_rx_size
;
314 unsigned int if_mode
;
324 unsigned char signals
; /* serial signal states */
325 int init_error
; /* initialization error */
327 unsigned char *tx_buf
;
330 char flag_buf
[MAX_ASYNC_BUFFER_SIZE
];
331 char char_buf
[MAX_ASYNC_BUFFER_SIZE
];
332 bool drop_rts_on_tx_done
;
333 struct _input_signal_events input_signal_events
;
335 int dcd_chkcount
; /* check counts to prevent */
336 int cts_chkcount
; /* too many IRQs if a signal */
337 int dsr_chkcount
; /* is floating */
340 char *bufs
; /* virtual address of DMA buffer lists */
341 dma_addr_t bufs_dma_addr
; /* physical address of buffer descriptors */
343 unsigned int rbuf_count
;
344 struct slgt_desc
*rbufs
;
345 unsigned int rbuf_current
;
346 unsigned int rbuf_index
;
348 unsigned int tbuf_count
;
349 struct slgt_desc
*tbufs
;
350 unsigned int tbuf_current
;
351 unsigned int tbuf_start
;
353 unsigned char *tmp_rbuf
;
354 unsigned int tmp_rbuf_count
;
356 /* SPPP/Cisco HDLC device parts */
361 #if SYNCLINK_GENERIC_HDLC
362 struct net_device
*netdev
;
367 static MGSL_PARAMS default_params
= {
368 .mode
= MGSL_MODE_HDLC
,
370 .flags
= HDLC_FLAG_UNDERRUN_ABORT15
,
371 .encoding
= HDLC_ENCODING_NRZI_SPACE
,
374 .crc_type
= HDLC_CRC_16_CCITT
,
375 .preamble_length
= HDLC_PREAMBLE_LENGTH_8BITS
,
376 .preamble
= HDLC_PREAMBLE_PATTERN_NONE
,
380 .parity
= ASYNC_PARITY_NONE
385 #define BH_TRANSMIT 2
387 #define IO_PIN_SHUTDOWN_LIMIT 100
389 #define DMABUFSIZE 256
390 #define DESC_LIST_SIZE 4096
392 #define MASK_PARITY BIT1
393 #define MASK_FRAMING BIT0
394 #define MASK_BREAK BIT14
395 #define MASK_OVERRUN BIT4
397 #define GSR 0x00 /* global status */
398 #define JCR 0x04 /* JTAG control */
399 #define IODR 0x08 /* GPIO direction */
400 #define IOER 0x0c /* GPIO interrupt enable */
401 #define IOVR 0x10 /* GPIO value */
402 #define IOSR 0x14 /* GPIO interrupt status */
403 #define TDR 0x80 /* tx data */
404 #define RDR 0x80 /* rx data */
405 #define TCR 0x82 /* tx control */
406 #define TIR 0x84 /* tx idle */
407 #define TPR 0x85 /* tx preamble */
408 #define RCR 0x86 /* rx control */
409 #define VCR 0x88 /* V.24 control */
410 #define CCR 0x89 /* clock control */
411 #define BDR 0x8a /* baud divisor */
412 #define SCR 0x8c /* serial control */
413 #define SSR 0x8e /* serial status */
414 #define RDCSR 0x90 /* rx DMA control/status */
415 #define TDCSR 0x94 /* tx DMA control/status */
416 #define RDDAR 0x98 /* rx DMA descriptor address */
417 #define TDDAR 0x9c /* tx DMA descriptor address */
420 #define RXBREAK BIT14
421 #define IRQ_TXDATA BIT13
422 #define IRQ_TXIDLE BIT12
423 #define IRQ_TXUNDER BIT11 /* HDLC */
424 #define IRQ_RXDATA BIT10
425 #define IRQ_RXIDLE BIT9 /* HDLC */
426 #define IRQ_RXBREAK BIT9 /* async */
427 #define IRQ_RXOVER BIT8
432 #define IRQ_ALL 0x3ff0
433 #define IRQ_MASTER BIT0
435 #define slgt_irq_on(info, mask) \
436 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) | (mask)))
437 #define slgt_irq_off(info, mask) \
438 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) & ~(mask)))
440 static __u8
rd_reg8(struct slgt_info
*info
, unsigned int addr
);
441 static void wr_reg8(struct slgt_info
*info
, unsigned int addr
, __u8 value
);
442 static __u16
rd_reg16(struct slgt_info
*info
, unsigned int addr
);
443 static void wr_reg16(struct slgt_info
*info
, unsigned int addr
, __u16 value
);
444 static __u32
rd_reg32(struct slgt_info
*info
, unsigned int addr
);
445 static void wr_reg32(struct slgt_info
*info
, unsigned int addr
, __u32 value
);
447 static void msc_set_vcr(struct slgt_info
*info
);
449 static int startup(struct slgt_info
*info
);
450 static int block_til_ready(struct tty_struct
*tty
, struct file
* filp
,struct slgt_info
*info
);
451 static void shutdown(struct slgt_info
*info
);
452 static void program_hw(struct slgt_info
*info
);
453 static void change_params(struct slgt_info
*info
);
455 static int register_test(struct slgt_info
*info
);
456 static int irq_test(struct slgt_info
*info
);
457 static int loopback_test(struct slgt_info
*info
);
458 static int adapter_test(struct slgt_info
*info
);
460 static void reset_adapter(struct slgt_info
*info
);
461 static void reset_port(struct slgt_info
*info
);
462 static void async_mode(struct slgt_info
*info
);
463 static void sync_mode(struct slgt_info
*info
);
465 static void rx_stop(struct slgt_info
*info
);
466 static void rx_start(struct slgt_info
*info
);
467 static void reset_rbufs(struct slgt_info
*info
);
468 static void free_rbufs(struct slgt_info
*info
, unsigned int first
, unsigned int last
);
469 static void rdma_reset(struct slgt_info
*info
);
470 static bool rx_get_frame(struct slgt_info
*info
);
471 static bool rx_get_buf(struct slgt_info
*info
);
473 static void tx_start(struct slgt_info
*info
);
474 static void tx_stop(struct slgt_info
*info
);
475 static void tx_set_idle(struct slgt_info
*info
);
476 static unsigned int free_tbuf_count(struct slgt_info
*info
);
477 static void reset_tbufs(struct slgt_info
*info
);
478 static void tdma_reset(struct slgt_info
*info
);
479 static void tdma_start(struct slgt_info
*info
);
480 static void tx_load(struct slgt_info
*info
, const char *buf
, unsigned int count
);
482 static void get_signals(struct slgt_info
*info
);
483 static void set_signals(struct slgt_info
*info
);
484 static void enable_loopback(struct slgt_info
*info
);
485 static void set_rate(struct slgt_info
*info
, u32 data_rate
);
487 static int bh_action(struct slgt_info
*info
);
488 static void bh_handler(struct work_struct
*work
);
489 static void bh_transmit(struct slgt_info
*info
);
490 static void isr_serial(struct slgt_info
*info
);
491 static void isr_rdma(struct slgt_info
*info
);
492 static void isr_txeom(struct slgt_info
*info
, unsigned short status
);
493 static void isr_tdma(struct slgt_info
*info
);
495 static int alloc_dma_bufs(struct slgt_info
*info
);
496 static void free_dma_bufs(struct slgt_info
*info
);
497 static int alloc_desc(struct slgt_info
*info
);
498 static void free_desc(struct slgt_info
*info
);
499 static int alloc_bufs(struct slgt_info
*info
, struct slgt_desc
*bufs
, int count
);
500 static void free_bufs(struct slgt_info
*info
, struct slgt_desc
*bufs
, int count
);
502 static int alloc_tmp_rbuf(struct slgt_info
*info
);
503 static void free_tmp_rbuf(struct slgt_info
*info
);
505 static void tx_timeout(unsigned long context
);
506 static void rx_timeout(unsigned long context
);
511 static int get_stats(struct slgt_info
*info
, struct mgsl_icount __user
*user_icount
);
512 static int get_params(struct slgt_info
*info
, MGSL_PARAMS __user
*params
);
513 static int set_params(struct slgt_info
*info
, MGSL_PARAMS __user
*params
);
514 static int get_txidle(struct slgt_info
*info
, int __user
*idle_mode
);
515 static int set_txidle(struct slgt_info
*info
, int idle_mode
);
516 static int tx_enable(struct slgt_info
*info
, int enable
);
517 static int tx_abort(struct slgt_info
*info
);
518 static int rx_enable(struct slgt_info
*info
, int enable
);
519 static int modem_input_wait(struct slgt_info
*info
,int arg
);
520 static int wait_mgsl_event(struct slgt_info
*info
, int __user
*mask_ptr
);
521 static int tiocmget(struct tty_struct
*tty
, struct file
*file
);
522 static int tiocmset(struct tty_struct
*tty
, struct file
*file
,
523 unsigned int set
, unsigned int clear
);
524 static void set_break(struct tty_struct
*tty
, int break_state
);
525 static int get_interface(struct slgt_info
*info
, int __user
*if_mode
);
526 static int set_interface(struct slgt_info
*info
, int if_mode
);
527 static int set_gpio(struct slgt_info
*info
, struct gpio_desc __user
*gpio
);
528 static int get_gpio(struct slgt_info
*info
, struct gpio_desc __user
*gpio
);
529 static int wait_gpio(struct slgt_info
*info
, struct gpio_desc __user
*gpio
);
534 static void add_device(struct slgt_info
*info
);
535 static void device_init(int adapter_num
, struct pci_dev
*pdev
);
536 static int claim_resources(struct slgt_info
*info
);
537 static void release_resources(struct slgt_info
*info
);
556 static void trace_block(struct slgt_info
*info
, const char *data
, int count
, const char *label
)
560 printk("%s %s data:\n",info
->device_name
, label
);
562 linecount
= (count
> 16) ? 16 : count
;
563 for(i
=0; i
< linecount
; i
++)
564 printk("%02X ",(unsigned char)data
[i
]);
567 for(i
=0;i
<linecount
;i
++) {
568 if (data
[i
]>=040 && data
[i
]<=0176)
569 printk("%c",data
[i
]);
579 #define DBGDATA(info, buf, size, label)
583 static void dump_tbufs(struct slgt_info
*info
)
586 printk("tbuf_current=%d\n", info
->tbuf_current
);
587 for (i
=0 ; i
< info
->tbuf_count
; i
++) {
588 printk("%d: count=%04X status=%04X\n",
589 i
, le16_to_cpu(info
->tbufs
[i
].count
), le16_to_cpu(info
->tbufs
[i
].status
));
593 #define DBGTBUF(info)
597 static void dump_rbufs(struct slgt_info
*info
)
600 printk("rbuf_current=%d\n", info
->rbuf_current
);
601 for (i
=0 ; i
< info
->rbuf_count
; i
++) {
602 printk("%d: count=%04X status=%04X\n",
603 i
, le16_to_cpu(info
->rbufs
[i
].count
), le16_to_cpu(info
->rbufs
[i
].status
));
607 #define DBGRBUF(info)
610 static inline int sanity_check(struct slgt_info
*info
, char *devname
, const char *name
)
614 printk("null struct slgt_info for (%s) in %s\n", devname
, name
);
617 if (info
->magic
!= MGSL_MAGIC
) {
618 printk("bad magic number struct slgt_info (%s) in %s\n", devname
, name
);
629 * line discipline callback wrappers
631 * The wrappers maintain line discipline references
632 * while calling into the line discipline.
634 * ldisc_receive_buf - pass receive data to line discipline
636 static void ldisc_receive_buf(struct tty_struct
*tty
,
637 const __u8
*data
, char *flags
, int count
)
639 struct tty_ldisc
*ld
;
642 ld
= tty_ldisc_ref(tty
);
645 ld
->receive_buf(tty
, data
, flags
, count
);
652 static int open(struct tty_struct
*tty
, struct file
*filp
)
654 struct slgt_info
*info
;
659 if ((line
< 0) || (line
>= slgt_device_count
)) {
660 DBGERR(("%s: open with invalid line #%d.\n", driver_name
, line
));
664 info
= slgt_device_list
;
665 while(info
&& info
->line
!= line
)
666 info
= info
->next_device
;
667 if (sanity_check(info
, tty
->name
, "open"))
669 if (info
->init_error
) {
670 DBGERR(("%s init error=%d\n", info
->device_name
, info
->init_error
));
674 tty
->driver_data
= info
;
677 DBGINFO(("%s open, old ref count = %d\n", info
->device_name
, info
->count
));
679 /* If port is closing, signal caller to try again */
680 if (tty_hung_up_p(filp
) || info
->flags
& ASYNC_CLOSING
){
681 if (info
->flags
& ASYNC_CLOSING
)
682 interruptible_sleep_on(&info
->close_wait
);
683 retval
= ((info
->flags
& ASYNC_HUP_NOTIFY
) ?
684 -EAGAIN
: -ERESTARTSYS
);
688 info
->tty
->low_latency
= (info
->flags
& ASYNC_LOW_LATENCY
) ? 1 : 0;
690 spin_lock_irqsave(&info
->netlock
, flags
);
691 if (info
->netcount
) {
693 spin_unlock_irqrestore(&info
->netlock
, flags
);
697 spin_unlock_irqrestore(&info
->netlock
, flags
);
699 if (info
->count
== 1) {
700 /* 1st open on this device, init hardware */
701 retval
= startup(info
);
706 retval
= block_til_ready(tty
, filp
, info
);
708 DBGINFO(("%s block_til_ready rc=%d\n", info
->device_name
, retval
));
717 info
->tty
= NULL
; /* tty layer will release tty struct */
722 DBGINFO(("%s open rc=%d\n", info
->device_name
, retval
));
726 static void close(struct tty_struct
*tty
, struct file
*filp
)
728 struct slgt_info
*info
= tty
->driver_data
;
730 if (sanity_check(info
, tty
->name
, "close"))
732 DBGINFO(("%s close entry, count=%d\n", info
->device_name
, info
->count
));
737 if (tty_hung_up_p(filp
))
740 if ((tty
->count
== 1) && (info
->count
!= 1)) {
742 * tty->count is 1 and the tty structure will be freed.
743 * info->count should be one in this case.
744 * if it's not, correct it so that the port is shutdown.
746 DBGERR(("%s close: bad refcount; tty->count=1, "
747 "info->count=%d\n", info
->device_name
, info
->count
));
753 /* if at least one open remaining, leave hardware active */
757 info
->flags
|= ASYNC_CLOSING
;
759 /* set tty->closing to notify line discipline to
760 * only process XON/XOFF characters. Only the N_TTY
761 * discipline appears to use this (ppp does not).
765 /* wait for transmit data to clear all layers */
767 if (info
->closing_wait
!= ASYNC_CLOSING_WAIT_NONE
) {
768 DBGINFO(("%s call tty_wait_until_sent\n", info
->device_name
));
769 tty_wait_until_sent(tty
, info
->closing_wait
);
772 if (info
->flags
& ASYNC_INITIALIZED
)
773 wait_until_sent(tty
, info
->timeout
);
774 if (tty
->driver
->flush_buffer
)
775 tty
->driver
->flush_buffer(tty
);
776 tty_ldisc_flush(tty
);
783 if (info
->blocked_open
) {
784 if (info
->close_delay
) {
785 msleep_interruptible(jiffies_to_msecs(info
->close_delay
));
787 wake_up_interruptible(&info
->open_wait
);
790 info
->flags
&= ~(ASYNC_NORMAL_ACTIVE
|ASYNC_CLOSING
);
792 wake_up_interruptible(&info
->close_wait
);
795 DBGINFO(("%s close exit, count=%d\n", tty
->driver
->name
, info
->count
));
798 static void hangup(struct tty_struct
*tty
)
800 struct slgt_info
*info
= tty
->driver_data
;
802 if (sanity_check(info
, tty
->name
, "hangup"))
804 DBGINFO(("%s hangup\n", info
->device_name
));
810 info
->flags
&= ~ASYNC_NORMAL_ACTIVE
;
813 wake_up_interruptible(&info
->open_wait
);
816 static void set_termios(struct tty_struct
*tty
, struct ktermios
*old_termios
)
818 struct slgt_info
*info
= tty
->driver_data
;
821 DBGINFO(("%s set_termios\n", tty
->driver
->name
));
825 /* Handle transition to B0 status */
826 if (old_termios
->c_cflag
& CBAUD
&&
827 !(tty
->termios
->c_cflag
& CBAUD
)) {
828 info
->signals
&= ~(SerialSignal_RTS
+ SerialSignal_DTR
);
829 spin_lock_irqsave(&info
->lock
,flags
);
831 spin_unlock_irqrestore(&info
->lock
,flags
);
834 /* Handle transition away from B0 status */
835 if (!(old_termios
->c_cflag
& CBAUD
) &&
836 tty
->termios
->c_cflag
& CBAUD
) {
837 info
->signals
|= SerialSignal_DTR
;
838 if (!(tty
->termios
->c_cflag
& CRTSCTS
) ||
839 !test_bit(TTY_THROTTLED
, &tty
->flags
)) {
840 info
->signals
|= SerialSignal_RTS
;
842 spin_lock_irqsave(&info
->lock
,flags
);
844 spin_unlock_irqrestore(&info
->lock
,flags
);
847 /* Handle turning off CRTSCTS */
848 if (old_termios
->c_cflag
& CRTSCTS
&&
849 !(tty
->termios
->c_cflag
& CRTSCTS
)) {
855 static int write(struct tty_struct
*tty
,
856 const unsigned char *buf
, int count
)
859 struct slgt_info
*info
= tty
->driver_data
;
862 if (sanity_check(info
, tty
->name
, "write"))
864 DBGINFO(("%s write count=%d\n", info
->device_name
, count
));
869 if (count
> info
->max_frame_size
) {
877 if (info
->params
.mode
== MGSL_MODE_RAW
||
878 info
->params
.mode
== MGSL_MODE_MONOSYNC
||
879 info
->params
.mode
== MGSL_MODE_BISYNC
) {
880 unsigned int bufs_needed
= (count
/DMABUFSIZE
);
881 unsigned int bufs_free
= free_tbuf_count(info
);
882 if (count
% DMABUFSIZE
)
884 if (bufs_needed
> bufs_free
)
889 if (info
->tx_count
) {
890 /* send accumulated data from send_char() calls */
891 /* as frame and wait before accepting more data. */
892 tx_load(info
, info
->tx_buf
, info
->tx_count
);
897 ret
= info
->tx_count
= count
;
898 tx_load(info
, buf
, count
);
902 if (info
->tx_count
&& !tty
->stopped
&& !tty
->hw_stopped
) {
903 spin_lock_irqsave(&info
->lock
,flags
);
904 if (!info
->tx_active
)
908 spin_unlock_irqrestore(&info
->lock
,flags
);
912 DBGINFO(("%s write rc=%d\n", info
->device_name
, ret
));
916 static void put_char(struct tty_struct
*tty
, unsigned char ch
)
918 struct slgt_info
*info
= tty
->driver_data
;
921 if (sanity_check(info
, tty
->name
, "put_char"))
923 DBGINFO(("%s put_char(%d)\n", info
->device_name
, ch
));
926 spin_lock_irqsave(&info
->lock
,flags
);
927 if (!info
->tx_active
&& (info
->tx_count
< info
->max_frame_size
))
928 info
->tx_buf
[info
->tx_count
++] = ch
;
929 spin_unlock_irqrestore(&info
->lock
,flags
);
932 static void send_xchar(struct tty_struct
*tty
, char ch
)
934 struct slgt_info
*info
= tty
->driver_data
;
937 if (sanity_check(info
, tty
->name
, "send_xchar"))
939 DBGINFO(("%s send_xchar(%d)\n", info
->device_name
, ch
));
942 spin_lock_irqsave(&info
->lock
,flags
);
943 if (!info
->tx_enabled
)
945 spin_unlock_irqrestore(&info
->lock
,flags
);
949 static void wait_until_sent(struct tty_struct
*tty
, int timeout
)
951 struct slgt_info
*info
= tty
->driver_data
;
952 unsigned long orig_jiffies
, char_time
;
956 if (sanity_check(info
, tty
->name
, "wait_until_sent"))
958 DBGINFO(("%s wait_until_sent entry\n", info
->device_name
));
959 if (!(info
->flags
& ASYNC_INITIALIZED
))
962 orig_jiffies
= jiffies
;
964 /* Set check interval to 1/5 of estimated time to
965 * send a character, and make it at least 1. The check
966 * interval should also be less than the timeout.
967 * Note: use tight timings here to satisfy the NIST-PCTS.
970 if (info
->params
.data_rate
) {
971 char_time
= info
->timeout
/(32 * 5);
978 char_time
= min_t(unsigned long, char_time
, timeout
);
980 while (info
->tx_active
) {
981 msleep_interruptible(jiffies_to_msecs(char_time
));
982 if (signal_pending(current
))
984 if (timeout
&& time_after(jiffies
, orig_jiffies
+ timeout
))
989 DBGINFO(("%s wait_until_sent exit\n", info
->device_name
));
992 static int write_room(struct tty_struct
*tty
)
994 struct slgt_info
*info
= tty
->driver_data
;
997 if (sanity_check(info
, tty
->name
, "write_room"))
999 ret
= (info
->tx_active
) ? 0 : HDLC_MAX_FRAME_SIZE
;
1000 DBGINFO(("%s write_room=%d\n", info
->device_name
, ret
));
1004 static void flush_chars(struct tty_struct
*tty
)
1006 struct slgt_info
*info
= tty
->driver_data
;
1007 unsigned long flags
;
1009 if (sanity_check(info
, tty
->name
, "flush_chars"))
1011 DBGINFO(("%s flush_chars entry tx_count=%d\n", info
->device_name
, info
->tx_count
));
1013 if (info
->tx_count
<= 0 || tty
->stopped
||
1014 tty
->hw_stopped
|| !info
->tx_buf
)
1017 DBGINFO(("%s flush_chars start transmit\n", info
->device_name
));
1019 spin_lock_irqsave(&info
->lock
,flags
);
1020 if (!info
->tx_active
&& info
->tx_count
) {
1021 tx_load(info
, info
->tx_buf
,info
->tx_count
);
1024 spin_unlock_irqrestore(&info
->lock
,flags
);
1027 static void flush_buffer(struct tty_struct
*tty
)
1029 struct slgt_info
*info
= tty
->driver_data
;
1030 unsigned long flags
;
1032 if (sanity_check(info
, tty
->name
, "flush_buffer"))
1034 DBGINFO(("%s flush_buffer\n", info
->device_name
));
1036 spin_lock_irqsave(&info
->lock
,flags
);
1037 if (!info
->tx_active
)
1039 spin_unlock_irqrestore(&info
->lock
,flags
);
1045 * throttle (stop) transmitter
1047 static void tx_hold(struct tty_struct
*tty
)
1049 struct slgt_info
*info
= tty
->driver_data
;
1050 unsigned long flags
;
1052 if (sanity_check(info
, tty
->name
, "tx_hold"))
1054 DBGINFO(("%s tx_hold\n", info
->device_name
));
1055 spin_lock_irqsave(&info
->lock
,flags
);
1056 if (info
->tx_enabled
&& info
->params
.mode
== MGSL_MODE_ASYNC
)
1058 spin_unlock_irqrestore(&info
->lock
,flags
);
1062 * release (start) transmitter
1064 static void tx_release(struct tty_struct
*tty
)
1066 struct slgt_info
*info
= tty
->driver_data
;
1067 unsigned long flags
;
1069 if (sanity_check(info
, tty
->name
, "tx_release"))
1071 DBGINFO(("%s tx_release\n", info
->device_name
));
1072 spin_lock_irqsave(&info
->lock
,flags
);
1073 if (!info
->tx_active
&& info
->tx_count
) {
1074 tx_load(info
, info
->tx_buf
, info
->tx_count
);
1077 spin_unlock_irqrestore(&info
->lock
,flags
);
1081 * Service an IOCTL request
1085 * tty pointer to tty instance data
1086 * file pointer to associated file object for device
1087 * cmd IOCTL command code
1088 * arg command argument/context
1090 * Return 0 if success, otherwise error code
1092 static int ioctl(struct tty_struct
*tty
, struct file
*file
,
1093 unsigned int cmd
, unsigned long arg
)
1095 struct slgt_info
*info
= tty
->driver_data
;
1096 struct mgsl_icount cnow
; /* kernel counter temps */
1097 struct serial_icounter_struct __user
*p_cuser
; /* user space */
1098 unsigned long flags
;
1099 void __user
*argp
= (void __user
*)arg
;
1102 if (sanity_check(info
, tty
->name
, "ioctl"))
1104 DBGINFO(("%s ioctl() cmd=%08X\n", info
->device_name
, cmd
));
1106 if ((cmd
!= TIOCGSERIAL
) && (cmd
!= TIOCSSERIAL
) &&
1107 (cmd
!= TIOCMIWAIT
) && (cmd
!= TIOCGICOUNT
)) {
1108 if (tty
->flags
& (1 << TTY_IO_ERROR
))
1115 case MGSL_IOCGPARAMS
:
1116 ret
= get_params(info
, argp
);
1118 case MGSL_IOCSPARAMS
:
1119 ret
= set_params(info
, argp
);
1121 case MGSL_IOCGTXIDLE
:
1122 ret
= get_txidle(info
, argp
);
1124 case MGSL_IOCSTXIDLE
:
1125 ret
= set_txidle(info
, (int)arg
);
1127 case MGSL_IOCTXENABLE
:
1128 ret
= tx_enable(info
, (int)arg
);
1130 case MGSL_IOCRXENABLE
:
1131 ret
= rx_enable(info
, (int)arg
);
1133 case MGSL_IOCTXABORT
:
1134 ret
= tx_abort(info
);
1136 case MGSL_IOCGSTATS
:
1137 ret
= get_stats(info
, argp
);
1139 case MGSL_IOCWAITEVENT
:
1140 ret
= wait_mgsl_event(info
, argp
);
1143 ret
= modem_input_wait(info
,(int)arg
);
1146 ret
= get_interface(info
, argp
);
1149 ret
= set_interface(info
,(int)arg
);
1152 ret
= set_gpio(info
, argp
);
1155 ret
= get_gpio(info
, argp
);
1157 case MGSL_IOCWAITGPIO
:
1158 ret
= wait_gpio(info
, argp
);
1161 spin_lock_irqsave(&info
->lock
,flags
);
1162 cnow
= info
->icount
;
1163 spin_unlock_irqrestore(&info
->lock
,flags
);
1165 if (put_user(cnow
.cts
, &p_cuser
->cts
) ||
1166 put_user(cnow
.dsr
, &p_cuser
->dsr
) ||
1167 put_user(cnow
.rng
, &p_cuser
->rng
) ||
1168 put_user(cnow
.dcd
, &p_cuser
->dcd
) ||
1169 put_user(cnow
.rx
, &p_cuser
->rx
) ||
1170 put_user(cnow
.tx
, &p_cuser
->tx
) ||
1171 put_user(cnow
.frame
, &p_cuser
->frame
) ||
1172 put_user(cnow
.overrun
, &p_cuser
->overrun
) ||
1173 put_user(cnow
.parity
, &p_cuser
->parity
) ||
1174 put_user(cnow
.brk
, &p_cuser
->brk
) ||
1175 put_user(cnow
.buf_overrun
, &p_cuser
->buf_overrun
))
1187 * support for 32 bit ioctl calls on 64 bit systems
1189 #ifdef CONFIG_COMPAT
1190 static long get_params32(struct slgt_info
*info
, struct MGSL_PARAMS32 __user
*user_params
)
1192 struct MGSL_PARAMS32 tmp_params
;
1194 DBGINFO(("%s get_params32\n", info
->device_name
));
1195 tmp_params
.mode
= (compat_ulong_t
)info
->params
.mode
;
1196 tmp_params
.loopback
= info
->params
.loopback
;
1197 tmp_params
.flags
= info
->params
.flags
;
1198 tmp_params
.encoding
= info
->params
.encoding
;
1199 tmp_params
.clock_speed
= (compat_ulong_t
)info
->params
.clock_speed
;
1200 tmp_params
.addr_filter
= info
->params
.addr_filter
;
1201 tmp_params
.crc_type
= info
->params
.crc_type
;
1202 tmp_params
.preamble_length
= info
->params
.preamble_length
;
1203 tmp_params
.preamble
= info
->params
.preamble
;
1204 tmp_params
.data_rate
= (compat_ulong_t
)info
->params
.data_rate
;
1205 tmp_params
.data_bits
= info
->params
.data_bits
;
1206 tmp_params
.stop_bits
= info
->params
.stop_bits
;
1207 tmp_params
.parity
= info
->params
.parity
;
1208 if (copy_to_user(user_params
, &tmp_params
, sizeof(struct MGSL_PARAMS32
)))
1213 static long set_params32(struct slgt_info
*info
, struct MGSL_PARAMS32 __user
*new_params
)
1215 struct MGSL_PARAMS32 tmp_params
;
1217 DBGINFO(("%s set_params32\n", info
->device_name
));
1218 if (copy_from_user(&tmp_params
, new_params
, sizeof(struct MGSL_PARAMS32
)))
1221 spin_lock(&info
->lock
);
1222 info
->params
.mode
= tmp_params
.mode
;
1223 info
->params
.loopback
= tmp_params
.loopback
;
1224 info
->params
.flags
= tmp_params
.flags
;
1225 info
->params
.encoding
= tmp_params
.encoding
;
1226 info
->params
.clock_speed
= tmp_params
.clock_speed
;
1227 info
->params
.addr_filter
= tmp_params
.addr_filter
;
1228 info
->params
.crc_type
= tmp_params
.crc_type
;
1229 info
->params
.preamble_length
= tmp_params
.preamble_length
;
1230 info
->params
.preamble
= tmp_params
.preamble
;
1231 info
->params
.data_rate
= tmp_params
.data_rate
;
1232 info
->params
.data_bits
= tmp_params
.data_bits
;
1233 info
->params
.stop_bits
= tmp_params
.stop_bits
;
1234 info
->params
.parity
= tmp_params
.parity
;
1235 spin_unlock(&info
->lock
);
1237 change_params(info
);
1242 static long slgt_compat_ioctl(struct tty_struct
*tty
, struct file
*file
,
1243 unsigned int cmd
, unsigned long arg
)
1245 struct slgt_info
*info
= tty
->driver_data
;
1246 int rc
= -ENOIOCTLCMD
;
1248 if (sanity_check(info
, tty
->name
, "compat_ioctl"))
1250 DBGINFO(("%s compat_ioctl() cmd=%08X\n", info
->device_name
, cmd
));
1254 case MGSL_IOCSPARAMS32
:
1255 rc
= set_params32(info
, compat_ptr(arg
));
1258 case MGSL_IOCGPARAMS32
:
1259 rc
= get_params32(info
, compat_ptr(arg
));
1262 case MGSL_IOCGPARAMS
:
1263 case MGSL_IOCSPARAMS
:
1264 case MGSL_IOCGTXIDLE
:
1265 case MGSL_IOCGSTATS
:
1266 case MGSL_IOCWAITEVENT
:
1270 case MGSL_IOCWAITGPIO
:
1272 rc
= ioctl(tty
, file
, cmd
, (unsigned long)(compat_ptr(arg
)));
1275 case MGSL_IOCSTXIDLE
:
1276 case MGSL_IOCTXENABLE
:
1277 case MGSL_IOCRXENABLE
:
1278 case MGSL_IOCTXABORT
:
1281 rc
= ioctl(tty
, file
, cmd
, arg
);
1285 DBGINFO(("%s compat_ioctl() cmd=%08X rc=%d\n", info
->device_name
, cmd
, rc
));
1289 #define slgt_compat_ioctl NULL
1290 #endif /* ifdef CONFIG_COMPAT */
1295 static inline int line_info(char *buf
, struct slgt_info
*info
)
1299 unsigned long flags
;
1301 ret
= sprintf(buf
, "%s: IO=%08X IRQ=%d MaxFrameSize=%u\n",
1302 info
->device_name
, info
->phys_reg_addr
,
1303 info
->irq_level
, info
->max_frame_size
);
1305 /* output current serial signal states */
1306 spin_lock_irqsave(&info
->lock
,flags
);
1308 spin_unlock_irqrestore(&info
->lock
,flags
);
1312 if (info
->signals
& SerialSignal_RTS
)
1313 strcat(stat_buf
, "|RTS");
1314 if (info
->signals
& SerialSignal_CTS
)
1315 strcat(stat_buf
, "|CTS");
1316 if (info
->signals
& SerialSignal_DTR
)
1317 strcat(stat_buf
, "|DTR");
1318 if (info
->signals
& SerialSignal_DSR
)
1319 strcat(stat_buf
, "|DSR");
1320 if (info
->signals
& SerialSignal_DCD
)
1321 strcat(stat_buf
, "|CD");
1322 if (info
->signals
& SerialSignal_RI
)
1323 strcat(stat_buf
, "|RI");
1325 if (info
->params
.mode
!= MGSL_MODE_ASYNC
) {
1326 ret
+= sprintf(buf
+ret
, "\tHDLC txok:%d rxok:%d",
1327 info
->icount
.txok
, info
->icount
.rxok
);
1328 if (info
->icount
.txunder
)
1329 ret
+= sprintf(buf
+ret
, " txunder:%d", info
->icount
.txunder
);
1330 if (info
->icount
.txabort
)
1331 ret
+= sprintf(buf
+ret
, " txabort:%d", info
->icount
.txabort
);
1332 if (info
->icount
.rxshort
)
1333 ret
+= sprintf(buf
+ret
, " rxshort:%d", info
->icount
.rxshort
);
1334 if (info
->icount
.rxlong
)
1335 ret
+= sprintf(buf
+ret
, " rxlong:%d", info
->icount
.rxlong
);
1336 if (info
->icount
.rxover
)
1337 ret
+= sprintf(buf
+ret
, " rxover:%d", info
->icount
.rxover
);
1338 if (info
->icount
.rxcrc
)
1339 ret
+= sprintf(buf
+ret
, " rxcrc:%d", info
->icount
.rxcrc
);
1341 ret
+= sprintf(buf
+ret
, "\tASYNC tx:%d rx:%d",
1342 info
->icount
.tx
, info
->icount
.rx
);
1343 if (info
->icount
.frame
)
1344 ret
+= sprintf(buf
+ret
, " fe:%d", info
->icount
.frame
);
1345 if (info
->icount
.parity
)
1346 ret
+= sprintf(buf
+ret
, " pe:%d", info
->icount
.parity
);
1347 if (info
->icount
.brk
)
1348 ret
+= sprintf(buf
+ret
, " brk:%d", info
->icount
.brk
);
1349 if (info
->icount
.overrun
)
1350 ret
+= sprintf(buf
+ret
, " oe:%d", info
->icount
.overrun
);
1353 /* Append serial signal status to end */
1354 ret
+= sprintf(buf
+ret
, " %s\n", stat_buf
+1);
1356 ret
+= sprintf(buf
+ret
, "\ttxactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
1357 info
->tx_active
,info
->bh_requested
,info
->bh_running
,
1363 /* Called to print information about devices
1365 static int read_proc(char *page
, char **start
, off_t off
, int count
,
1366 int *eof
, void *data
)
1370 struct slgt_info
*info
;
1372 len
+= sprintf(page
, "synclink_gt driver:%s\n", driver_version
);
1374 info
= slgt_device_list
;
1376 l
= line_info(page
+ len
, info
);
1378 if (len
+begin
> off
+count
)
1380 if (len
+begin
< off
) {
1384 info
= info
->next_device
;
1389 if (off
>= len
+begin
)
1391 *start
= page
+ (off
-begin
);
1392 return ((count
< begin
+len
-off
) ? count
: begin
+len
-off
);
1396 * return count of bytes in transmit buffer
1398 static int chars_in_buffer(struct tty_struct
*tty
)
1400 struct slgt_info
*info
= tty
->driver_data
;
1401 if (sanity_check(info
, tty
->name
, "chars_in_buffer"))
1403 DBGINFO(("%s chars_in_buffer()=%d\n", info
->device_name
, info
->tx_count
));
1404 return info
->tx_count
;
1408 * signal remote device to throttle send data (our receive data)
1410 static void throttle(struct tty_struct
* tty
)
1412 struct slgt_info
*info
= tty
->driver_data
;
1413 unsigned long flags
;
1415 if (sanity_check(info
, tty
->name
, "throttle"))
1417 DBGINFO(("%s throttle\n", info
->device_name
));
1419 send_xchar(tty
, STOP_CHAR(tty
));
1420 if (tty
->termios
->c_cflag
& CRTSCTS
) {
1421 spin_lock_irqsave(&info
->lock
,flags
);
1422 info
->signals
&= ~SerialSignal_RTS
;
1424 spin_unlock_irqrestore(&info
->lock
,flags
);
1429 * signal remote device to stop throttling send data (our receive data)
1431 static void unthrottle(struct tty_struct
* tty
)
1433 struct slgt_info
*info
= tty
->driver_data
;
1434 unsigned long flags
;
1436 if (sanity_check(info
, tty
->name
, "unthrottle"))
1438 DBGINFO(("%s unthrottle\n", info
->device_name
));
1443 send_xchar(tty
, START_CHAR(tty
));
1445 if (tty
->termios
->c_cflag
& CRTSCTS
) {
1446 spin_lock_irqsave(&info
->lock
,flags
);
1447 info
->signals
|= SerialSignal_RTS
;
1449 spin_unlock_irqrestore(&info
->lock
,flags
);
1454 * set or clear transmit break condition
1455 * break_state -1=set break condition, 0=clear
1457 static void set_break(struct tty_struct
*tty
, int break_state
)
1459 struct slgt_info
*info
= tty
->driver_data
;
1460 unsigned short value
;
1461 unsigned long flags
;
1463 if (sanity_check(info
, tty
->name
, "set_break"))
1465 DBGINFO(("%s set_break(%d)\n", info
->device_name
, break_state
));
1467 spin_lock_irqsave(&info
->lock
,flags
);
1468 value
= rd_reg16(info
, TCR
);
1469 if (break_state
== -1)
1473 wr_reg16(info
, TCR
, value
);
1474 spin_unlock_irqrestore(&info
->lock
,flags
);
1477 #if SYNCLINK_GENERIC_HDLC
1480 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
1481 * set encoding and frame check sequence (FCS) options
1483 * dev pointer to network device structure
1484 * encoding serial encoding setting
1485 * parity FCS setting
1487 * returns 0 if success, otherwise error code
1489 static int hdlcdev_attach(struct net_device
*dev
, unsigned short encoding
,
1490 unsigned short parity
)
1492 struct slgt_info
*info
= dev_to_port(dev
);
1493 unsigned char new_encoding
;
1494 unsigned short new_crctype
;
1496 /* return error if TTY interface open */
1500 DBGINFO(("%s hdlcdev_attach\n", info
->device_name
));
1504 case ENCODING_NRZ
: new_encoding
= HDLC_ENCODING_NRZ
; break;
1505 case ENCODING_NRZI
: new_encoding
= HDLC_ENCODING_NRZI_SPACE
; break;
1506 case ENCODING_FM_MARK
: new_encoding
= HDLC_ENCODING_BIPHASE_MARK
; break;
1507 case ENCODING_FM_SPACE
: new_encoding
= HDLC_ENCODING_BIPHASE_SPACE
; break;
1508 case ENCODING_MANCHESTER
: new_encoding
= HDLC_ENCODING_BIPHASE_LEVEL
; break;
1509 default: return -EINVAL
;
1514 case PARITY_NONE
: new_crctype
= HDLC_CRC_NONE
; break;
1515 case PARITY_CRC16_PR1_CCITT
: new_crctype
= HDLC_CRC_16_CCITT
; break;
1516 case PARITY_CRC32_PR1_CCITT
: new_crctype
= HDLC_CRC_32_CCITT
; break;
1517 default: return -EINVAL
;
1520 info
->params
.encoding
= new_encoding
;
1521 info
->params
.crc_type
= new_crctype
;
1523 /* if network interface up, reprogram hardware */
1531 * called by generic HDLC layer to send frame
1533 * skb socket buffer containing HDLC frame
1534 * dev pointer to network device structure
1536 * returns 0 if success, otherwise error code
1538 static int hdlcdev_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1540 struct slgt_info
*info
= dev_to_port(dev
);
1541 struct net_device_stats
*stats
= hdlc_stats(dev
);
1542 unsigned long flags
;
1544 DBGINFO(("%s hdlc_xmit\n", dev
->name
));
1546 /* stop sending until this frame completes */
1547 netif_stop_queue(dev
);
1549 /* copy data to device buffers */
1550 info
->tx_count
= skb
->len
;
1551 tx_load(info
, skb
->data
, skb
->len
);
1553 /* update network statistics */
1554 stats
->tx_packets
++;
1555 stats
->tx_bytes
+= skb
->len
;
1557 /* done with socket buffer, so free it */
1560 /* save start time for transmit timeout detection */
1561 dev
->trans_start
= jiffies
;
1563 /* start hardware transmitter if necessary */
1564 spin_lock_irqsave(&info
->lock
,flags
);
1565 if (!info
->tx_active
)
1567 spin_unlock_irqrestore(&info
->lock
,flags
);
1573 * called by network layer when interface enabled
1574 * claim resources and initialize hardware
1576 * dev pointer to network device structure
1578 * returns 0 if success, otherwise error code
1580 static int hdlcdev_open(struct net_device
*dev
)
1582 struct slgt_info
*info
= dev_to_port(dev
);
1584 unsigned long flags
;
1586 if (!try_module_get(THIS_MODULE
))
1589 DBGINFO(("%s hdlcdev_open\n", dev
->name
));
1591 /* generic HDLC layer open processing */
1592 if ((rc
= hdlc_open(dev
)))
1595 /* arbitrate between network and tty opens */
1596 spin_lock_irqsave(&info
->netlock
, flags
);
1597 if (info
->count
!= 0 || info
->netcount
!= 0) {
1598 DBGINFO(("%s hdlc_open busy\n", dev
->name
));
1599 spin_unlock_irqrestore(&info
->netlock
, flags
);
1603 spin_unlock_irqrestore(&info
->netlock
, flags
);
1605 /* claim resources and init adapter */
1606 if ((rc
= startup(info
)) != 0) {
1607 spin_lock_irqsave(&info
->netlock
, flags
);
1609 spin_unlock_irqrestore(&info
->netlock
, flags
);
1613 /* assert DTR and RTS, apply hardware settings */
1614 info
->signals
|= SerialSignal_RTS
+ SerialSignal_DTR
;
1617 /* enable network layer transmit */
1618 dev
->trans_start
= jiffies
;
1619 netif_start_queue(dev
);
1621 /* inform generic HDLC layer of current DCD status */
1622 spin_lock_irqsave(&info
->lock
, flags
);
1624 spin_unlock_irqrestore(&info
->lock
, flags
);
1625 if (info
->signals
& SerialSignal_DCD
)
1626 netif_carrier_on(dev
);
1628 netif_carrier_off(dev
);
1633 * called by network layer when interface is disabled
1634 * shutdown hardware and release resources
1636 * dev pointer to network device structure
1638 * returns 0 if success, otherwise error code
1640 static int hdlcdev_close(struct net_device
*dev
)
1642 struct slgt_info
*info
= dev_to_port(dev
);
1643 unsigned long flags
;
1645 DBGINFO(("%s hdlcdev_close\n", dev
->name
));
1647 netif_stop_queue(dev
);
1649 /* shutdown adapter and release resources */
1654 spin_lock_irqsave(&info
->netlock
, flags
);
1656 spin_unlock_irqrestore(&info
->netlock
, flags
);
1658 module_put(THIS_MODULE
);
1663 * called by network layer to process IOCTL call to network device
1665 * dev pointer to network device structure
1666 * ifr pointer to network interface request structure
1667 * cmd IOCTL command code
1669 * returns 0 if success, otherwise error code
1671 static int hdlcdev_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
1673 const size_t size
= sizeof(sync_serial_settings
);
1674 sync_serial_settings new_line
;
1675 sync_serial_settings __user
*line
= ifr
->ifr_settings
.ifs_ifsu
.sync
;
1676 struct slgt_info
*info
= dev_to_port(dev
);
1679 DBGINFO(("%s hdlcdev_ioctl\n", dev
->name
));
1681 /* return error if TTY interface open */
1685 if (cmd
!= SIOCWANDEV
)
1686 return hdlc_ioctl(dev
, ifr
, cmd
);
1688 switch(ifr
->ifr_settings
.type
) {
1689 case IF_GET_IFACE
: /* return current sync_serial_settings */
1691 ifr
->ifr_settings
.type
= IF_IFACE_SYNC_SERIAL
;
1692 if (ifr
->ifr_settings
.size
< size
) {
1693 ifr
->ifr_settings
.size
= size
; /* data size wanted */
1697 flags
= info
->params
.flags
& (HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_RXC_DPLL
|
1698 HDLC_FLAG_RXC_BRG
| HDLC_FLAG_RXC_TXCPIN
|
1699 HDLC_FLAG_TXC_TXCPIN
| HDLC_FLAG_TXC_DPLL
|
1700 HDLC_FLAG_TXC_BRG
| HDLC_FLAG_TXC_RXCPIN
);
1703 case (HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_TXCPIN
): new_line
.clock_type
= CLOCK_EXT
; break;
1704 case (HDLC_FLAG_RXC_BRG
| HDLC_FLAG_TXC_BRG
): new_line
.clock_type
= CLOCK_INT
; break;
1705 case (HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_BRG
): new_line
.clock_type
= CLOCK_TXINT
; break;
1706 case (HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_RXCPIN
): new_line
.clock_type
= CLOCK_TXFROMRX
; break;
1707 default: new_line
.clock_type
= CLOCK_DEFAULT
;
1710 new_line
.clock_rate
= info
->params
.clock_speed
;
1711 new_line
.loopback
= info
->params
.loopback
? 1:0;
1713 if (copy_to_user(line
, &new_line
, size
))
1717 case IF_IFACE_SYNC_SERIAL
: /* set sync_serial_settings */
1719 if(!capable(CAP_NET_ADMIN
))
1721 if (copy_from_user(&new_line
, line
, size
))
1724 switch (new_line
.clock_type
)
1726 case CLOCK_EXT
: flags
= HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_TXCPIN
; break;
1727 case CLOCK_TXFROMRX
: flags
= HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_RXCPIN
; break;
1728 case CLOCK_INT
: flags
= HDLC_FLAG_RXC_BRG
| HDLC_FLAG_TXC_BRG
; break;
1729 case CLOCK_TXINT
: flags
= HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_BRG
; break;
1730 case CLOCK_DEFAULT
: flags
= info
->params
.flags
&
1731 (HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_RXC_DPLL
|
1732 HDLC_FLAG_RXC_BRG
| HDLC_FLAG_RXC_TXCPIN
|
1733 HDLC_FLAG_TXC_TXCPIN
| HDLC_FLAG_TXC_DPLL
|
1734 HDLC_FLAG_TXC_BRG
| HDLC_FLAG_TXC_RXCPIN
); break;
1735 default: return -EINVAL
;
1738 if (new_line
.loopback
!= 0 && new_line
.loopback
!= 1)
1741 info
->params
.flags
&= ~(HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_RXC_DPLL
|
1742 HDLC_FLAG_RXC_BRG
| HDLC_FLAG_RXC_TXCPIN
|
1743 HDLC_FLAG_TXC_TXCPIN
| HDLC_FLAG_TXC_DPLL
|
1744 HDLC_FLAG_TXC_BRG
| HDLC_FLAG_TXC_RXCPIN
);
1745 info
->params
.flags
|= flags
;
1747 info
->params
.loopback
= new_line
.loopback
;
1749 if (flags
& (HDLC_FLAG_RXC_BRG
| HDLC_FLAG_TXC_BRG
))
1750 info
->params
.clock_speed
= new_line
.clock_rate
;
1752 info
->params
.clock_speed
= 0;
1754 /* if network interface up, reprogram hardware */
1760 return hdlc_ioctl(dev
, ifr
, cmd
);
1765 * called by network layer when transmit timeout is detected
1767 * dev pointer to network device structure
1769 static void hdlcdev_tx_timeout(struct net_device
*dev
)
1771 struct slgt_info
*info
= dev_to_port(dev
);
1772 struct net_device_stats
*stats
= hdlc_stats(dev
);
1773 unsigned long flags
;
1775 DBGINFO(("%s hdlcdev_tx_timeout\n", dev
->name
));
1778 stats
->tx_aborted_errors
++;
1780 spin_lock_irqsave(&info
->lock
,flags
);
1782 spin_unlock_irqrestore(&info
->lock
,flags
);
1784 netif_wake_queue(dev
);
1788 * called by device driver when transmit completes
1789 * reenable network layer transmit if stopped
1791 * info pointer to device instance information
1793 static void hdlcdev_tx_done(struct slgt_info
*info
)
1795 if (netif_queue_stopped(info
->netdev
))
1796 netif_wake_queue(info
->netdev
);
1800 * called by device driver when frame received
1801 * pass frame to network layer
1803 * info pointer to device instance information
1804 * buf pointer to buffer contianing frame data
1805 * size count of data bytes in buf
1807 static void hdlcdev_rx(struct slgt_info
*info
, char *buf
, int size
)
1809 struct sk_buff
*skb
= dev_alloc_skb(size
);
1810 struct net_device
*dev
= info
->netdev
;
1811 struct net_device_stats
*stats
= hdlc_stats(dev
);
1813 DBGINFO(("%s hdlcdev_rx\n", dev
->name
));
1816 DBGERR(("%s: can't alloc skb, drop packet\n", dev
->name
));
1817 stats
->rx_dropped
++;
1821 memcpy(skb_put(skb
, size
),buf
,size
);
1823 skb
->protocol
= hdlc_type_trans(skb
, info
->netdev
);
1825 stats
->rx_packets
++;
1826 stats
->rx_bytes
+= size
;
1830 info
->netdev
->last_rx
= jiffies
;
1834 * called by device driver when adding device instance
1835 * do generic HDLC initialization
1837 * info pointer to device instance information
1839 * returns 0 if success, otherwise error code
1841 static int hdlcdev_init(struct slgt_info
*info
)
1844 struct net_device
*dev
;
1847 /* allocate and initialize network and HDLC layer objects */
1849 if (!(dev
= alloc_hdlcdev(info
))) {
1850 printk(KERN_ERR
"%s hdlc device alloc failure\n", info
->device_name
);
1854 /* for network layer reporting purposes only */
1855 dev
->mem_start
= info
->phys_reg_addr
;
1856 dev
->mem_end
= info
->phys_reg_addr
+ SLGT_REG_SIZE
- 1;
1857 dev
->irq
= info
->irq_level
;
1859 /* network layer callbacks and settings */
1860 dev
->do_ioctl
= hdlcdev_ioctl
;
1861 dev
->open
= hdlcdev_open
;
1862 dev
->stop
= hdlcdev_close
;
1863 dev
->tx_timeout
= hdlcdev_tx_timeout
;
1864 dev
->watchdog_timeo
= 10*HZ
;
1865 dev
->tx_queue_len
= 50;
1867 /* generic HDLC layer callbacks and settings */
1868 hdlc
= dev_to_hdlc(dev
);
1869 hdlc
->attach
= hdlcdev_attach
;
1870 hdlc
->xmit
= hdlcdev_xmit
;
1872 /* register objects with HDLC layer */
1873 if ((rc
= register_hdlc_device(dev
))) {
1874 printk(KERN_WARNING
"%s:unable to register hdlc device\n",__FILE__
);
1884 * called by device driver when removing device instance
1885 * do generic HDLC cleanup
1887 * info pointer to device instance information
1889 static void hdlcdev_exit(struct slgt_info
*info
)
1891 unregister_hdlc_device(info
->netdev
);
1892 free_netdev(info
->netdev
);
1893 info
->netdev
= NULL
;
1896 #endif /* ifdef CONFIG_HDLC */
1899 * get async data from rx DMA buffers
1901 static void rx_async(struct slgt_info
*info
)
1903 struct tty_struct
*tty
= info
->tty
;
1904 struct mgsl_icount
*icount
= &info
->icount
;
1905 unsigned int start
, end
;
1907 unsigned char status
;
1908 struct slgt_desc
*bufs
= info
->rbufs
;
1914 start
= end
= info
->rbuf_current
;
1916 while(desc_complete(bufs
[end
])) {
1917 count
= desc_count(bufs
[end
]) - info
->rbuf_index
;
1918 p
= bufs
[end
].buf
+ info
->rbuf_index
;
1920 DBGISR(("%s rx_async count=%d\n", info
->device_name
, count
));
1921 DBGDATA(info
, p
, count
, "rx");
1923 for(i
=0 ; i
< count
; i
+=2, p
+=2) {
1929 if ((status
= *(p
+1) & (BIT1
+ BIT0
))) {
1932 else if (status
& BIT0
)
1934 /* discard char if tty control flags say so */
1935 if (status
& info
->ignore_status_mask
)
1939 else if (status
& BIT0
)
1943 tty_insert_flip_char(tty
, ch
, stat
);
1949 /* receive buffer not completed */
1950 info
->rbuf_index
+= i
;
1951 mod_timer(&info
->rx_timer
, jiffies
+ 1);
1955 info
->rbuf_index
= 0;
1956 free_rbufs(info
, end
, end
);
1958 if (++end
== info
->rbuf_count
)
1961 /* if entire list searched then no frame available */
1967 tty_flip_buffer_push(tty
);
1971 * return next bottom half action to perform
1973 static int bh_action(struct slgt_info
*info
)
1975 unsigned long flags
;
1978 spin_lock_irqsave(&info
->lock
,flags
);
1980 if (info
->pending_bh
& BH_RECEIVE
) {
1981 info
->pending_bh
&= ~BH_RECEIVE
;
1983 } else if (info
->pending_bh
& BH_TRANSMIT
) {
1984 info
->pending_bh
&= ~BH_TRANSMIT
;
1986 } else if (info
->pending_bh
& BH_STATUS
) {
1987 info
->pending_bh
&= ~BH_STATUS
;
1990 /* Mark BH routine as complete */
1991 info
->bh_running
= false;
1992 info
->bh_requested
= false;
1996 spin_unlock_irqrestore(&info
->lock
,flags
);
2002 * perform bottom half processing
2004 static void bh_handler(struct work_struct
*work
)
2006 struct slgt_info
*info
= container_of(work
, struct slgt_info
, task
);
2011 info
->bh_running
= true;
2013 while((action
= bh_action(info
))) {
2016 DBGBH(("%s bh receive\n", info
->device_name
));
2017 switch(info
->params
.mode
) {
2018 case MGSL_MODE_ASYNC
:
2021 case MGSL_MODE_HDLC
:
2022 while(rx_get_frame(info
));
2025 case MGSL_MODE_MONOSYNC
:
2026 case MGSL_MODE_BISYNC
:
2027 while(rx_get_buf(info
));
2030 /* restart receiver if rx DMA buffers exhausted */
2031 if (info
->rx_restart
)
2038 DBGBH(("%s bh status\n", info
->device_name
));
2039 info
->ri_chkcount
= 0;
2040 info
->dsr_chkcount
= 0;
2041 info
->dcd_chkcount
= 0;
2042 info
->cts_chkcount
= 0;
2045 DBGBH(("%s unknown action\n", info
->device_name
));
2049 DBGBH(("%s bh_handler exit\n", info
->device_name
));
2052 static void bh_transmit(struct slgt_info
*info
)
2054 struct tty_struct
*tty
= info
->tty
;
2056 DBGBH(("%s bh_transmit\n", info
->device_name
));
2061 static void dsr_change(struct slgt_info
*info
, unsigned short status
)
2063 if (status
& BIT3
) {
2064 info
->signals
|= SerialSignal_DSR
;
2065 info
->input_signal_events
.dsr_up
++;
2067 info
->signals
&= ~SerialSignal_DSR
;
2068 info
->input_signal_events
.dsr_down
++;
2070 DBGISR(("dsr_change %s signals=%04X\n", info
->device_name
, info
->signals
));
2071 if ((info
->dsr_chkcount
)++ == IO_PIN_SHUTDOWN_LIMIT
) {
2072 slgt_irq_off(info
, IRQ_DSR
);
2076 wake_up_interruptible(&info
->status_event_wait_q
);
2077 wake_up_interruptible(&info
->event_wait_q
);
2078 info
->pending_bh
|= BH_STATUS
;
2081 static void cts_change(struct slgt_info
*info
, unsigned short status
)
2083 if (status
& BIT2
) {
2084 info
->signals
|= SerialSignal_CTS
;
2085 info
->input_signal_events
.cts_up
++;
2087 info
->signals
&= ~SerialSignal_CTS
;
2088 info
->input_signal_events
.cts_down
++;
2090 DBGISR(("cts_change %s signals=%04X\n", info
->device_name
, info
->signals
));
2091 if ((info
->cts_chkcount
)++ == IO_PIN_SHUTDOWN_LIMIT
) {
2092 slgt_irq_off(info
, IRQ_CTS
);
2096 wake_up_interruptible(&info
->status_event_wait_q
);
2097 wake_up_interruptible(&info
->event_wait_q
);
2098 info
->pending_bh
|= BH_STATUS
;
2100 if (info
->flags
& ASYNC_CTS_FLOW
) {
2102 if (info
->tty
->hw_stopped
) {
2103 if (info
->signals
& SerialSignal_CTS
) {
2104 info
->tty
->hw_stopped
= 0;
2105 info
->pending_bh
|= BH_TRANSMIT
;
2109 if (!(info
->signals
& SerialSignal_CTS
))
2110 info
->tty
->hw_stopped
= 1;
2116 static void dcd_change(struct slgt_info
*info
, unsigned short status
)
2118 if (status
& BIT1
) {
2119 info
->signals
|= SerialSignal_DCD
;
2120 info
->input_signal_events
.dcd_up
++;
2122 info
->signals
&= ~SerialSignal_DCD
;
2123 info
->input_signal_events
.dcd_down
++;
2125 DBGISR(("dcd_change %s signals=%04X\n", info
->device_name
, info
->signals
));
2126 if ((info
->dcd_chkcount
)++ == IO_PIN_SHUTDOWN_LIMIT
) {
2127 slgt_irq_off(info
, IRQ_DCD
);
2131 #if SYNCLINK_GENERIC_HDLC
2132 if (info
->netcount
) {
2133 if (info
->signals
& SerialSignal_DCD
)
2134 netif_carrier_on(info
->netdev
);
2136 netif_carrier_off(info
->netdev
);
2139 wake_up_interruptible(&info
->status_event_wait_q
);
2140 wake_up_interruptible(&info
->event_wait_q
);
2141 info
->pending_bh
|= BH_STATUS
;
2143 if (info
->flags
& ASYNC_CHECK_CD
) {
2144 if (info
->signals
& SerialSignal_DCD
)
2145 wake_up_interruptible(&info
->open_wait
);
2148 tty_hangup(info
->tty
);
2153 static void ri_change(struct slgt_info
*info
, unsigned short status
)
2155 if (status
& BIT0
) {
2156 info
->signals
|= SerialSignal_RI
;
2157 info
->input_signal_events
.ri_up
++;
2159 info
->signals
&= ~SerialSignal_RI
;
2160 info
->input_signal_events
.ri_down
++;
2162 DBGISR(("ri_change %s signals=%04X\n", info
->device_name
, info
->signals
));
2163 if ((info
->ri_chkcount
)++ == IO_PIN_SHUTDOWN_LIMIT
) {
2164 slgt_irq_off(info
, IRQ_RI
);
2168 wake_up_interruptible(&info
->status_event_wait_q
);
2169 wake_up_interruptible(&info
->event_wait_q
);
2170 info
->pending_bh
|= BH_STATUS
;
2173 static void isr_serial(struct slgt_info
*info
)
2175 unsigned short status
= rd_reg16(info
, SSR
);
2177 DBGISR(("%s isr_serial status=%04X\n", info
->device_name
, status
));
2179 wr_reg16(info
, SSR
, status
); /* clear pending */
2181 info
->irq_occurred
= true;
2183 if (info
->params
.mode
== MGSL_MODE_ASYNC
) {
2184 if (status
& IRQ_TXIDLE
) {
2186 isr_txeom(info
, status
);
2188 if ((status
& IRQ_RXBREAK
) && (status
& RXBREAK
)) {
2190 /* process break detection if tty control allows */
2192 if (!(status
& info
->ignore_status_mask
)) {
2193 if (info
->read_status_mask
& MASK_BREAK
) {
2194 tty_insert_flip_char(info
->tty
, 0, TTY_BREAK
);
2195 if (info
->flags
& ASYNC_SAK
)
2202 if (status
& (IRQ_TXIDLE
+ IRQ_TXUNDER
))
2203 isr_txeom(info
, status
);
2205 if (status
& IRQ_RXIDLE
) {
2206 if (status
& RXIDLE
)
2207 info
->icount
.rxidle
++;
2209 info
->icount
.exithunt
++;
2210 wake_up_interruptible(&info
->event_wait_q
);
2213 if (status
& IRQ_RXOVER
)
2217 if (status
& IRQ_DSR
)
2218 dsr_change(info
, status
);
2219 if (status
& IRQ_CTS
)
2220 cts_change(info
, status
);
2221 if (status
& IRQ_DCD
)
2222 dcd_change(info
, status
);
2223 if (status
& IRQ_RI
)
2224 ri_change(info
, status
);
2227 static void isr_rdma(struct slgt_info
*info
)
2229 unsigned int status
= rd_reg32(info
, RDCSR
);
2231 DBGISR(("%s isr_rdma status=%08x\n", info
->device_name
, status
));
2233 /* RDCSR (rx DMA control/status)
2236 * 06 save status byte to DMA buffer
2238 * 04 eol (end of list)
2239 * 03 eob (end of buffer)
2244 wr_reg32(info
, RDCSR
, status
); /* clear pending */
2246 if (status
& (BIT5
+ BIT4
)) {
2247 DBGISR(("%s isr_rdma rx_restart=1\n", info
->device_name
));
2248 info
->rx_restart
= true;
2250 info
->pending_bh
|= BH_RECEIVE
;
2253 static void isr_tdma(struct slgt_info
*info
)
2255 unsigned int status
= rd_reg32(info
, TDCSR
);
2257 DBGISR(("%s isr_tdma status=%08x\n", info
->device_name
, status
));
2259 /* TDCSR (tx DMA control/status)
2263 * 04 eol (end of list)
2264 * 03 eob (end of buffer)
2269 wr_reg32(info
, TDCSR
, status
); /* clear pending */
2271 if (status
& (BIT5
+ BIT4
+ BIT3
)) {
2272 // another transmit buffer has completed
2273 // run bottom half to get more send data from user
2274 info
->pending_bh
|= BH_TRANSMIT
;
2278 static void isr_txeom(struct slgt_info
*info
, unsigned short status
)
2280 DBGISR(("%s txeom status=%04x\n", info
->device_name
, status
));
2282 slgt_irq_off(info
, IRQ_TXDATA
+ IRQ_TXIDLE
+ IRQ_TXUNDER
);
2285 if (status
& IRQ_TXUNDER
) {
2286 unsigned short val
= rd_reg16(info
, TCR
);
2287 wr_reg16(info
, TCR
, (unsigned short)(val
| BIT2
)); /* set reset bit */
2288 wr_reg16(info
, TCR
, val
); /* clear reset bit */
2291 if (info
->tx_active
) {
2292 if (info
->params
.mode
!= MGSL_MODE_ASYNC
) {
2293 if (status
& IRQ_TXUNDER
)
2294 info
->icount
.txunder
++;
2295 else if (status
& IRQ_TXIDLE
)
2296 info
->icount
.txok
++;
2299 info
->tx_active
= false;
2302 del_timer(&info
->tx_timer
);
2304 if (info
->params
.mode
!= MGSL_MODE_ASYNC
&& info
->drop_rts_on_tx_done
) {
2305 info
->signals
&= ~SerialSignal_RTS
;
2306 info
->drop_rts_on_tx_done
= false;
2310 #if SYNCLINK_GENERIC_HDLC
2312 hdlcdev_tx_done(info
);
2316 if (info
->tty
&& (info
->tty
->stopped
|| info
->tty
->hw_stopped
)) {
2320 info
->pending_bh
|= BH_TRANSMIT
;
2325 static void isr_gpio(struct slgt_info
*info
, unsigned int changed
, unsigned int state
)
2327 struct cond_wait
*w
, *prev
;
2329 /* wake processes waiting for specific transitions */
2330 for (w
= info
->gpio_wait_q
, prev
= NULL
; w
!= NULL
; w
= w
->next
) {
2331 if (w
->data
& changed
) {
2333 wake_up_interruptible(&w
->q
);
2335 prev
->next
= w
->next
;
2337 info
->gpio_wait_q
= w
->next
;
2343 /* interrupt service routine
2345 * irq interrupt number
2346 * dev_id device ID supplied during interrupt registration
2348 static irqreturn_t
slgt_interrupt(int dummy
, void *dev_id
)
2350 struct slgt_info
*info
= dev_id
;
2354 DBGISR(("slgt_interrupt irq=%d entry\n", info
->irq_level
));
2356 spin_lock(&info
->lock
);
2358 while((gsr
= rd_reg32(info
, GSR
) & 0xffffff00)) {
2359 DBGISR(("%s gsr=%08x\n", info
->device_name
, gsr
));
2360 info
->irq_occurred
= true;
2361 for(i
=0; i
< info
->port_count
; i
++) {
2362 if (info
->port_array
[i
] == NULL
)
2364 if (gsr
& (BIT8
<< i
))
2365 isr_serial(info
->port_array
[i
]);
2366 if (gsr
& (BIT16
<< (i
*2)))
2367 isr_rdma(info
->port_array
[i
]);
2368 if (gsr
& (BIT17
<< (i
*2)))
2369 isr_tdma(info
->port_array
[i
]);
2373 if (info
->gpio_present
) {
2375 unsigned int changed
;
2376 while ((changed
= rd_reg32(info
, IOSR
)) != 0) {
2377 DBGISR(("%s iosr=%08x\n", info
->device_name
, changed
));
2378 /* read latched state of GPIO signals */
2379 state
= rd_reg32(info
, IOVR
);
2380 /* clear pending GPIO interrupt bits */
2381 wr_reg32(info
, IOSR
, changed
);
2382 for (i
=0 ; i
< info
->port_count
; i
++) {
2383 if (info
->port_array
[i
] != NULL
)
2384 isr_gpio(info
->port_array
[i
], changed
, state
);
2389 for(i
=0; i
< info
->port_count
; i
++) {
2390 struct slgt_info
*port
= info
->port_array
[i
];
2392 if (port
&& (port
->count
|| port
->netcount
) &&
2393 port
->pending_bh
&& !port
->bh_running
&&
2394 !port
->bh_requested
) {
2395 DBGISR(("%s bh queued\n", port
->device_name
));
2396 schedule_work(&port
->task
);
2397 port
->bh_requested
= true;
2401 spin_unlock(&info
->lock
);
2403 DBGISR(("slgt_interrupt irq=%d exit\n", info
->irq_level
));
2407 static int startup(struct slgt_info
*info
)
2409 DBGINFO(("%s startup\n", info
->device_name
));
2411 if (info
->flags
& ASYNC_INITIALIZED
)
2414 if (!info
->tx_buf
) {
2415 info
->tx_buf
= kmalloc(info
->max_frame_size
, GFP_KERNEL
);
2416 if (!info
->tx_buf
) {
2417 DBGERR(("%s can't allocate tx buffer\n", info
->device_name
));
2422 info
->pending_bh
= 0;
2424 memset(&info
->icount
, 0, sizeof(info
->icount
));
2426 /* program hardware for current parameters */
2427 change_params(info
);
2430 clear_bit(TTY_IO_ERROR
, &info
->tty
->flags
);
2432 info
->flags
|= ASYNC_INITIALIZED
;
2438 * called by close() and hangup() to shutdown hardware
2440 static void shutdown(struct slgt_info
*info
)
2442 unsigned long flags
;
2444 if (!(info
->flags
& ASYNC_INITIALIZED
))
2447 DBGINFO(("%s shutdown\n", info
->device_name
));
2449 /* clear status wait queue because status changes */
2450 /* can't happen after shutting down the hardware */
2451 wake_up_interruptible(&info
->status_event_wait_q
);
2452 wake_up_interruptible(&info
->event_wait_q
);
2454 del_timer_sync(&info
->tx_timer
);
2455 del_timer_sync(&info
->rx_timer
);
2457 kfree(info
->tx_buf
);
2458 info
->tx_buf
= NULL
;
2460 spin_lock_irqsave(&info
->lock
,flags
);
2465 slgt_irq_off(info
, IRQ_ALL
| IRQ_MASTER
);
2467 if (!info
->tty
|| info
->tty
->termios
->c_cflag
& HUPCL
) {
2468 info
->signals
&= ~(SerialSignal_DTR
+ SerialSignal_RTS
);
2472 flush_cond_wait(&info
->gpio_wait_q
);
2474 spin_unlock_irqrestore(&info
->lock
,flags
);
2477 set_bit(TTY_IO_ERROR
, &info
->tty
->flags
);
2479 info
->flags
&= ~ASYNC_INITIALIZED
;
2482 static void program_hw(struct slgt_info
*info
)
2484 unsigned long flags
;
2486 spin_lock_irqsave(&info
->lock
,flags
);
2491 if (info
->params
.mode
!= MGSL_MODE_ASYNC
||
2499 info
->dcd_chkcount
= 0;
2500 info
->cts_chkcount
= 0;
2501 info
->ri_chkcount
= 0;
2502 info
->dsr_chkcount
= 0;
2504 slgt_irq_on(info
, IRQ_DCD
| IRQ_CTS
| IRQ_DSR
);
2507 if (info
->netcount
||
2508 (info
->tty
&& info
->tty
->termios
->c_cflag
& CREAD
))
2511 spin_unlock_irqrestore(&info
->lock
,flags
);
2515 * reconfigure adapter based on new parameters
2517 static void change_params(struct slgt_info
*info
)
2522 if (!info
->tty
|| !info
->tty
->termios
)
2524 DBGINFO(("%s change_params\n", info
->device_name
));
2526 cflag
= info
->tty
->termios
->c_cflag
;
2528 /* if B0 rate (hangup) specified then negate DTR and RTS */
2529 /* otherwise assert DTR and RTS */
2531 info
->signals
|= SerialSignal_RTS
+ SerialSignal_DTR
;
2533 info
->signals
&= ~(SerialSignal_RTS
+ SerialSignal_DTR
);
2535 /* byte size and parity */
2537 switch (cflag
& CSIZE
) {
2538 case CS5
: info
->params
.data_bits
= 5; break;
2539 case CS6
: info
->params
.data_bits
= 6; break;
2540 case CS7
: info
->params
.data_bits
= 7; break;
2541 case CS8
: info
->params
.data_bits
= 8; break;
2542 default: info
->params
.data_bits
= 7; break;
2545 info
->params
.stop_bits
= (cflag
& CSTOPB
) ? 2 : 1;
2548 info
->params
.parity
= (cflag
& PARODD
) ? ASYNC_PARITY_ODD
: ASYNC_PARITY_EVEN
;
2550 info
->params
.parity
= ASYNC_PARITY_NONE
;
2552 /* calculate number of jiffies to transmit a full
2553 * FIFO (32 bytes) at specified data rate
2555 bits_per_char
= info
->params
.data_bits
+
2556 info
->params
.stop_bits
+ 1;
2558 info
->params
.data_rate
= tty_get_baud_rate(info
->tty
);
2560 if (info
->params
.data_rate
) {
2561 info
->timeout
= (32*HZ
*bits_per_char
) /
2562 info
->params
.data_rate
;
2564 info
->timeout
+= HZ
/50; /* Add .02 seconds of slop */
2566 if (cflag
& CRTSCTS
)
2567 info
->flags
|= ASYNC_CTS_FLOW
;
2569 info
->flags
&= ~ASYNC_CTS_FLOW
;
2572 info
->flags
&= ~ASYNC_CHECK_CD
;
2574 info
->flags
|= ASYNC_CHECK_CD
;
2576 /* process tty input control flags */
2578 info
->read_status_mask
= IRQ_RXOVER
;
2579 if (I_INPCK(info
->tty
))
2580 info
->read_status_mask
|= MASK_PARITY
| MASK_FRAMING
;
2581 if (I_BRKINT(info
->tty
) || I_PARMRK(info
->tty
))
2582 info
->read_status_mask
|= MASK_BREAK
;
2583 if (I_IGNPAR(info
->tty
))
2584 info
->ignore_status_mask
|= MASK_PARITY
| MASK_FRAMING
;
2585 if (I_IGNBRK(info
->tty
)) {
2586 info
->ignore_status_mask
|= MASK_BREAK
;
2587 /* If ignoring parity and break indicators, ignore
2588 * overruns too. (For real raw support).
2590 if (I_IGNPAR(info
->tty
))
2591 info
->ignore_status_mask
|= MASK_OVERRUN
;
2597 static int get_stats(struct slgt_info
*info
, struct mgsl_icount __user
*user_icount
)
2599 DBGINFO(("%s get_stats\n", info
->device_name
));
2601 memset(&info
->icount
, 0, sizeof(info
->icount
));
2603 if (copy_to_user(user_icount
, &info
->icount
, sizeof(struct mgsl_icount
)))
2609 static int get_params(struct slgt_info
*info
, MGSL_PARAMS __user
*user_params
)
2611 DBGINFO(("%s get_params\n", info
->device_name
));
2612 if (copy_to_user(user_params
, &info
->params
, sizeof(MGSL_PARAMS
)))
2617 static int set_params(struct slgt_info
*info
, MGSL_PARAMS __user
*new_params
)
2619 unsigned long flags
;
2620 MGSL_PARAMS tmp_params
;
2622 DBGINFO(("%s set_params\n", info
->device_name
));
2623 if (copy_from_user(&tmp_params
, new_params
, sizeof(MGSL_PARAMS
)))
2626 spin_lock_irqsave(&info
->lock
, flags
);
2627 memcpy(&info
->params
, &tmp_params
, sizeof(MGSL_PARAMS
));
2628 spin_unlock_irqrestore(&info
->lock
, flags
);
2630 change_params(info
);
2635 static int get_txidle(struct slgt_info
*info
, int __user
*idle_mode
)
2637 DBGINFO(("%s get_txidle=%d\n", info
->device_name
, info
->idle_mode
));
2638 if (put_user(info
->idle_mode
, idle_mode
))
2643 static int set_txidle(struct slgt_info
*info
, int idle_mode
)
2645 unsigned long flags
;
2646 DBGINFO(("%s set_txidle(%d)\n", info
->device_name
, idle_mode
));
2647 spin_lock_irqsave(&info
->lock
,flags
);
2648 info
->idle_mode
= idle_mode
;
2649 if (info
->params
.mode
!= MGSL_MODE_ASYNC
)
2651 spin_unlock_irqrestore(&info
->lock
,flags
);
2655 static int tx_enable(struct slgt_info
*info
, int enable
)
2657 unsigned long flags
;
2658 DBGINFO(("%s tx_enable(%d)\n", info
->device_name
, enable
));
2659 spin_lock_irqsave(&info
->lock
,flags
);
2661 if (!info
->tx_enabled
)
2664 if (info
->tx_enabled
)
2667 spin_unlock_irqrestore(&info
->lock
,flags
);
2672 * abort transmit HDLC frame
2674 static int tx_abort(struct slgt_info
*info
)
2676 unsigned long flags
;
2677 DBGINFO(("%s tx_abort\n", info
->device_name
));
2678 spin_lock_irqsave(&info
->lock
,flags
);
2680 spin_unlock_irqrestore(&info
->lock
,flags
);
2684 static int rx_enable(struct slgt_info
*info
, int enable
)
2686 unsigned long flags
;
2687 DBGINFO(("%s rx_enable(%d)\n", info
->device_name
, enable
));
2688 spin_lock_irqsave(&info
->lock
,flags
);
2690 if (!info
->rx_enabled
)
2692 else if (enable
== 2) {
2693 /* force hunt mode (write 1 to RCR[3]) */
2694 wr_reg16(info
, RCR
, rd_reg16(info
, RCR
) | BIT3
);
2697 if (info
->rx_enabled
)
2700 spin_unlock_irqrestore(&info
->lock
,flags
);
2705 * wait for specified event to occur
2707 static int wait_mgsl_event(struct slgt_info
*info
, int __user
*mask_ptr
)
2709 unsigned long flags
;
2712 struct mgsl_icount cprev
, cnow
;
2715 struct _input_signal_events oldsigs
, newsigs
;
2716 DECLARE_WAITQUEUE(wait
, current
);
2718 if (get_user(mask
, mask_ptr
))
2721 DBGINFO(("%s wait_mgsl_event(%d)\n", info
->device_name
, mask
));
2723 spin_lock_irqsave(&info
->lock
,flags
);
2725 /* return immediately if state matches requested events */
2730 ( ((s
& SerialSignal_DSR
) ? MgslEvent_DsrActive
:MgslEvent_DsrInactive
) +
2731 ((s
& SerialSignal_DCD
) ? MgslEvent_DcdActive
:MgslEvent_DcdInactive
) +
2732 ((s
& SerialSignal_CTS
) ? MgslEvent_CtsActive
:MgslEvent_CtsInactive
) +
2733 ((s
& SerialSignal_RI
) ? MgslEvent_RiActive
:MgslEvent_RiInactive
) );
2735 spin_unlock_irqrestore(&info
->lock
,flags
);
2739 /* save current irq counts */
2740 cprev
= info
->icount
;
2741 oldsigs
= info
->input_signal_events
;
2743 /* enable hunt and idle irqs if needed */
2744 if (mask
& (MgslEvent_ExitHuntMode
+MgslEvent_IdleReceived
)) {
2745 unsigned short val
= rd_reg16(info
, SCR
);
2746 if (!(val
& IRQ_RXIDLE
))
2747 wr_reg16(info
, SCR
, (unsigned short)(val
| IRQ_RXIDLE
));
2750 set_current_state(TASK_INTERRUPTIBLE
);
2751 add_wait_queue(&info
->event_wait_q
, &wait
);
2753 spin_unlock_irqrestore(&info
->lock
,flags
);
2757 if (signal_pending(current
)) {
2762 /* get current irq counts */
2763 spin_lock_irqsave(&info
->lock
,flags
);
2764 cnow
= info
->icount
;
2765 newsigs
= info
->input_signal_events
;
2766 set_current_state(TASK_INTERRUPTIBLE
);
2767 spin_unlock_irqrestore(&info
->lock
,flags
);
2769 /* if no change, wait aborted for some reason */
2770 if (newsigs
.dsr_up
== oldsigs
.dsr_up
&&
2771 newsigs
.dsr_down
== oldsigs
.dsr_down
&&
2772 newsigs
.dcd_up
== oldsigs
.dcd_up
&&
2773 newsigs
.dcd_down
== oldsigs
.dcd_down
&&
2774 newsigs
.cts_up
== oldsigs
.cts_up
&&
2775 newsigs
.cts_down
== oldsigs
.cts_down
&&
2776 newsigs
.ri_up
== oldsigs
.ri_up
&&
2777 newsigs
.ri_down
== oldsigs
.ri_down
&&
2778 cnow
.exithunt
== cprev
.exithunt
&&
2779 cnow
.rxidle
== cprev
.rxidle
) {
2785 ( (newsigs
.dsr_up
!= oldsigs
.dsr_up
? MgslEvent_DsrActive
:0) +
2786 (newsigs
.dsr_down
!= oldsigs
.dsr_down
? MgslEvent_DsrInactive
:0) +
2787 (newsigs
.dcd_up
!= oldsigs
.dcd_up
? MgslEvent_DcdActive
:0) +
2788 (newsigs
.dcd_down
!= oldsigs
.dcd_down
? MgslEvent_DcdInactive
:0) +
2789 (newsigs
.cts_up
!= oldsigs
.cts_up
? MgslEvent_CtsActive
:0) +
2790 (newsigs
.cts_down
!= oldsigs
.cts_down
? MgslEvent_CtsInactive
:0) +
2791 (newsigs
.ri_up
!= oldsigs
.ri_up
? MgslEvent_RiActive
:0) +
2792 (newsigs
.ri_down
!= oldsigs
.ri_down
? MgslEvent_RiInactive
:0) +
2793 (cnow
.exithunt
!= cprev
.exithunt
? MgslEvent_ExitHuntMode
:0) +
2794 (cnow
.rxidle
!= cprev
.rxidle
? MgslEvent_IdleReceived
:0) );
2802 remove_wait_queue(&info
->event_wait_q
, &wait
);
2803 set_current_state(TASK_RUNNING
);
2806 if (mask
& (MgslEvent_ExitHuntMode
+ MgslEvent_IdleReceived
)) {
2807 spin_lock_irqsave(&info
->lock
,flags
);
2808 if (!waitqueue_active(&info
->event_wait_q
)) {
2809 /* disable enable exit hunt mode/idle rcvd IRQs */
2811 (unsigned short)(rd_reg16(info
, SCR
) & ~IRQ_RXIDLE
));
2813 spin_unlock_irqrestore(&info
->lock
,flags
);
2817 rc
= put_user(events
, mask_ptr
);
2821 static int get_interface(struct slgt_info
*info
, int __user
*if_mode
)
2823 DBGINFO(("%s get_interface=%x\n", info
->device_name
, info
->if_mode
));
2824 if (put_user(info
->if_mode
, if_mode
))
2829 static int set_interface(struct slgt_info
*info
, int if_mode
)
2831 unsigned long flags
;
2834 DBGINFO(("%s set_interface=%x)\n", info
->device_name
, if_mode
));
2835 spin_lock_irqsave(&info
->lock
,flags
);
2836 info
->if_mode
= if_mode
;
2840 /* TCR (tx control) 07 1=RTS driver control */
2841 val
= rd_reg16(info
, TCR
);
2842 if (info
->if_mode
& MGSL_INTERFACE_RTS_EN
)
2846 wr_reg16(info
, TCR
, val
);
2848 spin_unlock_irqrestore(&info
->lock
,flags
);
2853 * set general purpose IO pin state and direction
2856 * state each bit indicates a pin state
2857 * smask set bit indicates pin state to set
2858 * dir each bit indicates a pin direction (0=input, 1=output)
2859 * dmask set bit indicates pin direction to set
2861 static int set_gpio(struct slgt_info
*info
, struct gpio_desc __user
*user_gpio
)
2863 unsigned long flags
;
2864 struct gpio_desc gpio
;
2867 if (!info
->gpio_present
)
2869 if (copy_from_user(&gpio
, user_gpio
, sizeof(gpio
)))
2871 DBGINFO(("%s set_gpio state=%08x smask=%08x dir=%08x dmask=%08x\n",
2872 info
->device_name
, gpio
.state
, gpio
.smask
,
2873 gpio
.dir
, gpio
.dmask
));
2875 spin_lock_irqsave(&info
->lock
,flags
);
2877 data
= rd_reg32(info
, IODR
);
2878 data
|= gpio
.dmask
& gpio
.dir
;
2879 data
&= ~(gpio
.dmask
& ~gpio
.dir
);
2880 wr_reg32(info
, IODR
, data
);
2883 data
= rd_reg32(info
, IOVR
);
2884 data
|= gpio
.smask
& gpio
.state
;
2885 data
&= ~(gpio
.smask
& ~gpio
.state
);
2886 wr_reg32(info
, IOVR
, data
);
2888 spin_unlock_irqrestore(&info
->lock
,flags
);
2894 * get general purpose IO pin state and direction
2896 static int get_gpio(struct slgt_info
*info
, struct gpio_desc __user
*user_gpio
)
2898 struct gpio_desc gpio
;
2899 if (!info
->gpio_present
)
2901 gpio
.state
= rd_reg32(info
, IOVR
);
2902 gpio
.smask
= 0xffffffff;
2903 gpio
.dir
= rd_reg32(info
, IODR
);
2904 gpio
.dmask
= 0xffffffff;
2905 if (copy_to_user(user_gpio
, &gpio
, sizeof(gpio
)))
2907 DBGINFO(("%s get_gpio state=%08x dir=%08x\n",
2908 info
->device_name
, gpio
.state
, gpio
.dir
));
2913 * conditional wait facility
2915 static void init_cond_wait(struct cond_wait
*w
, unsigned int data
)
2917 init_waitqueue_head(&w
->q
);
2918 init_waitqueue_entry(&w
->wait
, current
);
2922 static void add_cond_wait(struct cond_wait
**head
, struct cond_wait
*w
)
2924 set_current_state(TASK_INTERRUPTIBLE
);
2925 add_wait_queue(&w
->q
, &w
->wait
);
2930 static void remove_cond_wait(struct cond_wait
**head
, struct cond_wait
*cw
)
2932 struct cond_wait
*w
, *prev
;
2933 remove_wait_queue(&cw
->q
, &cw
->wait
);
2934 set_current_state(TASK_RUNNING
);
2935 for (w
= *head
, prev
= NULL
; w
!= NULL
; prev
= w
, w
= w
->next
) {
2938 prev
->next
= w
->next
;
2946 static void flush_cond_wait(struct cond_wait
**head
)
2948 while (*head
!= NULL
) {
2949 wake_up_interruptible(&(*head
)->q
);
2950 *head
= (*head
)->next
;
2955 * wait for general purpose I/O pin(s) to enter specified state
2958 * state - bit indicates target pin state
2959 * smask - set bit indicates watched pin
2961 * The wait ends when at least one watched pin enters the specified
2962 * state. When 0 (no error) is returned, user_gpio->state is set to the
2963 * state of all GPIO pins when the wait ends.
2965 * Note: Each pin may be a dedicated input, dedicated output, or
2966 * configurable input/output. The number and configuration of pins
2967 * varies with the specific adapter model. Only input pins (dedicated
2968 * or configured) can be monitored with this function.
2970 static int wait_gpio(struct slgt_info
*info
, struct gpio_desc __user
*user_gpio
)
2972 unsigned long flags
;
2974 struct gpio_desc gpio
;
2975 struct cond_wait wait
;
2978 if (!info
->gpio_present
)
2980 if (copy_from_user(&gpio
, user_gpio
, sizeof(gpio
)))
2982 DBGINFO(("%s wait_gpio() state=%08x smask=%08x\n",
2983 info
->device_name
, gpio
.state
, gpio
.smask
));
2984 /* ignore output pins identified by set IODR bit */
2985 if ((gpio
.smask
&= ~rd_reg32(info
, IODR
)) == 0)
2987 init_cond_wait(&wait
, gpio
.smask
);
2989 spin_lock_irqsave(&info
->lock
, flags
);
2990 /* enable interrupts for watched pins */
2991 wr_reg32(info
, IOER
, rd_reg32(info
, IOER
) | gpio
.smask
);
2992 /* get current pin states */
2993 state
= rd_reg32(info
, IOVR
);
2995 if (gpio
.smask
& ~(state
^ gpio
.state
)) {
2996 /* already in target state */
2999 /* wait for target state */
3000 add_cond_wait(&info
->gpio_wait_q
, &wait
);
3001 spin_unlock_irqrestore(&info
->lock
, flags
);
3003 if (signal_pending(current
))
3006 gpio
.state
= wait
.data
;
3007 spin_lock_irqsave(&info
->lock
, flags
);
3008 remove_cond_wait(&info
->gpio_wait_q
, &wait
);
3011 /* disable all GPIO interrupts if no waiting processes */
3012 if (info
->gpio_wait_q
== NULL
)
3013 wr_reg32(info
, IOER
, 0);
3014 spin_unlock_irqrestore(&info
->lock
,flags
);
3016 if ((rc
== 0) && copy_to_user(user_gpio
, &gpio
, sizeof(gpio
)))
3021 static int modem_input_wait(struct slgt_info
*info
,int arg
)
3023 unsigned long flags
;
3025 struct mgsl_icount cprev
, cnow
;
3026 DECLARE_WAITQUEUE(wait
, current
);
3028 /* save current irq counts */
3029 spin_lock_irqsave(&info
->lock
,flags
);
3030 cprev
= info
->icount
;
3031 add_wait_queue(&info
->status_event_wait_q
, &wait
);
3032 set_current_state(TASK_INTERRUPTIBLE
);
3033 spin_unlock_irqrestore(&info
->lock
,flags
);
3037 if (signal_pending(current
)) {
3042 /* get new irq counts */
3043 spin_lock_irqsave(&info
->lock
,flags
);
3044 cnow
= info
->icount
;
3045 set_current_state(TASK_INTERRUPTIBLE
);
3046 spin_unlock_irqrestore(&info
->lock
,flags
);
3048 /* if no change, wait aborted for some reason */
3049 if (cnow
.rng
== cprev
.rng
&& cnow
.dsr
== cprev
.dsr
&&
3050 cnow
.dcd
== cprev
.dcd
&& cnow
.cts
== cprev
.cts
) {
3055 /* check for change in caller specified modem input */
3056 if ((arg
& TIOCM_RNG
&& cnow
.rng
!= cprev
.rng
) ||
3057 (arg
& TIOCM_DSR
&& cnow
.dsr
!= cprev
.dsr
) ||
3058 (arg
& TIOCM_CD
&& cnow
.dcd
!= cprev
.dcd
) ||
3059 (arg
& TIOCM_CTS
&& cnow
.cts
!= cprev
.cts
)) {
3066 remove_wait_queue(&info
->status_event_wait_q
, &wait
);
3067 set_current_state(TASK_RUNNING
);
3072 * return state of serial control and status signals
3074 static int tiocmget(struct tty_struct
*tty
, struct file
*file
)
3076 struct slgt_info
*info
= tty
->driver_data
;
3077 unsigned int result
;
3078 unsigned long flags
;
3080 spin_lock_irqsave(&info
->lock
,flags
);
3082 spin_unlock_irqrestore(&info
->lock
,flags
);
3084 result
= ((info
->signals
& SerialSignal_RTS
) ? TIOCM_RTS
:0) +
3085 ((info
->signals
& SerialSignal_DTR
) ? TIOCM_DTR
:0) +
3086 ((info
->signals
& SerialSignal_DCD
) ? TIOCM_CAR
:0) +
3087 ((info
->signals
& SerialSignal_RI
) ? TIOCM_RNG
:0) +
3088 ((info
->signals
& SerialSignal_DSR
) ? TIOCM_DSR
:0) +
3089 ((info
->signals
& SerialSignal_CTS
) ? TIOCM_CTS
:0);
3091 DBGINFO(("%s tiocmget value=%08X\n", info
->device_name
, result
));
3096 * set modem control signals (DTR/RTS)
3098 * cmd signal command: TIOCMBIS = set bit TIOCMBIC = clear bit
3099 * TIOCMSET = set/clear signal values
3100 * value bit mask for command
3102 static int tiocmset(struct tty_struct
*tty
, struct file
*file
,
3103 unsigned int set
, unsigned int clear
)
3105 struct slgt_info
*info
= tty
->driver_data
;
3106 unsigned long flags
;
3108 DBGINFO(("%s tiocmset(%x,%x)\n", info
->device_name
, set
, clear
));
3110 if (set
& TIOCM_RTS
)
3111 info
->signals
|= SerialSignal_RTS
;
3112 if (set
& TIOCM_DTR
)
3113 info
->signals
|= SerialSignal_DTR
;
3114 if (clear
& TIOCM_RTS
)
3115 info
->signals
&= ~SerialSignal_RTS
;
3116 if (clear
& TIOCM_DTR
)
3117 info
->signals
&= ~SerialSignal_DTR
;
3119 spin_lock_irqsave(&info
->lock
,flags
);
3121 spin_unlock_irqrestore(&info
->lock
,flags
);
3126 * block current process until the device is ready to open
3128 static int block_til_ready(struct tty_struct
*tty
, struct file
*filp
,
3129 struct slgt_info
*info
)
3131 DECLARE_WAITQUEUE(wait
, current
);
3133 bool do_clocal
= false;
3134 bool extra_count
= false;
3135 unsigned long flags
;
3137 DBGINFO(("%s block_til_ready\n", tty
->driver
->name
));
3139 if (filp
->f_flags
& O_NONBLOCK
|| tty
->flags
& (1 << TTY_IO_ERROR
)){
3140 /* nonblock mode is set or port is not enabled */
3141 info
->flags
|= ASYNC_NORMAL_ACTIVE
;
3145 if (tty
->termios
->c_cflag
& CLOCAL
)
3148 /* Wait for carrier detect and the line to become
3149 * free (i.e., not in use by the callout). While we are in
3150 * this loop, info->count is dropped by one, so that
3151 * close() knows when to free things. We restore it upon
3152 * exit, either normal or abnormal.
3156 add_wait_queue(&info
->open_wait
, &wait
);
3158 spin_lock_irqsave(&info
->lock
, flags
);
3159 if (!tty_hung_up_p(filp
)) {
3163 spin_unlock_irqrestore(&info
->lock
, flags
);
3164 info
->blocked_open
++;
3167 if ((tty
->termios
->c_cflag
& CBAUD
)) {
3168 spin_lock_irqsave(&info
->lock
,flags
);
3169 info
->signals
|= SerialSignal_RTS
+ SerialSignal_DTR
;
3171 spin_unlock_irqrestore(&info
->lock
,flags
);
3174 set_current_state(TASK_INTERRUPTIBLE
);
3176 if (tty_hung_up_p(filp
) || !(info
->flags
& ASYNC_INITIALIZED
)){
3177 retval
= (info
->flags
& ASYNC_HUP_NOTIFY
) ?
3178 -EAGAIN
: -ERESTARTSYS
;
3182 spin_lock_irqsave(&info
->lock
,flags
);
3184 spin_unlock_irqrestore(&info
->lock
,flags
);
3186 if (!(info
->flags
& ASYNC_CLOSING
) &&
3187 (do_clocal
|| (info
->signals
& SerialSignal_DCD
)) ) {
3191 if (signal_pending(current
)) {
3192 retval
= -ERESTARTSYS
;
3196 DBGINFO(("%s block_til_ready wait\n", tty
->driver
->name
));
3200 set_current_state(TASK_RUNNING
);
3201 remove_wait_queue(&info
->open_wait
, &wait
);
3205 info
->blocked_open
--;
3208 info
->flags
|= ASYNC_NORMAL_ACTIVE
;
3210 DBGINFO(("%s block_til_ready ready, rc=%d\n", tty
->driver
->name
, retval
));
3214 static int alloc_tmp_rbuf(struct slgt_info
*info
)
3216 info
->tmp_rbuf
= kmalloc(info
->max_frame_size
+ 5, GFP_KERNEL
);
3217 if (info
->tmp_rbuf
== NULL
)
3222 static void free_tmp_rbuf(struct slgt_info
*info
)
3224 kfree(info
->tmp_rbuf
);
3225 info
->tmp_rbuf
= NULL
;
3229 * allocate DMA descriptor lists.
3231 static int alloc_desc(struct slgt_info
*info
)
3236 /* allocate memory to hold descriptor lists */
3237 info
->bufs
= pci_alloc_consistent(info
->pdev
, DESC_LIST_SIZE
, &info
->bufs_dma_addr
);
3238 if (info
->bufs
== NULL
)
3241 memset(info
->bufs
, 0, DESC_LIST_SIZE
);
3243 info
->rbufs
= (struct slgt_desc
*)info
->bufs
;
3244 info
->tbufs
= ((struct slgt_desc
*)info
->bufs
) + info
->rbuf_count
;
3246 pbufs
= (unsigned int)info
->bufs_dma_addr
;
3249 * Build circular lists of descriptors
3252 for (i
=0; i
< info
->rbuf_count
; i
++) {
3253 /* physical address of this descriptor */
3254 info
->rbufs
[i
].pdesc
= pbufs
+ (i
* sizeof(struct slgt_desc
));
3256 /* physical address of next descriptor */
3257 if (i
== info
->rbuf_count
- 1)
3258 info
->rbufs
[i
].next
= cpu_to_le32(pbufs
);
3260 info
->rbufs
[i
].next
= cpu_to_le32(pbufs
+ ((i
+1) * sizeof(struct slgt_desc
)));
3261 set_desc_count(info
->rbufs
[i
], DMABUFSIZE
);
3264 for (i
=0; i
< info
->tbuf_count
; i
++) {
3265 /* physical address of this descriptor */
3266 info
->tbufs
[i
].pdesc
= pbufs
+ ((info
->rbuf_count
+ i
) * sizeof(struct slgt_desc
));
3268 /* physical address of next descriptor */
3269 if (i
== info
->tbuf_count
- 1)
3270 info
->tbufs
[i
].next
= cpu_to_le32(pbufs
+ info
->rbuf_count
* sizeof(struct slgt_desc
));
3272 info
->tbufs
[i
].next
= cpu_to_le32(pbufs
+ ((info
->rbuf_count
+ i
+ 1) * sizeof(struct slgt_desc
)));
3278 static void free_desc(struct slgt_info
*info
)
3280 if (info
->bufs
!= NULL
) {
3281 pci_free_consistent(info
->pdev
, DESC_LIST_SIZE
, info
->bufs
, info
->bufs_dma_addr
);
3288 static int alloc_bufs(struct slgt_info
*info
, struct slgt_desc
*bufs
, int count
)
3291 for (i
=0; i
< count
; i
++) {
3292 if ((bufs
[i
].buf
= pci_alloc_consistent(info
->pdev
, DMABUFSIZE
, &bufs
[i
].buf_dma_addr
)) == NULL
)
3294 bufs
[i
].pbuf
= cpu_to_le32((unsigned int)bufs
[i
].buf_dma_addr
);
3299 static void free_bufs(struct slgt_info
*info
, struct slgt_desc
*bufs
, int count
)
3302 for (i
=0; i
< count
; i
++) {
3303 if (bufs
[i
].buf
== NULL
)
3305 pci_free_consistent(info
->pdev
, DMABUFSIZE
, bufs
[i
].buf
, bufs
[i
].buf_dma_addr
);
3310 static int alloc_dma_bufs(struct slgt_info
*info
)
3312 info
->rbuf_count
= 32;
3313 info
->tbuf_count
= 32;
3315 if (alloc_desc(info
) < 0 ||
3316 alloc_bufs(info
, info
->rbufs
, info
->rbuf_count
) < 0 ||
3317 alloc_bufs(info
, info
->tbufs
, info
->tbuf_count
) < 0 ||
3318 alloc_tmp_rbuf(info
) < 0) {
3319 DBGERR(("%s DMA buffer alloc fail\n", info
->device_name
));
3326 static void free_dma_bufs(struct slgt_info
*info
)
3329 free_bufs(info
, info
->rbufs
, info
->rbuf_count
);
3330 free_bufs(info
, info
->tbufs
, info
->tbuf_count
);
3333 free_tmp_rbuf(info
);
3336 static int claim_resources(struct slgt_info
*info
)
3338 if (request_mem_region(info
->phys_reg_addr
, SLGT_REG_SIZE
, "synclink_gt") == NULL
) {
3339 DBGERR(("%s reg addr conflict, addr=%08X\n",
3340 info
->device_name
, info
->phys_reg_addr
));
3341 info
->init_error
= DiagStatus_AddressConflict
;
3345 info
->reg_addr_requested
= true;
3347 info
->reg_addr
= ioremap(info
->phys_reg_addr
, SLGT_REG_SIZE
);
3348 if (!info
->reg_addr
) {
3349 DBGERR(("%s cant map device registers, addr=%08X\n",
3350 info
->device_name
, info
->phys_reg_addr
));
3351 info
->init_error
= DiagStatus_CantAssignPciResources
;
3357 release_resources(info
);
3361 static void release_resources(struct slgt_info
*info
)
3363 if (info
->irq_requested
) {
3364 free_irq(info
->irq_level
, info
);
3365 info
->irq_requested
= false;
3368 if (info
->reg_addr_requested
) {
3369 release_mem_region(info
->phys_reg_addr
, SLGT_REG_SIZE
);
3370 info
->reg_addr_requested
= false;
3373 if (info
->reg_addr
) {
3374 iounmap(info
->reg_addr
);
3375 info
->reg_addr
= NULL
;
3379 /* Add the specified device instance data structure to the
3380 * global linked list of devices and increment the device count.
3382 static void add_device(struct slgt_info
*info
)
3386 info
->next_device
= NULL
;
3387 info
->line
= slgt_device_count
;
3388 sprintf(info
->device_name
, "%s%d", tty_dev_prefix
, info
->line
);
3390 if (info
->line
< MAX_DEVICES
) {
3391 if (maxframe
[info
->line
])
3392 info
->max_frame_size
= maxframe
[info
->line
];
3393 info
->dosyncppp
= dosyncppp
[info
->line
];
3396 slgt_device_count
++;
3398 if (!slgt_device_list
)
3399 slgt_device_list
= info
;
3401 struct slgt_info
*current_dev
= slgt_device_list
;
3402 while(current_dev
->next_device
)
3403 current_dev
= current_dev
->next_device
;
3404 current_dev
->next_device
= info
;
3407 if (info
->max_frame_size
< 4096)
3408 info
->max_frame_size
= 4096;
3409 else if (info
->max_frame_size
> 65535)
3410 info
->max_frame_size
= 65535;
3412 switch(info
->pdev
->device
) {
3413 case SYNCLINK_GT_DEVICE_ID
:
3416 case SYNCLINK_GT2_DEVICE_ID
:
3419 case SYNCLINK_GT4_DEVICE_ID
:
3422 case SYNCLINK_AC_DEVICE_ID
:
3424 info
->params
.mode
= MGSL_MODE_ASYNC
;
3427 devstr
= "(unknown model)";
3429 printk("SyncLink %s %s IO=%08x IRQ=%d MaxFrameSize=%u\n",
3430 devstr
, info
->device_name
, info
->phys_reg_addr
,
3431 info
->irq_level
, info
->max_frame_size
);
3433 #if SYNCLINK_GENERIC_HDLC
3439 * allocate device instance structure, return NULL on failure
3441 static struct slgt_info
*alloc_dev(int adapter_num
, int port_num
, struct pci_dev
*pdev
)
3443 struct slgt_info
*info
;
3445 info
= kzalloc(sizeof(struct slgt_info
), GFP_KERNEL
);
3448 DBGERR(("%s device alloc failed adapter=%d port=%d\n",
3449 driver_name
, adapter_num
, port_num
));
3451 info
->magic
= MGSL_MAGIC
;
3452 INIT_WORK(&info
->task
, bh_handler
);
3453 info
->max_frame_size
= 4096;
3454 info
->raw_rx_size
= DMABUFSIZE
;
3455 info
->close_delay
= 5*HZ
/10;
3456 info
->closing_wait
= 30*HZ
;
3457 init_waitqueue_head(&info
->open_wait
);
3458 init_waitqueue_head(&info
->close_wait
);
3459 init_waitqueue_head(&info
->status_event_wait_q
);
3460 init_waitqueue_head(&info
->event_wait_q
);
3461 spin_lock_init(&info
->netlock
);
3462 memcpy(&info
->params
,&default_params
,sizeof(MGSL_PARAMS
));
3463 info
->idle_mode
= HDLC_TXIDLE_FLAGS
;
3464 info
->adapter_num
= adapter_num
;
3465 info
->port_num
= port_num
;
3467 setup_timer(&info
->tx_timer
, tx_timeout
, (unsigned long)info
);
3468 setup_timer(&info
->rx_timer
, rx_timeout
, (unsigned long)info
);
3470 /* Copy configuration info to device instance data */
3472 info
->irq_level
= pdev
->irq
;
3473 info
->phys_reg_addr
= pci_resource_start(pdev
,0);
3475 info
->bus_type
= MGSL_BUS_TYPE_PCI
;
3476 info
->irq_flags
= IRQF_SHARED
;
3478 info
->init_error
= -1; /* assume error, set to 0 on successful init */
3484 static void device_init(int adapter_num
, struct pci_dev
*pdev
)
3486 struct slgt_info
*port_array
[SLGT_MAX_PORTS
];
3490 if (pdev
->device
== SYNCLINK_GT2_DEVICE_ID
)
3492 else if (pdev
->device
== SYNCLINK_GT4_DEVICE_ID
)
3495 /* allocate device instances for all ports */
3496 for (i
=0; i
< port_count
; ++i
) {
3497 port_array
[i
] = alloc_dev(adapter_num
, i
, pdev
);
3498 if (port_array
[i
] == NULL
) {
3499 for (--i
; i
>= 0; --i
)
3500 kfree(port_array
[i
]);
3505 /* give copy of port_array to all ports and add to device list */
3506 for (i
=0; i
< port_count
; ++i
) {
3507 memcpy(port_array
[i
]->port_array
, port_array
, sizeof(port_array
));
3508 add_device(port_array
[i
]);
3509 port_array
[i
]->port_count
= port_count
;
3510 spin_lock_init(&port_array
[i
]->lock
);
3513 /* Allocate and claim adapter resources */
3514 if (!claim_resources(port_array
[0])) {
3516 alloc_dma_bufs(port_array
[0]);
3518 /* copy resource information from first port to others */
3519 for (i
= 1; i
< port_count
; ++i
) {
3520 port_array
[i
]->lock
= port_array
[0]->lock
;
3521 port_array
[i
]->irq_level
= port_array
[0]->irq_level
;
3522 port_array
[i
]->reg_addr
= port_array
[0]->reg_addr
;
3523 alloc_dma_bufs(port_array
[i
]);
3526 if (request_irq(port_array
[0]->irq_level
,
3528 port_array
[0]->irq_flags
,
3529 port_array
[0]->device_name
,
3530 port_array
[0]) < 0) {
3531 DBGERR(("%s request_irq failed IRQ=%d\n",
3532 port_array
[0]->device_name
,
3533 port_array
[0]->irq_level
));
3535 port_array
[0]->irq_requested
= true;
3536 adapter_test(port_array
[0]);
3537 for (i
=1 ; i
< port_count
; i
++) {
3538 port_array
[i
]->init_error
= port_array
[0]->init_error
;
3539 port_array
[i
]->gpio_present
= port_array
[0]->gpio_present
;
3544 for (i
=0; i
< port_count
; ++i
)
3545 tty_register_device(serial_driver
, port_array
[i
]->line
, &(port_array
[i
]->pdev
->dev
));
3548 static int __devinit
init_one(struct pci_dev
*dev
,
3549 const struct pci_device_id
*ent
)
3551 if (pci_enable_device(dev
)) {
3552 printk("error enabling pci device %p\n", dev
);
3555 pci_set_master(dev
);
3556 device_init(slgt_device_count
, dev
);
3560 static void __devexit
remove_one(struct pci_dev
*dev
)
3564 static const struct tty_operations ops
= {
3568 .put_char
= put_char
,
3569 .flush_chars
= flush_chars
,
3570 .write_room
= write_room
,
3571 .chars_in_buffer
= chars_in_buffer
,
3572 .flush_buffer
= flush_buffer
,
3574 .compat_ioctl
= slgt_compat_ioctl
,
3575 .throttle
= throttle
,
3576 .unthrottle
= unthrottle
,
3577 .send_xchar
= send_xchar
,
3578 .break_ctl
= set_break
,
3579 .wait_until_sent
= wait_until_sent
,
3580 .read_proc
= read_proc
,
3581 .set_termios
= set_termios
,
3583 .start
= tx_release
,
3585 .tiocmget
= tiocmget
,
3586 .tiocmset
= tiocmset
,
3589 static void slgt_cleanup(void)
3592 struct slgt_info
*info
;
3593 struct slgt_info
*tmp
;
3595 printk("unload %s %s\n", driver_name
, driver_version
);
3597 if (serial_driver
) {
3598 for (info
=slgt_device_list
; info
!= NULL
; info
=info
->next_device
)
3599 tty_unregister_device(serial_driver
, info
->line
);
3600 if ((rc
= tty_unregister_driver(serial_driver
)))
3601 DBGERR(("tty_unregister_driver error=%d\n", rc
));
3602 put_tty_driver(serial_driver
);
3606 info
= slgt_device_list
;
3609 info
= info
->next_device
;
3612 /* release devices */
3613 info
= slgt_device_list
;
3615 #if SYNCLINK_GENERIC_HDLC
3618 free_dma_bufs(info
);
3619 free_tmp_rbuf(info
);
3620 if (info
->port_num
== 0)
3621 release_resources(info
);
3623 info
= info
->next_device
;
3628 pci_unregister_driver(&pci_driver
);
3632 * Driver initialization entry point.
3634 static int __init
slgt_init(void)
3638 printk("%s %s\n", driver_name
, driver_version
);
3640 serial_driver
= alloc_tty_driver(MAX_DEVICES
);
3641 if (!serial_driver
) {
3642 printk("%s can't allocate tty driver\n", driver_name
);
3646 /* Initialize the tty_driver structure */
3648 serial_driver
->owner
= THIS_MODULE
;
3649 serial_driver
->driver_name
= tty_driver_name
;
3650 serial_driver
->name
= tty_dev_prefix
;
3651 serial_driver
->major
= ttymajor
;
3652 serial_driver
->minor_start
= 64;
3653 serial_driver
->type
= TTY_DRIVER_TYPE_SERIAL
;
3654 serial_driver
->subtype
= SERIAL_TYPE_NORMAL
;
3655 serial_driver
->init_termios
= tty_std_termios
;
3656 serial_driver
->init_termios
.c_cflag
=
3657 B9600
| CS8
| CREAD
| HUPCL
| CLOCAL
;
3658 serial_driver
->init_termios
.c_ispeed
= 9600;
3659 serial_driver
->init_termios
.c_ospeed
= 9600;
3660 serial_driver
->flags
= TTY_DRIVER_REAL_RAW
| TTY_DRIVER_DYNAMIC_DEV
;
3661 tty_set_operations(serial_driver
, &ops
);
3662 if ((rc
= tty_register_driver(serial_driver
)) < 0) {
3663 DBGERR(("%s can't register serial driver\n", driver_name
));
3664 put_tty_driver(serial_driver
);
3665 serial_driver
= NULL
;
3669 printk("%s %s, tty major#%d\n",
3670 driver_name
, driver_version
,
3671 serial_driver
->major
);
3673 slgt_device_count
= 0;
3674 if ((rc
= pci_register_driver(&pci_driver
)) < 0) {
3675 printk("%s pci_register_driver error=%d\n", driver_name
, rc
);
3678 pci_registered
= true;
3680 if (!slgt_device_list
)
3681 printk("%s no devices found\n",driver_name
);
3690 static void __exit
slgt_exit(void)
3695 module_init(slgt_init
);
3696 module_exit(slgt_exit
);
3699 * register access routines
3702 #define CALC_REGADDR() \
3703 unsigned long reg_addr = ((unsigned long)info->reg_addr) + addr; \
3705 reg_addr += (info->port_num) * 32;
3707 static __u8
rd_reg8(struct slgt_info
*info
, unsigned int addr
)
3710 return readb((void __iomem
*)reg_addr
);
3713 static void wr_reg8(struct slgt_info
*info
, unsigned int addr
, __u8 value
)
3716 writeb(value
, (void __iomem
*)reg_addr
);
3719 static __u16
rd_reg16(struct slgt_info
*info
, unsigned int addr
)
3722 return readw((void __iomem
*)reg_addr
);
3725 static void wr_reg16(struct slgt_info
*info
, unsigned int addr
, __u16 value
)
3728 writew(value
, (void __iomem
*)reg_addr
);
3731 static __u32
rd_reg32(struct slgt_info
*info
, unsigned int addr
)
3734 return readl((void __iomem
*)reg_addr
);
3737 static void wr_reg32(struct slgt_info
*info
, unsigned int addr
, __u32 value
)
3740 writel(value
, (void __iomem
*)reg_addr
);
3743 static void rdma_reset(struct slgt_info
*info
)
3748 wr_reg32(info
, RDCSR
, BIT1
);
3750 /* wait for enable bit cleared */
3751 for(i
=0 ; i
< 1000 ; i
++)
3752 if (!(rd_reg32(info
, RDCSR
) & BIT0
))
3756 static void tdma_reset(struct slgt_info
*info
)
3761 wr_reg32(info
, TDCSR
, BIT1
);
3763 /* wait for enable bit cleared */
3764 for(i
=0 ; i
< 1000 ; i
++)
3765 if (!(rd_reg32(info
, TDCSR
) & BIT0
))
3770 * enable internal loopback
3771 * TxCLK and RxCLK are generated from BRG
3772 * and TxD is looped back to RxD internally.
3774 static void enable_loopback(struct slgt_info
*info
)
3776 /* SCR (serial control) BIT2=looopback enable */
3777 wr_reg16(info
, SCR
, (unsigned short)(rd_reg16(info
, SCR
) | BIT2
));
3779 if (info
->params
.mode
!= MGSL_MODE_ASYNC
) {
3780 /* CCR (clock control)
3781 * 07..05 tx clock source (010 = BRG)
3782 * 04..02 rx clock source (010 = BRG)
3783 * 01 auxclk enable (0 = disable)
3784 * 00 BRG enable (1 = enable)
3788 wr_reg8(info
, CCR
, 0x49);
3790 /* set speed if available, otherwise use default */
3791 if (info
->params
.clock_speed
)
3792 set_rate(info
, info
->params
.clock_speed
);
3794 set_rate(info
, 3686400);
3799 * set baud rate generator to specified rate
3801 static void set_rate(struct slgt_info
*info
, u32 rate
)
3804 static unsigned int osc
= 14745600;
3806 /* div = osc/rate - 1
3808 * Round div up if osc/rate is not integer to
3809 * force to next slowest rate.
3814 if (!(osc
% rate
) && div
)
3816 wr_reg16(info
, BDR
, (unsigned short)div
);
3820 static void rx_stop(struct slgt_info
*info
)
3824 /* disable and reset receiver */
3825 val
= rd_reg16(info
, RCR
) & ~BIT1
; /* clear enable bit */
3826 wr_reg16(info
, RCR
, (unsigned short)(val
| BIT2
)); /* set reset bit */
3827 wr_reg16(info
, RCR
, val
); /* clear reset bit */
3829 slgt_irq_off(info
, IRQ_RXOVER
+ IRQ_RXDATA
+ IRQ_RXIDLE
);
3831 /* clear pending rx interrupts */
3832 wr_reg16(info
, SSR
, IRQ_RXIDLE
+ IRQ_RXOVER
);
3836 info
->rx_enabled
= false;
3837 info
->rx_restart
= false;
3840 static void rx_start(struct slgt_info
*info
)
3844 slgt_irq_off(info
, IRQ_RXOVER
+ IRQ_RXDATA
);
3846 /* clear pending rx overrun IRQ */
3847 wr_reg16(info
, SSR
, IRQ_RXOVER
);
3849 /* reset and disable receiver */
3850 val
= rd_reg16(info
, RCR
) & ~BIT1
; /* clear enable bit */
3851 wr_reg16(info
, RCR
, (unsigned short)(val
| BIT2
)); /* set reset bit */
3852 wr_reg16(info
, RCR
, val
); /* clear reset bit */
3857 /* set 1st descriptor address */
3858 wr_reg32(info
, RDDAR
, info
->rbufs
[0].pdesc
);
3860 if (info
->params
.mode
!= MGSL_MODE_ASYNC
) {
3861 /* enable rx DMA and DMA interrupt */
3862 wr_reg32(info
, RDCSR
, (BIT2
+ BIT0
));
3864 /* enable saving of rx status, rx DMA and DMA interrupt */
3865 wr_reg32(info
, RDCSR
, (BIT6
+ BIT2
+ BIT0
));
3868 slgt_irq_on(info
, IRQ_RXOVER
);
3870 /* enable receiver */
3871 wr_reg16(info
, RCR
, (unsigned short)(rd_reg16(info
, RCR
) | BIT1
));
3873 info
->rx_restart
= false;
3874 info
->rx_enabled
= true;
3877 static void tx_start(struct slgt_info
*info
)
3879 if (!info
->tx_enabled
) {
3881 (unsigned short)((rd_reg16(info
, TCR
) | BIT1
) & ~BIT2
));
3882 info
->tx_enabled
= true;
3885 if (info
->tx_count
) {
3886 info
->drop_rts_on_tx_done
= false;
3888 if (info
->params
.mode
!= MGSL_MODE_ASYNC
) {
3889 if (info
->params
.flags
& HDLC_FLAG_AUTO_RTS
) {
3891 if (!(info
->signals
& SerialSignal_RTS
)) {
3892 info
->signals
|= SerialSignal_RTS
;
3894 info
->drop_rts_on_tx_done
= true;
3898 slgt_irq_off(info
, IRQ_TXDATA
);
3899 slgt_irq_on(info
, IRQ_TXUNDER
+ IRQ_TXIDLE
);
3900 /* clear tx idle and underrun status bits */
3901 wr_reg16(info
, SSR
, (unsigned short)(IRQ_TXIDLE
+ IRQ_TXUNDER
));
3902 if (info
->params
.mode
== MGSL_MODE_HDLC
)
3903 mod_timer(&info
->tx_timer
, jiffies
+
3904 msecs_to_jiffies(5000));
3906 slgt_irq_off(info
, IRQ_TXDATA
);
3907 slgt_irq_on(info
, IRQ_TXIDLE
);
3908 /* clear tx idle status bit */
3909 wr_reg16(info
, SSR
, IRQ_TXIDLE
);
3912 info
->tx_active
= true;
3917 * start transmit DMA if inactive and there are unsent buffers
3919 static void tdma_start(struct slgt_info
*info
)
3923 if (rd_reg32(info
, TDCSR
) & BIT0
)
3926 /* transmit DMA inactive, check for unsent buffers */
3927 i
= info
->tbuf_start
;
3928 while (!desc_count(info
->tbufs
[i
])) {
3929 if (++i
== info
->tbuf_count
)
3931 if (i
== info
->tbuf_current
)
3934 info
->tbuf_start
= i
;
3936 /* there are unsent buffers, start transmit DMA */
3938 /* reset needed if previous error condition */
3941 /* set 1st descriptor address */
3942 wr_reg32(info
, TDDAR
, info
->tbufs
[info
->tbuf_start
].pdesc
);
3943 switch(info
->params
.mode
) {
3945 case MGSL_MODE_MONOSYNC
:
3946 case MGSL_MODE_BISYNC
:
3947 wr_reg32(info
, TDCSR
, BIT2
+ BIT0
); /* IRQ + DMA enable */
3950 wr_reg32(info
, TDCSR
, BIT0
); /* DMA enable */
3954 static void tx_stop(struct slgt_info
*info
)
3958 del_timer(&info
->tx_timer
);
3962 /* reset and disable transmitter */
3963 val
= rd_reg16(info
, TCR
) & ~BIT1
; /* clear enable bit */
3964 wr_reg16(info
, TCR
, (unsigned short)(val
| BIT2
)); /* set reset bit */
3966 slgt_irq_off(info
, IRQ_TXDATA
+ IRQ_TXIDLE
+ IRQ_TXUNDER
);
3968 /* clear tx idle and underrun status bit */
3969 wr_reg16(info
, SSR
, (unsigned short)(IRQ_TXIDLE
+ IRQ_TXUNDER
));
3973 info
->tx_enabled
= false;
3974 info
->tx_active
= false;
3977 static void reset_port(struct slgt_info
*info
)
3979 if (!info
->reg_addr
)
3985 info
->signals
&= ~(SerialSignal_DTR
+ SerialSignal_RTS
);
3988 slgt_irq_off(info
, IRQ_ALL
| IRQ_MASTER
);
3991 static void reset_adapter(struct slgt_info
*info
)
3994 for (i
=0; i
< info
->port_count
; ++i
) {
3995 if (info
->port_array
[i
])
3996 reset_port(info
->port_array
[i
]);
4000 static void async_mode(struct slgt_info
*info
)
4004 slgt_irq_off(info
, IRQ_ALL
| IRQ_MASTER
);
4010 * 15..13 mode, 010=async
4011 * 12..10 encoding, 000=NRZ
4013 * 08 1=odd parity, 0=even parity
4014 * 07 1=RTS driver control
4016 * 05..04 character length
4021 * 03 0=1 stop bit, 1=2 stop bits
4024 * 00 auto-CTS enable
4028 if (info
->if_mode
& MGSL_INTERFACE_RTS_EN
)
4031 if (info
->params
.parity
!= ASYNC_PARITY_NONE
) {
4033 if (info
->params
.parity
== ASYNC_PARITY_ODD
)
4037 switch (info
->params
.data_bits
)
4039 case 6: val
|= BIT4
; break;
4040 case 7: val
|= BIT5
; break;
4041 case 8: val
|= BIT5
+ BIT4
; break;
4044 if (info
->params
.stop_bits
!= 1)
4047 if (info
->params
.flags
& HDLC_FLAG_AUTO_CTS
)
4050 wr_reg16(info
, TCR
, val
);
4054 * 15..13 mode, 010=async
4055 * 12..10 encoding, 000=NRZ
4057 * 08 1=odd parity, 0=even parity
4058 * 07..06 reserved, must be 0
4059 * 05..04 character length
4064 * 03 reserved, must be zero
4067 * 00 auto-DCD enable
4071 if (info
->params
.parity
!= ASYNC_PARITY_NONE
) {
4073 if (info
->params
.parity
== ASYNC_PARITY_ODD
)
4077 switch (info
->params
.data_bits
)
4079 case 6: val
|= BIT4
; break;
4080 case 7: val
|= BIT5
; break;
4081 case 8: val
|= BIT5
+ BIT4
; break;
4084 if (info
->params
.flags
& HDLC_FLAG_AUTO_DCD
)
4087 wr_reg16(info
, RCR
, val
);
4089 /* CCR (clock control)
4091 * 07..05 011 = tx clock source is BRG/16
4092 * 04..02 010 = rx clock source is BRG
4093 * 01 0 = auxclk disabled
4094 * 00 1 = BRG enabled
4098 wr_reg8(info
, CCR
, 0x69);
4102 /* SCR (serial control)
4104 * 15 1=tx req on FIFO half empty
4105 * 14 1=rx req on FIFO half full
4106 * 13 tx data IRQ enable
4107 * 12 tx idle IRQ enable
4108 * 11 rx break on IRQ enable
4109 * 10 rx data IRQ enable
4110 * 09 rx break off IRQ enable
4111 * 08 overrun IRQ enable
4116 * 03 reserved, must be zero
4117 * 02 1=txd->rxd internal loopback enable
4118 * 01 reserved, must be zero
4119 * 00 1=master IRQ enable
4121 val
= BIT15
+ BIT14
+ BIT0
;
4122 wr_reg16(info
, SCR
, val
);
4124 slgt_irq_on(info
, IRQ_RXBREAK
| IRQ_RXOVER
);
4126 set_rate(info
, info
->params
.data_rate
* 16);
4128 if (info
->params
.loopback
)
4129 enable_loopback(info
);
4132 static void sync_mode(struct slgt_info
*info
)
4136 slgt_irq_off(info
, IRQ_ALL
| IRQ_MASTER
);
4142 * 15..13 mode, 000=HDLC 001=raw 010=async 011=monosync 100=bisync
4146 * 07 1=RTS driver control
4147 * 06 preamble enable
4148 * 05..04 preamble length
4149 * 03 share open/close flag
4152 * 00 auto-CTS enable
4156 switch(info
->params
.mode
) {
4157 case MGSL_MODE_MONOSYNC
: val
|= BIT14
+ BIT13
; break;
4158 case MGSL_MODE_BISYNC
: val
|= BIT15
; break;
4159 case MGSL_MODE_RAW
: val
|= BIT13
; break;
4161 if (info
->if_mode
& MGSL_INTERFACE_RTS_EN
)
4164 switch(info
->params
.encoding
)
4166 case HDLC_ENCODING_NRZB
: val
|= BIT10
; break;
4167 case HDLC_ENCODING_NRZI_MARK
: val
|= BIT11
; break;
4168 case HDLC_ENCODING_NRZI
: val
|= BIT11
+ BIT10
; break;
4169 case HDLC_ENCODING_BIPHASE_MARK
: val
|= BIT12
; break;
4170 case HDLC_ENCODING_BIPHASE_SPACE
: val
|= BIT12
+ BIT10
; break;
4171 case HDLC_ENCODING_BIPHASE_LEVEL
: val
|= BIT12
+ BIT11
; break;
4172 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL
: val
|= BIT12
+ BIT11
+ BIT10
; break;
4175 switch (info
->params
.crc_type
& HDLC_CRC_MASK
)
4177 case HDLC_CRC_16_CCITT
: val
|= BIT9
; break;
4178 case HDLC_CRC_32_CCITT
: val
|= BIT9
+ BIT8
; break;
4181 if (info
->params
.preamble
!= HDLC_PREAMBLE_PATTERN_NONE
)
4184 switch (info
->params
.preamble_length
)
4186 case HDLC_PREAMBLE_LENGTH_16BITS
: val
|= BIT5
; break;
4187 case HDLC_PREAMBLE_LENGTH_32BITS
: val
|= BIT4
; break;
4188 case HDLC_PREAMBLE_LENGTH_64BITS
: val
|= BIT5
+ BIT4
; break;
4191 if (info
->params
.flags
& HDLC_FLAG_AUTO_CTS
)
4194 wr_reg16(info
, TCR
, val
);
4196 /* TPR (transmit preamble) */
4198 switch (info
->params
.preamble
)
4200 case HDLC_PREAMBLE_PATTERN_FLAGS
: val
= 0x7e; break;
4201 case HDLC_PREAMBLE_PATTERN_ONES
: val
= 0xff; break;
4202 case HDLC_PREAMBLE_PATTERN_ZEROS
: val
= 0x00; break;
4203 case HDLC_PREAMBLE_PATTERN_10
: val
= 0x55; break;
4204 case HDLC_PREAMBLE_PATTERN_01
: val
= 0xaa; break;
4205 default: val
= 0x7e; break;
4207 wr_reg8(info
, TPR
, (unsigned char)val
);
4211 * 15..13 mode, 000=HDLC 001=raw 010=async 011=monosync 100=bisync
4215 * 07..03 reserved, must be 0
4218 * 00 auto-DCD enable
4222 switch(info
->params
.mode
) {
4223 case MGSL_MODE_MONOSYNC
: val
|= BIT14
+ BIT13
; break;
4224 case MGSL_MODE_BISYNC
: val
|= BIT15
; break;
4225 case MGSL_MODE_RAW
: val
|= BIT13
; break;
4228 switch(info
->params
.encoding
)
4230 case HDLC_ENCODING_NRZB
: val
|= BIT10
; break;
4231 case HDLC_ENCODING_NRZI_MARK
: val
|= BIT11
; break;
4232 case HDLC_ENCODING_NRZI
: val
|= BIT11
+ BIT10
; break;
4233 case HDLC_ENCODING_BIPHASE_MARK
: val
|= BIT12
; break;
4234 case HDLC_ENCODING_BIPHASE_SPACE
: val
|= BIT12
+ BIT10
; break;
4235 case HDLC_ENCODING_BIPHASE_LEVEL
: val
|= BIT12
+ BIT11
; break;
4236 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL
: val
|= BIT12
+ BIT11
+ BIT10
; break;
4239 switch (info
->params
.crc_type
& HDLC_CRC_MASK
)
4241 case HDLC_CRC_16_CCITT
: val
|= BIT9
; break;
4242 case HDLC_CRC_32_CCITT
: val
|= BIT9
+ BIT8
; break;
4245 if (info
->params
.flags
& HDLC_FLAG_AUTO_DCD
)
4248 wr_reg16(info
, RCR
, val
);
4250 /* CCR (clock control)
4252 * 07..05 tx clock source
4253 * 04..02 rx clock source
4259 if (info
->params
.flags
& HDLC_FLAG_TXC_BRG
)
4261 // when RxC source is DPLL, BRG generates 16X DPLL
4262 // reference clock, so take TxC from BRG/16 to get
4263 // transmit clock at actual data rate
4264 if (info
->params
.flags
& HDLC_FLAG_RXC_DPLL
)
4265 val
|= BIT6
+ BIT5
; /* 011, txclk = BRG/16 */
4267 val
|= BIT6
; /* 010, txclk = BRG */
4269 else if (info
->params
.flags
& HDLC_FLAG_TXC_DPLL
)
4270 val
|= BIT7
; /* 100, txclk = DPLL Input */
4271 else if (info
->params
.flags
& HDLC_FLAG_TXC_RXCPIN
)
4272 val
|= BIT5
; /* 001, txclk = RXC Input */
4274 if (info
->params
.flags
& HDLC_FLAG_RXC_BRG
)
4275 val
|= BIT3
; /* 010, rxclk = BRG */
4276 else if (info
->params
.flags
& HDLC_FLAG_RXC_DPLL
)
4277 val
|= BIT4
; /* 100, rxclk = DPLL */
4278 else if (info
->params
.flags
& HDLC_FLAG_RXC_TXCPIN
)
4279 val
|= BIT2
; /* 001, rxclk = TXC Input */
4281 if (info
->params
.clock_speed
)
4284 wr_reg8(info
, CCR
, (unsigned char)val
);
4286 if (info
->params
.flags
& (HDLC_FLAG_TXC_DPLL
+ HDLC_FLAG_RXC_DPLL
))
4288 // program DPLL mode
4289 switch(info
->params
.encoding
)
4291 case HDLC_ENCODING_BIPHASE_MARK
:
4292 case HDLC_ENCODING_BIPHASE_SPACE
:
4294 case HDLC_ENCODING_BIPHASE_LEVEL
:
4295 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL
:
4296 val
= BIT7
+ BIT6
; break;
4297 default: val
= BIT6
; // NRZ encodings
4299 wr_reg16(info
, RCR
, (unsigned short)(rd_reg16(info
, RCR
) | val
));
4301 // DPLL requires a 16X reference clock from BRG
4302 set_rate(info
, info
->params
.clock_speed
* 16);
4305 set_rate(info
, info
->params
.clock_speed
);
4311 /* SCR (serial control)
4313 * 15 1=tx req on FIFO half empty
4314 * 14 1=rx req on FIFO half full
4315 * 13 tx data IRQ enable
4316 * 12 tx idle IRQ enable
4317 * 11 underrun IRQ enable
4318 * 10 rx data IRQ enable
4319 * 09 rx idle IRQ enable
4320 * 08 overrun IRQ enable
4325 * 03 reserved, must be zero
4326 * 02 1=txd->rxd internal loopback enable
4327 * 01 reserved, must be zero
4328 * 00 1=master IRQ enable
4330 wr_reg16(info
, SCR
, BIT15
+ BIT14
+ BIT0
);
4332 if (info
->params
.loopback
)
4333 enable_loopback(info
);
4337 * set transmit idle mode
4339 static void tx_set_idle(struct slgt_info
*info
)
4344 /* if preamble enabled (tcr[6] == 1) then tx idle size = 8 bits
4345 * else tcr[5:4] = tx idle size: 00 = 8 bits, 01 = 16 bits
4347 tcr
= rd_reg16(info
, TCR
);
4348 if (info
->idle_mode
& HDLC_TXIDLE_CUSTOM_16
) {
4349 /* disable preamble, set idle size to 16 bits */
4350 tcr
= (tcr
& ~(BIT6
+ BIT5
)) | BIT4
;
4351 /* MSB of 16 bit idle specified in tx preamble register (TPR) */
4352 wr_reg8(info
, TPR
, (unsigned char)((info
->idle_mode
>> 8) & 0xff));
4353 } else if (!(tcr
& BIT6
)) {
4354 /* preamble is disabled, set idle size to 8 bits */
4355 tcr
&= ~(BIT5
+ BIT4
);
4357 wr_reg16(info
, TCR
, tcr
);
4359 if (info
->idle_mode
& (HDLC_TXIDLE_CUSTOM_8
| HDLC_TXIDLE_CUSTOM_16
)) {
4360 /* LSB of custom tx idle specified in tx idle register */
4361 val
= (unsigned char)(info
->idle_mode
& 0xff);
4363 /* standard 8 bit idle patterns */
4364 switch(info
->idle_mode
)
4366 case HDLC_TXIDLE_FLAGS
: val
= 0x7e; break;
4367 case HDLC_TXIDLE_ALT_ZEROS_ONES
:
4368 case HDLC_TXIDLE_ALT_MARK_SPACE
: val
= 0xaa; break;
4369 case HDLC_TXIDLE_ZEROS
:
4370 case HDLC_TXIDLE_SPACE
: val
= 0x00; break;
4371 default: val
= 0xff;
4375 wr_reg8(info
, TIR
, val
);
4379 * get state of V24 status (input) signals
4381 static void get_signals(struct slgt_info
*info
)
4383 unsigned short status
= rd_reg16(info
, SSR
);
4385 /* clear all serial signals except DTR and RTS */
4386 info
->signals
&= SerialSignal_DTR
+ SerialSignal_RTS
;
4389 info
->signals
|= SerialSignal_DSR
;
4391 info
->signals
|= SerialSignal_CTS
;
4393 info
->signals
|= SerialSignal_DCD
;
4395 info
->signals
|= SerialSignal_RI
;
4399 * set V.24 Control Register based on current configuration
4401 static void msc_set_vcr(struct slgt_info
*info
)
4403 unsigned char val
= 0;
4405 /* VCR (V.24 control)
4407 * 07..04 serial IF select
4414 switch(info
->if_mode
& MGSL_INTERFACE_MASK
)
4416 case MGSL_INTERFACE_RS232
:
4417 val
|= BIT5
; /* 0010 */
4419 case MGSL_INTERFACE_V35
:
4420 val
|= BIT7
+ BIT6
+ BIT5
; /* 1110 */
4422 case MGSL_INTERFACE_RS422
:
4423 val
|= BIT6
; /* 0100 */
4427 if (info
->signals
& SerialSignal_DTR
)
4429 if (info
->signals
& SerialSignal_RTS
)
4431 if (info
->if_mode
& MGSL_INTERFACE_LL
)
4433 if (info
->if_mode
& MGSL_INTERFACE_RL
)
4435 wr_reg8(info
, VCR
, val
);
4439 * set state of V24 control (output) signals
4441 static void set_signals(struct slgt_info
*info
)
4443 unsigned char val
= rd_reg8(info
, VCR
);
4444 if (info
->signals
& SerialSignal_DTR
)
4448 if (info
->signals
& SerialSignal_RTS
)
4452 wr_reg8(info
, VCR
, val
);
4456 * free range of receive DMA buffers (i to last)
4458 static void free_rbufs(struct slgt_info
*info
, unsigned int i
, unsigned int last
)
4463 /* reset current buffer for reuse */
4464 info
->rbufs
[i
].status
= 0;
4465 switch(info
->params
.mode
) {
4467 case MGSL_MODE_MONOSYNC
:
4468 case MGSL_MODE_BISYNC
:
4469 set_desc_count(info
->rbufs
[i
], info
->raw_rx_size
);
4472 set_desc_count(info
->rbufs
[i
], DMABUFSIZE
);
4477 if (++i
== info
->rbuf_count
)
4480 info
->rbuf_current
= i
;
4484 * mark all receive DMA buffers as free
4486 static void reset_rbufs(struct slgt_info
*info
)
4488 free_rbufs(info
, 0, info
->rbuf_count
- 1);
4492 * pass receive HDLC frame to upper layer
4494 * return true if frame available, otherwise false
4496 static bool rx_get_frame(struct slgt_info
*info
)
4498 unsigned int start
, end
;
4499 unsigned short status
;
4500 unsigned int framesize
= 0;
4501 unsigned long flags
;
4502 struct tty_struct
*tty
= info
->tty
;
4503 unsigned char addr_field
= 0xff;
4504 unsigned int crc_size
= 0;
4506 switch (info
->params
.crc_type
& HDLC_CRC_MASK
) {
4507 case HDLC_CRC_16_CCITT
: crc_size
= 2; break;
4508 case HDLC_CRC_32_CCITT
: crc_size
= 4; break;
4515 start
= end
= info
->rbuf_current
;
4518 if (!desc_complete(info
->rbufs
[end
]))
4521 if (framesize
== 0 && info
->params
.addr_filter
!= 0xff)
4522 addr_field
= info
->rbufs
[end
].buf
[0];
4524 framesize
+= desc_count(info
->rbufs
[end
]);
4526 if (desc_eof(info
->rbufs
[end
]))
4529 if (++end
== info
->rbuf_count
)
4532 if (end
== info
->rbuf_current
) {
4533 if (info
->rx_enabled
){
4534 spin_lock_irqsave(&info
->lock
,flags
);
4536 spin_unlock_irqrestore(&info
->lock
,flags
);
4544 * 15 buffer complete
4547 * 02 eof (end of frame)
4551 status
= desc_status(info
->rbufs
[end
]);
4553 /* ignore CRC bit if not using CRC (bit is undefined) */
4554 if ((info
->params
.crc_type
& HDLC_CRC_MASK
) == HDLC_CRC_NONE
)
4557 if (framesize
== 0 ||
4558 (addr_field
!= 0xff && addr_field
!= info
->params
.addr_filter
)) {
4559 free_rbufs(info
, start
, end
);
4563 if (framesize
< (2 + crc_size
) || status
& BIT0
) {
4564 info
->icount
.rxshort
++;
4566 } else if (status
& BIT1
) {
4567 info
->icount
.rxcrc
++;
4568 if (!(info
->params
.crc_type
& HDLC_CRC_RETURN_EX
))
4572 #if SYNCLINK_GENERIC_HDLC
4573 if (framesize
== 0) {
4574 struct net_device_stats
*stats
= hdlc_stats(info
->netdev
);
4576 stats
->rx_frame_errors
++;
4580 DBGBH(("%s rx frame status=%04X size=%d\n",
4581 info
->device_name
, status
, framesize
));
4582 DBGDATA(info
, info
->rbufs
[start
].buf
, min_t(int, framesize
, DMABUFSIZE
), "rx");
4585 if (!(info
->params
.crc_type
& HDLC_CRC_RETURN_EX
)) {
4586 framesize
-= crc_size
;
4590 if (framesize
> info
->max_frame_size
+ crc_size
)
4591 info
->icount
.rxlong
++;
4593 /* copy dma buffer(s) to contiguous temp buffer */
4594 int copy_count
= framesize
;
4596 unsigned char *p
= info
->tmp_rbuf
;
4597 info
->tmp_rbuf_count
= framesize
;
4599 info
->icount
.rxok
++;
4602 int partial_count
= min(copy_count
, DMABUFSIZE
);
4603 memcpy(p
, info
->rbufs
[i
].buf
, partial_count
);
4605 copy_count
-= partial_count
;
4606 if (++i
== info
->rbuf_count
)
4610 if (info
->params
.crc_type
& HDLC_CRC_RETURN_EX
) {
4611 *p
= (status
& BIT1
) ? RX_CRC_ERROR
: RX_OK
;
4615 #if SYNCLINK_GENERIC_HDLC
4617 hdlcdev_rx(info
,info
->tmp_rbuf
, framesize
);
4620 ldisc_receive_buf(tty
, info
->tmp_rbuf
, info
->flag_buf
, framesize
);
4623 free_rbufs(info
, start
, end
);
4631 * pass receive buffer (RAW synchronous mode) to tty layer
4632 * return true if buffer available, otherwise false
4634 static bool rx_get_buf(struct slgt_info
*info
)
4636 unsigned int i
= info
->rbuf_current
;
4639 if (!desc_complete(info
->rbufs
[i
]))
4641 count
= desc_count(info
->rbufs
[i
]);
4642 switch(info
->params
.mode
) {
4643 case MGSL_MODE_MONOSYNC
:
4644 case MGSL_MODE_BISYNC
:
4645 /* ignore residue in byte synchronous modes */
4646 if (desc_residue(info
->rbufs
[i
]))
4650 DBGDATA(info
, info
->rbufs
[i
].buf
, count
, "rx");
4651 DBGINFO(("rx_get_buf size=%d\n", count
));
4653 ldisc_receive_buf(info
->tty
, info
->rbufs
[i
].buf
,
4654 info
->flag_buf
, count
);
4655 free_rbufs(info
, i
, i
);
4659 static void reset_tbufs(struct slgt_info
*info
)
4662 info
->tbuf_current
= 0;
4663 for (i
=0 ; i
< info
->tbuf_count
; i
++) {
4664 info
->tbufs
[i
].status
= 0;
4665 info
->tbufs
[i
].count
= 0;
4670 * return number of free transmit DMA buffers
4672 static unsigned int free_tbuf_count(struct slgt_info
*info
)
4674 unsigned int count
= 0;
4675 unsigned int i
= info
->tbuf_current
;
4679 if (desc_count(info
->tbufs
[i
]))
4680 break; /* buffer in use */
4682 if (++i
== info
->tbuf_count
)
4684 } while (i
!= info
->tbuf_current
);
4686 /* if tx DMA active, last zero count buffer is in use */
4687 if (count
&& (rd_reg32(info
, TDCSR
) & BIT0
))
4694 * load transmit DMA buffer(s) with data
4696 static void tx_load(struct slgt_info
*info
, const char *buf
, unsigned int size
)
4698 unsigned short count
;
4700 struct slgt_desc
*d
;
4705 DBGDATA(info
, buf
, size
, "tx");
4707 info
->tbuf_start
= i
= info
->tbuf_current
;
4710 d
= &info
->tbufs
[i
];
4711 if (++i
== info
->tbuf_count
)
4714 count
= (unsigned short)((size
> DMABUFSIZE
) ? DMABUFSIZE
: size
);
4715 memcpy(d
->buf
, buf
, count
);
4721 * set EOF bit for last buffer of HDLC frame or
4722 * for every buffer in raw mode
4724 if ((!size
&& info
->params
.mode
== MGSL_MODE_HDLC
) ||
4725 info
->params
.mode
== MGSL_MODE_RAW
)
4726 set_desc_eof(*d
, 1);
4728 set_desc_eof(*d
, 0);
4730 set_desc_count(*d
, count
);
4733 info
->tbuf_current
= i
;
4736 static int register_test(struct slgt_info
*info
)
4738 static unsigned short patterns
[] =
4739 {0x0000, 0xffff, 0xaaaa, 0x5555, 0x6969, 0x9696};
4740 static unsigned int count
= sizeof(patterns
)/sizeof(patterns
[0]);
4744 for (i
=0 ; i
< count
; i
++) {
4745 wr_reg16(info
, TIR
, patterns
[i
]);
4746 wr_reg16(info
, BDR
, patterns
[(i
+1)%count
]);
4747 if ((rd_reg16(info
, TIR
) != patterns
[i
]) ||
4748 (rd_reg16(info
, BDR
) != patterns
[(i
+1)%count
])) {
4753 info
->gpio_present
= (rd_reg32(info
, JCR
) & BIT5
) ? 1 : 0;
4754 info
->init_error
= rc
? 0 : DiagStatus_AddressFailure
;
4758 static int irq_test(struct slgt_info
*info
)
4760 unsigned long timeout
;
4761 unsigned long flags
;
4762 struct tty_struct
*oldtty
= info
->tty
;
4763 u32 speed
= info
->params
.data_rate
;
4765 info
->params
.data_rate
= 921600;
4768 spin_lock_irqsave(&info
->lock
, flags
);
4770 slgt_irq_on(info
, IRQ_TXIDLE
);
4772 /* enable transmitter */
4774 (unsigned short)(rd_reg16(info
, TCR
) | BIT1
));
4776 /* write one byte and wait for tx idle */
4777 wr_reg16(info
, TDR
, 0);
4779 /* assume failure */
4780 info
->init_error
= DiagStatus_IrqFailure
;
4781 info
->irq_occurred
= false;
4783 spin_unlock_irqrestore(&info
->lock
, flags
);
4786 while(timeout
-- && !info
->irq_occurred
)
4787 msleep_interruptible(10);
4789 spin_lock_irqsave(&info
->lock
,flags
);
4791 spin_unlock_irqrestore(&info
->lock
,flags
);
4793 info
->params
.data_rate
= speed
;
4796 info
->init_error
= info
->irq_occurred
? 0 : DiagStatus_IrqFailure
;
4797 return info
->irq_occurred
? 0 : -ENODEV
;
4800 static int loopback_test_rx(struct slgt_info
*info
)
4802 unsigned char *src
, *dest
;
4805 if (desc_complete(info
->rbufs
[0])) {
4806 count
= desc_count(info
->rbufs
[0]);
4807 src
= info
->rbufs
[0].buf
;
4808 dest
= info
->tmp_rbuf
;
4810 for( ; count
; count
-=2, src
+=2) {
4811 /* src=data byte (src+1)=status byte */
4812 if (!(*(src
+1) & (BIT9
+ BIT8
))) {
4815 info
->tmp_rbuf_count
++;
4818 DBGDATA(info
, info
->tmp_rbuf
, info
->tmp_rbuf_count
, "rx");
4824 static int loopback_test(struct slgt_info
*info
)
4826 #define TESTFRAMESIZE 20
4828 unsigned long timeout
;
4829 u16 count
= TESTFRAMESIZE
;
4830 unsigned char buf
[TESTFRAMESIZE
];
4832 unsigned long flags
;
4834 struct tty_struct
*oldtty
= info
->tty
;
4837 memcpy(¶ms
, &info
->params
, sizeof(params
));
4839 info
->params
.mode
= MGSL_MODE_ASYNC
;
4840 info
->params
.data_rate
= 921600;
4841 info
->params
.loopback
= 1;
4844 /* build and send transmit frame */
4845 for (count
= 0; count
< TESTFRAMESIZE
; ++count
)
4846 buf
[count
] = (unsigned char)count
;
4848 info
->tmp_rbuf_count
= 0;
4849 memset(info
->tmp_rbuf
, 0, TESTFRAMESIZE
);
4851 /* program hardware for HDLC and enabled receiver */
4852 spin_lock_irqsave(&info
->lock
,flags
);
4855 info
->tx_count
= count
;
4856 tx_load(info
, buf
, count
);
4858 spin_unlock_irqrestore(&info
->lock
, flags
);
4860 /* wait for receive complete */
4861 for (timeout
= 100; timeout
; --timeout
) {
4862 msleep_interruptible(10);
4863 if (loopback_test_rx(info
)) {
4869 /* verify received frame length and contents */
4870 if (!rc
&& (info
->tmp_rbuf_count
!= count
||
4871 memcmp(buf
, info
->tmp_rbuf
, count
))) {
4875 spin_lock_irqsave(&info
->lock
,flags
);
4876 reset_adapter(info
);
4877 spin_unlock_irqrestore(&info
->lock
,flags
);
4879 memcpy(&info
->params
, ¶ms
, sizeof(info
->params
));
4882 info
->init_error
= rc
? DiagStatus_DmaFailure
: 0;
4886 static int adapter_test(struct slgt_info
*info
)
4888 DBGINFO(("testing %s\n", info
->device_name
));
4889 if (register_test(info
) < 0) {
4890 printk("register test failure %s addr=%08X\n",
4891 info
->device_name
, info
->phys_reg_addr
);
4892 } else if (irq_test(info
) < 0) {
4893 printk("IRQ test failure %s IRQ=%d\n",
4894 info
->device_name
, info
->irq_level
);
4895 } else if (loopback_test(info
) < 0) {
4896 printk("loopback test failure %s\n", info
->device_name
);
4898 return info
->init_error
;
4902 * transmit timeout handler
4904 static void tx_timeout(unsigned long context
)
4906 struct slgt_info
*info
= (struct slgt_info
*)context
;
4907 unsigned long flags
;
4909 DBGINFO(("%s tx_timeout\n", info
->device_name
));
4910 if(info
->tx_active
&& info
->params
.mode
== MGSL_MODE_HDLC
) {
4911 info
->icount
.txtimeout
++;
4913 spin_lock_irqsave(&info
->lock
,flags
);
4914 info
->tx_active
= false;
4916 spin_unlock_irqrestore(&info
->lock
,flags
);
4918 #if SYNCLINK_GENERIC_HDLC
4920 hdlcdev_tx_done(info
);
4927 * receive buffer polling timer
4929 static void rx_timeout(unsigned long context
)
4931 struct slgt_info
*info
= (struct slgt_info
*)context
;
4932 unsigned long flags
;
4934 DBGINFO(("%s rx_timeout\n", info
->device_name
));
4935 spin_lock_irqsave(&info
->lock
, flags
);
4936 info
->pending_bh
|= BH_RECEIVE
;
4937 spin_unlock_irqrestore(&info
->lock
, flags
);
4938 bh_handler(&info
->task
);