2 * $Id: synclink_gt.c,v 4.20 2005/11/08 19:51:55 paulkf Exp $
4 * Device driver for Microgate SyncLink GT serial adapters.
6 * written by Paul Fulghum for Microgate Corporation
9 * Microgate and SyncLink are trademarks of Microgate Corporation
11 * This code is released under the GNU General Public License (GPL)
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
16 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
17 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
18 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
19 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
21 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
22 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
23 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 * DEBUG OUTPUT DEFINITIONS
29 * uncomment lines below to enable specific types of debug output
31 * DBGINFO information - most verbose output
32 * DBGERR serious errors
33 * DBGBH bottom half service routine debugging
34 * DBGISR interrupt service routine debugging
35 * DBGDATA output receive and transmit data
36 * DBGTBUF output transmit DMA buffers and registers
37 * DBGRBUF output receive DMA buffers and registers
40 #define DBGINFO(fmt) if (debug_level >= DEBUG_LEVEL_INFO) printk fmt
41 #define DBGERR(fmt) if (debug_level >= DEBUG_LEVEL_ERROR) printk fmt
42 #define DBGBH(fmt) if (debug_level >= DEBUG_LEVEL_BH) printk fmt
43 #define DBGISR(fmt) if (debug_level >= DEBUG_LEVEL_ISR) printk fmt
44 #define DBGDATA(info, buf, size, label) if (debug_level >= DEBUG_LEVEL_DATA) trace_block((info), (buf), (size), (label))
45 //#define DBGTBUF(info) dump_tbufs(info)
46 //#define DBGRBUF(info) dump_rbufs(info)
49 #include <linux/config.h>
50 #include <linux/module.h>
51 #include <linux/version.h>
52 #include <linux/errno.h>
53 #include <linux/signal.h>
54 #include <linux/sched.h>
55 #include <linux/timer.h>
56 #include <linux/interrupt.h>
57 #include <linux/pci.h>
58 #include <linux/tty.h>
59 #include <linux/tty_flip.h>
60 #include <linux/serial.h>
61 #include <linux/major.h>
62 #include <linux/string.h>
63 #include <linux/fcntl.h>
64 #include <linux/ptrace.h>
65 #include <linux/ioport.h>
67 #include <linux/slab.h>
68 #include <linux/netdevice.h>
69 #include <linux/vmalloc.h>
70 #include <linux/init.h>
71 #include <linux/delay.h>
72 #include <linux/ioctl.h>
73 #include <linux/termios.h>
74 #include <linux/bitops.h>
75 #include <linux/workqueue.h>
76 #include <linux/hdlc.h>
78 #include <asm/system.h>
82 #include <asm/types.h>
83 #include <asm/uaccess.h>
85 #include "linux/synclink.h"
87 #ifdef CONFIG_HDLC_MODULE
92 * module identification
94 static char *driver_name
= "SyncLink GT";
95 static char *driver_version
= "$Revision: 4.20 $";
96 static char *tty_driver_name
= "synclink_gt";
97 static char *tty_dev_prefix
= "ttySLG";
98 MODULE_LICENSE("GPL");
99 #define MGSL_MAGIC 0x5401
100 #define MAX_DEVICES 12
102 static struct pci_device_id pci_table
[] = {
103 {PCI_VENDOR_ID_MICROGATE
, SYNCLINK_GT_DEVICE_ID
, PCI_ANY_ID
, PCI_ANY_ID
,},
104 {PCI_VENDOR_ID_MICROGATE
, SYNCLINK_GT4_DEVICE_ID
, PCI_ANY_ID
, PCI_ANY_ID
,},
105 {PCI_VENDOR_ID_MICROGATE
, SYNCLINK_AC_DEVICE_ID
, PCI_ANY_ID
, PCI_ANY_ID
,},
106 {0,}, /* terminate list */
108 MODULE_DEVICE_TABLE(pci
, pci_table
);
110 static int init_one(struct pci_dev
*dev
,const struct pci_device_id
*ent
);
111 static void remove_one(struct pci_dev
*dev
);
112 static struct pci_driver pci_driver
= {
113 .name
= "synclink_gt",
114 .id_table
= pci_table
,
116 .remove
= __devexit_p(remove_one
),
119 static int pci_registered
;
122 * module configuration and status
124 static struct slgt_info
*slgt_device_list
;
125 static int slgt_device_count
;
128 static int debug_level
;
129 static int maxframe
[MAX_DEVICES
];
130 static int dosyncppp
[MAX_DEVICES
];
132 module_param(ttymajor
, int, 0);
133 module_param(debug_level
, int, 0);
134 module_param_array(maxframe
, int, NULL
, 0);
135 module_param_array(dosyncppp
, int, NULL
, 0);
137 MODULE_PARM_DESC(ttymajor
, "TTY major device number override: 0=auto assigned");
138 MODULE_PARM_DESC(debug_level
, "Debug syslog output: 0=disabled, 1 to 5=increasing detail");
139 MODULE_PARM_DESC(maxframe
, "Maximum frame size used by device (4096 to 65535)");
140 MODULE_PARM_DESC(dosyncppp
, "Enable synchronous net device, 0=disable 1=enable");
143 * tty support and callbacks
145 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
147 static struct tty_driver
*serial_driver
;
149 static int open(struct tty_struct
*tty
, struct file
* filp
);
150 static void close(struct tty_struct
*tty
, struct file
* filp
);
151 static void hangup(struct tty_struct
*tty
);
152 static void set_termios(struct tty_struct
*tty
, struct termios
*old_termios
);
154 static int write(struct tty_struct
*tty
, const unsigned char *buf
, int count
);
155 static void put_char(struct tty_struct
*tty
, unsigned char ch
);
156 static void send_xchar(struct tty_struct
*tty
, char ch
);
157 static void wait_until_sent(struct tty_struct
*tty
, int timeout
);
158 static int write_room(struct tty_struct
*tty
);
159 static void flush_chars(struct tty_struct
*tty
);
160 static void flush_buffer(struct tty_struct
*tty
);
161 static void tx_hold(struct tty_struct
*tty
);
162 static void tx_release(struct tty_struct
*tty
);
164 static int ioctl(struct tty_struct
*tty
, struct file
*file
, unsigned int cmd
, unsigned long arg
);
165 static int read_proc(char *page
, char **start
, off_t off
, int count
,int *eof
, void *data
);
166 static int chars_in_buffer(struct tty_struct
*tty
);
167 static void throttle(struct tty_struct
* tty
);
168 static void unthrottle(struct tty_struct
* tty
);
169 static void set_break(struct tty_struct
*tty
, int break_state
);
172 * generic HDLC support and callbacks
175 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
176 static void hdlcdev_tx_done(struct slgt_info
*info
);
177 static void hdlcdev_rx(struct slgt_info
*info
, char *buf
, int size
);
178 static int hdlcdev_init(struct slgt_info
*info
);
179 static void hdlcdev_exit(struct slgt_info
*info
);
184 * device specific structures, macros and functions
187 #define SLGT_MAX_PORTS 4
188 #define SLGT_REG_SIZE 256
191 * DMA buffer descriptor and access macros
195 unsigned short count
;
196 unsigned short status
;
197 unsigned int pbuf
; /* physical address of data buffer */
198 unsigned int next
; /* physical address of next descriptor */
200 /* driver book keeping */
201 char *buf
; /* virtual address of data buffer */
202 unsigned int pdesc
; /* physical address of this descriptor */
203 dma_addr_t buf_dma_addr
;
206 #define set_desc_buffer(a,b) (a).pbuf = cpu_to_le32((unsigned int)(b))
207 #define set_desc_next(a,b) (a).next = cpu_to_le32((unsigned int)(b))
208 #define set_desc_count(a,b)(a).count = cpu_to_le16((unsigned short)(b))
209 #define set_desc_eof(a,b) (a).status = cpu_to_le16((b) ? (le16_to_cpu((a).status) | BIT0) : (le16_to_cpu((a).status) & ~BIT0))
210 #define desc_count(a) (le16_to_cpu((a).count))
211 #define desc_status(a) (le16_to_cpu((a).status))
212 #define desc_complete(a) (le16_to_cpu((a).status) & BIT15)
213 #define desc_eof(a) (le16_to_cpu((a).status) & BIT2)
214 #define desc_crc_error(a) (le16_to_cpu((a).status) & BIT1)
215 #define desc_abort(a) (le16_to_cpu((a).status) & BIT0)
216 #define desc_residue(a) ((le16_to_cpu((a).status) & 0x38) >> 3)
218 struct _input_signal_events
{
230 * device instance data structure
233 void *if_ptr
; /* General purpose pointer (used by SPPP) */
235 struct slgt_info
*next_device
; /* device list link */
240 char device_name
[25];
241 struct pci_dev
*pdev
;
243 int port_count
; /* count of ports on adapter */
244 int adapter_num
; /* adapter instance number */
245 int port_num
; /* port instance number */
247 /* array of pointers to port contexts on this adapter */
248 struct slgt_info
*port_array
[SLGT_MAX_PORTS
];
250 int count
; /* count of opens */
251 int line
; /* tty line instance number */
252 unsigned short close_delay
;
253 unsigned short closing_wait
; /* time to wait before closing */
255 struct mgsl_icount icount
;
257 struct tty_struct
*tty
;
259 int x_char
; /* xon/xoff character */
260 int blocked_open
; /* # of blocked opens */
261 unsigned int read_status_mask
;
262 unsigned int ignore_status_mask
;
264 wait_queue_head_t open_wait
;
265 wait_queue_head_t close_wait
;
267 wait_queue_head_t status_event_wait_q
;
268 wait_queue_head_t event_wait_q
;
269 struct timer_list tx_timer
;
270 struct timer_list rx_timer
;
272 spinlock_t lock
; /* spinlock for synchronizing with ISR */
274 struct work_struct task
;
280 int irq_requested
; /* nonzero if IRQ requested */
281 int irq_occurred
; /* for diagnostics use */
283 /* device configuration */
285 unsigned int bus_type
;
286 unsigned int irq_level
;
287 unsigned long irq_flags
;
289 unsigned char __iomem
* reg_addr
; /* memory mapped registers address */
292 int reg_addr_requested
;
294 MGSL_PARAMS params
; /* communications parameters */
296 u32 max_frame_size
; /* as set by device config */
298 unsigned int raw_rx_size
;
299 unsigned int if_mode
;
309 unsigned char signals
; /* serial signal states */
310 unsigned int init_error
; /* initialization error */
312 unsigned char *tx_buf
;
315 char flag_buf
[MAX_ASYNC_BUFFER_SIZE
];
316 char char_buf
[MAX_ASYNC_BUFFER_SIZE
];
317 BOOLEAN drop_rts_on_tx_done
;
318 struct _input_signal_events input_signal_events
;
320 int dcd_chkcount
; /* check counts to prevent */
321 int cts_chkcount
; /* too many IRQs if a signal */
322 int dsr_chkcount
; /* is floating */
325 char *bufs
; /* virtual address of DMA buffer lists */
326 dma_addr_t bufs_dma_addr
; /* physical address of buffer descriptors */
328 unsigned int rbuf_count
;
329 struct slgt_desc
*rbufs
;
330 unsigned int rbuf_current
;
331 unsigned int rbuf_index
;
333 unsigned int tbuf_count
;
334 struct slgt_desc
*tbufs
;
335 unsigned int tbuf_current
;
336 unsigned int tbuf_start
;
338 unsigned char *tmp_rbuf
;
339 unsigned int tmp_rbuf_count
;
341 /* SPPP/Cisco HDLC device parts */
347 struct net_device
*netdev
;
352 static MGSL_PARAMS default_params
= {
353 .mode
= MGSL_MODE_HDLC
,
355 .flags
= HDLC_FLAG_UNDERRUN_ABORT15
,
356 .encoding
= HDLC_ENCODING_NRZI_SPACE
,
359 .crc_type
= HDLC_CRC_16_CCITT
,
360 .preamble_length
= HDLC_PREAMBLE_LENGTH_8BITS
,
361 .preamble
= HDLC_PREAMBLE_PATTERN_NONE
,
365 .parity
= ASYNC_PARITY_NONE
370 #define BH_TRANSMIT 2
372 #define IO_PIN_SHUTDOWN_LIMIT 100
374 #define DMABUFSIZE 256
375 #define DESC_LIST_SIZE 4096
377 #define MASK_PARITY BIT1
378 #define MASK_FRAMING BIT2
379 #define MASK_BREAK BIT3
380 #define MASK_OVERRUN BIT4
382 #define GSR 0x00 /* global status */
383 #define TDR 0x80 /* tx data */
384 #define RDR 0x80 /* rx data */
385 #define TCR 0x82 /* tx control */
386 #define TIR 0x84 /* tx idle */
387 #define TPR 0x85 /* tx preamble */
388 #define RCR 0x86 /* rx control */
389 #define VCR 0x88 /* V.24 control */
390 #define CCR 0x89 /* clock control */
391 #define BDR 0x8a /* baud divisor */
392 #define SCR 0x8c /* serial control */
393 #define SSR 0x8e /* serial status */
394 #define RDCSR 0x90 /* rx DMA control/status */
395 #define TDCSR 0x94 /* tx DMA control/status */
396 #define RDDAR 0x98 /* rx DMA descriptor address */
397 #define TDDAR 0x9c /* tx DMA descriptor address */
400 #define RXBREAK BIT14
401 #define IRQ_TXDATA BIT13
402 #define IRQ_TXIDLE BIT12
403 #define IRQ_TXUNDER BIT11 /* HDLC */
404 #define IRQ_RXDATA BIT10
405 #define IRQ_RXIDLE BIT9 /* HDLC */
406 #define IRQ_RXBREAK BIT9 /* async */
407 #define IRQ_RXOVER BIT8
412 #define IRQ_ALL 0x3ff0
413 #define IRQ_MASTER BIT0
415 #define slgt_irq_on(info, mask) \
416 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) | (mask)))
417 #define slgt_irq_off(info, mask) \
418 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) & ~(mask)))
420 static __u8
rd_reg8(struct slgt_info
*info
, unsigned int addr
);
421 static void wr_reg8(struct slgt_info
*info
, unsigned int addr
, __u8 value
);
422 static __u16
rd_reg16(struct slgt_info
*info
, unsigned int addr
);
423 static void wr_reg16(struct slgt_info
*info
, unsigned int addr
, __u16 value
);
424 static __u32
rd_reg32(struct slgt_info
*info
, unsigned int addr
);
425 static void wr_reg32(struct slgt_info
*info
, unsigned int addr
, __u32 value
);
427 static void msc_set_vcr(struct slgt_info
*info
);
429 static int startup(struct slgt_info
*info
);
430 static int block_til_ready(struct tty_struct
*tty
, struct file
* filp
,struct slgt_info
*info
);
431 static void shutdown(struct slgt_info
*info
);
432 static void program_hw(struct slgt_info
*info
);
433 static void change_params(struct slgt_info
*info
);
435 static int register_test(struct slgt_info
*info
);
436 static int irq_test(struct slgt_info
*info
);
437 static int loopback_test(struct slgt_info
*info
);
438 static int adapter_test(struct slgt_info
*info
);
440 static void reset_adapter(struct slgt_info
*info
);
441 static void reset_port(struct slgt_info
*info
);
442 static void async_mode(struct slgt_info
*info
);
443 static void hdlc_mode(struct slgt_info
*info
);
445 static void rx_stop(struct slgt_info
*info
);
446 static void rx_start(struct slgt_info
*info
);
447 static void reset_rbufs(struct slgt_info
*info
);
448 static void free_rbufs(struct slgt_info
*info
, unsigned int first
, unsigned int last
);
449 static void rdma_reset(struct slgt_info
*info
);
450 static int rx_get_frame(struct slgt_info
*info
);
451 static int rx_get_buf(struct slgt_info
*info
);
453 static void tx_start(struct slgt_info
*info
);
454 static void tx_stop(struct slgt_info
*info
);
455 static void tx_set_idle(struct slgt_info
*info
);
456 static unsigned int free_tbuf_count(struct slgt_info
*info
);
457 static void reset_tbufs(struct slgt_info
*info
);
458 static void tdma_reset(struct slgt_info
*info
);
459 static void tx_load(struct slgt_info
*info
, const char *buf
, unsigned int count
);
461 static void get_signals(struct slgt_info
*info
);
462 static void set_signals(struct slgt_info
*info
);
463 static void enable_loopback(struct slgt_info
*info
);
464 static void set_rate(struct slgt_info
*info
, u32 data_rate
);
466 static int bh_action(struct slgt_info
*info
);
467 static void bh_handler(void* context
);
468 static void bh_transmit(struct slgt_info
*info
);
469 static void isr_serial(struct slgt_info
*info
);
470 static void isr_rdma(struct slgt_info
*info
);
471 static void isr_txeom(struct slgt_info
*info
, unsigned short status
);
472 static void isr_tdma(struct slgt_info
*info
);
473 static irqreturn_t
slgt_interrupt(int irq
, void *dev_id
, struct pt_regs
* regs
);
475 static int alloc_dma_bufs(struct slgt_info
*info
);
476 static void free_dma_bufs(struct slgt_info
*info
);
477 static int alloc_desc(struct slgt_info
*info
);
478 static void free_desc(struct slgt_info
*info
);
479 static int alloc_bufs(struct slgt_info
*info
, struct slgt_desc
*bufs
, int count
);
480 static void free_bufs(struct slgt_info
*info
, struct slgt_desc
*bufs
, int count
);
482 static int alloc_tmp_rbuf(struct slgt_info
*info
);
483 static void free_tmp_rbuf(struct slgt_info
*info
);
485 static void tx_timeout(unsigned long context
);
486 static void rx_timeout(unsigned long context
);
491 static int get_stats(struct slgt_info
*info
, struct mgsl_icount __user
*user_icount
);
492 static int get_params(struct slgt_info
*info
, MGSL_PARAMS __user
*params
);
493 static int set_params(struct slgt_info
*info
, MGSL_PARAMS __user
*params
);
494 static int get_txidle(struct slgt_info
*info
, int __user
*idle_mode
);
495 static int set_txidle(struct slgt_info
*info
, int idle_mode
);
496 static int tx_enable(struct slgt_info
*info
, int enable
);
497 static int tx_abort(struct slgt_info
*info
);
498 static int rx_enable(struct slgt_info
*info
, int enable
);
499 static int modem_input_wait(struct slgt_info
*info
,int arg
);
500 static int wait_mgsl_event(struct slgt_info
*info
, int __user
*mask_ptr
);
501 static int tiocmget(struct tty_struct
*tty
, struct file
*file
);
502 static int tiocmset(struct tty_struct
*tty
, struct file
*file
,
503 unsigned int set
, unsigned int clear
);
504 static void set_break(struct tty_struct
*tty
, int break_state
);
505 static int get_interface(struct slgt_info
*info
, int __user
*if_mode
);
506 static int set_interface(struct slgt_info
*info
, int if_mode
);
511 static void add_device(struct slgt_info
*info
);
512 static void device_init(int adapter_num
, struct pci_dev
*pdev
);
513 static int claim_resources(struct slgt_info
*info
);
514 static void release_resources(struct slgt_info
*info
);
533 static void trace_block(struct slgt_info
*info
, const char *data
, int count
, const char *label
)
537 printk("%s %s data:\n",info
->device_name
, label
);
539 linecount
= (count
> 16) ? 16 : count
;
540 for(i
=0; i
< linecount
; i
++)
541 printk("%02X ",(unsigned char)data
[i
]);
544 for(i
=0;i
<linecount
;i
++) {
545 if (data
[i
]>=040 && data
[i
]<=0176)
546 printk("%c",data
[i
]);
556 #define DBGDATA(info, buf, size, label)
560 static void dump_tbufs(struct slgt_info
*info
)
563 printk("tbuf_current=%d\n", info
->tbuf_current
);
564 for (i
=0 ; i
< info
->tbuf_count
; i
++) {
565 printk("%d: count=%04X status=%04X\n",
566 i
, le16_to_cpu(info
->tbufs
[i
].count
), le16_to_cpu(info
->tbufs
[i
].status
));
570 #define DBGTBUF(info)
574 static void dump_rbufs(struct slgt_info
*info
)
577 printk("rbuf_current=%d\n", info
->rbuf_current
);
578 for (i
=0 ; i
< info
->rbuf_count
; i
++) {
579 printk("%d: count=%04X status=%04X\n",
580 i
, le16_to_cpu(info
->rbufs
[i
].count
), le16_to_cpu(info
->rbufs
[i
].status
));
584 #define DBGRBUF(info)
587 static inline int sanity_check(struct slgt_info
*info
, char *devname
, const char *name
)
591 printk("null struct slgt_info for (%s) in %s\n", devname
, name
);
594 if (info
->magic
!= MGSL_MAGIC
) {
595 printk("bad magic number struct slgt_info (%s) in %s\n", devname
, name
);
606 * line discipline callback wrappers
608 * The wrappers maintain line discipline references
609 * while calling into the line discipline.
611 * ldisc_receive_buf - pass receive data to line discipline
613 static void ldisc_receive_buf(struct tty_struct
*tty
,
614 const __u8
*data
, char *flags
, int count
)
616 struct tty_ldisc
*ld
;
619 ld
= tty_ldisc_ref(tty
);
622 ld
->receive_buf(tty
, data
, flags
, count
);
629 static int open(struct tty_struct
*tty
, struct file
*filp
)
631 struct slgt_info
*info
;
636 if ((line
< 0) || (line
>= slgt_device_count
)) {
637 DBGERR(("%s: open with invalid line #%d.\n", driver_name
, line
));
641 info
= slgt_device_list
;
642 while(info
&& info
->line
!= line
)
643 info
= info
->next_device
;
644 if (sanity_check(info
, tty
->name
, "open"))
646 if (info
->init_error
) {
647 DBGERR(("%s init error=%d\n", info
->device_name
, info
->init_error
));
651 tty
->driver_data
= info
;
654 DBGINFO(("%s open, old ref count = %d\n", info
->device_name
, info
->count
));
656 /* If port is closing, signal caller to try again */
657 if (tty_hung_up_p(filp
) || info
->flags
& ASYNC_CLOSING
){
658 if (info
->flags
& ASYNC_CLOSING
)
659 interruptible_sleep_on(&info
->close_wait
);
660 retval
= ((info
->flags
& ASYNC_HUP_NOTIFY
) ?
661 -EAGAIN
: -ERESTARTSYS
);
665 info
->tty
->low_latency
= (info
->flags
& ASYNC_LOW_LATENCY
) ? 1 : 0;
667 spin_lock_irqsave(&info
->netlock
, flags
);
668 if (info
->netcount
) {
670 spin_unlock_irqrestore(&info
->netlock
, flags
);
674 spin_unlock_irqrestore(&info
->netlock
, flags
);
676 if (info
->count
== 1) {
677 /* 1st open on this device, init hardware */
678 retval
= startup(info
);
683 retval
= block_til_ready(tty
, filp
, info
);
685 DBGINFO(("%s block_til_ready rc=%d\n", info
->device_name
, retval
));
694 info
->tty
= NULL
; /* tty layer will release tty struct */
699 DBGINFO(("%s open rc=%d\n", info
->device_name
, retval
));
703 static void close(struct tty_struct
*tty
, struct file
*filp
)
705 struct slgt_info
*info
= tty
->driver_data
;
707 if (sanity_check(info
, tty
->name
, "close"))
709 DBGINFO(("%s close entry, count=%d\n", info
->device_name
, info
->count
));
714 if (tty_hung_up_p(filp
))
717 if ((tty
->count
== 1) && (info
->count
!= 1)) {
719 * tty->count is 1 and the tty structure will be freed.
720 * info->count should be one in this case.
721 * if it's not, correct it so that the port is shutdown.
723 DBGERR(("%s close: bad refcount; tty->count=1, "
724 "info->count=%d\n", info
->device_name
, info
->count
));
730 /* if at least one open remaining, leave hardware active */
734 info
->flags
|= ASYNC_CLOSING
;
736 /* set tty->closing to notify line discipline to
737 * only process XON/XOFF characters. Only the N_TTY
738 * discipline appears to use this (ppp does not).
742 /* wait for transmit data to clear all layers */
744 if (info
->closing_wait
!= ASYNC_CLOSING_WAIT_NONE
) {
745 DBGINFO(("%s call tty_wait_until_sent\n", info
->device_name
));
746 tty_wait_until_sent(tty
, info
->closing_wait
);
749 if (info
->flags
& ASYNC_INITIALIZED
)
750 wait_until_sent(tty
, info
->timeout
);
751 if (tty
->driver
->flush_buffer
)
752 tty
->driver
->flush_buffer(tty
);
753 tty_ldisc_flush(tty
);
760 if (info
->blocked_open
) {
761 if (info
->close_delay
) {
762 msleep_interruptible(jiffies_to_msecs(info
->close_delay
));
764 wake_up_interruptible(&info
->open_wait
);
767 info
->flags
&= ~(ASYNC_NORMAL_ACTIVE
|ASYNC_CLOSING
);
769 wake_up_interruptible(&info
->close_wait
);
772 DBGINFO(("%s close exit, count=%d\n", tty
->driver
->name
, info
->count
));
775 static void hangup(struct tty_struct
*tty
)
777 struct slgt_info
*info
= tty
->driver_data
;
779 if (sanity_check(info
, tty
->name
, "hangup"))
781 DBGINFO(("%s hangup\n", info
->device_name
));
787 info
->flags
&= ~ASYNC_NORMAL_ACTIVE
;
790 wake_up_interruptible(&info
->open_wait
);
793 static void set_termios(struct tty_struct
*tty
, struct termios
*old_termios
)
795 struct slgt_info
*info
= tty
->driver_data
;
798 DBGINFO(("%s set_termios\n", tty
->driver
->name
));
800 /* just return if nothing has changed */
801 if ((tty
->termios
->c_cflag
== old_termios
->c_cflag
)
802 && (RELEVANT_IFLAG(tty
->termios
->c_iflag
)
803 == RELEVANT_IFLAG(old_termios
->c_iflag
)))
808 /* Handle transition to B0 status */
809 if (old_termios
->c_cflag
& CBAUD
&&
810 !(tty
->termios
->c_cflag
& CBAUD
)) {
811 info
->signals
&= ~(SerialSignal_RTS
+ SerialSignal_DTR
);
812 spin_lock_irqsave(&info
->lock
,flags
);
814 spin_unlock_irqrestore(&info
->lock
,flags
);
817 /* Handle transition away from B0 status */
818 if (!(old_termios
->c_cflag
& CBAUD
) &&
819 tty
->termios
->c_cflag
& CBAUD
) {
820 info
->signals
|= SerialSignal_DTR
;
821 if (!(tty
->termios
->c_cflag
& CRTSCTS
) ||
822 !test_bit(TTY_THROTTLED
, &tty
->flags
)) {
823 info
->signals
|= SerialSignal_RTS
;
825 spin_lock_irqsave(&info
->lock
,flags
);
827 spin_unlock_irqrestore(&info
->lock
,flags
);
830 /* Handle turning off CRTSCTS */
831 if (old_termios
->c_cflag
& CRTSCTS
&&
832 !(tty
->termios
->c_cflag
& CRTSCTS
)) {
838 static int write(struct tty_struct
*tty
,
839 const unsigned char *buf
, int count
)
842 struct slgt_info
*info
= tty
->driver_data
;
845 if (sanity_check(info
, tty
->name
, "write"))
847 DBGINFO(("%s write count=%d\n", info
->device_name
, count
));
849 if (!tty
|| !info
->tx_buf
)
852 if (count
> info
->max_frame_size
) {
860 if (info
->params
.mode
== MGSL_MODE_RAW
) {
861 unsigned int bufs_needed
= (count
/DMABUFSIZE
);
862 unsigned int bufs_free
= free_tbuf_count(info
);
863 if (count
% DMABUFSIZE
)
865 if (bufs_needed
> bufs_free
)
870 if (info
->tx_count
) {
871 /* send accumulated data from send_char() calls */
872 /* as frame and wait before accepting more data. */
873 tx_load(info
, info
->tx_buf
, info
->tx_count
);
878 ret
= info
->tx_count
= count
;
879 tx_load(info
, buf
, count
);
883 if (info
->tx_count
&& !tty
->stopped
&& !tty
->hw_stopped
) {
884 spin_lock_irqsave(&info
->lock
,flags
);
885 if (!info
->tx_active
)
887 spin_unlock_irqrestore(&info
->lock
,flags
);
891 DBGINFO(("%s write rc=%d\n", info
->device_name
, ret
));
895 static void put_char(struct tty_struct
*tty
, unsigned char ch
)
897 struct slgt_info
*info
= tty
->driver_data
;
900 if (sanity_check(info
, tty
->name
, "put_char"))
902 DBGINFO(("%s put_char(%d)\n", info
->device_name
, ch
));
903 if (!tty
|| !info
->tx_buf
)
905 spin_lock_irqsave(&info
->lock
,flags
);
906 if (!info
->tx_active
&& (info
->tx_count
< info
->max_frame_size
))
907 info
->tx_buf
[info
->tx_count
++] = ch
;
908 spin_unlock_irqrestore(&info
->lock
,flags
);
911 static void send_xchar(struct tty_struct
*tty
, char ch
)
913 struct slgt_info
*info
= tty
->driver_data
;
916 if (sanity_check(info
, tty
->name
, "send_xchar"))
918 DBGINFO(("%s send_xchar(%d)\n", info
->device_name
, ch
));
921 spin_lock_irqsave(&info
->lock
,flags
);
922 if (!info
->tx_enabled
)
924 spin_unlock_irqrestore(&info
->lock
,flags
);
928 static void wait_until_sent(struct tty_struct
*tty
, int timeout
)
930 struct slgt_info
*info
= tty
->driver_data
;
931 unsigned long orig_jiffies
, char_time
;
935 if (sanity_check(info
, tty
->name
, "wait_until_sent"))
937 DBGINFO(("%s wait_until_sent entry\n", info
->device_name
));
938 if (!(info
->flags
& ASYNC_INITIALIZED
))
941 orig_jiffies
= jiffies
;
943 /* Set check interval to 1/5 of estimated time to
944 * send a character, and make it at least 1. The check
945 * interval should also be less than the timeout.
946 * Note: use tight timings here to satisfy the NIST-PCTS.
949 if (info
->params
.data_rate
) {
950 char_time
= info
->timeout
/(32 * 5);
957 char_time
= min_t(unsigned long, char_time
, timeout
);
959 while (info
->tx_active
) {
960 msleep_interruptible(jiffies_to_msecs(char_time
));
961 if (signal_pending(current
))
963 if (timeout
&& time_after(jiffies
, orig_jiffies
+ timeout
))
968 DBGINFO(("%s wait_until_sent exit\n", info
->device_name
));
971 static int write_room(struct tty_struct
*tty
)
973 struct slgt_info
*info
= tty
->driver_data
;
976 if (sanity_check(info
, tty
->name
, "write_room"))
978 ret
= (info
->tx_active
) ? 0 : HDLC_MAX_FRAME_SIZE
;
979 DBGINFO(("%s write_room=%d\n", info
->device_name
, ret
));
983 static void flush_chars(struct tty_struct
*tty
)
985 struct slgt_info
*info
= tty
->driver_data
;
988 if (sanity_check(info
, tty
->name
, "flush_chars"))
990 DBGINFO(("%s flush_chars entry tx_count=%d\n", info
->device_name
, info
->tx_count
));
992 if (info
->tx_count
<= 0 || tty
->stopped
||
993 tty
->hw_stopped
|| !info
->tx_buf
)
996 DBGINFO(("%s flush_chars start transmit\n", info
->device_name
));
998 spin_lock_irqsave(&info
->lock
,flags
);
999 if (!info
->tx_active
&& info
->tx_count
) {
1000 tx_load(info
, info
->tx_buf
,info
->tx_count
);
1003 spin_unlock_irqrestore(&info
->lock
,flags
);
1006 static void flush_buffer(struct tty_struct
*tty
)
1008 struct slgt_info
*info
= tty
->driver_data
;
1009 unsigned long flags
;
1011 if (sanity_check(info
, tty
->name
, "flush_buffer"))
1013 DBGINFO(("%s flush_buffer\n", info
->device_name
));
1015 spin_lock_irqsave(&info
->lock
,flags
);
1016 if (!info
->tx_active
)
1018 spin_unlock_irqrestore(&info
->lock
,flags
);
1020 wake_up_interruptible(&tty
->write_wait
);
1025 * throttle (stop) transmitter
1027 static void tx_hold(struct tty_struct
*tty
)
1029 struct slgt_info
*info
= tty
->driver_data
;
1030 unsigned long flags
;
1032 if (sanity_check(info
, tty
->name
, "tx_hold"))
1034 DBGINFO(("%s tx_hold\n", info
->device_name
));
1035 spin_lock_irqsave(&info
->lock
,flags
);
1036 if (info
->tx_enabled
&& info
->params
.mode
== MGSL_MODE_ASYNC
)
1038 spin_unlock_irqrestore(&info
->lock
,flags
);
1042 * release (start) transmitter
1044 static void tx_release(struct tty_struct
*tty
)
1046 struct slgt_info
*info
= tty
->driver_data
;
1047 unsigned long flags
;
1049 if (sanity_check(info
, tty
->name
, "tx_release"))
1051 DBGINFO(("%s tx_release\n", info
->device_name
));
1052 spin_lock_irqsave(&info
->lock
,flags
);
1053 if (!info
->tx_active
&& info
->tx_count
) {
1054 tx_load(info
, info
->tx_buf
, info
->tx_count
);
1057 spin_unlock_irqrestore(&info
->lock
,flags
);
1061 * Service an IOCTL request
1065 * tty pointer to tty instance data
1066 * file pointer to associated file object for device
1067 * cmd IOCTL command code
1068 * arg command argument/context
1070 * Return 0 if success, otherwise error code
1072 static int ioctl(struct tty_struct
*tty
, struct file
*file
,
1073 unsigned int cmd
, unsigned long arg
)
1075 struct slgt_info
*info
= tty
->driver_data
;
1076 struct mgsl_icount cnow
; /* kernel counter temps */
1077 struct serial_icounter_struct __user
*p_cuser
; /* user space */
1078 unsigned long flags
;
1079 void __user
*argp
= (void __user
*)arg
;
1081 if (sanity_check(info
, tty
->name
, "ioctl"))
1083 DBGINFO(("%s ioctl() cmd=%08X\n", info
->device_name
, cmd
));
1085 if ((cmd
!= TIOCGSERIAL
) && (cmd
!= TIOCSSERIAL
) &&
1086 (cmd
!= TIOCMIWAIT
) && (cmd
!= TIOCGICOUNT
)) {
1087 if (tty
->flags
& (1 << TTY_IO_ERROR
))
1092 case MGSL_IOCGPARAMS
:
1093 return get_params(info
, argp
);
1094 case MGSL_IOCSPARAMS
:
1095 return set_params(info
, argp
);
1096 case MGSL_IOCGTXIDLE
:
1097 return get_txidle(info
, argp
);
1098 case MGSL_IOCSTXIDLE
:
1099 return set_txidle(info
, (int)arg
);
1100 case MGSL_IOCTXENABLE
:
1101 return tx_enable(info
, (int)arg
);
1102 case MGSL_IOCRXENABLE
:
1103 return rx_enable(info
, (int)arg
);
1104 case MGSL_IOCTXABORT
:
1105 return tx_abort(info
);
1106 case MGSL_IOCGSTATS
:
1107 return get_stats(info
, argp
);
1108 case MGSL_IOCWAITEVENT
:
1109 return wait_mgsl_event(info
, argp
);
1111 return modem_input_wait(info
,(int)arg
);
1113 return get_interface(info
, argp
);
1115 return set_interface(info
,(int)arg
);
1117 spin_lock_irqsave(&info
->lock
,flags
);
1118 cnow
= info
->icount
;
1119 spin_unlock_irqrestore(&info
->lock
,flags
);
1121 if (put_user(cnow
.cts
, &p_cuser
->cts
) ||
1122 put_user(cnow
.dsr
, &p_cuser
->dsr
) ||
1123 put_user(cnow
.rng
, &p_cuser
->rng
) ||
1124 put_user(cnow
.dcd
, &p_cuser
->dcd
) ||
1125 put_user(cnow
.rx
, &p_cuser
->rx
) ||
1126 put_user(cnow
.tx
, &p_cuser
->tx
) ||
1127 put_user(cnow
.frame
, &p_cuser
->frame
) ||
1128 put_user(cnow
.overrun
, &p_cuser
->overrun
) ||
1129 put_user(cnow
.parity
, &p_cuser
->parity
) ||
1130 put_user(cnow
.brk
, &p_cuser
->brk
) ||
1131 put_user(cnow
.buf_overrun
, &p_cuser
->buf_overrun
))
1135 return -ENOIOCTLCMD
;
1143 static inline int line_info(char *buf
, struct slgt_info
*info
)
1147 unsigned long flags
;
1149 ret
= sprintf(buf
, "%s: IO=%08X IRQ=%d MaxFrameSize=%u\n",
1150 info
->device_name
, info
->phys_reg_addr
,
1151 info
->irq_level
, info
->max_frame_size
);
1153 /* output current serial signal states */
1154 spin_lock_irqsave(&info
->lock
,flags
);
1156 spin_unlock_irqrestore(&info
->lock
,flags
);
1160 if (info
->signals
& SerialSignal_RTS
)
1161 strcat(stat_buf
, "|RTS");
1162 if (info
->signals
& SerialSignal_CTS
)
1163 strcat(stat_buf
, "|CTS");
1164 if (info
->signals
& SerialSignal_DTR
)
1165 strcat(stat_buf
, "|DTR");
1166 if (info
->signals
& SerialSignal_DSR
)
1167 strcat(stat_buf
, "|DSR");
1168 if (info
->signals
& SerialSignal_DCD
)
1169 strcat(stat_buf
, "|CD");
1170 if (info
->signals
& SerialSignal_RI
)
1171 strcat(stat_buf
, "|RI");
1173 if (info
->params
.mode
!= MGSL_MODE_ASYNC
) {
1174 ret
+= sprintf(buf
+ret
, "\tHDLC txok:%d rxok:%d",
1175 info
->icount
.txok
, info
->icount
.rxok
);
1176 if (info
->icount
.txunder
)
1177 ret
+= sprintf(buf
+ret
, " txunder:%d", info
->icount
.txunder
);
1178 if (info
->icount
.txabort
)
1179 ret
+= sprintf(buf
+ret
, " txabort:%d", info
->icount
.txabort
);
1180 if (info
->icount
.rxshort
)
1181 ret
+= sprintf(buf
+ret
, " rxshort:%d", info
->icount
.rxshort
);
1182 if (info
->icount
.rxlong
)
1183 ret
+= sprintf(buf
+ret
, " rxlong:%d", info
->icount
.rxlong
);
1184 if (info
->icount
.rxover
)
1185 ret
+= sprintf(buf
+ret
, " rxover:%d", info
->icount
.rxover
);
1186 if (info
->icount
.rxcrc
)
1187 ret
+= sprintf(buf
+ret
, " rxcrc:%d", info
->icount
.rxcrc
);
1189 ret
+= sprintf(buf
+ret
, "\tASYNC tx:%d rx:%d",
1190 info
->icount
.tx
, info
->icount
.rx
);
1191 if (info
->icount
.frame
)
1192 ret
+= sprintf(buf
+ret
, " fe:%d", info
->icount
.frame
);
1193 if (info
->icount
.parity
)
1194 ret
+= sprintf(buf
+ret
, " pe:%d", info
->icount
.parity
);
1195 if (info
->icount
.brk
)
1196 ret
+= sprintf(buf
+ret
, " brk:%d", info
->icount
.brk
);
1197 if (info
->icount
.overrun
)
1198 ret
+= sprintf(buf
+ret
, " oe:%d", info
->icount
.overrun
);
1201 /* Append serial signal status to end */
1202 ret
+= sprintf(buf
+ret
, " %s\n", stat_buf
+1);
1204 ret
+= sprintf(buf
+ret
, "\ttxactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
1205 info
->tx_active
,info
->bh_requested
,info
->bh_running
,
1211 /* Called to print information about devices
1213 static int read_proc(char *page
, char **start
, off_t off
, int count
,
1214 int *eof
, void *data
)
1218 struct slgt_info
*info
;
1220 len
+= sprintf(page
, "synclink_gt driver:%s\n", driver_version
);
1222 info
= slgt_device_list
;
1224 l
= line_info(page
+ len
, info
);
1226 if (len
+begin
> off
+count
)
1228 if (len
+begin
< off
) {
1232 info
= info
->next_device
;
1237 if (off
>= len
+begin
)
1239 *start
= page
+ (off
-begin
);
1240 return ((count
< begin
+len
-off
) ? count
: begin
+len
-off
);
1244 * return count of bytes in transmit buffer
1246 static int chars_in_buffer(struct tty_struct
*tty
)
1248 struct slgt_info
*info
= tty
->driver_data
;
1249 if (sanity_check(info
, tty
->name
, "chars_in_buffer"))
1251 DBGINFO(("%s chars_in_buffer()=%d\n", info
->device_name
, info
->tx_count
));
1252 return info
->tx_count
;
1256 * signal remote device to throttle send data (our receive data)
1258 static void throttle(struct tty_struct
* tty
)
1260 struct slgt_info
*info
= tty
->driver_data
;
1261 unsigned long flags
;
1263 if (sanity_check(info
, tty
->name
, "throttle"))
1265 DBGINFO(("%s throttle\n", info
->device_name
));
1267 send_xchar(tty
, STOP_CHAR(tty
));
1268 if (tty
->termios
->c_cflag
& CRTSCTS
) {
1269 spin_lock_irqsave(&info
->lock
,flags
);
1270 info
->signals
&= ~SerialSignal_RTS
;
1272 spin_unlock_irqrestore(&info
->lock
,flags
);
1277 * signal remote device to stop throttling send data (our receive data)
1279 static void unthrottle(struct tty_struct
* tty
)
1281 struct slgt_info
*info
= tty
->driver_data
;
1282 unsigned long flags
;
1284 if (sanity_check(info
, tty
->name
, "unthrottle"))
1286 DBGINFO(("%s unthrottle\n", info
->device_name
));
1291 send_xchar(tty
, START_CHAR(tty
));
1293 if (tty
->termios
->c_cflag
& CRTSCTS
) {
1294 spin_lock_irqsave(&info
->lock
,flags
);
1295 info
->signals
|= SerialSignal_RTS
;
1297 spin_unlock_irqrestore(&info
->lock
,flags
);
1302 * set or clear transmit break condition
1303 * break_state -1=set break condition, 0=clear
1305 static void set_break(struct tty_struct
*tty
, int break_state
)
1307 struct slgt_info
*info
= tty
->driver_data
;
1308 unsigned short value
;
1309 unsigned long flags
;
1311 if (sanity_check(info
, tty
->name
, "set_break"))
1313 DBGINFO(("%s set_break(%d)\n", info
->device_name
, break_state
));
1315 spin_lock_irqsave(&info
->lock
,flags
);
1316 value
= rd_reg16(info
, TCR
);
1317 if (break_state
== -1)
1321 wr_reg16(info
, TCR
, value
);
1322 spin_unlock_irqrestore(&info
->lock
,flags
);
1328 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
1329 * set encoding and frame check sequence (FCS) options
1331 * dev pointer to network device structure
1332 * encoding serial encoding setting
1333 * parity FCS setting
1335 * returns 0 if success, otherwise error code
1337 static int hdlcdev_attach(struct net_device
*dev
, unsigned short encoding
,
1338 unsigned short parity
)
1340 struct slgt_info
*info
= dev_to_port(dev
);
1341 unsigned char new_encoding
;
1342 unsigned short new_crctype
;
1344 /* return error if TTY interface open */
1348 DBGINFO(("%s hdlcdev_attach\n", info
->device_name
));
1352 case ENCODING_NRZ
: new_encoding
= HDLC_ENCODING_NRZ
; break;
1353 case ENCODING_NRZI
: new_encoding
= HDLC_ENCODING_NRZI_SPACE
; break;
1354 case ENCODING_FM_MARK
: new_encoding
= HDLC_ENCODING_BIPHASE_MARK
; break;
1355 case ENCODING_FM_SPACE
: new_encoding
= HDLC_ENCODING_BIPHASE_SPACE
; break;
1356 case ENCODING_MANCHESTER
: new_encoding
= HDLC_ENCODING_BIPHASE_LEVEL
; break;
1357 default: return -EINVAL
;
1362 case PARITY_NONE
: new_crctype
= HDLC_CRC_NONE
; break;
1363 case PARITY_CRC16_PR1_CCITT
: new_crctype
= HDLC_CRC_16_CCITT
; break;
1364 case PARITY_CRC32_PR1_CCITT
: new_crctype
= HDLC_CRC_32_CCITT
; break;
1365 default: return -EINVAL
;
1368 info
->params
.encoding
= new_encoding
;
1369 info
->params
.crc_type
= new_crctype
;;
1371 /* if network interface up, reprogram hardware */
1379 * called by generic HDLC layer to send frame
1381 * skb socket buffer containing HDLC frame
1382 * dev pointer to network device structure
1384 * returns 0 if success, otherwise error code
1386 static int hdlcdev_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1388 struct slgt_info
*info
= dev_to_port(dev
);
1389 struct net_device_stats
*stats
= hdlc_stats(dev
);
1390 unsigned long flags
;
1392 DBGINFO(("%s hdlc_xmit\n", dev
->name
));
1394 /* stop sending until this frame completes */
1395 netif_stop_queue(dev
);
1397 /* copy data to device buffers */
1398 info
->tx_count
= skb
->len
;
1399 tx_load(info
, skb
->data
, skb
->len
);
1401 /* update network statistics */
1402 stats
->tx_packets
++;
1403 stats
->tx_bytes
+= skb
->len
;
1405 /* done with socket buffer, so free it */
1408 /* save start time for transmit timeout detection */
1409 dev
->trans_start
= jiffies
;
1411 /* start hardware transmitter if necessary */
1412 spin_lock_irqsave(&info
->lock
,flags
);
1413 if (!info
->tx_active
)
1415 spin_unlock_irqrestore(&info
->lock
,flags
);
1421 * called by network layer when interface enabled
1422 * claim resources and initialize hardware
1424 * dev pointer to network device structure
1426 * returns 0 if success, otherwise error code
1428 static int hdlcdev_open(struct net_device
*dev
)
1430 struct slgt_info
*info
= dev_to_port(dev
);
1432 unsigned long flags
;
1434 DBGINFO(("%s hdlcdev_open\n", dev
->name
));
1436 /* generic HDLC layer open processing */
1437 if ((rc
= hdlc_open(dev
)))
1440 /* arbitrate between network and tty opens */
1441 spin_lock_irqsave(&info
->netlock
, flags
);
1442 if (info
->count
!= 0 || info
->netcount
!= 0) {
1443 DBGINFO(("%s hdlc_open busy\n", dev
->name
));
1444 spin_unlock_irqrestore(&info
->netlock
, flags
);
1448 spin_unlock_irqrestore(&info
->netlock
, flags
);
1450 /* claim resources and init adapter */
1451 if ((rc
= startup(info
)) != 0) {
1452 spin_lock_irqsave(&info
->netlock
, flags
);
1454 spin_unlock_irqrestore(&info
->netlock
, flags
);
1458 /* assert DTR and RTS, apply hardware settings */
1459 info
->signals
|= SerialSignal_RTS
+ SerialSignal_DTR
;
1462 /* enable network layer transmit */
1463 dev
->trans_start
= jiffies
;
1464 netif_start_queue(dev
);
1466 /* inform generic HDLC layer of current DCD status */
1467 spin_lock_irqsave(&info
->lock
, flags
);
1469 spin_unlock_irqrestore(&info
->lock
, flags
);
1470 hdlc_set_carrier(info
->signals
& SerialSignal_DCD
, dev
);
1476 * called by network layer when interface is disabled
1477 * shutdown hardware and release resources
1479 * dev pointer to network device structure
1481 * returns 0 if success, otherwise error code
1483 static int hdlcdev_close(struct net_device
*dev
)
1485 struct slgt_info
*info
= dev_to_port(dev
);
1486 unsigned long flags
;
1488 DBGINFO(("%s hdlcdev_close\n", dev
->name
));
1490 netif_stop_queue(dev
);
1492 /* shutdown adapter and release resources */
1497 spin_lock_irqsave(&info
->netlock
, flags
);
1499 spin_unlock_irqrestore(&info
->netlock
, flags
);
1505 * called by network layer to process IOCTL call to network device
1507 * dev pointer to network device structure
1508 * ifr pointer to network interface request structure
1509 * cmd IOCTL command code
1511 * returns 0 if success, otherwise error code
1513 static int hdlcdev_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
1515 const size_t size
= sizeof(sync_serial_settings
);
1516 sync_serial_settings new_line
;
1517 sync_serial_settings __user
*line
= ifr
->ifr_settings
.ifs_ifsu
.sync
;
1518 struct slgt_info
*info
= dev_to_port(dev
);
1521 DBGINFO(("%s hdlcdev_ioctl\n", dev
->name
));
1523 /* return error if TTY interface open */
1527 if (cmd
!= SIOCWANDEV
)
1528 return hdlc_ioctl(dev
, ifr
, cmd
);
1530 switch(ifr
->ifr_settings
.type
) {
1531 case IF_GET_IFACE
: /* return current sync_serial_settings */
1533 ifr
->ifr_settings
.type
= IF_IFACE_SYNC_SERIAL
;
1534 if (ifr
->ifr_settings
.size
< size
) {
1535 ifr
->ifr_settings
.size
= size
; /* data size wanted */
1539 flags
= info
->params
.flags
& (HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_RXC_DPLL
|
1540 HDLC_FLAG_RXC_BRG
| HDLC_FLAG_RXC_TXCPIN
|
1541 HDLC_FLAG_TXC_TXCPIN
| HDLC_FLAG_TXC_DPLL
|
1542 HDLC_FLAG_TXC_BRG
| HDLC_FLAG_TXC_RXCPIN
);
1545 case (HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_TXCPIN
): new_line
.clock_type
= CLOCK_EXT
; break;
1546 case (HDLC_FLAG_RXC_BRG
| HDLC_FLAG_TXC_BRG
): new_line
.clock_type
= CLOCK_INT
; break;
1547 case (HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_BRG
): new_line
.clock_type
= CLOCK_TXINT
; break;
1548 case (HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_RXCPIN
): new_line
.clock_type
= CLOCK_TXFROMRX
; break;
1549 default: new_line
.clock_type
= CLOCK_DEFAULT
;
1552 new_line
.clock_rate
= info
->params
.clock_speed
;
1553 new_line
.loopback
= info
->params
.loopback
? 1:0;
1555 if (copy_to_user(line
, &new_line
, size
))
1559 case IF_IFACE_SYNC_SERIAL
: /* set sync_serial_settings */
1561 if(!capable(CAP_NET_ADMIN
))
1563 if (copy_from_user(&new_line
, line
, size
))
1566 switch (new_line
.clock_type
)
1568 case CLOCK_EXT
: flags
= HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_TXCPIN
; break;
1569 case CLOCK_TXFROMRX
: flags
= HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_RXCPIN
; break;
1570 case CLOCK_INT
: flags
= HDLC_FLAG_RXC_BRG
| HDLC_FLAG_TXC_BRG
; break;
1571 case CLOCK_TXINT
: flags
= HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_TXC_BRG
; break;
1572 case CLOCK_DEFAULT
: flags
= info
->params
.flags
&
1573 (HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_RXC_DPLL
|
1574 HDLC_FLAG_RXC_BRG
| HDLC_FLAG_RXC_TXCPIN
|
1575 HDLC_FLAG_TXC_TXCPIN
| HDLC_FLAG_TXC_DPLL
|
1576 HDLC_FLAG_TXC_BRG
| HDLC_FLAG_TXC_RXCPIN
); break;
1577 default: return -EINVAL
;
1580 if (new_line
.loopback
!= 0 && new_line
.loopback
!= 1)
1583 info
->params
.flags
&= ~(HDLC_FLAG_RXC_RXCPIN
| HDLC_FLAG_RXC_DPLL
|
1584 HDLC_FLAG_RXC_BRG
| HDLC_FLAG_RXC_TXCPIN
|
1585 HDLC_FLAG_TXC_TXCPIN
| HDLC_FLAG_TXC_DPLL
|
1586 HDLC_FLAG_TXC_BRG
| HDLC_FLAG_TXC_RXCPIN
);
1587 info
->params
.flags
|= flags
;
1589 info
->params
.loopback
= new_line
.loopback
;
1591 if (flags
& (HDLC_FLAG_RXC_BRG
| HDLC_FLAG_TXC_BRG
))
1592 info
->params
.clock_speed
= new_line
.clock_rate
;
1594 info
->params
.clock_speed
= 0;
1596 /* if network interface up, reprogram hardware */
1602 return hdlc_ioctl(dev
, ifr
, cmd
);
1607 * called by network layer when transmit timeout is detected
1609 * dev pointer to network device structure
1611 static void hdlcdev_tx_timeout(struct net_device
*dev
)
1613 struct slgt_info
*info
= dev_to_port(dev
);
1614 struct net_device_stats
*stats
= hdlc_stats(dev
);
1615 unsigned long flags
;
1617 DBGINFO(("%s hdlcdev_tx_timeout\n", dev
->name
));
1620 stats
->tx_aborted_errors
++;
1622 spin_lock_irqsave(&info
->lock
,flags
);
1624 spin_unlock_irqrestore(&info
->lock
,flags
);
1626 netif_wake_queue(dev
);
1630 * called by device driver when transmit completes
1631 * reenable network layer transmit if stopped
1633 * info pointer to device instance information
1635 static void hdlcdev_tx_done(struct slgt_info
*info
)
1637 if (netif_queue_stopped(info
->netdev
))
1638 netif_wake_queue(info
->netdev
);
1642 * called by device driver when frame received
1643 * pass frame to network layer
1645 * info pointer to device instance information
1646 * buf pointer to buffer contianing frame data
1647 * size count of data bytes in buf
1649 static void hdlcdev_rx(struct slgt_info
*info
, char *buf
, int size
)
1651 struct sk_buff
*skb
= dev_alloc_skb(size
);
1652 struct net_device
*dev
= info
->netdev
;
1653 struct net_device_stats
*stats
= hdlc_stats(dev
);
1655 DBGINFO(("%s hdlcdev_rx\n", dev
->name
));
1658 DBGERR(("%s: can't alloc skb, drop packet\n", dev
->name
));
1659 stats
->rx_dropped
++;
1663 memcpy(skb_put(skb
, size
),buf
,size
);
1665 skb
->protocol
= hdlc_type_trans(skb
, info
->netdev
);
1667 stats
->rx_packets
++;
1668 stats
->rx_bytes
+= size
;
1672 info
->netdev
->last_rx
= jiffies
;
1676 * called by device driver when adding device instance
1677 * do generic HDLC initialization
1679 * info pointer to device instance information
1681 * returns 0 if success, otherwise error code
1683 static int hdlcdev_init(struct slgt_info
*info
)
1686 struct net_device
*dev
;
1689 /* allocate and initialize network and HDLC layer objects */
1691 if (!(dev
= alloc_hdlcdev(info
))) {
1692 printk(KERN_ERR
"%s hdlc device alloc failure\n", info
->device_name
);
1696 /* for network layer reporting purposes only */
1697 dev
->mem_start
= info
->phys_reg_addr
;
1698 dev
->mem_end
= info
->phys_reg_addr
+ SLGT_REG_SIZE
- 1;
1699 dev
->irq
= info
->irq_level
;
1701 /* network layer callbacks and settings */
1702 dev
->do_ioctl
= hdlcdev_ioctl
;
1703 dev
->open
= hdlcdev_open
;
1704 dev
->stop
= hdlcdev_close
;
1705 dev
->tx_timeout
= hdlcdev_tx_timeout
;
1706 dev
->watchdog_timeo
= 10*HZ
;
1707 dev
->tx_queue_len
= 50;
1709 /* generic HDLC layer callbacks and settings */
1710 hdlc
= dev_to_hdlc(dev
);
1711 hdlc
->attach
= hdlcdev_attach
;
1712 hdlc
->xmit
= hdlcdev_xmit
;
1714 /* register objects with HDLC layer */
1715 if ((rc
= register_hdlc_device(dev
))) {
1716 printk(KERN_WARNING
"%s:unable to register hdlc device\n",__FILE__
);
1726 * called by device driver when removing device instance
1727 * do generic HDLC cleanup
1729 * info pointer to device instance information
1731 static void hdlcdev_exit(struct slgt_info
*info
)
1733 unregister_hdlc_device(info
->netdev
);
1734 free_netdev(info
->netdev
);
1735 info
->netdev
= NULL
;
1738 #endif /* ifdef CONFIG_HDLC */
1741 * get async data from rx DMA buffers
1743 static void rx_async(struct slgt_info
*info
)
1745 struct tty_struct
*tty
= info
->tty
;
1746 struct mgsl_icount
*icount
= &info
->icount
;
1747 unsigned int start
, end
;
1749 unsigned char status
;
1750 struct slgt_desc
*bufs
= info
->rbufs
;
1756 start
= end
= info
->rbuf_current
;
1758 while(desc_complete(bufs
[end
])) {
1759 count
= desc_count(bufs
[end
]) - info
->rbuf_index
;
1760 p
= bufs
[end
].buf
+ info
->rbuf_index
;
1762 DBGISR(("%s rx_async count=%d\n", info
->device_name
, count
));
1763 DBGDATA(info
, p
, count
, "rx");
1765 for(i
=0 ; i
< count
; i
+=2, p
+=2) {
1767 tty_flip_buffer_push(tty
);
1775 if ((status
= *(p
+1) & (BIT9
+ BIT8
))) {
1778 else if (status
& BIT8
)
1780 /* discard char if tty control flags say so */
1781 if (status
& info
->ignore_status_mask
)
1785 else if (status
& BIT8
)
1789 tty_insert_flip_char(tty
, ch
, stat
);
1795 /* receive buffer not completed */
1796 info
->rbuf_index
+= i
;
1797 info
->rx_timer
.expires
= jiffies
+ 1;
1798 add_timer(&info
->rx_timer
);
1802 info
->rbuf_index
= 0;
1803 free_rbufs(info
, end
, end
);
1805 if (++end
== info
->rbuf_count
)
1808 /* if entire list searched then no frame available */
1814 tty_flip_buffer_push(tty
);
1818 * return next bottom half action to perform
1820 static int bh_action(struct slgt_info
*info
)
1822 unsigned long flags
;
1825 spin_lock_irqsave(&info
->lock
,flags
);
1827 if (info
->pending_bh
& BH_RECEIVE
) {
1828 info
->pending_bh
&= ~BH_RECEIVE
;
1830 } else if (info
->pending_bh
& BH_TRANSMIT
) {
1831 info
->pending_bh
&= ~BH_TRANSMIT
;
1833 } else if (info
->pending_bh
& BH_STATUS
) {
1834 info
->pending_bh
&= ~BH_STATUS
;
1837 /* Mark BH routine as complete */
1838 info
->bh_running
= 0;
1839 info
->bh_requested
= 0;
1843 spin_unlock_irqrestore(&info
->lock
,flags
);
1849 * perform bottom half processing
1851 static void bh_handler(void* context
)
1853 struct slgt_info
*info
= context
;
1858 info
->bh_running
= 1;
1860 while((action
= bh_action(info
))) {
1863 DBGBH(("%s bh receive\n", info
->device_name
));
1864 switch(info
->params
.mode
) {
1865 case MGSL_MODE_ASYNC
:
1868 case MGSL_MODE_HDLC
:
1869 while(rx_get_frame(info
));
1872 while(rx_get_buf(info
));
1875 /* restart receiver if rx DMA buffers exhausted */
1876 if (info
->rx_restart
)
1883 DBGBH(("%s bh status\n", info
->device_name
));
1884 info
->ri_chkcount
= 0;
1885 info
->dsr_chkcount
= 0;
1886 info
->dcd_chkcount
= 0;
1887 info
->cts_chkcount
= 0;
1890 DBGBH(("%s unknown action\n", info
->device_name
));
1894 DBGBH(("%s bh_handler exit\n", info
->device_name
));
1897 static void bh_transmit(struct slgt_info
*info
)
1899 struct tty_struct
*tty
= info
->tty
;
1901 DBGBH(("%s bh_transmit\n", info
->device_name
));
1904 wake_up_interruptible(&tty
->write_wait
);
1908 static void dsr_change(struct slgt_info
*info
)
1911 DBGISR(("dsr_change %s signals=%04X\n", info
->device_name
, info
->signals
));
1912 if ((info
->dsr_chkcount
)++ == IO_PIN_SHUTDOWN_LIMIT
) {
1913 slgt_irq_off(info
, IRQ_DSR
);
1917 if (info
->signals
& SerialSignal_DSR
)
1918 info
->input_signal_events
.dsr_up
++;
1920 info
->input_signal_events
.dsr_down
++;
1921 wake_up_interruptible(&info
->status_event_wait_q
);
1922 wake_up_interruptible(&info
->event_wait_q
);
1923 info
->pending_bh
|= BH_STATUS
;
1926 static void cts_change(struct slgt_info
*info
)
1929 DBGISR(("cts_change %s signals=%04X\n", info
->device_name
, info
->signals
));
1930 if ((info
->cts_chkcount
)++ == IO_PIN_SHUTDOWN_LIMIT
) {
1931 slgt_irq_off(info
, IRQ_CTS
);
1935 if (info
->signals
& SerialSignal_CTS
)
1936 info
->input_signal_events
.cts_up
++;
1938 info
->input_signal_events
.cts_down
++;
1939 wake_up_interruptible(&info
->status_event_wait_q
);
1940 wake_up_interruptible(&info
->event_wait_q
);
1941 info
->pending_bh
|= BH_STATUS
;
1943 if (info
->flags
& ASYNC_CTS_FLOW
) {
1945 if (info
->tty
->hw_stopped
) {
1946 if (info
->signals
& SerialSignal_CTS
) {
1947 info
->tty
->hw_stopped
= 0;
1948 info
->pending_bh
|= BH_TRANSMIT
;
1952 if (!(info
->signals
& SerialSignal_CTS
))
1953 info
->tty
->hw_stopped
= 1;
1959 static void dcd_change(struct slgt_info
*info
)
1962 DBGISR(("dcd_change %s signals=%04X\n", info
->device_name
, info
->signals
));
1963 if ((info
->dcd_chkcount
)++ == IO_PIN_SHUTDOWN_LIMIT
) {
1964 slgt_irq_off(info
, IRQ_DCD
);
1968 if (info
->signals
& SerialSignal_DCD
) {
1969 info
->input_signal_events
.dcd_up
++;
1971 info
->input_signal_events
.dcd_down
++;
1975 hdlc_set_carrier(info
->signals
& SerialSignal_DCD
, info
->netdev
);
1977 wake_up_interruptible(&info
->status_event_wait_q
);
1978 wake_up_interruptible(&info
->event_wait_q
);
1979 info
->pending_bh
|= BH_STATUS
;
1981 if (info
->flags
& ASYNC_CHECK_CD
) {
1982 if (info
->signals
& SerialSignal_DCD
)
1983 wake_up_interruptible(&info
->open_wait
);
1986 tty_hangup(info
->tty
);
1991 static void ri_change(struct slgt_info
*info
)
1994 DBGISR(("ri_change %s signals=%04X\n", info
->device_name
, info
->signals
));
1995 if ((info
->ri_chkcount
)++ == IO_PIN_SHUTDOWN_LIMIT
) {
1996 slgt_irq_off(info
, IRQ_RI
);
2000 if (info
->signals
& SerialSignal_RI
) {
2001 info
->input_signal_events
.ri_up
++;
2003 info
->input_signal_events
.ri_down
++;
2005 wake_up_interruptible(&info
->status_event_wait_q
);
2006 wake_up_interruptible(&info
->event_wait_q
);
2007 info
->pending_bh
|= BH_STATUS
;
2010 static void isr_serial(struct slgt_info
*info
)
2012 unsigned short status
= rd_reg16(info
, SSR
);
2014 DBGISR(("%s isr_serial status=%04X\n", info
->device_name
, status
));
2016 wr_reg16(info
, SSR
, status
); /* clear pending */
2018 info
->irq_occurred
= 1;
2020 if (info
->params
.mode
== MGSL_MODE_ASYNC
) {
2021 if (status
& IRQ_TXIDLE
) {
2023 isr_txeom(info
, status
);
2025 if ((status
& IRQ_RXBREAK
) && (status
& RXBREAK
)) {
2027 /* process break detection if tty control allows */
2029 if (!(status
& info
->ignore_status_mask
)) {
2030 if (info
->read_status_mask
& MASK_BREAK
) {
2031 tty_insert_flip_char(info
->tty
, 0, TTY_BREAK
);
2032 if (info
->flags
& ASYNC_SAK
)
2039 if (status
& (IRQ_TXIDLE
+ IRQ_TXUNDER
))
2040 isr_txeom(info
, status
);
2042 if (status
& IRQ_RXIDLE
) {
2043 if (status
& RXIDLE
)
2044 info
->icount
.rxidle
++;
2046 info
->icount
.exithunt
++;
2047 wake_up_interruptible(&info
->event_wait_q
);
2050 if (status
& IRQ_RXOVER
)
2054 if (status
& IRQ_DSR
)
2056 if (status
& IRQ_CTS
)
2058 if (status
& IRQ_DCD
)
2060 if (status
& IRQ_RI
)
2064 static void isr_rdma(struct slgt_info
*info
)
2066 unsigned int status
= rd_reg32(info
, RDCSR
);
2068 DBGISR(("%s isr_rdma status=%08x\n", info
->device_name
, status
));
2070 /* RDCSR (rx DMA control/status)
2073 * 06 save status byte to DMA buffer
2075 * 04 eol (end of list)
2076 * 03 eob (end of buffer)
2081 wr_reg32(info
, RDCSR
, status
); /* clear pending */
2083 if (status
& (BIT5
+ BIT4
)) {
2084 DBGISR(("%s isr_rdma rx_restart=1\n", info
->device_name
));
2085 info
->rx_restart
= 1;
2087 info
->pending_bh
|= BH_RECEIVE
;
2090 static void isr_tdma(struct slgt_info
*info
)
2092 unsigned int status
= rd_reg32(info
, TDCSR
);
2094 DBGISR(("%s isr_tdma status=%08x\n", info
->device_name
, status
));
2096 /* TDCSR (tx DMA control/status)
2100 * 04 eol (end of list)
2101 * 03 eob (end of buffer)
2106 wr_reg32(info
, TDCSR
, status
); /* clear pending */
2108 if (status
& (BIT5
+ BIT4
+ BIT3
)) {
2109 // another transmit buffer has completed
2110 // run bottom half to get more send data from user
2111 info
->pending_bh
|= BH_TRANSMIT
;
2115 static void isr_txeom(struct slgt_info
*info
, unsigned short status
)
2117 DBGISR(("%s txeom status=%04x\n", info
->device_name
, status
));
2119 slgt_irq_off(info
, IRQ_TXDATA
+ IRQ_TXIDLE
+ IRQ_TXUNDER
);
2122 if (status
& IRQ_TXUNDER
) {
2123 unsigned short val
= rd_reg16(info
, TCR
);
2124 wr_reg16(info
, TCR
, (unsigned short)(val
| BIT2
)); /* set reset bit */
2125 wr_reg16(info
, TCR
, val
); /* clear reset bit */
2128 if (info
->tx_active
) {
2129 if (info
->params
.mode
!= MGSL_MODE_ASYNC
) {
2130 if (status
& IRQ_TXUNDER
)
2131 info
->icount
.txunder
++;
2132 else if (status
& IRQ_TXIDLE
)
2133 info
->icount
.txok
++;
2136 info
->tx_active
= 0;
2139 del_timer(&info
->tx_timer
);
2141 if (info
->params
.mode
!= MGSL_MODE_ASYNC
&& info
->drop_rts_on_tx_done
) {
2142 info
->signals
&= ~SerialSignal_RTS
;
2143 info
->drop_rts_on_tx_done
= 0;
2149 hdlcdev_tx_done(info
);
2153 if (info
->tty
&& (info
->tty
->stopped
|| info
->tty
->hw_stopped
)) {
2157 info
->pending_bh
|= BH_TRANSMIT
;
2162 /* interrupt service routine
2164 * irq interrupt number
2165 * dev_id device ID supplied during interrupt registration
2166 * regs interrupted processor context
2168 static irqreturn_t
slgt_interrupt(int irq
, void *dev_id
, struct pt_regs
* regs
)
2170 struct slgt_info
*info
;
2174 DBGISR(("slgt_interrupt irq=%d entry\n", irq
));
2180 spin_lock(&info
->lock
);
2182 while((gsr
= rd_reg32(info
, GSR
) & 0xffffff00)) {
2183 DBGISR(("%s gsr=%08x\n", info
->device_name
, gsr
));
2184 info
->irq_occurred
= 1;
2185 for(i
=0; i
< info
->port_count
; i
++) {
2186 if (info
->port_array
[i
] == NULL
)
2188 if (gsr
& (BIT8
<< i
))
2189 isr_serial(info
->port_array
[i
]);
2190 if (gsr
& (BIT16
<< (i
*2)))
2191 isr_rdma(info
->port_array
[i
]);
2192 if (gsr
& (BIT17
<< (i
*2)))
2193 isr_tdma(info
->port_array
[i
]);
2197 for(i
=0; i
< info
->port_count
; i
++) {
2198 struct slgt_info
*port
= info
->port_array
[i
];
2200 if (port
&& (port
->count
|| port
->netcount
) &&
2201 port
->pending_bh
&& !port
->bh_running
&&
2202 !port
->bh_requested
) {
2203 DBGISR(("%s bh queued\n", port
->device_name
));
2204 schedule_work(&port
->task
);
2205 port
->bh_requested
= 1;
2209 spin_unlock(&info
->lock
);
2211 DBGISR(("slgt_interrupt irq=%d exit\n", irq
));
2215 static int startup(struct slgt_info
*info
)
2217 DBGINFO(("%s startup\n", info
->device_name
));
2219 if (info
->flags
& ASYNC_INITIALIZED
)
2222 if (!info
->tx_buf
) {
2223 info
->tx_buf
= kmalloc(info
->max_frame_size
, GFP_KERNEL
);
2224 if (!info
->tx_buf
) {
2225 DBGERR(("%s can't allocate tx buffer\n", info
->device_name
));
2230 info
->pending_bh
= 0;
2232 memset(&info
->icount
, 0, sizeof(info
->icount
));
2234 /* program hardware for current parameters */
2235 change_params(info
);
2238 clear_bit(TTY_IO_ERROR
, &info
->tty
->flags
);
2240 info
->flags
|= ASYNC_INITIALIZED
;
2246 * called by close() and hangup() to shutdown hardware
2248 static void shutdown(struct slgt_info
*info
)
2250 unsigned long flags
;
2252 if (!(info
->flags
& ASYNC_INITIALIZED
))
2255 DBGINFO(("%s shutdown\n", info
->device_name
));
2257 /* clear status wait queue because status changes */
2258 /* can't happen after shutting down the hardware */
2259 wake_up_interruptible(&info
->status_event_wait_q
);
2260 wake_up_interruptible(&info
->event_wait_q
);
2262 del_timer_sync(&info
->tx_timer
);
2263 del_timer_sync(&info
->rx_timer
);
2265 kfree(info
->tx_buf
);
2266 info
->tx_buf
= NULL
;
2268 spin_lock_irqsave(&info
->lock
,flags
);
2273 slgt_irq_off(info
, IRQ_ALL
| IRQ_MASTER
);
2275 if (!info
->tty
|| info
->tty
->termios
->c_cflag
& HUPCL
) {
2276 info
->signals
&= ~(SerialSignal_DTR
+ SerialSignal_RTS
);
2280 spin_unlock_irqrestore(&info
->lock
,flags
);
2283 set_bit(TTY_IO_ERROR
, &info
->tty
->flags
);
2285 info
->flags
&= ~ASYNC_INITIALIZED
;
2288 static void program_hw(struct slgt_info
*info
)
2290 unsigned long flags
;
2292 spin_lock_irqsave(&info
->lock
,flags
);
2297 if (info
->params
.mode
== MGSL_MODE_HDLC
||
2298 info
->params
.mode
== MGSL_MODE_RAW
||
2306 info
->dcd_chkcount
= 0;
2307 info
->cts_chkcount
= 0;
2308 info
->ri_chkcount
= 0;
2309 info
->dsr_chkcount
= 0;
2311 slgt_irq_on(info
, IRQ_DCD
| IRQ_CTS
| IRQ_DSR
);
2314 if (info
->netcount
||
2315 (info
->tty
&& info
->tty
->termios
->c_cflag
& CREAD
))
2318 spin_unlock_irqrestore(&info
->lock
,flags
);
2322 * reconfigure adapter based on new parameters
2324 static void change_params(struct slgt_info
*info
)
2329 if (!info
->tty
|| !info
->tty
->termios
)
2331 DBGINFO(("%s change_params\n", info
->device_name
));
2333 cflag
= info
->tty
->termios
->c_cflag
;
2335 /* if B0 rate (hangup) specified then negate DTR and RTS */
2336 /* otherwise assert DTR and RTS */
2338 info
->signals
|= SerialSignal_RTS
+ SerialSignal_DTR
;
2340 info
->signals
&= ~(SerialSignal_RTS
+ SerialSignal_DTR
);
2342 /* byte size and parity */
2344 switch (cflag
& CSIZE
) {
2345 case CS5
: info
->params
.data_bits
= 5; break;
2346 case CS6
: info
->params
.data_bits
= 6; break;
2347 case CS7
: info
->params
.data_bits
= 7; break;
2348 case CS8
: info
->params
.data_bits
= 8; break;
2349 default: info
->params
.data_bits
= 7; break;
2352 info
->params
.stop_bits
= (cflag
& CSTOPB
) ? 2 : 1;
2355 info
->params
.parity
= (cflag
& PARODD
) ? ASYNC_PARITY_ODD
: ASYNC_PARITY_EVEN
;
2357 info
->params
.parity
= ASYNC_PARITY_NONE
;
2359 /* calculate number of jiffies to transmit a full
2360 * FIFO (32 bytes) at specified data rate
2362 bits_per_char
= info
->params
.data_bits
+
2363 info
->params
.stop_bits
+ 1;
2365 info
->params
.data_rate
= tty_get_baud_rate(info
->tty
);
2367 if (info
->params
.data_rate
) {
2368 info
->timeout
= (32*HZ
*bits_per_char
) /
2369 info
->params
.data_rate
;
2371 info
->timeout
+= HZ
/50; /* Add .02 seconds of slop */
2373 if (cflag
& CRTSCTS
)
2374 info
->flags
|= ASYNC_CTS_FLOW
;
2376 info
->flags
&= ~ASYNC_CTS_FLOW
;
2379 info
->flags
&= ~ASYNC_CHECK_CD
;
2381 info
->flags
|= ASYNC_CHECK_CD
;
2383 /* process tty input control flags */
2385 info
->read_status_mask
= IRQ_RXOVER
;
2386 if (I_INPCK(info
->tty
))
2387 info
->read_status_mask
|= MASK_PARITY
| MASK_FRAMING
;
2388 if (I_BRKINT(info
->tty
) || I_PARMRK(info
->tty
))
2389 info
->read_status_mask
|= MASK_BREAK
;
2390 if (I_IGNPAR(info
->tty
))
2391 info
->ignore_status_mask
|= MASK_PARITY
| MASK_FRAMING
;
2392 if (I_IGNBRK(info
->tty
)) {
2393 info
->ignore_status_mask
|= MASK_BREAK
;
2394 /* If ignoring parity and break indicators, ignore
2395 * overruns too. (For real raw support).
2397 if (I_IGNPAR(info
->tty
))
2398 info
->ignore_status_mask
|= MASK_OVERRUN
;
2404 static int get_stats(struct slgt_info
*info
, struct mgsl_icount __user
*user_icount
)
2406 DBGINFO(("%s get_stats\n", info
->device_name
));
2408 memset(&info
->icount
, 0, sizeof(info
->icount
));
2410 if (copy_to_user(user_icount
, &info
->icount
, sizeof(struct mgsl_icount
)))
2416 static int get_params(struct slgt_info
*info
, MGSL_PARAMS __user
*user_params
)
2418 DBGINFO(("%s get_params\n", info
->device_name
));
2419 if (copy_to_user(user_params
, &info
->params
, sizeof(MGSL_PARAMS
)))
2424 static int set_params(struct slgt_info
*info
, MGSL_PARAMS __user
*new_params
)
2426 unsigned long flags
;
2427 MGSL_PARAMS tmp_params
;
2429 DBGINFO(("%s set_params\n", info
->device_name
));
2430 if (copy_from_user(&tmp_params
, new_params
, sizeof(MGSL_PARAMS
)))
2433 spin_lock_irqsave(&info
->lock
, flags
);
2434 memcpy(&info
->params
, &tmp_params
, sizeof(MGSL_PARAMS
));
2435 spin_unlock_irqrestore(&info
->lock
, flags
);
2437 change_params(info
);
2442 static int get_txidle(struct slgt_info
*info
, int __user
*idle_mode
)
2444 DBGINFO(("%s get_txidle=%d\n", info
->device_name
, info
->idle_mode
));
2445 if (put_user(info
->idle_mode
, idle_mode
))
2450 static int set_txidle(struct slgt_info
*info
, int idle_mode
)
2452 unsigned long flags
;
2453 DBGINFO(("%s set_txidle(%d)\n", info
->device_name
, idle_mode
));
2454 spin_lock_irqsave(&info
->lock
,flags
);
2455 info
->idle_mode
= idle_mode
;
2457 spin_unlock_irqrestore(&info
->lock
,flags
);
2461 static int tx_enable(struct slgt_info
*info
, int enable
)
2463 unsigned long flags
;
2464 DBGINFO(("%s tx_enable(%d)\n", info
->device_name
, enable
));
2465 spin_lock_irqsave(&info
->lock
,flags
);
2467 if (!info
->tx_enabled
)
2470 if (info
->tx_enabled
)
2473 spin_unlock_irqrestore(&info
->lock
,flags
);
2478 * abort transmit HDLC frame
2480 static int tx_abort(struct slgt_info
*info
)
2482 unsigned long flags
;
2483 DBGINFO(("%s tx_abort\n", info
->device_name
));
2484 spin_lock_irqsave(&info
->lock
,flags
);
2486 spin_unlock_irqrestore(&info
->lock
,flags
);
2490 static int rx_enable(struct slgt_info
*info
, int enable
)
2492 unsigned long flags
;
2493 DBGINFO(("%s rx_enable(%d)\n", info
->device_name
, enable
));
2494 spin_lock_irqsave(&info
->lock
,flags
);
2496 if (!info
->rx_enabled
)
2499 if (info
->rx_enabled
)
2502 spin_unlock_irqrestore(&info
->lock
,flags
);
2507 * wait for specified event to occur
2509 static int wait_mgsl_event(struct slgt_info
*info
, int __user
*mask_ptr
)
2511 unsigned long flags
;
2514 struct mgsl_icount cprev
, cnow
;
2517 struct _input_signal_events oldsigs
, newsigs
;
2518 DECLARE_WAITQUEUE(wait
, current
);
2520 if (get_user(mask
, mask_ptr
))
2523 DBGINFO(("%s wait_mgsl_event(%d)\n", info
->device_name
, mask
));
2525 spin_lock_irqsave(&info
->lock
,flags
);
2527 /* return immediately if state matches requested events */
2532 ( ((s
& SerialSignal_DSR
) ? MgslEvent_DsrActive
:MgslEvent_DsrInactive
) +
2533 ((s
& SerialSignal_DCD
) ? MgslEvent_DcdActive
:MgslEvent_DcdInactive
) +
2534 ((s
& SerialSignal_CTS
) ? MgslEvent_CtsActive
:MgslEvent_CtsInactive
) +
2535 ((s
& SerialSignal_RI
) ? MgslEvent_RiActive
:MgslEvent_RiInactive
) );
2537 spin_unlock_irqrestore(&info
->lock
,flags
);
2541 /* save current irq counts */
2542 cprev
= info
->icount
;
2543 oldsigs
= info
->input_signal_events
;
2545 /* enable hunt and idle irqs if needed */
2546 if (mask
& (MgslEvent_ExitHuntMode
+MgslEvent_IdleReceived
)) {
2547 unsigned short val
= rd_reg16(info
, SCR
);
2548 if (!(val
& IRQ_RXIDLE
))
2549 wr_reg16(info
, SCR
, (unsigned short)(val
| IRQ_RXIDLE
));
2552 set_current_state(TASK_INTERRUPTIBLE
);
2553 add_wait_queue(&info
->event_wait_q
, &wait
);
2555 spin_unlock_irqrestore(&info
->lock
,flags
);
2559 if (signal_pending(current
)) {
2564 /* get current irq counts */
2565 spin_lock_irqsave(&info
->lock
,flags
);
2566 cnow
= info
->icount
;
2567 newsigs
= info
->input_signal_events
;
2568 set_current_state(TASK_INTERRUPTIBLE
);
2569 spin_unlock_irqrestore(&info
->lock
,flags
);
2571 /* if no change, wait aborted for some reason */
2572 if (newsigs
.dsr_up
== oldsigs
.dsr_up
&&
2573 newsigs
.dsr_down
== oldsigs
.dsr_down
&&
2574 newsigs
.dcd_up
== oldsigs
.dcd_up
&&
2575 newsigs
.dcd_down
== oldsigs
.dcd_down
&&
2576 newsigs
.cts_up
== oldsigs
.cts_up
&&
2577 newsigs
.cts_down
== oldsigs
.cts_down
&&
2578 newsigs
.ri_up
== oldsigs
.ri_up
&&
2579 newsigs
.ri_down
== oldsigs
.ri_down
&&
2580 cnow
.exithunt
== cprev
.exithunt
&&
2581 cnow
.rxidle
== cprev
.rxidle
) {
2587 ( (newsigs
.dsr_up
!= oldsigs
.dsr_up
? MgslEvent_DsrActive
:0) +
2588 (newsigs
.dsr_down
!= oldsigs
.dsr_down
? MgslEvent_DsrInactive
:0) +
2589 (newsigs
.dcd_up
!= oldsigs
.dcd_up
? MgslEvent_DcdActive
:0) +
2590 (newsigs
.dcd_down
!= oldsigs
.dcd_down
? MgslEvent_DcdInactive
:0) +
2591 (newsigs
.cts_up
!= oldsigs
.cts_up
? MgslEvent_CtsActive
:0) +
2592 (newsigs
.cts_down
!= oldsigs
.cts_down
? MgslEvent_CtsInactive
:0) +
2593 (newsigs
.ri_up
!= oldsigs
.ri_up
? MgslEvent_RiActive
:0) +
2594 (newsigs
.ri_down
!= oldsigs
.ri_down
? MgslEvent_RiInactive
:0) +
2595 (cnow
.exithunt
!= cprev
.exithunt
? MgslEvent_ExitHuntMode
:0) +
2596 (cnow
.rxidle
!= cprev
.rxidle
? MgslEvent_IdleReceived
:0) );
2604 remove_wait_queue(&info
->event_wait_q
, &wait
);
2605 set_current_state(TASK_RUNNING
);
2608 if (mask
& (MgslEvent_ExitHuntMode
+ MgslEvent_IdleReceived
)) {
2609 spin_lock_irqsave(&info
->lock
,flags
);
2610 if (!waitqueue_active(&info
->event_wait_q
)) {
2611 /* disable enable exit hunt mode/idle rcvd IRQs */
2613 (unsigned short)(rd_reg16(info
, SCR
) & ~IRQ_RXIDLE
));
2615 spin_unlock_irqrestore(&info
->lock
,flags
);
2619 rc
= put_user(events
, mask_ptr
);
2623 static int get_interface(struct slgt_info
*info
, int __user
*if_mode
)
2625 DBGINFO(("%s get_interface=%x\n", info
->device_name
, info
->if_mode
));
2626 if (put_user(info
->if_mode
, if_mode
))
2631 static int set_interface(struct slgt_info
*info
, int if_mode
)
2633 unsigned long flags
;
2636 DBGINFO(("%s set_interface=%x)\n", info
->device_name
, if_mode
));
2637 spin_lock_irqsave(&info
->lock
,flags
);
2638 info
->if_mode
= if_mode
;
2642 /* TCR (tx control) 07 1=RTS driver control */
2643 val
= rd_reg16(info
, TCR
);
2644 if (info
->if_mode
& MGSL_INTERFACE_RTS_EN
)
2648 wr_reg16(info
, TCR
, val
);
2650 spin_unlock_irqrestore(&info
->lock
,flags
);
2654 static int modem_input_wait(struct slgt_info
*info
,int arg
)
2656 unsigned long flags
;
2658 struct mgsl_icount cprev
, cnow
;
2659 DECLARE_WAITQUEUE(wait
, current
);
2661 /* save current irq counts */
2662 spin_lock_irqsave(&info
->lock
,flags
);
2663 cprev
= info
->icount
;
2664 add_wait_queue(&info
->status_event_wait_q
, &wait
);
2665 set_current_state(TASK_INTERRUPTIBLE
);
2666 spin_unlock_irqrestore(&info
->lock
,flags
);
2670 if (signal_pending(current
)) {
2675 /* get new irq counts */
2676 spin_lock_irqsave(&info
->lock
,flags
);
2677 cnow
= info
->icount
;
2678 set_current_state(TASK_INTERRUPTIBLE
);
2679 spin_unlock_irqrestore(&info
->lock
,flags
);
2681 /* if no change, wait aborted for some reason */
2682 if (cnow
.rng
== cprev
.rng
&& cnow
.dsr
== cprev
.dsr
&&
2683 cnow
.dcd
== cprev
.dcd
&& cnow
.cts
== cprev
.cts
) {
2688 /* check for change in caller specified modem input */
2689 if ((arg
& TIOCM_RNG
&& cnow
.rng
!= cprev
.rng
) ||
2690 (arg
& TIOCM_DSR
&& cnow
.dsr
!= cprev
.dsr
) ||
2691 (arg
& TIOCM_CD
&& cnow
.dcd
!= cprev
.dcd
) ||
2692 (arg
& TIOCM_CTS
&& cnow
.cts
!= cprev
.cts
)) {
2699 remove_wait_queue(&info
->status_event_wait_q
, &wait
);
2700 set_current_state(TASK_RUNNING
);
2705 * return state of serial control and status signals
2707 static int tiocmget(struct tty_struct
*tty
, struct file
*file
)
2709 struct slgt_info
*info
= tty
->driver_data
;
2710 unsigned int result
;
2711 unsigned long flags
;
2713 spin_lock_irqsave(&info
->lock
,flags
);
2715 spin_unlock_irqrestore(&info
->lock
,flags
);
2717 result
= ((info
->signals
& SerialSignal_RTS
) ? TIOCM_RTS
:0) +
2718 ((info
->signals
& SerialSignal_DTR
) ? TIOCM_DTR
:0) +
2719 ((info
->signals
& SerialSignal_DCD
) ? TIOCM_CAR
:0) +
2720 ((info
->signals
& SerialSignal_RI
) ? TIOCM_RNG
:0) +
2721 ((info
->signals
& SerialSignal_DSR
) ? TIOCM_DSR
:0) +
2722 ((info
->signals
& SerialSignal_CTS
) ? TIOCM_CTS
:0);
2724 DBGINFO(("%s tiocmget value=%08X\n", info
->device_name
, result
));
2729 * set modem control signals (DTR/RTS)
2731 * cmd signal command: TIOCMBIS = set bit TIOCMBIC = clear bit
2732 * TIOCMSET = set/clear signal values
2733 * value bit mask for command
2735 static int tiocmset(struct tty_struct
*tty
, struct file
*file
,
2736 unsigned int set
, unsigned int clear
)
2738 struct slgt_info
*info
= tty
->driver_data
;
2739 unsigned long flags
;
2741 DBGINFO(("%s tiocmset(%x,%x)\n", info
->device_name
, set
, clear
));
2743 if (set
& TIOCM_RTS
)
2744 info
->signals
|= SerialSignal_RTS
;
2745 if (set
& TIOCM_DTR
)
2746 info
->signals
|= SerialSignal_DTR
;
2747 if (clear
& TIOCM_RTS
)
2748 info
->signals
&= ~SerialSignal_RTS
;
2749 if (clear
& TIOCM_DTR
)
2750 info
->signals
&= ~SerialSignal_DTR
;
2752 spin_lock_irqsave(&info
->lock
,flags
);
2754 spin_unlock_irqrestore(&info
->lock
,flags
);
2759 * block current process until the device is ready to open
2761 static int block_til_ready(struct tty_struct
*tty
, struct file
*filp
,
2762 struct slgt_info
*info
)
2764 DECLARE_WAITQUEUE(wait
, current
);
2766 int do_clocal
= 0, extra_count
= 0;
2767 unsigned long flags
;
2769 DBGINFO(("%s block_til_ready\n", tty
->driver
->name
));
2771 if (filp
->f_flags
& O_NONBLOCK
|| tty
->flags
& (1 << TTY_IO_ERROR
)){
2772 /* nonblock mode is set or port is not enabled */
2773 info
->flags
|= ASYNC_NORMAL_ACTIVE
;
2777 if (tty
->termios
->c_cflag
& CLOCAL
)
2780 /* Wait for carrier detect and the line to become
2781 * free (i.e., not in use by the callout). While we are in
2782 * this loop, info->count is dropped by one, so that
2783 * close() knows when to free things. We restore it upon
2784 * exit, either normal or abnormal.
2788 add_wait_queue(&info
->open_wait
, &wait
);
2790 spin_lock_irqsave(&info
->lock
, flags
);
2791 if (!tty_hung_up_p(filp
)) {
2795 spin_unlock_irqrestore(&info
->lock
, flags
);
2796 info
->blocked_open
++;
2799 if ((tty
->termios
->c_cflag
& CBAUD
)) {
2800 spin_lock_irqsave(&info
->lock
,flags
);
2801 info
->signals
|= SerialSignal_RTS
+ SerialSignal_DTR
;
2803 spin_unlock_irqrestore(&info
->lock
,flags
);
2806 set_current_state(TASK_INTERRUPTIBLE
);
2808 if (tty_hung_up_p(filp
) || !(info
->flags
& ASYNC_INITIALIZED
)){
2809 retval
= (info
->flags
& ASYNC_HUP_NOTIFY
) ?
2810 -EAGAIN
: -ERESTARTSYS
;
2814 spin_lock_irqsave(&info
->lock
,flags
);
2816 spin_unlock_irqrestore(&info
->lock
,flags
);
2818 if (!(info
->flags
& ASYNC_CLOSING
) &&
2819 (do_clocal
|| (info
->signals
& SerialSignal_DCD
)) ) {
2823 if (signal_pending(current
)) {
2824 retval
= -ERESTARTSYS
;
2828 DBGINFO(("%s block_til_ready wait\n", tty
->driver
->name
));
2832 set_current_state(TASK_RUNNING
);
2833 remove_wait_queue(&info
->open_wait
, &wait
);
2837 info
->blocked_open
--;
2840 info
->flags
|= ASYNC_NORMAL_ACTIVE
;
2842 DBGINFO(("%s block_til_ready ready, rc=%d\n", tty
->driver
->name
, retval
));
2846 static int alloc_tmp_rbuf(struct slgt_info
*info
)
2848 info
->tmp_rbuf
= kmalloc(info
->max_frame_size
, GFP_KERNEL
);
2849 if (info
->tmp_rbuf
== NULL
)
2854 static void free_tmp_rbuf(struct slgt_info
*info
)
2856 kfree(info
->tmp_rbuf
);
2857 info
->tmp_rbuf
= NULL
;
2861 * allocate DMA descriptor lists.
2863 static int alloc_desc(struct slgt_info
*info
)
2868 /* allocate memory to hold descriptor lists */
2869 info
->bufs
= pci_alloc_consistent(info
->pdev
, DESC_LIST_SIZE
, &info
->bufs_dma_addr
);
2870 if (info
->bufs
== NULL
)
2873 memset(info
->bufs
, 0, DESC_LIST_SIZE
);
2875 info
->rbufs
= (struct slgt_desc
*)info
->bufs
;
2876 info
->tbufs
= ((struct slgt_desc
*)info
->bufs
) + info
->rbuf_count
;
2878 pbufs
= (unsigned int)info
->bufs_dma_addr
;
2881 * Build circular lists of descriptors
2884 for (i
=0; i
< info
->rbuf_count
; i
++) {
2885 /* physical address of this descriptor */
2886 info
->rbufs
[i
].pdesc
= pbufs
+ (i
* sizeof(struct slgt_desc
));
2888 /* physical address of next descriptor */
2889 if (i
== info
->rbuf_count
- 1)
2890 info
->rbufs
[i
].next
= cpu_to_le32(pbufs
);
2892 info
->rbufs
[i
].next
= cpu_to_le32(pbufs
+ ((i
+1) * sizeof(struct slgt_desc
)));
2893 set_desc_count(info
->rbufs
[i
], DMABUFSIZE
);
2896 for (i
=0; i
< info
->tbuf_count
; i
++) {
2897 /* physical address of this descriptor */
2898 info
->tbufs
[i
].pdesc
= pbufs
+ ((info
->rbuf_count
+ i
) * sizeof(struct slgt_desc
));
2900 /* physical address of next descriptor */
2901 if (i
== info
->tbuf_count
- 1)
2902 info
->tbufs
[i
].next
= cpu_to_le32(pbufs
+ info
->rbuf_count
* sizeof(struct slgt_desc
));
2904 info
->tbufs
[i
].next
= cpu_to_le32(pbufs
+ ((info
->rbuf_count
+ i
+ 1) * sizeof(struct slgt_desc
)));
2910 static void free_desc(struct slgt_info
*info
)
2912 if (info
->bufs
!= NULL
) {
2913 pci_free_consistent(info
->pdev
, DESC_LIST_SIZE
, info
->bufs
, info
->bufs_dma_addr
);
2920 static int alloc_bufs(struct slgt_info
*info
, struct slgt_desc
*bufs
, int count
)
2923 for (i
=0; i
< count
; i
++) {
2924 if ((bufs
[i
].buf
= pci_alloc_consistent(info
->pdev
, DMABUFSIZE
, &bufs
[i
].buf_dma_addr
)) == NULL
)
2926 bufs
[i
].pbuf
= cpu_to_le32((unsigned int)bufs
[i
].buf_dma_addr
);
2931 static void free_bufs(struct slgt_info
*info
, struct slgt_desc
*bufs
, int count
)
2934 for (i
=0; i
< count
; i
++) {
2935 if (bufs
[i
].buf
== NULL
)
2937 pci_free_consistent(info
->pdev
, DMABUFSIZE
, bufs
[i
].buf
, bufs
[i
].buf_dma_addr
);
2942 static int alloc_dma_bufs(struct slgt_info
*info
)
2944 info
->rbuf_count
= 32;
2945 info
->tbuf_count
= 32;
2947 if (alloc_desc(info
) < 0 ||
2948 alloc_bufs(info
, info
->rbufs
, info
->rbuf_count
) < 0 ||
2949 alloc_bufs(info
, info
->tbufs
, info
->tbuf_count
) < 0 ||
2950 alloc_tmp_rbuf(info
) < 0) {
2951 DBGERR(("%s DMA buffer alloc fail\n", info
->device_name
));
2958 static void free_dma_bufs(struct slgt_info
*info
)
2961 free_bufs(info
, info
->rbufs
, info
->rbuf_count
);
2962 free_bufs(info
, info
->tbufs
, info
->tbuf_count
);
2965 free_tmp_rbuf(info
);
2968 static int claim_resources(struct slgt_info
*info
)
2970 if (request_mem_region(info
->phys_reg_addr
, SLGT_REG_SIZE
, "synclink_gt") == NULL
) {
2971 DBGERR(("%s reg addr conflict, addr=%08X\n",
2972 info
->device_name
, info
->phys_reg_addr
));
2973 info
->init_error
= DiagStatus_AddressConflict
;
2977 info
->reg_addr_requested
= 1;
2979 info
->reg_addr
= ioremap(info
->phys_reg_addr
, PAGE_SIZE
);
2980 if (!info
->reg_addr
) {
2981 DBGERR(("%s cant map device registers, addr=%08X\n",
2982 info
->device_name
, info
->phys_reg_addr
));
2983 info
->init_error
= DiagStatus_CantAssignPciResources
;
2986 info
->reg_addr
+= info
->reg_offset
;
2990 release_resources(info
);
2994 static void release_resources(struct slgt_info
*info
)
2996 if (info
->irq_requested
) {
2997 free_irq(info
->irq_level
, info
);
2998 info
->irq_requested
= 0;
3001 if (info
->reg_addr_requested
) {
3002 release_mem_region(info
->phys_reg_addr
, SLGT_REG_SIZE
);
3003 info
->reg_addr_requested
= 0;
3006 if (info
->reg_addr
) {
3007 iounmap(info
->reg_addr
- info
->reg_offset
);
3008 info
->reg_addr
= NULL
;
3012 /* Add the specified device instance data structure to the
3013 * global linked list of devices and increment the device count.
3015 static void add_device(struct slgt_info
*info
)
3019 info
->next_device
= NULL
;
3020 info
->line
= slgt_device_count
;
3021 sprintf(info
->device_name
, "%s%d", tty_dev_prefix
, info
->line
);
3023 if (info
->line
< MAX_DEVICES
) {
3024 if (maxframe
[info
->line
])
3025 info
->max_frame_size
= maxframe
[info
->line
];
3026 info
->dosyncppp
= dosyncppp
[info
->line
];
3029 slgt_device_count
++;
3031 if (!slgt_device_list
)
3032 slgt_device_list
= info
;
3034 struct slgt_info
*current_dev
= slgt_device_list
;
3035 while(current_dev
->next_device
)
3036 current_dev
= current_dev
->next_device
;
3037 current_dev
->next_device
= info
;
3040 if (info
->max_frame_size
< 4096)
3041 info
->max_frame_size
= 4096;
3042 else if (info
->max_frame_size
> 65535)
3043 info
->max_frame_size
= 65535;
3045 switch(info
->pdev
->device
) {
3046 case SYNCLINK_GT_DEVICE_ID
:
3049 case SYNCLINK_GT4_DEVICE_ID
:
3052 case SYNCLINK_AC_DEVICE_ID
:
3054 info
->params
.mode
= MGSL_MODE_ASYNC
;
3057 devstr
= "(unknown model)";
3059 printk("SyncLink %s %s IO=%08x IRQ=%d MaxFrameSize=%u\n",
3060 devstr
, info
->device_name
, info
->phys_reg_addr
,
3061 info
->irq_level
, info
->max_frame_size
);
3069 * allocate device instance structure, return NULL on failure
3071 static struct slgt_info
*alloc_dev(int adapter_num
, int port_num
, struct pci_dev
*pdev
)
3073 struct slgt_info
*info
;
3075 info
= kmalloc(sizeof(struct slgt_info
), GFP_KERNEL
);
3078 DBGERR(("%s device alloc failed adapter=%d port=%d\n",
3079 driver_name
, adapter_num
, port_num
));
3081 memset(info
, 0, sizeof(struct slgt_info
));
3082 info
->magic
= MGSL_MAGIC
;
3083 INIT_WORK(&info
->task
, bh_handler
, info
);
3084 info
->max_frame_size
= 4096;
3085 info
->raw_rx_size
= DMABUFSIZE
;
3086 info
->close_delay
= 5*HZ
/10;
3087 info
->closing_wait
= 30*HZ
;
3088 init_waitqueue_head(&info
->open_wait
);
3089 init_waitqueue_head(&info
->close_wait
);
3090 init_waitqueue_head(&info
->status_event_wait_q
);
3091 init_waitqueue_head(&info
->event_wait_q
);
3092 spin_lock_init(&info
->netlock
);
3093 memcpy(&info
->params
,&default_params
,sizeof(MGSL_PARAMS
));
3094 info
->idle_mode
= HDLC_TXIDLE_FLAGS
;
3095 info
->adapter_num
= adapter_num
;
3096 info
->port_num
= port_num
;
3098 init_timer(&info
->tx_timer
);
3099 info
->tx_timer
.data
= (unsigned long)info
;
3100 info
->tx_timer
.function
= tx_timeout
;
3102 init_timer(&info
->rx_timer
);
3103 info
->rx_timer
.data
= (unsigned long)info
;
3104 info
->rx_timer
.function
= rx_timeout
;
3106 /* Copy configuration info to device instance data */
3108 info
->irq_level
= pdev
->irq
;
3109 info
->phys_reg_addr
= pci_resource_start(pdev
,0);
3111 /* veremap works on page boundaries
3112 * map full page starting at the page boundary
3114 info
->reg_offset
= info
->phys_reg_addr
& (PAGE_SIZE
-1);
3115 info
->phys_reg_addr
&= ~(PAGE_SIZE
-1);
3117 info
->bus_type
= MGSL_BUS_TYPE_PCI
;
3118 info
->irq_flags
= SA_SHIRQ
;
3120 info
->init_error
= -1; /* assume error, set to 0 on successful init */
3126 static void device_init(int adapter_num
, struct pci_dev
*pdev
)
3128 struct slgt_info
*port_array
[SLGT_MAX_PORTS
];
3132 if (pdev
->device
== SYNCLINK_GT4_DEVICE_ID
)
3135 /* allocate device instances for all ports */
3136 for (i
=0; i
< port_count
; ++i
) {
3137 port_array
[i
] = alloc_dev(adapter_num
, i
, pdev
);
3138 if (port_array
[i
] == NULL
) {
3139 for (--i
; i
>= 0; --i
)
3140 kfree(port_array
[i
]);
3145 /* give copy of port_array to all ports and add to device list */
3146 for (i
=0; i
< port_count
; ++i
) {
3147 memcpy(port_array
[i
]->port_array
, port_array
, sizeof(port_array
));
3148 add_device(port_array
[i
]);
3149 port_array
[i
]->port_count
= port_count
;
3150 spin_lock_init(&port_array
[i
]->lock
);
3153 /* Allocate and claim adapter resources */
3154 if (!claim_resources(port_array
[0])) {
3156 alloc_dma_bufs(port_array
[0]);
3158 /* copy resource information from first port to others */
3159 for (i
= 1; i
< port_count
; ++i
) {
3160 port_array
[i
]->lock
= port_array
[0]->lock
;
3161 port_array
[i
]->irq_level
= port_array
[0]->irq_level
;
3162 port_array
[i
]->reg_addr
= port_array
[0]->reg_addr
;
3163 alloc_dma_bufs(port_array
[i
]);
3166 if (request_irq(port_array
[0]->irq_level
,
3168 port_array
[0]->irq_flags
,
3169 port_array
[0]->device_name
,
3170 port_array
[0]) < 0) {
3171 DBGERR(("%s request_irq failed IRQ=%d\n",
3172 port_array
[0]->device_name
,
3173 port_array
[0]->irq_level
));
3175 port_array
[0]->irq_requested
= 1;
3176 adapter_test(port_array
[0]);
3177 for (i
=1 ; i
< port_count
; i
++)
3178 port_array
[i
]->init_error
= port_array
[0]->init_error
;
3183 static int __devinit
init_one(struct pci_dev
*dev
,
3184 const struct pci_device_id
*ent
)
3186 if (pci_enable_device(dev
)) {
3187 printk("error enabling pci device %p\n", dev
);
3190 pci_set_master(dev
);
3191 device_init(slgt_device_count
, dev
);
3195 static void __devexit
remove_one(struct pci_dev
*dev
)
3199 static struct tty_operations ops
= {
3203 .put_char
= put_char
,
3204 .flush_chars
= flush_chars
,
3205 .write_room
= write_room
,
3206 .chars_in_buffer
= chars_in_buffer
,
3207 .flush_buffer
= flush_buffer
,
3209 .throttle
= throttle
,
3210 .unthrottle
= unthrottle
,
3211 .send_xchar
= send_xchar
,
3212 .break_ctl
= set_break
,
3213 .wait_until_sent
= wait_until_sent
,
3214 .read_proc
= read_proc
,
3215 .set_termios
= set_termios
,
3217 .start
= tx_release
,
3219 .tiocmget
= tiocmget
,
3220 .tiocmset
= tiocmset
,
3223 static void slgt_cleanup(void)
3226 struct slgt_info
*info
;
3227 struct slgt_info
*tmp
;
3229 printk("unload %s %s\n", driver_name
, driver_version
);
3231 if (serial_driver
) {
3232 if ((rc
= tty_unregister_driver(serial_driver
)))
3233 DBGERR(("tty_unregister_driver error=%d\n", rc
));
3234 put_tty_driver(serial_driver
);
3238 info
= slgt_device_list
;
3241 info
= info
->next_device
;
3244 /* release devices */
3245 info
= slgt_device_list
;
3250 free_dma_bufs(info
);
3251 free_tmp_rbuf(info
);
3252 if (info
->port_num
== 0)
3253 release_resources(info
);
3255 info
= info
->next_device
;
3260 pci_unregister_driver(&pci_driver
);
3264 * Driver initialization entry point.
3266 static int __init
slgt_init(void)
3270 printk("%s %s\n", driver_name
, driver_version
);
3272 slgt_device_count
= 0;
3273 if ((rc
= pci_register_driver(&pci_driver
)) < 0) {
3274 printk("%s pci_register_driver error=%d\n", driver_name
, rc
);
3279 if (!slgt_device_list
) {
3280 printk("%s no devices found\n",driver_name
);
3284 serial_driver
= alloc_tty_driver(MAX_DEVICES
);
3285 if (!serial_driver
) {
3290 /* Initialize the tty_driver structure */
3292 serial_driver
->owner
= THIS_MODULE
;
3293 serial_driver
->driver_name
= tty_driver_name
;
3294 serial_driver
->name
= tty_dev_prefix
;
3295 serial_driver
->major
= ttymajor
;
3296 serial_driver
->minor_start
= 64;
3297 serial_driver
->type
= TTY_DRIVER_TYPE_SERIAL
;
3298 serial_driver
->subtype
= SERIAL_TYPE_NORMAL
;
3299 serial_driver
->init_termios
= tty_std_termios
;
3300 serial_driver
->init_termios
.c_cflag
=
3301 B9600
| CS8
| CREAD
| HUPCL
| CLOCAL
;
3302 serial_driver
->flags
= TTY_DRIVER_REAL_RAW
;
3303 tty_set_operations(serial_driver
, &ops
);
3304 if ((rc
= tty_register_driver(serial_driver
)) < 0) {
3305 DBGERR(("%s can't register serial driver\n", driver_name
));
3306 put_tty_driver(serial_driver
);
3307 serial_driver
= NULL
;
3311 printk("%s %s, tty major#%d\n",
3312 driver_name
, driver_version
,
3313 serial_driver
->major
);
3322 static void __exit
slgt_exit(void)
3327 module_init(slgt_init
);
3328 module_exit(slgt_exit
);
3331 * register access routines
3334 #define CALC_REGADDR() \
3335 unsigned long reg_addr = ((unsigned long)info->reg_addr) + addr; \
3337 reg_addr += (info->port_num) * 32;
3339 static __u8
rd_reg8(struct slgt_info
*info
, unsigned int addr
)
3342 return readb((void __iomem
*)reg_addr
);
3345 static void wr_reg8(struct slgt_info
*info
, unsigned int addr
, __u8 value
)
3348 writeb(value
, (void __iomem
*)reg_addr
);
3351 static __u16
rd_reg16(struct slgt_info
*info
, unsigned int addr
)
3354 return readw((void __iomem
*)reg_addr
);
3357 static void wr_reg16(struct slgt_info
*info
, unsigned int addr
, __u16 value
)
3360 writew(value
, (void __iomem
*)reg_addr
);
3363 static __u32
rd_reg32(struct slgt_info
*info
, unsigned int addr
)
3366 return readl((void __iomem
*)reg_addr
);
3369 static void wr_reg32(struct slgt_info
*info
, unsigned int addr
, __u32 value
)
3372 writel(value
, (void __iomem
*)reg_addr
);
3375 static void rdma_reset(struct slgt_info
*info
)
3380 wr_reg32(info
, RDCSR
, BIT1
);
3382 /* wait for enable bit cleared */
3383 for(i
=0 ; i
< 1000 ; i
++)
3384 if (!(rd_reg32(info
, RDCSR
) & BIT0
))
3388 static void tdma_reset(struct slgt_info
*info
)
3393 wr_reg32(info
, TDCSR
, BIT1
);
3395 /* wait for enable bit cleared */
3396 for(i
=0 ; i
< 1000 ; i
++)
3397 if (!(rd_reg32(info
, TDCSR
) & BIT0
))
3402 * enable internal loopback
3403 * TxCLK and RxCLK are generated from BRG
3404 * and TxD is looped back to RxD internally.
3406 static void enable_loopback(struct slgt_info
*info
)
3408 /* SCR (serial control) BIT2=looopback enable */
3409 wr_reg16(info
, SCR
, (unsigned short)(rd_reg16(info
, SCR
) | BIT2
));
3411 if (info
->params
.mode
!= MGSL_MODE_ASYNC
) {
3412 /* CCR (clock control)
3413 * 07..05 tx clock source (010 = BRG)
3414 * 04..02 rx clock source (010 = BRG)
3415 * 01 auxclk enable (0 = disable)
3416 * 00 BRG enable (1 = enable)
3420 wr_reg8(info
, CCR
, 0x49);
3422 /* set speed if available, otherwise use default */
3423 if (info
->params
.clock_speed
)
3424 set_rate(info
, info
->params
.clock_speed
);
3426 set_rate(info
, 3686400);
3431 * set baud rate generator to specified rate
3433 static void set_rate(struct slgt_info
*info
, u32 rate
)
3436 static unsigned int osc
= 14745600;
3438 /* div = osc/rate - 1
3440 * Round div up if osc/rate is not integer to
3441 * force to next slowest rate.
3446 if (!(osc
% rate
) && div
)
3448 wr_reg16(info
, BDR
, (unsigned short)div
);
3452 static void rx_stop(struct slgt_info
*info
)
3456 /* disable and reset receiver */
3457 val
= rd_reg16(info
, RCR
) & ~BIT1
; /* clear enable bit */
3458 wr_reg16(info
, RCR
, (unsigned short)(val
| BIT2
)); /* set reset bit */
3459 wr_reg16(info
, RCR
, val
); /* clear reset bit */
3461 slgt_irq_off(info
, IRQ_RXOVER
+ IRQ_RXDATA
+ IRQ_RXIDLE
);
3463 /* clear pending rx interrupts */
3464 wr_reg16(info
, SSR
, IRQ_RXIDLE
+ IRQ_RXOVER
);
3468 info
->rx_enabled
= 0;
3469 info
->rx_restart
= 0;
3472 static void rx_start(struct slgt_info
*info
)
3476 slgt_irq_off(info
, IRQ_RXOVER
+ IRQ_RXDATA
);
3478 /* clear pending rx overrun IRQ */
3479 wr_reg16(info
, SSR
, IRQ_RXOVER
);
3481 /* reset and disable receiver */
3482 val
= rd_reg16(info
, RCR
) & ~BIT1
; /* clear enable bit */
3483 wr_reg16(info
, RCR
, (unsigned short)(val
| BIT2
)); /* set reset bit */
3484 wr_reg16(info
, RCR
, val
); /* clear reset bit */
3489 /* set 1st descriptor address */
3490 wr_reg32(info
, RDDAR
, info
->rbufs
[0].pdesc
);
3492 if (info
->params
.mode
!= MGSL_MODE_ASYNC
) {
3493 /* enable rx DMA and DMA interrupt */
3494 wr_reg32(info
, RDCSR
, (BIT2
+ BIT0
));
3496 /* enable saving of rx status, rx DMA and DMA interrupt */
3497 wr_reg32(info
, RDCSR
, (BIT6
+ BIT2
+ BIT0
));
3500 slgt_irq_on(info
, IRQ_RXOVER
);
3502 /* enable receiver */
3503 wr_reg16(info
, RCR
, (unsigned short)(rd_reg16(info
, RCR
) | BIT1
));
3505 info
->rx_restart
= 0;
3506 info
->rx_enabled
= 1;
3509 static void tx_start(struct slgt_info
*info
)
3511 if (!info
->tx_enabled
) {
3513 (unsigned short)(rd_reg16(info
, TCR
) | BIT1
));
3514 info
->tx_enabled
= TRUE
;
3517 if (info
->tx_count
) {
3518 info
->drop_rts_on_tx_done
= 0;
3520 if (info
->params
.mode
!= MGSL_MODE_ASYNC
) {
3521 if (info
->params
.flags
& HDLC_FLAG_AUTO_RTS
) {
3523 if (!(info
->signals
& SerialSignal_RTS
)) {
3524 info
->signals
|= SerialSignal_RTS
;
3526 info
->drop_rts_on_tx_done
= 1;
3530 slgt_irq_off(info
, IRQ_TXDATA
);
3531 slgt_irq_on(info
, IRQ_TXUNDER
+ IRQ_TXIDLE
);
3532 /* clear tx idle and underrun status bits */
3533 wr_reg16(info
, SSR
, (unsigned short)(IRQ_TXIDLE
+ IRQ_TXUNDER
));
3535 if (!(rd_reg32(info
, TDCSR
) & BIT0
)) {
3536 /* tx DMA stopped, restart tx DMA */
3538 /* set 1st descriptor address */
3539 wr_reg32(info
, TDDAR
, info
->tbufs
[info
->tbuf_start
].pdesc
);
3540 if (info
->params
.mode
== MGSL_MODE_RAW
)
3541 wr_reg32(info
, TDCSR
, BIT2
+ BIT0
); /* IRQ + DMA enable */
3543 wr_reg32(info
, TDCSR
, BIT0
); /* DMA enable */
3546 if (info
->params
.mode
!= MGSL_MODE_RAW
) {
3547 info
->tx_timer
.expires
= jiffies
+ msecs_to_jiffies(5000);
3548 add_timer(&info
->tx_timer
);
3552 /* set 1st descriptor address */
3553 wr_reg32(info
, TDDAR
, info
->tbufs
[info
->tbuf_start
].pdesc
);
3555 slgt_irq_off(info
, IRQ_TXDATA
);
3556 slgt_irq_on(info
, IRQ_TXIDLE
);
3557 /* clear tx idle status bit */
3558 wr_reg16(info
, SSR
, IRQ_TXIDLE
);
3561 wr_reg32(info
, TDCSR
, BIT0
);
3564 info
->tx_active
= 1;
3568 static void tx_stop(struct slgt_info
*info
)
3572 del_timer(&info
->tx_timer
);
3576 /* reset and disable transmitter */
3577 val
= rd_reg16(info
, TCR
) & ~BIT1
; /* clear enable bit */
3578 wr_reg16(info
, TCR
, (unsigned short)(val
| BIT2
)); /* set reset bit */
3579 wr_reg16(info
, TCR
, val
); /* clear reset */
3581 slgt_irq_off(info
, IRQ_TXDATA
+ IRQ_TXIDLE
+ IRQ_TXUNDER
);
3583 /* clear tx idle and underrun status bit */
3584 wr_reg16(info
, SSR
, (unsigned short)(IRQ_TXIDLE
+ IRQ_TXUNDER
));
3588 info
->tx_enabled
= 0;
3589 info
->tx_active
= 0;
3592 static void reset_port(struct slgt_info
*info
)
3594 if (!info
->reg_addr
)
3600 info
->signals
&= ~(SerialSignal_DTR
+ SerialSignal_RTS
);
3603 slgt_irq_off(info
, IRQ_ALL
| IRQ_MASTER
);
3606 static void reset_adapter(struct slgt_info
*info
)
3609 for (i
=0; i
< info
->port_count
; ++i
) {
3610 if (info
->port_array
[i
])
3611 reset_port(info
->port_array
[i
]);
3615 static void async_mode(struct slgt_info
*info
)
3619 slgt_irq_off(info
, IRQ_ALL
| IRQ_MASTER
);
3625 * 15..13 mode, 010=async
3626 * 12..10 encoding, 000=NRZ
3628 * 08 1=odd parity, 0=even parity
3629 * 07 1=RTS driver control
3631 * 05..04 character length
3636 * 03 0=1 stop bit, 1=2 stop bits
3639 * 00 auto-CTS enable
3643 if (info
->if_mode
& MGSL_INTERFACE_RTS_EN
)
3646 if (info
->params
.parity
!= ASYNC_PARITY_NONE
) {
3648 if (info
->params
.parity
== ASYNC_PARITY_ODD
)
3652 switch (info
->params
.data_bits
)
3654 case 6: val
|= BIT4
; break;
3655 case 7: val
|= BIT5
; break;
3656 case 8: val
|= BIT5
+ BIT4
; break;
3659 if (info
->params
.stop_bits
!= 1)
3662 if (info
->params
.flags
& HDLC_FLAG_AUTO_CTS
)
3665 wr_reg16(info
, TCR
, val
);
3669 * 15..13 mode, 010=async
3670 * 12..10 encoding, 000=NRZ
3672 * 08 1=odd parity, 0=even parity
3673 * 07..06 reserved, must be 0
3674 * 05..04 character length
3679 * 03 reserved, must be zero
3682 * 00 auto-DCD enable
3686 if (info
->params
.parity
!= ASYNC_PARITY_NONE
) {
3688 if (info
->params
.parity
== ASYNC_PARITY_ODD
)
3692 switch (info
->params
.data_bits
)
3694 case 6: val
|= BIT4
; break;
3695 case 7: val
|= BIT5
; break;
3696 case 8: val
|= BIT5
+ BIT4
; break;
3699 if (info
->params
.flags
& HDLC_FLAG_AUTO_DCD
)
3702 wr_reg16(info
, RCR
, val
);
3704 /* CCR (clock control)
3706 * 07..05 011 = tx clock source is BRG/16
3707 * 04..02 010 = rx clock source is BRG
3708 * 01 0 = auxclk disabled
3709 * 00 1 = BRG enabled
3713 wr_reg8(info
, CCR
, 0x69);
3719 /* SCR (serial control)
3721 * 15 1=tx req on FIFO half empty
3722 * 14 1=rx req on FIFO half full
3723 * 13 tx data IRQ enable
3724 * 12 tx idle IRQ enable
3725 * 11 rx break on IRQ enable
3726 * 10 rx data IRQ enable
3727 * 09 rx break off IRQ enable
3728 * 08 overrun IRQ enable
3733 * 03 reserved, must be zero
3734 * 02 1=txd->rxd internal loopback enable
3735 * 01 reserved, must be zero
3736 * 00 1=master IRQ enable
3738 val
= BIT15
+ BIT14
+ BIT0
;
3739 wr_reg16(info
, SCR
, val
);
3741 slgt_irq_on(info
, IRQ_RXBREAK
| IRQ_RXOVER
);
3743 set_rate(info
, info
->params
.data_rate
* 16);
3745 if (info
->params
.loopback
)
3746 enable_loopback(info
);
3749 static void hdlc_mode(struct slgt_info
*info
)
3753 slgt_irq_off(info
, IRQ_ALL
| IRQ_MASTER
);
3759 * 15..13 mode, 000=HDLC 001=raw sync
3763 * 07 1=RTS driver control
3764 * 06 preamble enable
3765 * 05..04 preamble length
3766 * 03 share open/close flag
3769 * 00 auto-CTS enable
3773 if (info
->params
.mode
== MGSL_MODE_RAW
)
3775 if (info
->if_mode
& MGSL_INTERFACE_RTS_EN
)
3778 switch(info
->params
.encoding
)
3780 case HDLC_ENCODING_NRZB
: val
|= BIT10
; break;
3781 case HDLC_ENCODING_NRZI_MARK
: val
|= BIT11
; break;
3782 case HDLC_ENCODING_NRZI
: val
|= BIT11
+ BIT10
; break;
3783 case HDLC_ENCODING_BIPHASE_MARK
: val
|= BIT12
; break;
3784 case HDLC_ENCODING_BIPHASE_SPACE
: val
|= BIT12
+ BIT10
; break;
3785 case HDLC_ENCODING_BIPHASE_LEVEL
: val
|= BIT12
+ BIT11
; break;
3786 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL
: val
|= BIT12
+ BIT11
+ BIT10
; break;
3789 switch (info
->params
.crc_type
)
3791 case HDLC_CRC_16_CCITT
: val
|= BIT9
; break;
3792 case HDLC_CRC_32_CCITT
: val
|= BIT9
+ BIT8
; break;
3795 if (info
->params
.preamble
!= HDLC_PREAMBLE_PATTERN_NONE
)
3798 switch (info
->params
.preamble_length
)
3800 case HDLC_PREAMBLE_LENGTH_16BITS
: val
|= BIT5
; break;
3801 case HDLC_PREAMBLE_LENGTH_32BITS
: val
|= BIT4
; break;
3802 case HDLC_PREAMBLE_LENGTH_64BITS
: val
|= BIT5
+ BIT4
; break;
3805 if (info
->params
.flags
& HDLC_FLAG_AUTO_CTS
)
3808 wr_reg16(info
, TCR
, val
);
3810 /* TPR (transmit preamble) */
3812 switch (info
->params
.preamble
)
3814 case HDLC_PREAMBLE_PATTERN_FLAGS
: val
= 0x7e; break;
3815 case HDLC_PREAMBLE_PATTERN_ONES
: val
= 0xff; break;
3816 case HDLC_PREAMBLE_PATTERN_ZEROS
: val
= 0x00; break;
3817 case HDLC_PREAMBLE_PATTERN_10
: val
= 0x55; break;
3818 case HDLC_PREAMBLE_PATTERN_01
: val
= 0xaa; break;
3819 default: val
= 0x7e; break;
3821 wr_reg8(info
, TPR
, (unsigned char)val
);
3825 * 15..13 mode, 000=HDLC 001=raw sync
3829 * 07..03 reserved, must be 0
3832 * 00 auto-DCD enable
3836 if (info
->params
.mode
== MGSL_MODE_RAW
)
3839 switch(info
->params
.encoding
)
3841 case HDLC_ENCODING_NRZB
: val
|= BIT10
; break;
3842 case HDLC_ENCODING_NRZI_MARK
: val
|= BIT11
; break;
3843 case HDLC_ENCODING_NRZI
: val
|= BIT11
+ BIT10
; break;
3844 case HDLC_ENCODING_BIPHASE_MARK
: val
|= BIT12
; break;
3845 case HDLC_ENCODING_BIPHASE_SPACE
: val
|= BIT12
+ BIT10
; break;
3846 case HDLC_ENCODING_BIPHASE_LEVEL
: val
|= BIT12
+ BIT11
; break;
3847 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL
: val
|= BIT12
+ BIT11
+ BIT10
; break;
3850 switch (info
->params
.crc_type
)
3852 case HDLC_CRC_16_CCITT
: val
|= BIT9
; break;
3853 case HDLC_CRC_32_CCITT
: val
|= BIT9
+ BIT8
; break;
3856 if (info
->params
.flags
& HDLC_FLAG_AUTO_DCD
)
3859 wr_reg16(info
, RCR
, val
);
3861 /* CCR (clock control)
3863 * 07..05 tx clock source
3864 * 04..02 rx clock source
3870 if (info
->params
.flags
& HDLC_FLAG_TXC_BRG
)
3872 // when RxC source is DPLL, BRG generates 16X DPLL
3873 // reference clock, so take TxC from BRG/16 to get
3874 // transmit clock at actual data rate
3875 if (info
->params
.flags
& HDLC_FLAG_RXC_DPLL
)
3876 val
|= BIT6
+ BIT5
; /* 011, txclk = BRG/16 */
3878 val
|= BIT6
; /* 010, txclk = BRG */
3880 else if (info
->params
.flags
& HDLC_FLAG_TXC_DPLL
)
3881 val
|= BIT7
; /* 100, txclk = DPLL Input */
3882 else if (info
->params
.flags
& HDLC_FLAG_TXC_RXCPIN
)
3883 val
|= BIT5
; /* 001, txclk = RXC Input */
3885 if (info
->params
.flags
& HDLC_FLAG_RXC_BRG
)
3886 val
|= BIT3
; /* 010, rxclk = BRG */
3887 else if (info
->params
.flags
& HDLC_FLAG_RXC_DPLL
)
3888 val
|= BIT4
; /* 100, rxclk = DPLL */
3889 else if (info
->params
.flags
& HDLC_FLAG_RXC_TXCPIN
)
3890 val
|= BIT2
; /* 001, rxclk = TXC Input */
3892 if (info
->params
.clock_speed
)
3895 wr_reg8(info
, CCR
, (unsigned char)val
);
3897 if (info
->params
.flags
& (HDLC_FLAG_TXC_DPLL
+ HDLC_FLAG_RXC_DPLL
))
3899 // program DPLL mode
3900 switch(info
->params
.encoding
)
3902 case HDLC_ENCODING_BIPHASE_MARK
:
3903 case HDLC_ENCODING_BIPHASE_SPACE
:
3905 case HDLC_ENCODING_BIPHASE_LEVEL
:
3906 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL
:
3907 val
= BIT7
+ BIT6
; break;
3908 default: val
= BIT6
; // NRZ encodings
3910 wr_reg16(info
, RCR
, (unsigned short)(rd_reg16(info
, RCR
) | val
));
3912 // DPLL requires a 16X reference clock from BRG
3913 set_rate(info
, info
->params
.clock_speed
* 16);
3916 set_rate(info
, info
->params
.clock_speed
);
3922 /* SCR (serial control)
3924 * 15 1=tx req on FIFO half empty
3925 * 14 1=rx req on FIFO half full
3926 * 13 tx data IRQ enable
3927 * 12 tx idle IRQ enable
3928 * 11 underrun IRQ enable
3929 * 10 rx data IRQ enable
3930 * 09 rx idle IRQ enable
3931 * 08 overrun IRQ enable
3936 * 03 reserved, must be zero
3937 * 02 1=txd->rxd internal loopback enable
3938 * 01 reserved, must be zero
3939 * 00 1=master IRQ enable
3941 wr_reg16(info
, SCR
, BIT15
+ BIT14
+ BIT0
);
3943 if (info
->params
.loopback
)
3944 enable_loopback(info
);
3948 * set transmit idle mode
3950 static void tx_set_idle(struct slgt_info
*info
)
3952 unsigned char val
= 0xff;
3954 switch(info
->idle_mode
)
3956 case HDLC_TXIDLE_FLAGS
: val
= 0x7e; break;
3957 case HDLC_TXIDLE_ALT_ZEROS_ONES
: val
= 0xaa; break;
3958 case HDLC_TXIDLE_ZEROS
: val
= 0x00; break;
3959 case HDLC_TXIDLE_ONES
: val
= 0xff; break;
3960 case HDLC_TXIDLE_ALT_MARK_SPACE
: val
= 0xaa; break;
3961 case HDLC_TXIDLE_SPACE
: val
= 0x00; break;
3962 case HDLC_TXIDLE_MARK
: val
= 0xff; break;
3965 wr_reg8(info
, TIR
, val
);
3969 * get state of V24 status (input) signals
3971 static void get_signals(struct slgt_info
*info
)
3973 unsigned short status
= rd_reg16(info
, SSR
);
3975 /* clear all serial signals except DTR and RTS */
3976 info
->signals
&= SerialSignal_DTR
+ SerialSignal_RTS
;
3979 info
->signals
|= SerialSignal_DSR
;
3981 info
->signals
|= SerialSignal_CTS
;
3983 info
->signals
|= SerialSignal_DCD
;
3985 info
->signals
|= SerialSignal_RI
;
3989 * set V.24 Control Register based on current configuration
3991 static void msc_set_vcr(struct slgt_info
*info
)
3993 unsigned char val
= 0;
3995 /* VCR (V.24 control)
3997 * 07..04 serial IF select
4004 switch(info
->if_mode
& MGSL_INTERFACE_MASK
)
4006 case MGSL_INTERFACE_RS232
:
4007 val
|= BIT5
; /* 0010 */
4009 case MGSL_INTERFACE_V35
:
4010 val
|= BIT7
+ BIT6
+ BIT5
; /* 1110 */
4012 case MGSL_INTERFACE_RS422
:
4013 val
|= BIT6
; /* 0100 */
4017 if (info
->signals
& SerialSignal_DTR
)
4019 if (info
->signals
& SerialSignal_RTS
)
4021 if (info
->if_mode
& MGSL_INTERFACE_LL
)
4023 if (info
->if_mode
& MGSL_INTERFACE_RL
)
4025 wr_reg8(info
, VCR
, val
);
4029 * set state of V24 control (output) signals
4031 static void set_signals(struct slgt_info
*info
)
4033 unsigned char val
= rd_reg8(info
, VCR
);
4034 if (info
->signals
& SerialSignal_DTR
)
4038 if (info
->signals
& SerialSignal_RTS
)
4042 wr_reg8(info
, VCR
, val
);
4046 * free range of receive DMA buffers (i to last)
4048 static void free_rbufs(struct slgt_info
*info
, unsigned int i
, unsigned int last
)
4053 /* reset current buffer for reuse */
4054 info
->rbufs
[i
].status
= 0;
4055 if (info
->params
.mode
== MGSL_MODE_RAW
)
4056 set_desc_count(info
->rbufs
[i
], info
->raw_rx_size
);
4058 set_desc_count(info
->rbufs
[i
], DMABUFSIZE
);
4062 if (++i
== info
->rbuf_count
)
4065 info
->rbuf_current
= i
;
4069 * mark all receive DMA buffers as free
4071 static void reset_rbufs(struct slgt_info
*info
)
4073 free_rbufs(info
, 0, info
->rbuf_count
- 1);
4077 * pass receive HDLC frame to upper layer
4079 * return 1 if frame available, otherwise 0
4081 static int rx_get_frame(struct slgt_info
*info
)
4083 unsigned int start
, end
;
4084 unsigned short status
;
4085 unsigned int framesize
= 0;
4087 unsigned long flags
;
4088 struct tty_struct
*tty
= info
->tty
;
4089 unsigned char addr_field
= 0xff;
4095 start
= end
= info
->rbuf_current
;
4098 if (!desc_complete(info
->rbufs
[end
]))
4101 if (framesize
== 0 && info
->params
.addr_filter
!= 0xff)
4102 addr_field
= info
->rbufs
[end
].buf
[0];
4104 framesize
+= desc_count(info
->rbufs
[end
]);
4106 if (desc_eof(info
->rbufs
[end
]))
4109 if (++end
== info
->rbuf_count
)
4112 if (end
== info
->rbuf_current
) {
4113 if (info
->rx_enabled
){
4114 spin_lock_irqsave(&info
->lock
,flags
);
4116 spin_unlock_irqrestore(&info
->lock
,flags
);
4124 * 15 buffer complete
4127 * 02 eof (end of frame)
4131 status
= desc_status(info
->rbufs
[end
]);
4133 /* ignore CRC bit if not using CRC (bit is undefined) */
4134 if (info
->params
.crc_type
== HDLC_CRC_NONE
)
4137 if (framesize
== 0 ||
4138 (addr_field
!= 0xff && addr_field
!= info
->params
.addr_filter
)) {
4139 free_rbufs(info
, start
, end
);
4143 if (framesize
< 2 || status
& (BIT1
+BIT0
)) {
4144 if (framesize
< 2 || (status
& BIT0
))
4145 info
->icount
.rxshort
++;
4147 info
->icount
.rxcrc
++;
4152 struct net_device_stats
*stats
= hdlc_stats(info
->netdev
);
4154 stats
->rx_frame_errors
++;
4158 /* adjust frame size for CRC, if any */
4159 if (info
->params
.crc_type
== HDLC_CRC_16_CCITT
)
4161 else if (info
->params
.crc_type
== HDLC_CRC_32_CCITT
)
4165 DBGBH(("%s rx frame status=%04X size=%d\n",
4166 info
->device_name
, status
, framesize
));
4167 DBGDATA(info
, info
->rbufs
[start
].buf
, min_t(int, framesize
, DMABUFSIZE
), "rx");
4170 if (framesize
> info
->max_frame_size
)
4171 info
->icount
.rxlong
++;
4173 /* copy dma buffer(s) to contiguous temp buffer */
4174 int copy_count
= framesize
;
4176 unsigned char *p
= info
->tmp_rbuf
;
4177 info
->tmp_rbuf_count
= framesize
;
4179 info
->icount
.rxok
++;
4182 int partial_count
= min(copy_count
, DMABUFSIZE
);
4183 memcpy(p
, info
->rbufs
[i
].buf
, partial_count
);
4185 copy_count
-= partial_count
;
4186 if (++i
== info
->rbuf_count
)
4192 hdlcdev_rx(info
,info
->tmp_rbuf
, framesize
);
4195 ldisc_receive_buf(tty
, info
->tmp_rbuf
, info
->flag_buf
, framesize
);
4198 free_rbufs(info
, start
, end
);
4206 * pass receive buffer (RAW synchronous mode) to tty layer
4207 * return 1 if buffer available, otherwise 0
4209 static int rx_get_buf(struct slgt_info
*info
)
4211 unsigned int i
= info
->rbuf_current
;
4213 if (!desc_complete(info
->rbufs
[i
]))
4215 DBGDATA(info
, info
->rbufs
[i
].buf
, desc_count(info
->rbufs
[i
]), "rx");
4216 DBGINFO(("rx_get_buf size=%d\n", desc_count(info
->rbufs
[i
])));
4217 ldisc_receive_buf(info
->tty
, info
->rbufs
[i
].buf
,
4218 info
->flag_buf
, desc_count(info
->rbufs
[i
]));
4219 free_rbufs(info
, i
, i
);
4223 static void reset_tbufs(struct slgt_info
*info
)
4226 info
->tbuf_current
= 0;
4227 for (i
=0 ; i
< info
->tbuf_count
; i
++) {
4228 info
->tbufs
[i
].status
= 0;
4229 info
->tbufs
[i
].count
= 0;
4234 * return number of free transmit DMA buffers
4236 static unsigned int free_tbuf_count(struct slgt_info
*info
)
4238 unsigned int count
= 0;
4239 unsigned int i
= info
->tbuf_current
;
4243 if (desc_count(info
->tbufs
[i
]))
4244 break; /* buffer in use */
4246 if (++i
== info
->tbuf_count
)
4248 } while (i
!= info
->tbuf_current
);
4250 /* last buffer with zero count may be in use, assume it is */
4258 * load transmit DMA buffer(s) with data
4260 static void tx_load(struct slgt_info
*info
, const char *buf
, unsigned int size
)
4262 unsigned short count
;
4264 struct slgt_desc
*d
;
4269 DBGDATA(info
, buf
, size
, "tx");
4271 info
->tbuf_start
= i
= info
->tbuf_current
;
4274 d
= &info
->tbufs
[i
];
4275 if (++i
== info
->tbuf_count
)
4278 count
= (unsigned short)((size
> DMABUFSIZE
) ? DMABUFSIZE
: size
);
4279 memcpy(d
->buf
, buf
, count
);
4284 if (!size
&& info
->params
.mode
!= MGSL_MODE_RAW
)
4285 set_desc_eof(*d
, 1); /* HDLC: set EOF of last desc */
4287 set_desc_eof(*d
, 0);
4289 set_desc_count(*d
, count
);
4292 info
->tbuf_current
= i
;
4295 static int register_test(struct slgt_info
*info
)
4297 static unsigned short patterns
[] =
4298 {0x0000, 0xffff, 0xaaaa, 0x5555, 0x6969, 0x9696};
4299 static unsigned int count
= sizeof(patterns
)/sizeof(patterns
[0]);
4303 for (i
=0 ; i
< count
; i
++) {
4304 wr_reg16(info
, TIR
, patterns
[i
]);
4305 wr_reg16(info
, BDR
, patterns
[(i
+1)%count
]);
4306 if ((rd_reg16(info
, TIR
) != patterns
[i
]) ||
4307 (rd_reg16(info
, BDR
) != patterns
[(i
+1)%count
])) {
4313 info
->init_error
= rc
? 0 : DiagStatus_AddressFailure
;
4317 static int irq_test(struct slgt_info
*info
)
4319 unsigned long timeout
;
4320 unsigned long flags
;
4321 struct tty_struct
*oldtty
= info
->tty
;
4322 u32 speed
= info
->params
.data_rate
;
4324 info
->params
.data_rate
= 921600;
4327 spin_lock_irqsave(&info
->lock
, flags
);
4329 slgt_irq_on(info
, IRQ_TXIDLE
);
4331 /* enable transmitter */
4333 (unsigned short)(rd_reg16(info
, TCR
) | BIT1
));
4335 /* write one byte and wait for tx idle */
4336 wr_reg16(info
, TDR
, 0);
4338 /* assume failure */
4339 info
->init_error
= DiagStatus_IrqFailure
;
4340 info
->irq_occurred
= FALSE
;
4342 spin_unlock_irqrestore(&info
->lock
, flags
);
4345 while(timeout
-- && !info
->irq_occurred
)
4346 msleep_interruptible(10);
4348 spin_lock_irqsave(&info
->lock
,flags
);
4350 spin_unlock_irqrestore(&info
->lock
,flags
);
4352 info
->params
.data_rate
= speed
;
4355 info
->init_error
= info
->irq_occurred
? 0 : DiagStatus_IrqFailure
;
4356 return info
->irq_occurred
? 0 : -ENODEV
;
4359 static int loopback_test_rx(struct slgt_info
*info
)
4361 unsigned char *src
, *dest
;
4364 if (desc_complete(info
->rbufs
[0])) {
4365 count
= desc_count(info
->rbufs
[0]);
4366 src
= info
->rbufs
[0].buf
;
4367 dest
= info
->tmp_rbuf
;
4369 for( ; count
; count
-=2, src
+=2) {
4370 /* src=data byte (src+1)=status byte */
4371 if (!(*(src
+1) & (BIT9
+ BIT8
))) {
4374 info
->tmp_rbuf_count
++;
4377 DBGDATA(info
, info
->tmp_rbuf
, info
->tmp_rbuf_count
, "rx");
4383 static int loopback_test(struct slgt_info
*info
)
4385 #define TESTFRAMESIZE 20
4387 unsigned long timeout
;
4388 u16 count
= TESTFRAMESIZE
;
4389 unsigned char buf
[TESTFRAMESIZE
];
4391 unsigned long flags
;
4393 struct tty_struct
*oldtty
= info
->tty
;
4396 memcpy(¶ms
, &info
->params
, sizeof(params
));
4398 info
->params
.mode
= MGSL_MODE_ASYNC
;
4399 info
->params
.data_rate
= 921600;
4400 info
->params
.loopback
= 1;
4403 /* build and send transmit frame */
4404 for (count
= 0; count
< TESTFRAMESIZE
; ++count
)
4405 buf
[count
] = (unsigned char)count
;
4407 info
->tmp_rbuf_count
= 0;
4408 memset(info
->tmp_rbuf
, 0, TESTFRAMESIZE
);
4410 /* program hardware for HDLC and enabled receiver */
4411 spin_lock_irqsave(&info
->lock
,flags
);
4414 info
->tx_count
= count
;
4415 tx_load(info
, buf
, count
);
4417 spin_unlock_irqrestore(&info
->lock
, flags
);
4419 /* wait for receive complete */
4420 for (timeout
= 100; timeout
; --timeout
) {
4421 msleep_interruptible(10);
4422 if (loopback_test_rx(info
)) {
4428 /* verify received frame length and contents */
4429 if (!rc
&& (info
->tmp_rbuf_count
!= count
||
4430 memcmp(buf
, info
->tmp_rbuf
, count
))) {
4434 spin_lock_irqsave(&info
->lock
,flags
);
4435 reset_adapter(info
);
4436 spin_unlock_irqrestore(&info
->lock
,flags
);
4438 memcpy(&info
->params
, ¶ms
, sizeof(info
->params
));
4441 info
->init_error
= rc
? DiagStatus_DmaFailure
: 0;
4445 static int adapter_test(struct slgt_info
*info
)
4447 DBGINFO(("testing %s\n", info
->device_name
));
4448 if ((info
->init_error
= register_test(info
)) < 0) {
4449 printk("register test failure %s addr=%08X\n",
4450 info
->device_name
, info
->phys_reg_addr
);
4451 } else if ((info
->init_error
= irq_test(info
)) < 0) {
4452 printk("IRQ test failure %s IRQ=%d\n",
4453 info
->device_name
, info
->irq_level
);
4454 } else if ((info
->init_error
= loopback_test(info
)) < 0) {
4455 printk("loopback test failure %s\n", info
->device_name
);
4457 return info
->init_error
;
4461 * transmit timeout handler
4463 static void tx_timeout(unsigned long context
)
4465 struct slgt_info
*info
= (struct slgt_info
*)context
;
4466 unsigned long flags
;
4468 DBGINFO(("%s tx_timeout\n", info
->device_name
));
4469 if(info
->tx_active
&& info
->params
.mode
== MGSL_MODE_HDLC
) {
4470 info
->icount
.txtimeout
++;
4472 spin_lock_irqsave(&info
->lock
,flags
);
4473 info
->tx_active
= 0;
4475 spin_unlock_irqrestore(&info
->lock
,flags
);
4479 hdlcdev_tx_done(info
);
4486 * receive buffer polling timer
4488 static void rx_timeout(unsigned long context
)
4490 struct slgt_info
*info
= (struct slgt_info
*)context
;
4491 unsigned long flags
;
4493 DBGINFO(("%s rx_timeout\n", info
->device_name
));
4494 spin_lock_irqsave(&info
->lock
, flags
);
4495 info
->pending_bh
|= BH_RECEIVE
;
4496 spin_unlock_irqrestore(&info
->lock
, flags
);