drivers/char/watchdog/iTCO_wdt.c

   1 /*
   2  *      intel TCO Watchdog Driver (Used in i82801 and i6300ESB chipsets)
   3  *
   4  *      (c) Copyright 2006 Wim Van Sebroeck <wim@iguana.be>.
   5  *
   6  *      This program is free software; you can redistribute it and/or
   7  *      modify it under the terms of the GNU General Public License
   8  *      as published by the Free Software Foundation; either version
   9  *      2 of the License, or (at your option) any later version.
  10  *
  11  *      Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor
  12  *      provide warranty for any of this software. This material is
  13  *      provided "AS-IS" and at no charge.
  14  *
  15  *      The TCO watchdog is implemented in the following I/O controller hubs:
  16  *      (See the intel documentation on http://developer.intel.com.)
  17  *      82801AA  (ICH)       : document number 290655-003, 290677-014,
  18  *      82801AB  (ICHO)      : document number 290655-003, 290677-014,
  19  *      82801BA  (ICH2)      : document number 290687-002, 298242-027,
  20  *      82801BAM (ICH2-M)    : document number 290687-002, 298242-027,
  21  *      82801CA  (ICH3-S)    : document number 290733-003, 290739-013,
  22  *      82801CAM (ICH3-M)    : document number 290716-001, 290718-007,
  23  *      82801DB  (ICH4)      : document number 290744-001, 290745-020,
  24  *      82801DBM (ICH4-M)    : document number 252337-001, 252663-005,
  25  *      82801E   (C-ICH)     : document number 273599-001, 273645-002,
  26  *      82801EB  (ICH5)      : document number 252516-001, 252517-003,
  27  *      82801ER  (ICH5R)     : document number 252516-001, 252517-003,
  28  *      82801FB  (ICH6)      : document number 301473-002, 301474-007,
  29  *      82801FR  (ICH6R)     : document number 301473-002, 301474-007,
  30  *      82801FBM (ICH6-M)    : document number 301473-002, 301474-007,
  31  *      82801FW  (ICH6W)     : document number 301473-001, 301474-007,
  32  *      82801FRW (ICH6RW)    : document number 301473-001, 301474-007,
  33  *      82801GB  (ICH7)      : document number 307013-002, 307014-009,
  34  *      82801GR  (ICH7R)     : document number 307013-002, 307014-009,
  35  *      82801GDH (ICH7DH)    : document number 307013-002, 307014-009,
  36  *      82801GBM (ICH7-M)    : document number 307013-002, 307014-009,
  37  *      82801GHM (ICH7-M DH) : document number 307013-002, 307014-009,
  38  *      6300ESB  (6300ESB)   : document number 300641-003
  39  */
  40
  41 /*
  42  *      Includes, defines, variables, module parameters, ...
  43  */
  44
  45 /* Module and version information */
  46 #define DRV_NAME        "iTCO_wdt"
  47 #define DRV_VERSION     "1.00"
  48 #define DRV_RELDATE     "19-Jul-2006"
  49 #define PFX             DRV_NAME ": "
  50
  51 /* Includes */
  52 #include <linux/config.h>               /* For CONFIG_WATCHDOG_NOWAYOUT/... */
  53 #include <linux/module.h>               /* For module specific items */
  54 #include <linux/moduleparam.h>          /* For new moduleparam's */
  55 #include <linux/types.h>                /* For standard types (like size_t) */
  56 #include <linux/errno.h>                /* For the -ENODEV/... values */
  57 #include <linux/kernel.h>               /* For printk/panic/... */
  58 #include <linux/miscdevice.h>           /* For MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR) */
  59 #include <linux/watchdog.h>             /* For the watchdog specific items */
  60 #include <linux/notifier.h>             /* For notifier support */
  61 #include <linux/reboot.h>               /* For reboot_notifier stuff */
  62 #include <linux/init.h>                 /* For __init/__exit/... */
  63 #include <linux/fs.h>                   /* For file operations */
  64 #include <linux/platform_device.h>      /* For platform_driver framework */
  65 #include <linux/pci.h>                  /* For pci functions */
  66 #include <linux/ioport.h>               /* For io-port access */
  67 #include <linux/spinlock.h>             /* For spin_lock/spin_unlock/... */
  68
  69 #include <asm/uaccess.h>                /* For copy_to_user/put_user/... */
  70 #include <asm/io.h>                     /* For inb/outb/... */
  71
  72 /* TCO related info */
  73 enum iTCO_chipsets {
  74         TCO_ICH = 0,    /* ICH */
  75         TCO_ICH0,       /* ICH0 */
  76         TCO_ICH2,       /* ICH2 */
  77         TCO_ICH2M,      /* ICH2-M */
  78         TCO_ICH3,       /* ICH3-S */
  79         TCO_ICH3M,      /* ICH3-M */
  80         TCO_ICH4,       /* ICH4 */
  81         TCO_ICH4M,      /* ICH4-M */
  82         TCO_CICH,       /* C-ICH */
  83         TCO_ICH5,       /* ICH5 & ICH5R */
  84         TCO_6300ESB,    /* 6300ESB */
  85         TCO_ICH6,       /* ICH6 & ICH6R */
  86         TCO_ICH6M,      /* ICH6-M */
  87         TCO_ICH6W,      /* ICH6W & ICH6RW */
  88         TCO_ICH7,       /* ICH7 & ICH7R */
  89         TCO_ICH7M,      /* ICH7-M */
  90         TCO_ICH7MDH,    /* ICH7-M DH */
  91 };
  92
  93 static struct {
  94         char *name;
  95         unsigned int iTCO_version;
  96 } iTCO_chipset_info[] __devinitdata = {
  97         {"ICH", 1},
  98         {"ICH0", 1},
  99         {"ICH2", 1},
 100         {"ICH2-M", 1},
 101         {"ICH3-S", 1},
 102         {"ICH3-M", 1},
 103         {"ICH4", 1},
 104         {"ICH4-M", 1},
 105         {"C-ICH", 1},
 106         {"ICH5 or ICH5R", 1},
 107         {"6300ESB", 1},
 108         {"ICH6 or ICH6R", 2},
 109         {"ICH6-M", 2},
 110         {"ICH6W or ICH6RW", 2},
 111         {"ICH7 or ICH7R", 2},
 112         {"ICH7-M", 2},
 113         {"ICH7-M DH", 2},
 114         {NULL,0}
 115 };
 116
 117 /*
 118  * This data only exists for exporting the supported PCI ids
 119  * via MODULE_DEVICE_TABLE.  We do not actually register a
 120  * pci_driver, because the I/O Controller Hub has also other
 121  * functions that probably will be registered by other drivers.
 122  */
 123 static struct pci_device_id iTCO_wdt_pci_tbl[] = {
 124         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0,   PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH     },
 125         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_0,   PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH0    },
 126         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0,   PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH2    },
 127         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_10,  PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH2M   },
 128         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0,   PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH3    },
 129         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_12,  PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH3M   },
 130         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0,   PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH4    },
 131         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12,  PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH4M   },
 132         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801E_0,    PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_CICH    },
 133         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0,   PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH5    },
 134         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1,       PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_6300ESB },
 135         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_0,      PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH6    },
 136         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1,      PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH6M   },
 137         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_2,      PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH6W   },
 138         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_0,      PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH7    },
 139         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_1,      PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH7M   },
 140         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_31,     PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH7MDH },
 141         { 0, },                 /* End of list */
 142 };
 143 MODULE_DEVICE_TABLE (pci, iTCO_wdt_pci_tbl);
 144
 145 /* Address definitions for the TCO */
 146 #define TCOBASE         iTCO_wdt_private.ACPIBASE + 0x60        /* TCO base address                */
 147 #define SMI_EN          iTCO_wdt_private.ACPIBASE + 0x30        /* SMI Control and Enable Register */
 148
 149 #define TCO_RLD         TCOBASE + 0x00  /* TCO Timer Reload and Current Value */
 150 #define TCOv1_TMR       TCOBASE + 0x01  /* TCOv1 Timer Initial Value    */
 151 #define TCO_DAT_IN      TCOBASE + 0x02  /* TCO Data In Register         */
 152 #define TCO_DAT_OUT     TCOBASE + 0x03  /* TCO Data Out Register        */
 153 #define TCO1_STS        TCOBASE + 0x04  /* TCO1 Status Register         */
 154 #define TCO2_STS        TCOBASE + 0x06  /* TCO2 Status Register         */
 155 #define TCO1_CNT        TCOBASE + 0x08  /* TCO1 Control Register        */
 156 #define TCO2_CNT        TCOBASE + 0x0a  /* TCO2 Control Register        */
 157 #define TCOv2_TMR       TCOBASE + 0x12  /* TCOv2 Timer Initial Value    */
 158
 159 /* internal variables */
 160 static unsigned long is_active;
 161 static char expect_release;
 162 static struct {                         /* this is private data for the iTCO_wdt device */
 163         unsigned int iTCO_version;      /* TCO version/generation */
 164         unsigned long ACPIBASE;         /* The cards ACPIBASE address (TCOBASE = ACPIBASE+0x60) */
 165         unsigned long __iomem *gcs;     /* NO_REBOOT flag is Memory-Mapped GCS register bit 5 (TCO version 2) */
 166         spinlock_t io_lock;             /* the lock for io operations */
 167         struct pci_dev *pdev;           /* the PCI-device */
 168 } iTCO_wdt_private;
 169
 170 static struct platform_device *iTCO_wdt_platform_device;        /* the watchdog platform device */
 171
 172 /* module parameters */
 173 #define WATCHDOG_HEARTBEAT 30   /* 30 sec default heartbeat */
 174 static int heartbeat = WATCHDOG_HEARTBEAT;  /* in seconds */
 175 module_param(heartbeat, int, 0);
 176 MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (2<heartbeat<39 (TCO v1) or 613 (TCO v2), default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
 177
 178 static int nowayout = WATCHDOG_NOWAYOUT;
 179 module_param(nowayout, int, 0);
 180 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
 181
 182 /*
 183  * Some TCO specific functions
 184  */
 185
 186 static inline unsigned int seconds_to_ticks(int seconds)
 187 {
 188         /* the internal timer is stored as ticks which decrement
 189          * every 0.6 seconds */
 190         return (seconds * 10) / 6;
 191 }
 192
 193 static void iTCO_wdt_set_NO_REBOOT_bit(void)
 194 {
 195         u32 val32;
 196
 197         /* Set the NO_REBOOT bit: this disables reboots */
 198         if (iTCO_wdt_private.iTCO_version == 2) {
 199                 val32 = readl(iTCO_wdt_private.gcs);
 200                 val32 |= 0x00000020;
 201                 writel(val32, iTCO_wdt_private.gcs);
 202         } else if (iTCO_wdt_private.iTCO_version == 1) {
 203                 pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
 204                 val32 |= 0x00000002;
 205                 pci_write_config_dword(iTCO_wdt_private.pdev, 0xd4, val32);
 206         }
 207 }
 208
 209 static int iTCO_wdt_unset_NO_REBOOT_bit(void)
 210 {
 211         int ret = 0;
 212         u32 val32;
 213
 214         /* Unset the NO_REBOOT bit: this enables reboots */
 215         if (iTCO_wdt_private.iTCO_version == 2) {
 216                 val32 = readl(iTCO_wdt_private.gcs);
 217                 val32 &= 0xffffffdf;
 218                 writel(val32, iTCO_wdt_private.gcs);
 219
 220                 val32 = readl(iTCO_wdt_private.gcs);
 221                 if (val32 & 0x00000020)
 222                         ret = -EIO;
 223         } else if (iTCO_wdt_private.iTCO_version == 1) {
 224                 pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
 225                 val32 &= 0xfffffffd;
 226                 pci_write_config_dword(iTCO_wdt_private.pdev, 0xd4, val32);
 227
 228                 pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
 229                 if (val32 & 0x00000002)
 230                         ret = -EIO;
 231         }
 232
 233         return ret; /* returns: 0 = OK, -EIO = Error */
 234 }
 235
 236 static int iTCO_wdt_start(void)
 237 {
 238         unsigned int val;
 239
 240         spin_lock(&iTCO_wdt_private.io_lock);
 241
 242         /* disable chipset's NO_REBOOT bit */
 243         if (iTCO_wdt_unset_NO_REBOOT_bit()) {
 244                 printk(KERN_ERR PFX "failed to reset NO_REBOOT flag, reboot disabled by hardware\n");
 245                 return -EIO;
 246         }
 247
 248         /* Bit 11: TCO Timer Halt -> 0 = The TCO timer is enabled to count */
 249         val = inw(TCO1_CNT);
 250         val &= 0xf7ff;
 251         outw(val, TCO1_CNT);
 252         val = inw(TCO1_CNT);
 253         spin_unlock(&iTCO_wdt_private.io_lock);
 254
 255         if (val & 0x0800)
 256                 return -1;
 257         return 0;
 258 }
 259
 260 static int iTCO_wdt_stop(void)
 261 {
 262         unsigned int val;
 263
 264         spin_lock(&iTCO_wdt_private.io_lock);
 265
 266         /* Bit 11: TCO Timer Halt -> 1 = The TCO timer is disabled */
 267         val = inw(TCO1_CNT);
 268         val |= 0x0800;
 269         outw(val, TCO1_CNT);
 270         val = inw(TCO1_CNT);
 271
 272         /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
 273         iTCO_wdt_set_NO_REBOOT_bit();
 274
 275         spin_unlock(&iTCO_wdt_private.io_lock);
 276
 277         if ((val & 0x0800) == 0)
 278                 return -1;
 279         return 0;
 280 }
 281
 282 static int iTCO_wdt_keepalive(void)
 283 {
 284         spin_lock(&iTCO_wdt_private.io_lock);
 285
 286         /* Reload the timer by writing to the TCO Timer Counter register */
 287         if (iTCO_wdt_private.iTCO_version == 2) {
 288                 outw(0x01, TCO_RLD);
 289         } else if (iTCO_wdt_private.iTCO_version == 1) {
 290                 outb(0x01, TCO_RLD);
 291         }
 292
 293         spin_unlock(&iTCO_wdt_private.io_lock);
 294         return 0;
 295 }
 296
 297 static int iTCO_wdt_set_heartbeat(int t)
 298 {
 299         unsigned int val16;
 300         unsigned char val8;
 301         unsigned int tmrval;
 302
 303         tmrval = seconds_to_ticks(t);
 304         /* from the specs: */
 305         /* "Values of 0h-3h are ignored and should not be attempted" */
 306         if (tmrval < 0x04)
 307                 return -EINVAL;
 308         if (((iTCO_wdt_private.iTCO_version == 2) && (tmrval > 0x3ff)) ||
 309             ((iTCO_wdt_private.iTCO_version == 1) && (tmrval > 0x03f)))
 310                 return -EINVAL;
 311
 312         /* Write new heartbeat to watchdog */
 313         if (iTCO_wdt_private.iTCO_version == 2) {
 314                 spin_lock(&iTCO_wdt_private.io_lock);
 315                 val16 = inw(TCOv2_TMR);
 316                 val16 &= 0xfc00;
 317                 val16 |= tmrval;
 318                 outw(val16, TCOv2_TMR);
 319                 val16 = inw(TCOv2_TMR);
 320                 spin_unlock(&iTCO_wdt_private.io_lock);
 321
 322                 if ((val16 & 0x3ff) != tmrval)
 323                         return -EINVAL;
 324         } else if (iTCO_wdt_private.iTCO_version == 1) {
 325                 spin_lock(&iTCO_wdt_private.io_lock);
 326                 val8 = inb(TCOv1_TMR);
 327                 val8 &= 0xc0;
 328                 val8 |= (tmrval & 0xff);
 329                 outb(val8, TCOv1_TMR);
 330                 val8 = inb(TCOv1_TMR);
 331                 spin_unlock(&iTCO_wdt_private.io_lock);
 332
 333                 if ((val8 & 0x3f) != tmrval)
 334                         return -EINVAL;
 335         }
 336
 337         heartbeat = t;
 338         return 0;
 339 }
 340
 341 static int iTCO_wdt_get_timeleft (int *time_left)
 342 {
 343         unsigned int val16;
 344         unsigned char val8;
 345
 346         /* read the TCO Timer */
 347         if (iTCO_wdt_private.iTCO_version == 2) {
 348                 spin_lock(&iTCO_wdt_private.io_lock);
 349                 val16 = inw(TCO_RLD);
 350                 val16 &= 0x3ff;
 351                 spin_unlock(&iTCO_wdt_private.io_lock);
 352
 353                 *time_left = (val16 * 6) / 10;
 354         } else if (iTCO_wdt_private.iTCO_version == 1) {
 355                 spin_lock(&iTCO_wdt_private.io_lock);
 356                 val8 = inb(TCO_RLD);
 357                 val8 &= 0x3f;
 358                 spin_unlock(&iTCO_wdt_private.io_lock);
 359
 360                 *time_left = (val8 * 6) / 10;
 361         }
 362         return 0;
 363 }
 364
 365 /*
 366  *      /dev/watchdog handling
 367  */
 368
 369 static int iTCO_wdt_open (struct inode *inode, struct file *file)
 370 {
 371         /* /dev/watchdog can only be opened once */
 372         if (test_and_set_bit(0, &is_active))
 373                 return -EBUSY;
 374
 375         /*
 376          *      Reload and activate timer
 377          */
 378         iTCO_wdt_keepalive();
 379         iTCO_wdt_start();
 380         return nonseekable_open(inode, file);
 381 }
 382
 383 static int iTCO_wdt_release (struct inode *inode, struct file *file)
 384 {
 385         /*
 386          *      Shut off the timer.
 387          */
 388         if (expect_release == 42) {
 389                 iTCO_wdt_stop();
 390         } else {
 391                 printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
 392                 iTCO_wdt_keepalive();
 393         }
 394         clear_bit(0, &is_active);
 395         expect_release = 0;
 396         return 0;
 397 }
 398
 399 static ssize_t iTCO_wdt_write (struct file *file, const char __user *data,
 400                               size_t len, loff_t * ppos)
 401 {
 402         /* See if we got the magic character 'V' and reload the timer */
 403         if (len) {
 404                 if (!nowayout) {
 405                         size_t i;
 406
 407                         /* note: just in case someone wrote the magic character
 408                          * five months ago... */
 409                         expect_release = 0;
 410
 411                         /* scan to see whether or not we got the magic character */
 412                         for (i = 0; i != len; i++) {
 413                                 char c;
 414                                 if (get_user(c, data+i))
 415                                         return -EFAULT;
 416                                 if (c == 'V')
 417                                         expect_release = 42;
 418                         }
 419                 }
 420
 421                 /* someone wrote to us, we should reload the timer */
 422                 iTCO_wdt_keepalive();
 423         }
 424         return len;
 425 }
 426
 427 static int iTCO_wdt_ioctl (struct inode *inode, struct file *file,
 428                           unsigned int cmd, unsigned long arg)
 429 {
 430         int new_options, retval = -EINVAL;
 431         int new_heartbeat;
 432         int time_left;
 433         void __user *argp = (void __user *)arg;
 434         int __user *p = argp;
 435         static struct watchdog_info ident = {
 436                 .options =              WDIOF_SETTIMEOUT |
 437                                         WDIOF_KEEPALIVEPING |
 438                                         WDIOF_MAGICCLOSE,
 439                 .firmware_version =     0,
 440                 .identity =             DRV_NAME,
 441         };
 442
 443         switch (cmd) {
 444                 case WDIOC_GETSUPPORT:
 445                         return copy_to_user(argp, &ident,
 446                                 sizeof (ident)) ? -EFAULT : 0;
 447
 448                 case WDIOC_GETSTATUS:
 449                 case WDIOC_GETBOOTSTATUS:
 450                         return put_user(0, p);
 451
 452                 case WDIOC_KEEPALIVE:
 453                         iTCO_wdt_keepalive();
 454                         return 0;
 455
 456                 case WDIOC_SETOPTIONS:
 457                 {
 458                         if (get_user(new_options, p))
 459                                 return -EFAULT;
 460
 461                         if (new_options & WDIOS_DISABLECARD) {
 462                                 iTCO_wdt_stop();
 463                                 retval = 0;
 464                         }
 465
 466                         if (new_options & WDIOS_ENABLECARD) {
 467                                 iTCO_wdt_keepalive();
 468                                 iTCO_wdt_start();
 469                                 retval = 0;
 470                         }
 471
 472                         return retval;
 473                 }
 474
 475                 case WDIOC_SETTIMEOUT:
 476                 {
 477                         if (get_user(new_heartbeat, p))
 478                                 return -EFAULT;
 479
 480                         if (iTCO_wdt_set_heartbeat(new_heartbeat))
 481                                 return -EINVAL;
 482
 483                         iTCO_wdt_keepalive();
 484                         /* Fall */
 485                 }
 486
 487                 case WDIOC_GETTIMEOUT:
 488                         return put_user(heartbeat, p);
 489
 490                 case WDIOC_GETTIMELEFT:
 491                 {
 492                         if (iTCO_wdt_get_timeleft(&time_left))
 493                                 return -EINVAL;
 494
 495                         return put_user(time_left, p);
 496                 }
 497
 498                 default:
 499                         return -ENOIOCTLCMD;
 500         }
 501 }
 502
 503 /*
 504  *      Notify system
 505  */
 506
 507 static int iTCO_wdt_notify_sys (struct notifier_block *this, unsigned long code, void *unused)
 508 {
 509         if (code==SYS_DOWN || code==SYS_HALT) {
 510                 /* Turn the WDT off */
 511                 iTCO_wdt_stop();
 512         }
 513
 514         return NOTIFY_DONE;
 515 }
 516
 517 /*
 518  *      Kernel Interfaces
 519  */
 520
 521 static struct file_operations iTCO_wdt_fops = {
 522         .owner =        THIS_MODULE,
 523         .llseek =       no_llseek,
 524         .write =        iTCO_wdt_write,
 525         .ioctl =        iTCO_wdt_ioctl,
 526         .open =         iTCO_wdt_open,
 527         .release =      iTCO_wdt_release,
 528 };
 529
 530 static struct miscdevice iTCO_wdt_miscdev = {
 531         .minor =        WATCHDOG_MINOR,
 532         .name =         "watchdog",
 533         .fops =         &iTCO_wdt_fops,
 534 };
 535
 536 static struct notifier_block iTCO_wdt_notifier = {
 537         .notifier_call =        iTCO_wdt_notify_sys,
 538 };
 539
 540 /*
 541  *      Init & exit routines
 542  */
 543
 544 static int iTCO_wdt_init(struct pci_dev *pdev, const struct pci_device_id *ent, struct platform_device *dev)
 545 {
 546         int ret;
 547         u32 base_address;
 548         unsigned long RCBA;
 549         unsigned long val32;
 550
 551         /*
 552          *      Find the ACPI/PM base I/O address which is the base
 553          *      for the TCO registers (TCOBASE=ACPIBASE + 0x60)
 554          *      ACPIBASE is bits [15:7] from 0x40-0x43
 555          */
 556         pci_read_config_dword(pdev, 0x40, &base_address);
 557         base_address &= 0x00007f80;
 558         if (base_address == 0x00000000) {
 559                 /* Something's wrong here, ACPIBASE has to be set */
 560                 printk(KERN_ERR PFX "failed to get TCOBASE address\n");
 561                 pci_dev_put(pdev);
 562                 return -ENODEV;
 563         }
 564         iTCO_wdt_private.iTCO_version = iTCO_chipset_info[ent->driver_data].iTCO_version;
 565         iTCO_wdt_private.ACPIBASE = base_address;
 566         iTCO_wdt_private.pdev = pdev;
 567
 568         /* Get the Memory-Mapped GCS register, we need it for the NO_REBOOT flag (TCO v2) */
 569         /* To get access to it you have to read RCBA from PCI Config space 0xf0
 570            and use it as base. GCS = RCBA + ICH6_GCS(0x3410). */
 571         if (iTCO_wdt_private.iTCO_version == 2) {
 572                 pci_read_config_dword(pdev, 0xf0, &base_address);
 573                 RCBA = base_address & 0xffffc000;
 574                 iTCO_wdt_private.gcs = ioremap((RCBA + 0x3410),4);
 575         }
 576
 577         /* Check chipset's NO_REBOOT bit */
 578         if (iTCO_wdt_unset_NO_REBOOT_bit()) {
 579                 printk(KERN_ERR PFX "failed to reset NO_REBOOT flag, reboot disabled by hardware\n");
 580                 ret = -ENODEV;  /* Cannot reset NO_REBOOT bit */
 581                 goto out;
 582         }
 583
 584         /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
 585         iTCO_wdt_set_NO_REBOOT_bit();
 586
 587         /* Set the TCO_EN bit in SMI_EN register */
 588         if (!request_region(SMI_EN, 4, "iTCO_wdt")) {
 589                 printk(KERN_ERR PFX "I/O address 0x%04lx already in use\n",
 590                         SMI_EN );
 591                 ret = -EIO;
 592                 goto out;
 593         }
 594         val32 = inl(SMI_EN);
 595         val32 &= 0xffffdfff;    /* Turn off SMI clearing watchdog */
 596         outl(val32, SMI_EN);
 597         release_region(SMI_EN, 4);
 598
 599         /* The TCO I/O registers reside in a 32-byte range pointed to by the TCOBASE value */
 600         if (!request_region (TCOBASE, 0x20, "iTCO_wdt")) {
 601                 printk (KERN_ERR PFX "I/O address 0x%04lx already in use\n",
 602                         TCOBASE);
 603                 ret = -EIO;
 604                 goto out;
 605         }
 606
 607         printk(KERN_INFO PFX "Found a %s TCO device (Version=%d, TCOBASE=0x%04lx)\n",
 608                 iTCO_chipset_info[ent->driver_data].name,
 609                 iTCO_chipset_info[ent->driver_data].iTCO_version,
 610                 TCOBASE);
 611
 612         /* Clear out the (probably old) status */
 613         outb(0, TCO1_STS);
 614         outb(3, TCO2_STS);
 615
 616         /* Make sure the watchdog is not running */
 617         iTCO_wdt_stop();
 618
 619         /* Check that the heartbeat value is within it's range ; if not reset to the default */
 620         if (iTCO_wdt_set_heartbeat(heartbeat)) {
 621                 iTCO_wdt_set_heartbeat(WATCHDOG_HEARTBEAT);
 622                 printk(KERN_INFO PFX "heartbeat value must be 2<heartbeat<39 (TCO v1) or 613 (TCO v2), using %d\n",
 623                         heartbeat);
 624         }
 625
 626         ret = register_reboot_notifier(&iTCO_wdt_notifier);
 627         if (ret != 0) {
 628                 printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
 629                         ret);
 630                 goto unreg_region;
 631         }
 632
 633         ret = misc_register(&iTCO_wdt_miscdev);
 634         if (ret != 0) {
 635                 printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
 636                         WATCHDOG_MINOR, ret);
 637                 goto unreg_notifier;
 638         }
 639
 640         printk (KERN_INFO PFX "initialized. heartbeat=%d sec (nowayout=%d)\n",
 641                 heartbeat, nowayout);
 642
 643         return 0;
 644
 645 unreg_notifier:
 646         unregister_reboot_notifier(&iTCO_wdt_notifier);
 647 unreg_region:
 648         release_region (TCOBASE, 0x20);
 649 out:
 650         if (iTCO_wdt_private.iTCO_version == 2)
 651                 iounmap(iTCO_wdt_private.gcs);
 652         iTCO_wdt_private.ACPIBASE = 0;
 653         pci_dev_put(iTCO_wdt_private.pdev);
 654         return ret;
 655 }
 656
 657 static void iTCO_wdt_cleanup(void)
 658 {
 659         /* Stop the timer before we leave */
 660         if (!nowayout)
 661                 iTCO_wdt_stop();
 662
 663         /* Deregister */
 664         misc_deregister(&iTCO_wdt_miscdev);
 665         unregister_reboot_notifier(&iTCO_wdt_notifier);
 666         release_region(TCOBASE, 0x20);
 667         if (iTCO_wdt_private.iTCO_version == 2)
 668                 iounmap(iTCO_wdt_private.gcs);
 669         pci_dev_put(iTCO_wdt_private.pdev);
 670 }
 671
 672 static int iTCO_wdt_probe(struct platform_device *dev)
 673 {
 674         int found = 0;
 675         struct pci_dev *pdev = NULL;
 676         const struct pci_device_id *ent;
 677
 678         spin_lock_init(&iTCO_wdt_private.io_lock);
 679
 680         for_each_pci_dev(pdev) {
 681                 ent = pci_match_id(iTCO_wdt_pci_tbl, pdev);
 682                 if (ent) {
 683                         if (!(iTCO_wdt_init(pdev, ent, dev))) {
 684                                 found++;
 685                                 break;
 686                         }
 687                 }
 688         }
 689
 690         if (!found) {
 691                 printk(KERN_INFO PFX "No card detected\n");
 692                 return -ENODEV;
 693         }
 694
 695         return 0;
 696 }
 697
 698 static int iTCO_wdt_remove(struct platform_device *dev)
 699 {
 700         if (iTCO_wdt_private.ACPIBASE)
 701                 iTCO_wdt_cleanup();
 702
 703         return 0;
 704 }
 705
 706 static void iTCO_wdt_shutdown(struct platform_device *dev)
 707 {
 708         iTCO_wdt_stop();
 709 }
 710
 711 #define iTCO_wdt_suspend NULL
 712 #define iTCO_wdt_resume  NULL
 713
 714 static struct platform_driver iTCO_wdt_driver = {
 715         .probe          = iTCO_wdt_probe,
 716         .remove         = iTCO_wdt_remove,
 717         .shutdown       = iTCO_wdt_shutdown,
 718         .suspend        = iTCO_wdt_suspend,
 719         .resume         = iTCO_wdt_resume,
 720         .driver         = {
 721                 .owner  = THIS_MODULE,
 722                 .name   = DRV_NAME,
 723         },
 724 };
 725
 726 static int __init iTCO_wdt_init_module(void)
 727 {
 728         int err;
 729
 730         printk(KERN_INFO PFX "Intel TCO WatchDog Timer Driver v%s (%s)\n",
 731                 DRV_VERSION, DRV_RELDATE);
 732
 733         err = platform_driver_register(&iTCO_wdt_driver);
 734         if (err)
 735                 return err;
 736
 737         iTCO_wdt_platform_device = platform_device_register_simple(DRV_NAME, -1, NULL, 0);
 738         if (IS_ERR(iTCO_wdt_platform_device)) {
 739                 err = PTR_ERR(iTCO_wdt_platform_device);
 740                 goto unreg_platform_driver;
 741         }
 742
 743         return 0;
 744
 745 unreg_platform_driver:
 746         platform_driver_unregister(&iTCO_wdt_driver);
 747         return err;
 748 }
 749
 750 static void __exit iTCO_wdt_cleanup_module(void)
 751 {
 752         platform_device_unregister(iTCO_wdt_platform_device);
 753         platform_driver_unregister(&iTCO_wdt_driver);
 754         printk(KERN_INFO PFX "Watchdog Module Unloaded.\n");
 755 }
 756
 757 module_init(iTCO_wdt_init_module);
 758 module_exit(iTCO_wdt_cleanup_module);
 759
 760 MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>");
 761 MODULE_DESCRIPTION("Intel TCO WatchDog Timer Driver");
 762 MODULE_VERSION(DRV_VERSION);
 763 MODULE_LICENSE("GPL");
 764 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);