2 * Copyright (C) 2014 Intel Corporation
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * Adjustable fractional divider clock implementation.
9 * Output rate = (m / n) * parent_rate.
12 #include <linux/clk-provider.h>
13 #include <linux/module.h>
14 #include <linux/device.h>
15 #include <linux/slab.h>
16 #include <linux/gcd.h>
18 #define to_clk_fd(_hw) container_of(_hw, struct clk_fractional_divider, hw)
20 static unsigned long clk_fd_recalc_rate(struct clk_hw
*hw
,
21 unsigned long parent_rate
)
23 struct clk_fractional_divider
*fd
= to_clk_fd(hw
);
24 unsigned long flags
= 0;
29 spin_lock_irqsave(fd
->lock
, flags
);
33 val
= clk_readl(fd
->reg
);
36 spin_unlock_irqrestore(fd
->lock
, flags
);
40 m
= (val
& fd
->mmask
) >> fd
->mshift
;
41 n
= (val
& fd
->nmask
) >> fd
->nshift
;
46 ret
= (u64
)parent_rate
* m
;
52 static long clk_fd_round_rate(struct clk_hw
*hw
, unsigned long rate
,
55 struct clk_fractional_divider
*fd
= to_clk_fd(hw
);
56 unsigned maxn
= (fd
->nmask
>> fd
->nshift
) + 1;
59 if (!rate
|| rate
>= *prate
)
62 div
= gcd(*prate
, rate
);
64 while ((*prate
/ div
) > maxn
) {
72 static int clk_fd_set_rate(struct clk_hw
*hw
, unsigned long rate
,
73 unsigned long parent_rate
)
75 struct clk_fractional_divider
*fd
= to_clk_fd(hw
);
76 unsigned long flags
= 0;
81 div
= gcd(parent_rate
, rate
);
83 n
= parent_rate
/ div
;
86 spin_lock_irqsave(fd
->lock
, flags
);
90 val
= clk_readl(fd
->reg
);
91 val
&= ~(fd
->mmask
| fd
->nmask
);
92 val
|= (m
<< fd
->mshift
) | (n
<< fd
->nshift
);
93 clk_writel(val
, fd
->reg
);
96 spin_unlock_irqrestore(fd
->lock
, flags
);
103 const struct clk_ops clk_fractional_divider_ops
= {
104 .recalc_rate
= clk_fd_recalc_rate
,
105 .round_rate
= clk_fd_round_rate
,
106 .set_rate
= clk_fd_set_rate
,
108 EXPORT_SYMBOL_GPL(clk_fractional_divider_ops
);
110 struct clk
*clk_register_fractional_divider(struct device
*dev
,
111 const char *name
, const char *parent_name
, unsigned long flags
,
112 void __iomem
*reg
, u8 mshift
, u8 mwidth
, u8 nshift
, u8 nwidth
,
113 u8 clk_divider_flags
, spinlock_t
*lock
)
115 struct clk_fractional_divider
*fd
;
116 struct clk_init_data init
;
119 fd
= kzalloc(sizeof(*fd
), GFP_KERNEL
);
121 return ERR_PTR(-ENOMEM
);
124 init
.ops
= &clk_fractional_divider_ops
;
125 init
.flags
= flags
| CLK_IS_BASIC
;
126 init
.parent_names
= parent_name
? &parent_name
: NULL
;
127 init
.num_parents
= parent_name
? 1 : 0;
131 fd
->mmask
= (BIT(mwidth
) - 1) << mshift
;
133 fd
->nmask
= (BIT(nwidth
) - 1) << nshift
;
134 fd
->flags
= clk_divider_flags
;
138 clk
= clk_register(dev
, &fd
->hw
);
144 EXPORT_SYMBOL_GPL(clk_register_fractional_divider
);