drivers/clk/clk-gpio.c

   1 /*
   2  * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - http://www.ti.com
   3  *
   4  * Authors:
   5  *    Jyri Sarha <jsarha@ti.com>
   6  *    Sergej Sawazki <ce3a@gmx.de>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * Gpio controlled clock implementation
  13  */
  14
  15 #include <linux/clk-provider.h>
  16 #include <linux/export.h>
  17 #include <linux/slab.h>
  18 #include <linux/gpio.h>
  19 #include <linux/gpio/consumer.h>
  20 #include <linux/of_gpio.h>
  21 #include <linux/err.h>
  22 #include <linux/device.h>
  23
  24 /**
  25  * DOC: basic gpio gated clock which can be enabled and disabled
  26  *      with gpio output
  27  * Traits of this clock:
  28  * prepare - clk_(un)prepare only ensures parent is (un)prepared
  29  * enable - clk_enable and clk_disable are functional & control gpio
  30  * rate - inherits rate from parent.  No clk_set_rate support
  31  * parent - fixed parent.  No clk_set_parent support
  32  */
  33
  34 static int clk_gpio_gate_enable(struct clk_hw *hw)
  35 {
  36         struct clk_gpio *clk = to_clk_gpio(hw);
  37
  38         gpiod_set_value(clk->gpiod, 1);
  39
  40         return 0;
  41 }
  42
  43 static void clk_gpio_gate_disable(struct clk_hw *hw)
  44 {
  45         struct clk_gpio *clk = to_clk_gpio(hw);
  46
  47         gpiod_set_value(clk->gpiod, 0);
  48 }
  49
  50 static int clk_gpio_gate_is_enabled(struct clk_hw *hw)
  51 {
  52         struct clk_gpio *clk = to_clk_gpio(hw);
  53
  54         return gpiod_get_value(clk->gpiod);
  55 }
  56
  57 const struct clk_ops clk_gpio_gate_ops = {
  58         .enable = clk_gpio_gate_enable,
  59         .disable = clk_gpio_gate_disable,
  60         .is_enabled = clk_gpio_gate_is_enabled,
  61 };
  62 EXPORT_SYMBOL_GPL(clk_gpio_gate_ops);
  63
  64 /**
  65  * DOC: basic clock multiplexer which can be controlled with a gpio output
  66  * Traits of this clock:
  67  * prepare - clk_prepare only ensures that parents are prepared
  68  * rate - rate is only affected by parent switching.  No clk_set_rate support
  69  * parent - parent is adjustable through clk_set_parent
  70  */
  71
  72 static u8 clk_gpio_mux_get_parent(struct clk_hw *hw)
  73 {
  74         struct clk_gpio *clk = to_clk_gpio(hw);
  75
  76         return gpiod_get_value(clk->gpiod);
  77 }
  78
  79 static int clk_gpio_mux_set_parent(struct clk_hw *hw, u8 index)
  80 {
  81         struct clk_gpio *clk = to_clk_gpio(hw);
  82
  83         gpiod_set_value(clk->gpiod, index);
  84
  85         return 0;
  86 }
  87
  88 const struct clk_ops clk_gpio_mux_ops = {
  89         .get_parent = clk_gpio_mux_get_parent,
  90         .set_parent = clk_gpio_mux_set_parent,
  91         .determine_rate = __clk_mux_determine_rate,
  92 };
  93 EXPORT_SYMBOL_GPL(clk_gpio_mux_ops);
  94
  95 static struct clk *clk_register_gpio(struct device *dev, const char *name,
  96                 const char * const *parent_names, u8 num_parents, unsigned gpio,
  97                 bool active_low, unsigned long flags,
  98                 const struct clk_ops *clk_gpio_ops)
  99 {
 100         struct clk_gpio *clk_gpio;
 101         struct clk *clk;
 102         struct clk_init_data init = {};
 103         unsigned long gpio_flags;
 104         int err;
 105
 106         if (dev)
 107                 clk_gpio = devm_kzalloc(dev, sizeof(*clk_gpio), GFP_KERNEL);
 108         else
 109                 clk_gpio = kzalloc(sizeof(*clk_gpio), GFP_KERNEL);
 110
 111         if (!clk_gpio)
 112                 return ERR_PTR(-ENOMEM);
 113
 114         if (active_low)
 115                 gpio_flags = GPIOF_ACTIVE_LOW | GPIOF_OUT_INIT_HIGH;
 116         else
 117                 gpio_flags = GPIOF_OUT_INIT_LOW;
 118
 119         if (dev)
 120                 err = devm_gpio_request_one(dev, gpio, gpio_flags, name);
 121         else
 122                 err = gpio_request_one(gpio, gpio_flags, name);
 123         if (err) {
 124                 if (err != -EPROBE_DEFER)
 125                         pr_err("%s: %s: Error requesting clock control gpio %u\n",
 126                                         __func__, name, gpio);
 127                 if (!dev)
 128                         kfree(clk_gpio);
 129
 130                 return ERR_PTR(err);
 131         }
 132
 133         init.name = name;
 134         init.ops = clk_gpio_ops;
 135         init.flags = flags | CLK_IS_BASIC;
 136         init.parent_names = parent_names;
 137         init.num_parents = num_parents;
 138
 139         clk_gpio->gpiod = gpio_to_desc(gpio);
 140         clk_gpio->hw.init = &init;
 141
 142         if (dev)
 143                 clk = devm_clk_register(dev, &clk_gpio->hw);
 144         else
 145                 clk = clk_register(NULL, &clk_gpio->hw);
 146
 147         if (!IS_ERR(clk))
 148                 return clk;
 149
 150         if (!dev) {
 151                 gpiod_put(clk_gpio->gpiod);
 152                 kfree(clk_gpio);
 153         }
 154
 155         return clk;
 156 }
 157
 158 /**
 159  * clk_register_gpio_gate - register a gpio clock gate with the clock framework
 160  * @dev: device that is registering this clock
 161  * @name: name of this clock
 162  * @parent_name: name of this clock's parent
 163  * @gpio: gpio number to gate this clock
 164  * @active_low: true if gpio should be set to 0 to enable clock
 165  * @flags: clock flags
 166  */
 167 struct clk *clk_register_gpio_gate(struct device *dev, const char *name,
 168                 const char *parent_name, unsigned gpio, bool active_low,
 169                 unsigned long flags)
 170 {
 171         return clk_register_gpio(dev, name,
 172                         (parent_name ? &parent_name : NULL),
 173                         (parent_name ? 1 : 0), gpio, active_low, flags,
 174                         &clk_gpio_gate_ops);
 175 }
 176 EXPORT_SYMBOL_GPL(clk_register_gpio_gate);
 177
 178 /**
 179  * clk_register_gpio_mux - register a gpio clock mux with the clock framework
 180  * @dev: device that is registering this clock
 181  * @name: name of this clock
 182  * @parent_names: names of this clock's parents
 183  * @num_parents: number of parents listed in @parent_names
 184  * @gpio: gpio number to gate this clock
 185  * @active_low: true if gpio should be set to 0 to enable clock
 186  * @flags: clock flags
 187  */
 188 struct clk *clk_register_gpio_mux(struct device *dev, const char *name,
 189                 const char * const *parent_names, u8 num_parents, unsigned gpio,
 190                 bool active_low, unsigned long flags)
 191 {
 192         if (num_parents != 2) {
 193                 pr_err("mux-clock %s must have 2 parents\n", name);
 194                 return ERR_PTR(-EINVAL);
 195         }
 196
 197         return clk_register_gpio(dev, name, parent_names, num_parents,
 198                         gpio, active_low, flags, &clk_gpio_mux_ops);
 199 }
 200 EXPORT_SYMBOL_GPL(clk_register_gpio_mux);
 201
 202 #ifdef CONFIG_OF
 203 /**
 204  * clk_register_get() has to be delayed, because -EPROBE_DEFER
 205  * can not be handled properly at of_clk_init() call time.
 206  */
 207
 208 struct clk_gpio_delayed_register_data {
 209         const char *gpio_name;
 210         int num_parents;
 211         const char **parent_names;
 212         struct device_node *node;
 213         struct mutex lock;
 214         struct clk *clk;
 215         struct clk *(*clk_register_get)(const char *name,
 216                         const char * const *parent_names, u8 num_parents,
 217                         unsigned gpio, bool active_low);
 218 };
 219
 220 static struct clk *of_clk_gpio_delayed_register_get(
 221                 struct of_phandle_args *clkspec, void *_data)
 222 {
 223         struct clk_gpio_delayed_register_data *data = _data;
 224         struct clk *clk;
 225         int gpio;
 226         enum of_gpio_flags of_flags;
 227
 228         mutex_lock(&data->lock);
 229
 230         if (data->clk) {
 231                 mutex_unlock(&data->lock);
 232                 return data->clk;
 233         }
 234
 235         gpio = of_get_named_gpio_flags(data->node, data->gpio_name, 0,
 236                         &of_flags);
 237         if (gpio < 0) {
 238                 mutex_unlock(&data->lock);
 239                 if (gpio == -EPROBE_DEFER)
 240                         pr_debug("%s: %s: GPIOs not yet available, retry later\n",
 241                                         data->node->name, __func__);
 242                 else
 243                         pr_err("%s: %s: Can't get '%s' DT property\n",
 244                                         data->node->name, __func__,
 245                                         data->gpio_name);
 246                 return ERR_PTR(gpio);
 247         }
 248
 249         clk = data->clk_register_get(data->node->name, data->parent_names,
 250                         data->num_parents, gpio, of_flags & OF_GPIO_ACTIVE_LOW);
 251         if (IS_ERR(clk))
 252                 goto out;
 253
 254         data->clk = clk;
 255 out:
 256         mutex_unlock(&data->lock);
 257
 258         return clk;
 259 }
 260
 261 static struct clk *of_clk_gpio_gate_delayed_register_get(const char *name,
 262                 const char * const *parent_names, u8 num_parents,
 263                 unsigned gpio, bool active_low)
 264 {
 265         return clk_register_gpio_gate(NULL, name, parent_names ?
 266                         parent_names[0] : NULL, gpio, active_low, 0);
 267 }
 268
 269 static struct clk *of_clk_gpio_mux_delayed_register_get(const char *name,
 270                 const char * const *parent_names, u8 num_parents, unsigned gpio,
 271                 bool active_low)
 272 {
 273         return clk_register_gpio_mux(NULL, name, parent_names, num_parents,
 274                         gpio, active_low, 0);
 275 }
 276
 277 static void __init of_gpio_clk_setup(struct device_node *node,
 278                 const char *gpio_name,
 279                 struct clk *(*clk_register_get)(const char *name,
 280                                 const char * const *parent_names,
 281                                 u8 num_parents,
 282                                 unsigned gpio, bool active_low))
 283 {
 284         struct clk_gpio_delayed_register_data *data;
 285         const char **parent_names;
 286         int i, num_parents;
 287
 288         num_parents = of_clk_get_parent_count(node);
 289         if (num_parents < 0)
 290                 num_parents = 0;
 291
 292         data = kzalloc(sizeof(*data), GFP_KERNEL);
 293         if (!data)
 294                 return;
 295
 296         if (num_parents) {
 297                 parent_names = kcalloc(num_parents, sizeof(char *), GFP_KERNEL);
 298                 if (!parent_names) {
 299                         kfree(data);
 300                         return;
 301                 }
 302
 303                 for (i = 0; i < num_parents; i++)
 304                         parent_names[i] = of_clk_get_parent_name(node, i);
 305         } else {
 306                 parent_names = NULL;
 307         }
 308
 309         data->num_parents = num_parents;
 310         data->parent_names = parent_names;
 311         data->node = node;
 312         data->gpio_name = gpio_name;
 313         data->clk_register_get = clk_register_get;
 314         mutex_init(&data->lock);
 315
 316         of_clk_add_provider(node, of_clk_gpio_delayed_register_get, data);
 317 }
 318
 319 static void __init of_gpio_gate_clk_setup(struct device_node *node)
 320 {
 321         of_gpio_clk_setup(node, "enable-gpios",
 322                 of_clk_gpio_gate_delayed_register_get);
 323 }
 324 CLK_OF_DECLARE(gpio_gate_clk, "gpio-gate-clock", of_gpio_gate_clk_setup);
 325
 326 void __init of_gpio_mux_clk_setup(struct device_node *node)
 327 {
 328         of_gpio_clk_setup(node, "select-gpios",
 329                 of_clk_gpio_mux_delayed_register_get);
 330 }
 331 CLK_OF_DECLARE(gpio_mux_clk, "gpio-mux-clock", of_gpio_mux_clk_setup);
 332 #endif