Merge tag 'iommu-updates-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / drivers / clocksource / bcm_kona_timer.c
1 /*
2 * Copyright (C) 2012 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14 #include <linux/init.h>
15 #include <linux/irq.h>
16 #include <linux/interrupt.h>
17 #include <linux/jiffies.h>
18 #include <linux/clockchips.h>
19 #include <linux/types.h>
20
21 #include <linux/io.h>
22 #include <asm/mach/time.h>
23
24 #include <linux/of.h>
25 #include <linux/of_address.h>
26 #include <linux/of_irq.h>
27
28
29 #define KONA_GPTIMER_STCS_OFFSET 0x00000000
30 #define KONA_GPTIMER_STCLO_OFFSET 0x00000004
31 #define KONA_GPTIMER_STCHI_OFFSET 0x00000008
32 #define KONA_GPTIMER_STCM0_OFFSET 0x0000000C
33
34 #define KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT 0
35 #define KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT 4
36
37 struct kona_bcm_timers {
38 int tmr_irq;
39 void __iomem *tmr_regs;
40 };
41
42 static struct kona_bcm_timers timers;
43
44 static u32 arch_timer_rate;
45
46 /*
47 * We use the peripheral timers for system tick, the cpu global timer for
48 * profile tick
49 */
50 static void kona_timer_disable_and_clear(void __iomem *base)
51 {
52 uint32_t reg;
53
54 /*
55 * clear and disable interrupts
56 * We are using compare/match register 0 for our system interrupts
57 */
58 reg = readl(base + KONA_GPTIMER_STCS_OFFSET);
59
60 /* Clear compare (0) interrupt */
61 reg |= 1 << KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT;
62 /* disable compare */
63 reg &= ~(1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT);
64
65 writel(reg, base + KONA_GPTIMER_STCS_OFFSET);
66
67 }
68
69 static void
70 kona_timer_get_counter(void *timer_base, uint32_t *msw, uint32_t *lsw)
71 {
72 void __iomem *base = IOMEM(timer_base);
73 int loop_limit = 4;
74
75 /*
76 * Read 64-bit free running counter
77 * 1. Read hi-word
78 * 2. Read low-word
79 * 3. Read hi-word again
80 * 4.1
81 * if new hi-word is not equal to previously read hi-word, then
82 * start from #1
83 * 4.2
84 * if new hi-word is equal to previously read hi-word then stop.
85 */
86
87 while (--loop_limit) {
88 *msw = readl(base + KONA_GPTIMER_STCHI_OFFSET);
89 *lsw = readl(base + KONA_GPTIMER_STCLO_OFFSET);
90 if (*msw == readl(base + KONA_GPTIMER_STCHI_OFFSET))
91 break;
92 }
93 if (!loop_limit) {
94 pr_err("bcm_kona_timer: getting counter failed.\n");
95 pr_err(" Timer will be impacted\n");
96 }
97
98 return;
99 }
100
101 static const struct of_device_id bcm_timer_ids[] __initconst = {
102 {.compatible = "brcm,kona-timer"},
103 {.compatible = "bcm,kona-timer"}, /* deprecated name */
104 {},
105 };
106
107 static void __init kona_timers_init(struct device_node *node)
108 {
109 u32 freq;
110
111 if (!of_property_read_u32(node, "clock-frequency", &freq))
112 arch_timer_rate = freq;
113 else
114 panic("clock-frequency not set in the .dts file");
115
116 /* Setup IRQ numbers */
117 timers.tmr_irq = irq_of_parse_and_map(node, 0);
118
119 /* Setup IO addresses */
120 timers.tmr_regs = of_iomap(node, 0);
121
122 kona_timer_disable_and_clear(timers.tmr_regs);
123 }
124
125 static int kona_timer_set_next_event(unsigned long clc,
126 struct clock_event_device *unused)
127 {
128 /*
129 * timer (0) is disabled by the timer interrupt already
130 * so, here we reload the next event value and re-enable
131 * the timer.
132 *
133 * This way, we are potentially losing the time between
134 * timer-interrupt->set_next_event. CPU local timers, when
135 * they come in should get rid of skew.
136 */
137
138 uint32_t lsw, msw;
139 uint32_t reg;
140
141 kona_timer_get_counter(timers.tmr_regs, &msw, &lsw);
142
143 /* Load the "next" event tick value */
144 writel(lsw + clc, timers.tmr_regs + KONA_GPTIMER_STCM0_OFFSET);
145
146 /* Enable compare */
147 reg = readl(timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
148 reg |= (1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT);
149 writel(reg, timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
150
151 return 0;
152 }
153
154 static void kona_timer_set_mode(enum clock_event_mode mode,
155 struct clock_event_device *unused)
156 {
157 switch (mode) {
158 case CLOCK_EVT_MODE_ONESHOT:
159 /* by default mode is one shot don't do any thing */
160 break;
161 case CLOCK_EVT_MODE_UNUSED:
162 case CLOCK_EVT_MODE_SHUTDOWN:
163 default:
164 kona_timer_disable_and_clear(timers.tmr_regs);
165 }
166 }
167
168 static struct clock_event_device kona_clockevent_timer = {
169 .name = "timer 1",
170 .features = CLOCK_EVT_FEAT_ONESHOT,
171 .set_next_event = kona_timer_set_next_event,
172 .set_mode = kona_timer_set_mode
173 };
174
175 static void __init kona_timer_clockevents_init(void)
176 {
177 kona_clockevent_timer.cpumask = cpumask_of(0);
178 clockevents_config_and_register(&kona_clockevent_timer,
179 arch_timer_rate, 6, 0xffffffff);
180 }
181
182 static irqreturn_t kona_timer_interrupt(int irq, void *dev_id)
183 {
184 struct clock_event_device *evt = &kona_clockevent_timer;
185
186 kona_timer_disable_and_clear(timers.tmr_regs);
187 evt->event_handler(evt);
188 return IRQ_HANDLED;
189 }
190
191 static struct irqaction kona_timer_irq = {
192 .name = "Kona Timer Tick",
193 .flags = IRQF_TIMER,
194 .handler = kona_timer_interrupt,
195 };
196
197 static void __init kona_timer_init(struct device_node *node)
198 {
199 kona_timers_init(node);
200 kona_timer_clockevents_init();
201 setup_irq(timers.tmr_irq, &kona_timer_irq);
202 kona_timer_set_next_event((arch_timer_rate / HZ), NULL);
203 }
204
205 CLOCKSOURCE_OF_DECLARE(brcm_kona, "brcm,kona-timer", kona_timer_init);
206 /*
207 * bcm,kona-timer is deprecated by brcm,kona-timer
208 * being kept here for driver compatibility
209 */
210 CLOCKSOURCE_OF_DECLARE(bcm_kona, "bcm,kona-timer", kona_timer_init);
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