bced17d2d2c10ccc70b0d0974bb9f3786fe1c40d
[deliverable/linux.git] / drivers / clocksource / mips-gic-timer.c
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
7 */
8 #include <linux/clockchips.h>
9 #include <linux/init.h>
10 #include <linux/interrupt.h>
11 #include <linux/irqchip/mips-gic.h>
12 #include <linux/percpu.h>
13 #include <linux/smp.h>
14 #include <linux/time.h>
15
16 #include <asm/time.h>
17
18 static DEFINE_PER_CPU(struct clock_event_device, gic_clockevent_device);
19 static int gic_timer_irq_installed;
20 static unsigned int gic_frequency;
21
22 static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
23 {
24 u64 cnt;
25 int res;
26
27 cnt = gic_read_count();
28 cnt += (u64)delta;
29 gic_write_cpu_compare(cnt, cpumask_first(evt->cpumask));
30 res = ((int)(gic_read_count() - cnt) >= 0) ? -ETIME : 0;
31 return res;
32 }
33
34 static void gic_set_clock_mode(enum clock_event_mode mode,
35 struct clock_event_device *evt)
36 {
37 /* Nothing to do ... */
38 }
39
40 static irqreturn_t gic_compare_interrupt(int irq, void *dev_id)
41 {
42 struct clock_event_device *cd;
43 int cpu = smp_processor_id();
44
45 gic_write_compare(gic_read_compare());
46 cd = &per_cpu(gic_clockevent_device, cpu);
47 cd->event_handler(cd);
48 return IRQ_HANDLED;
49 }
50
51 struct irqaction gic_compare_irqaction = {
52 .handler = gic_compare_interrupt,
53 .flags = IRQF_PERCPU | IRQF_TIMER,
54 .name = "timer",
55 };
56
57 static void gic_event_handler(struct clock_event_device *dev)
58 {
59 }
60
61 int gic_clockevent_init(void)
62 {
63 unsigned int cpu = smp_processor_id();
64 struct clock_event_device *cd;
65 unsigned int irq;
66
67 if (!cpu_has_counter || !gic_frequency)
68 return -ENXIO;
69
70 irq = MIPS_GIC_IRQ_BASE + GIC_LOCAL_TO_HWIRQ(GIC_LOCAL_INT_COMPARE);
71
72 cd = &per_cpu(gic_clockevent_device, cpu);
73
74 cd->name = "MIPS GIC";
75 cd->features = CLOCK_EVT_FEAT_ONESHOT |
76 CLOCK_EVT_FEAT_C3STOP;
77
78 clockevent_set_clock(cd, gic_frequency);
79
80 /* Calculate the min / max delta */
81 cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd);
82 cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
83
84 cd->rating = 300;
85 cd->irq = irq;
86 cd->cpumask = cpumask_of(cpu);
87 cd->set_next_event = gic_next_event;
88 cd->set_mode = gic_set_clock_mode;
89 cd->event_handler = gic_event_handler;
90
91 clockevents_register_device(cd);
92
93 if (!gic_timer_irq_installed) {
94 setup_percpu_irq(irq, &gic_compare_irqaction);
95 gic_timer_irq_installed = 1;
96 }
97
98 enable_percpu_irq(irq, IRQ_TYPE_NONE);
99
100 return 0;
101 }
102
103 static cycle_t gic_hpt_read(struct clocksource *cs)
104 {
105 return gic_read_count();
106 }
107
108 static struct clocksource gic_clocksource = {
109 .name = "GIC",
110 .read = gic_hpt_read,
111 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
112 };
113
114 void __init gic_clocksource_init(unsigned int frequency)
115 {
116 gic_frequency = frequency;
117
118 /* Set clocksource mask. */
119 gic_clocksource.mask = CLOCKSOURCE_MASK(gic_get_count_width());
120
121 /* Calculate a somewhat reasonable rating value. */
122 gic_clocksource.rating = 200 + frequency / 10000000;
123
124 clocksource_register_hz(&gic_clocksource, frequency);
125 }
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