2 * intel_pstate.c: Native P state management for Intel processors
4 * (C) Copyright 2012 Intel Corporation
5 * Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
13 #include <linux/kernel.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/module.h>
16 #include <linux/ktime.h>
17 #include <linux/hrtimer.h>
18 #include <linux/tick.h>
19 #include <linux/slab.h>
20 #include <linux/sched.h>
21 #include <linux/list.h>
22 #include <linux/cpu.h>
23 #include <linux/cpufreq.h>
24 #include <linux/sysfs.h>
25 #include <linux/types.h>
27 #include <linux/debugfs.h>
28 #include <linux/acpi.h>
29 #include <trace/events/power.h>
31 #include <asm/div64.h>
33 #include <asm/cpu_device_id.h>
35 #define SAMPLE_COUNT 3
37 #define BYT_RATIOS 0x66a
38 #define BYT_VIDS 0x66b
39 #define BYT_TURBO_RATIOS 0x66c
43 #define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
44 #define fp_toint(X) ((X) >> FRAC_BITS)
45 #define FP_ROUNDUP(X) ((X) += 1 << FRAC_BITS)
47 static inline int32_t mul_fp(int32_t x
, int32_t y
)
49 return ((int64_t)x
* (int64_t)y
) >> FRAC_BITS
;
52 static inline int32_t div_fp(int32_t x
, int32_t y
)
54 return div_s64((int64_t)x
<< FRAC_BITS
, (int64_t)y
);
58 int32_t core_pct_busy
;
61 unsigned long long tsc
;
93 struct timer_list timer
;
95 struct pstate_data pstate
;
101 unsigned long long prev_tsc
;
102 struct sample sample
;
105 static struct cpudata
**all_cpu_data
;
106 struct pstate_adjust_policy
{
115 struct pstate_funcs
{
116 int (*get_max
)(void);
117 int (*get_min
)(void);
118 int (*get_turbo
)(void);
119 void (*set
)(struct cpudata
*, int pstate
);
120 void (*get_vid
)(struct cpudata
*);
123 struct cpu_defaults
{
124 struct pstate_adjust_policy pid_policy
;
125 struct pstate_funcs funcs
;
128 static struct pstate_adjust_policy pid_params
;
129 static struct pstate_funcs pstate_funcs
;
141 static struct perf_limits limits
= {
144 .max_perf
= int_tofp(1),
147 .max_policy_pct
= 100,
148 .max_sysfs_pct
= 100,
151 static inline void pid_reset(struct _pid
*pid
, int setpoint
, int busy
,
152 int deadband
, int integral
) {
153 pid
->setpoint
= setpoint
;
154 pid
->deadband
= deadband
;
155 pid
->integral
= int_tofp(integral
);
156 pid
->last_err
= int_tofp(setpoint
) - int_tofp(busy
);
159 static inline void pid_p_gain_set(struct _pid
*pid
, int percent
)
161 pid
->p_gain
= div_fp(int_tofp(percent
), int_tofp(100));
164 static inline void pid_i_gain_set(struct _pid
*pid
, int percent
)
166 pid
->i_gain
= div_fp(int_tofp(percent
), int_tofp(100));
169 static inline void pid_d_gain_set(struct _pid
*pid
, int percent
)
172 pid
->d_gain
= div_fp(int_tofp(percent
), int_tofp(100));
175 static signed int pid_calc(struct _pid
*pid
, int32_t busy
)
178 int32_t pterm
, dterm
, fp_error
;
179 int32_t integral_limit
;
181 fp_error
= int_tofp(pid
->setpoint
) - busy
;
183 if (abs(fp_error
) <= int_tofp(pid
->deadband
))
186 pterm
= mul_fp(pid
->p_gain
, fp_error
);
188 pid
->integral
+= fp_error
;
190 /* limit the integral term */
191 integral_limit
= int_tofp(30);
192 if (pid
->integral
> integral_limit
)
193 pid
->integral
= integral_limit
;
194 if (pid
->integral
< -integral_limit
)
195 pid
->integral
= -integral_limit
;
197 dterm
= mul_fp(pid
->d_gain
, fp_error
- pid
->last_err
);
198 pid
->last_err
= fp_error
;
200 result
= pterm
+ mul_fp(pid
->integral
, pid
->i_gain
) + dterm
;
202 return (signed int)fp_toint(result
);
205 static inline void intel_pstate_busy_pid_reset(struct cpudata
*cpu
)
207 pid_p_gain_set(&cpu
->pid
, pid_params
.p_gain_pct
);
208 pid_d_gain_set(&cpu
->pid
, pid_params
.d_gain_pct
);
209 pid_i_gain_set(&cpu
->pid
, pid_params
.i_gain_pct
);
218 static inline void intel_pstate_reset_all_pid(void)
221 for_each_online_cpu(cpu
) {
222 if (all_cpu_data
[cpu
])
223 intel_pstate_busy_pid_reset(all_cpu_data
[cpu
]);
227 /************************** debugfs begin ************************/
228 static int pid_param_set(void *data
, u64 val
)
231 intel_pstate_reset_all_pid();
234 static int pid_param_get(void *data
, u64
*val
)
239 DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param
, pid_param_get
,
240 pid_param_set
, "%llu\n");
247 static struct pid_param pid_files
[] = {
248 {"sample_rate_ms", &pid_params
.sample_rate_ms
},
249 {"d_gain_pct", &pid_params
.d_gain_pct
},
250 {"i_gain_pct", &pid_params
.i_gain_pct
},
251 {"deadband", &pid_params
.deadband
},
252 {"setpoint", &pid_params
.setpoint
},
253 {"p_gain_pct", &pid_params
.p_gain_pct
},
257 static struct dentry
*debugfs_parent
;
258 static void intel_pstate_debug_expose_params(void)
262 debugfs_parent
= debugfs_create_dir("pstate_snb", NULL
);
263 if (IS_ERR_OR_NULL(debugfs_parent
))
265 while (pid_files
[i
].name
) {
266 debugfs_create_file(pid_files
[i
].name
, 0660,
267 debugfs_parent
, pid_files
[i
].value
,
273 /************************** debugfs end ************************/
275 /************************** sysfs begin ************************/
276 #define show_one(file_name, object) \
277 static ssize_t show_##file_name \
278 (struct kobject *kobj, struct attribute *attr, char *buf) \
280 return sprintf(buf, "%u\n", limits.object); \
283 static ssize_t
store_no_turbo(struct kobject
*a
, struct attribute
*b
,
284 const char *buf
, size_t count
)
288 ret
= sscanf(buf
, "%u", &input
);
291 limits
.no_turbo
= clamp_t(int, input
, 0 , 1);
296 static ssize_t
store_max_perf_pct(struct kobject
*a
, struct attribute
*b
,
297 const char *buf
, size_t count
)
301 ret
= sscanf(buf
, "%u", &input
);
305 limits
.max_sysfs_pct
= clamp_t(int, input
, 0 , 100);
306 limits
.max_perf_pct
= min(limits
.max_policy_pct
, limits
.max_sysfs_pct
);
307 limits
.max_perf
= div_fp(int_tofp(limits
.max_perf_pct
), int_tofp(100));
311 static ssize_t
store_min_perf_pct(struct kobject
*a
, struct attribute
*b
,
312 const char *buf
, size_t count
)
316 ret
= sscanf(buf
, "%u", &input
);
319 limits
.min_perf_pct
= clamp_t(int, input
, 0 , 100);
320 limits
.min_perf
= div_fp(int_tofp(limits
.min_perf_pct
), int_tofp(100));
325 show_one(no_turbo
, no_turbo
);
326 show_one(max_perf_pct
, max_perf_pct
);
327 show_one(min_perf_pct
, min_perf_pct
);
329 define_one_global_rw(no_turbo
);
330 define_one_global_rw(max_perf_pct
);
331 define_one_global_rw(min_perf_pct
);
333 static struct attribute
*intel_pstate_attributes
[] = {
340 static struct attribute_group intel_pstate_attr_group
= {
341 .attrs
= intel_pstate_attributes
,
343 static struct kobject
*intel_pstate_kobject
;
345 static void intel_pstate_sysfs_expose_params(void)
349 intel_pstate_kobject
= kobject_create_and_add("intel_pstate",
350 &cpu_subsys
.dev_root
->kobj
);
351 BUG_ON(!intel_pstate_kobject
);
352 rc
= sysfs_create_group(intel_pstate_kobject
,
353 &intel_pstate_attr_group
);
357 /************************** sysfs end ************************/
358 static int byt_get_min_pstate(void)
361 rdmsrl(BYT_RATIOS
, value
);
362 return (value
>> 8) & 0xFF;
365 static int byt_get_max_pstate(void)
368 rdmsrl(BYT_RATIOS
, value
);
369 return (value
>> 16) & 0xFF;
372 static int byt_get_turbo_pstate(void)
375 rdmsrl(BYT_TURBO_RATIOS
, value
);
379 static void byt_set_pstate(struct cpudata
*cpudata
, int pstate
)
389 vid_fp
= cpudata
->vid
.min
+ mul_fp(
390 int_tofp(pstate
- cpudata
->pstate
.min_pstate
),
393 vid_fp
= clamp_t(int32_t, vid_fp
, cpudata
->vid
.min
, cpudata
->vid
.max
);
394 vid
= fp_toint(vid_fp
);
398 wrmsrl(MSR_IA32_PERF_CTL
, val
);
401 static void byt_get_vid(struct cpudata
*cpudata
)
405 rdmsrl(BYT_VIDS
, value
);
406 cpudata
->vid
.min
= int_tofp((value
>> 8) & 0x7f);
407 cpudata
->vid
.max
= int_tofp((value
>> 16) & 0x7f);
408 cpudata
->vid
.ratio
= div_fp(
409 cpudata
->vid
.max
- cpudata
->vid
.min
,
410 int_tofp(cpudata
->pstate
.max_pstate
-
411 cpudata
->pstate
.min_pstate
));
415 static int core_get_min_pstate(void)
418 rdmsrl(MSR_PLATFORM_INFO
, value
);
419 return (value
>> 40) & 0xFF;
422 static int core_get_max_pstate(void)
425 rdmsrl(MSR_PLATFORM_INFO
, value
);
426 return (value
>> 8) & 0xFF;
429 static int core_get_turbo_pstate(void)
433 rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT
, value
);
434 nont
= core_get_max_pstate();
435 ret
= ((value
) & 255);
441 static void core_set_pstate(struct cpudata
*cpudata
, int pstate
)
449 wrmsrl_on_cpu(cpudata
->cpu
, MSR_IA32_PERF_CTL
, val
);
452 static struct cpu_defaults core_params
= {
454 .sample_rate_ms
= 10,
462 .get_max
= core_get_max_pstate
,
463 .get_min
= core_get_min_pstate
,
464 .get_turbo
= core_get_turbo_pstate
,
465 .set
= core_set_pstate
,
469 static struct cpu_defaults byt_params
= {
471 .sample_rate_ms
= 10,
479 .get_max
= byt_get_max_pstate
,
480 .get_min
= byt_get_min_pstate
,
481 .get_turbo
= byt_get_turbo_pstate
,
482 .set
= byt_set_pstate
,
483 .get_vid
= byt_get_vid
,
488 static void intel_pstate_get_min_max(struct cpudata
*cpu
, int *min
, int *max
)
490 int max_perf
= cpu
->pstate
.turbo_pstate
;
494 max_perf
= cpu
->pstate
.max_pstate
;
496 max_perf_adj
= fp_toint(mul_fp(int_tofp(max_perf
), limits
.max_perf
));
497 *max
= clamp_t(int, max_perf_adj
,
498 cpu
->pstate
.min_pstate
, cpu
->pstate
.turbo_pstate
);
500 min_perf
= fp_toint(mul_fp(int_tofp(max_perf
), limits
.min_perf
));
501 *min
= clamp_t(int, min_perf
,
502 cpu
->pstate
.min_pstate
, max_perf
);
505 static void intel_pstate_set_pstate(struct cpudata
*cpu
, int pstate
)
507 int max_perf
, min_perf
;
509 intel_pstate_get_min_max(cpu
, &min_perf
, &max_perf
);
511 pstate
= clamp_t(int, pstate
, min_perf
, max_perf
);
513 if (pstate
== cpu
->pstate
.current_pstate
)
516 trace_cpu_frequency(pstate
* 100000, cpu
->cpu
);
518 cpu
->pstate
.current_pstate
= pstate
;
520 pstate_funcs
.set(cpu
, pstate
);
523 static inline void intel_pstate_pstate_increase(struct cpudata
*cpu
, int steps
)
526 target
= cpu
->pstate
.current_pstate
+ steps
;
528 intel_pstate_set_pstate(cpu
, target
);
531 static inline void intel_pstate_pstate_decrease(struct cpudata
*cpu
, int steps
)
534 target
= cpu
->pstate
.current_pstate
- steps
;
535 intel_pstate_set_pstate(cpu
, target
);
538 static void intel_pstate_get_cpu_pstates(struct cpudata
*cpu
)
540 sprintf(cpu
->name
, "Intel 2nd generation core");
542 cpu
->pstate
.min_pstate
= pstate_funcs
.get_min();
543 cpu
->pstate
.max_pstate
= pstate_funcs
.get_max();
544 cpu
->pstate
.turbo_pstate
= pstate_funcs
.get_turbo();
546 if (pstate_funcs
.get_vid
)
547 pstate_funcs
.get_vid(cpu
);
550 * goto max pstate so we don't slow up boot if we are built-in if we are
551 * a module we will take care of it during normal operation
553 intel_pstate_set_pstate(cpu
, cpu
->pstate
.max_pstate
);
556 static inline void intel_pstate_calc_busy(struct cpudata
*cpu
,
557 struct sample
*sample
)
562 core_pct
= div_fp(int_tofp((sample
->aperf
)),
563 int_tofp((sample
->mperf
)));
564 core_pct
= mul_fp(core_pct
, int_tofp(100));
565 FP_ROUNDUP(core_pct
);
567 c0_pct
= div_fp(int_tofp(sample
->mperf
), int_tofp(sample
->tsc
));
569 sample
->freq
= fp_toint(
570 mul_fp(int_tofp(cpu
->pstate
.max_pstate
* 1000), core_pct
));
572 sample
->core_pct_busy
= mul_fp(core_pct
, c0_pct
);
575 static inline void intel_pstate_sample(struct cpudata
*cpu
)
578 unsigned long long tsc
;
580 rdmsrl(MSR_IA32_APERF
, aperf
);
581 rdmsrl(MSR_IA32_MPERF
, mperf
);
582 tsc
= native_read_tsc();
584 aperf
= aperf
>> FRAC_BITS
;
585 mperf
= mperf
>> FRAC_BITS
;
586 tsc
= tsc
>> FRAC_BITS
;
588 cpu
->sample
.aperf
= aperf
;
589 cpu
->sample
.mperf
= mperf
;
590 cpu
->sample
.tsc
= tsc
;
591 cpu
->sample
.aperf
-= cpu
->prev_aperf
;
592 cpu
->sample
.mperf
-= cpu
->prev_mperf
;
593 cpu
->sample
.tsc
-= cpu
->prev_tsc
;
595 intel_pstate_calc_busy(cpu
, &cpu
->sample
);
597 cpu
->prev_aperf
= aperf
;
598 cpu
->prev_mperf
= mperf
;
602 static inline void intel_pstate_set_sample_time(struct cpudata
*cpu
)
604 int sample_time
, delay
;
606 sample_time
= pid_params
.sample_rate_ms
;
607 delay
= msecs_to_jiffies(sample_time
);
608 mod_timer_pinned(&cpu
->timer
, jiffies
+ delay
);
611 static inline int32_t intel_pstate_get_scaled_busy(struct cpudata
*cpu
)
613 int32_t core_busy
, max_pstate
, current_pstate
;
615 core_busy
= cpu
->sample
.core_pct_busy
;
616 max_pstate
= int_tofp(cpu
->pstate
.max_pstate
);
617 current_pstate
= int_tofp(cpu
->pstate
.current_pstate
);
618 core_busy
= mul_fp(core_busy
, div_fp(max_pstate
, current_pstate
));
619 return FP_ROUNDUP(core_busy
);
622 static inline void intel_pstate_adjust_busy_pstate(struct cpudata
*cpu
)
630 busy_scaled
= intel_pstate_get_scaled_busy(cpu
);
632 ctl
= pid_calc(pid
, busy_scaled
);
637 intel_pstate_pstate_increase(cpu
, steps
);
639 intel_pstate_pstate_decrease(cpu
, steps
);
642 static void intel_pstate_timer_func(unsigned long __data
)
644 struct cpudata
*cpu
= (struct cpudata
*) __data
;
645 struct sample
*sample
;
647 intel_pstate_sample(cpu
);
649 sample
= &cpu
->sample
;
651 intel_pstate_adjust_busy_pstate(cpu
);
653 trace_pstate_sample(fp_toint(sample
->core_pct_busy
),
654 fp_toint(intel_pstate_get_scaled_busy(cpu
)),
655 cpu
->pstate
.current_pstate
,
660 intel_pstate_set_sample_time(cpu
);
663 #define ICPU(model, policy) \
664 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\
665 (unsigned long)&policy }
667 static const struct x86_cpu_id intel_pstate_cpu_ids
[] = {
668 ICPU(0x2a, core_params
),
669 ICPU(0x2d, core_params
),
670 ICPU(0x37, byt_params
),
671 ICPU(0x3a, core_params
),
672 ICPU(0x3c, core_params
),
673 ICPU(0x3e, core_params
),
674 ICPU(0x3f, core_params
),
675 ICPU(0x45, core_params
),
676 ICPU(0x46, core_params
),
679 MODULE_DEVICE_TABLE(x86cpu
, intel_pstate_cpu_ids
);
681 static int intel_pstate_init_cpu(unsigned int cpunum
)
684 const struct x86_cpu_id
*id
;
687 id
= x86_match_cpu(intel_pstate_cpu_ids
);
691 all_cpu_data
[cpunum
] = kzalloc(sizeof(struct cpudata
), GFP_KERNEL
);
692 if (!all_cpu_data
[cpunum
])
695 cpu
= all_cpu_data
[cpunum
];
697 intel_pstate_get_cpu_pstates(cpu
);
698 if (!cpu
->pstate
.current_pstate
) {
699 all_cpu_data
[cpunum
] = NULL
;
706 init_timer_deferrable(&cpu
->timer
);
707 cpu
->timer
.function
= intel_pstate_timer_func
;
710 cpu
->timer
.expires
= jiffies
+ HZ
/100;
711 intel_pstate_busy_pid_reset(cpu
);
712 intel_pstate_sample(cpu
);
713 intel_pstate_set_pstate(cpu
, cpu
->pstate
.max_pstate
);
715 add_timer_on(&cpu
->timer
, cpunum
);
717 pr_info("Intel pstate controlling: cpu %d\n", cpunum
);
722 static unsigned int intel_pstate_get(unsigned int cpu_num
)
724 struct sample
*sample
;
727 cpu
= all_cpu_data
[cpu_num
];
730 sample
= &cpu
->sample
;
734 static int intel_pstate_set_policy(struct cpufreq_policy
*policy
)
738 cpu
= all_cpu_data
[policy
->cpu
];
740 if (!policy
->cpuinfo
.max_freq
)
743 if (policy
->policy
== CPUFREQ_POLICY_PERFORMANCE
) {
744 limits
.min_perf_pct
= 100;
745 limits
.min_perf
= int_tofp(1);
746 limits
.max_perf_pct
= 100;
747 limits
.max_perf
= int_tofp(1);
751 limits
.min_perf_pct
= (policy
->min
* 100) / policy
->cpuinfo
.max_freq
;
752 limits
.min_perf_pct
= clamp_t(int, limits
.min_perf_pct
, 0 , 100);
753 limits
.min_perf
= div_fp(int_tofp(limits
.min_perf_pct
), int_tofp(100));
755 limits
.max_policy_pct
= policy
->max
* 100 / policy
->cpuinfo
.max_freq
;
756 limits
.max_policy_pct
= clamp_t(int, limits
.max_policy_pct
, 0 , 100);
757 limits
.max_perf_pct
= min(limits
.max_policy_pct
, limits
.max_sysfs_pct
);
758 limits
.max_perf
= div_fp(int_tofp(limits
.max_perf_pct
), int_tofp(100));
763 static int intel_pstate_verify_policy(struct cpufreq_policy
*policy
)
765 cpufreq_verify_within_cpu_limits(policy
);
767 if ((policy
->policy
!= CPUFREQ_POLICY_POWERSAVE
) &&
768 (policy
->policy
!= CPUFREQ_POLICY_PERFORMANCE
))
774 static void intel_pstate_stop_cpu(struct cpufreq_policy
*policy
)
776 int cpu_num
= policy
->cpu
;
777 struct cpudata
*cpu
= all_cpu_data
[cpu_num
];
779 pr_info("intel_pstate CPU %d exiting\n", cpu_num
);
781 del_timer(&all_cpu_data
[cpu_num
]->timer
);
782 intel_pstate_set_pstate(cpu
, cpu
->pstate
.min_pstate
);
783 kfree(all_cpu_data
[cpu_num
]);
784 all_cpu_data
[cpu_num
] = NULL
;
787 static int intel_pstate_cpu_init(struct cpufreq_policy
*policy
)
792 rc
= intel_pstate_init_cpu(policy
->cpu
);
796 cpu
= all_cpu_data
[policy
->cpu
];
798 if (!limits
.no_turbo
&&
799 limits
.min_perf_pct
== 100 && limits
.max_perf_pct
== 100)
800 policy
->policy
= CPUFREQ_POLICY_PERFORMANCE
;
802 policy
->policy
= CPUFREQ_POLICY_POWERSAVE
;
804 policy
->min
= cpu
->pstate
.min_pstate
* 100000;
805 policy
->max
= cpu
->pstate
.turbo_pstate
* 100000;
807 /* cpuinfo and default policy values */
808 policy
->cpuinfo
.min_freq
= cpu
->pstate
.min_pstate
* 100000;
809 policy
->cpuinfo
.max_freq
= cpu
->pstate
.turbo_pstate
* 100000;
810 policy
->cpuinfo
.transition_latency
= CPUFREQ_ETERNAL
;
811 cpumask_set_cpu(policy
->cpu
, policy
->cpus
);
816 static struct cpufreq_driver intel_pstate_driver
= {
817 .flags
= CPUFREQ_CONST_LOOPS
,
818 .verify
= intel_pstate_verify_policy
,
819 .setpolicy
= intel_pstate_set_policy
,
820 .get
= intel_pstate_get
,
821 .init
= intel_pstate_cpu_init
,
822 .stop_cpu
= intel_pstate_stop_cpu
,
823 .name
= "intel_pstate",
826 static int __initdata no_load
;
828 static int intel_pstate_msrs_not_valid(void)
830 /* Check that all the msr's we are using are valid. */
831 u64 aperf
, mperf
, tmp
;
833 rdmsrl(MSR_IA32_APERF
, aperf
);
834 rdmsrl(MSR_IA32_MPERF
, mperf
);
836 if (!pstate_funcs
.get_max() ||
837 !pstate_funcs
.get_min() ||
838 !pstate_funcs
.get_turbo())
841 rdmsrl(MSR_IA32_APERF
, tmp
);
845 rdmsrl(MSR_IA32_MPERF
, tmp
);
852 static void copy_pid_params(struct pstate_adjust_policy
*policy
)
854 pid_params
.sample_rate_ms
= policy
->sample_rate_ms
;
855 pid_params
.p_gain_pct
= policy
->p_gain_pct
;
856 pid_params
.i_gain_pct
= policy
->i_gain_pct
;
857 pid_params
.d_gain_pct
= policy
->d_gain_pct
;
858 pid_params
.deadband
= policy
->deadband
;
859 pid_params
.setpoint
= policy
->setpoint
;
862 static void copy_cpu_funcs(struct pstate_funcs
*funcs
)
864 pstate_funcs
.get_max
= funcs
->get_max
;
865 pstate_funcs
.get_min
= funcs
->get_min
;
866 pstate_funcs
.get_turbo
= funcs
->get_turbo
;
867 pstate_funcs
.set
= funcs
->set
;
868 pstate_funcs
.get_vid
= funcs
->get_vid
;
871 #if IS_ENABLED(CONFIG_ACPI)
872 #include <acpi/processor.h>
874 static bool intel_pstate_no_acpi_pss(void)
878 for_each_possible_cpu(i
) {
880 union acpi_object
*pss
;
881 struct acpi_buffer buffer
= { ACPI_ALLOCATE_BUFFER
, NULL
};
882 struct acpi_processor
*pr
= per_cpu(processors
, i
);
887 status
= acpi_evaluate_object(pr
->handle
, "_PSS", NULL
, &buffer
);
888 if (ACPI_FAILURE(status
))
891 pss
= buffer
.pointer
;
892 if (pss
&& pss
->type
== ACPI_TYPE_PACKAGE
) {
903 struct hw_vendor_info
{
905 char oem_id
[ACPI_OEM_ID_SIZE
];
906 char oem_table_id
[ACPI_OEM_TABLE_ID_SIZE
];
909 /* Hardware vendor-specific info that has its own power management modes */
910 static struct hw_vendor_info vendor_info
[] = {
911 {1, "HP ", "ProLiant"},
915 static bool intel_pstate_platform_pwr_mgmt_exists(void)
917 struct acpi_table_header hdr
;
918 struct hw_vendor_info
*v_info
;
921 || ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT
, 0, &hdr
)))
924 for (v_info
= vendor_info
; v_info
->valid
; v_info
++) {
925 if (!strncmp(hdr
.oem_id
, v_info
->oem_id
, ACPI_OEM_ID_SIZE
)
926 && !strncmp(hdr
.oem_table_id
, v_info
->oem_table_id
, ACPI_OEM_TABLE_ID_SIZE
)
927 && intel_pstate_no_acpi_pss())
933 #else /* CONFIG_ACPI not enabled */
934 static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; }
935 #endif /* CONFIG_ACPI */
937 static int __init
intel_pstate_init(void)
940 const struct x86_cpu_id
*id
;
941 struct cpu_defaults
*cpu_info
;
946 id
= x86_match_cpu(intel_pstate_cpu_ids
);
951 * The Intel pstate driver will be ignored if the platform
952 * firmware has its own power management modes.
954 if (intel_pstate_platform_pwr_mgmt_exists())
957 cpu_info
= (struct cpu_defaults
*)id
->driver_data
;
959 copy_pid_params(&cpu_info
->pid_policy
);
960 copy_cpu_funcs(&cpu_info
->funcs
);
962 if (intel_pstate_msrs_not_valid())
965 pr_info("Intel P-state driver initializing.\n");
967 all_cpu_data
= vzalloc(sizeof(void *) * num_possible_cpus());
971 rc
= cpufreq_register_driver(&intel_pstate_driver
);
975 intel_pstate_debug_expose_params();
976 intel_pstate_sysfs_expose_params();
981 for_each_online_cpu(cpu
) {
982 if (all_cpu_data
[cpu
]) {
983 del_timer_sync(&all_cpu_data
[cpu
]->timer
);
984 kfree(all_cpu_data
[cpu
]);
992 device_initcall(intel_pstate_init
);
994 static int __init
intel_pstate_setup(char *str
)
999 if (!strcmp(str
, "disable"))
1003 early_param("intel_pstate", intel_pstate_setup
);
1005 MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
1006 MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
1007 MODULE_LICENSE("GPL");