2 * Copyright (c) 2015 Linaro Ltd.
3 * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <linux/clk.h>
16 #include <linux/cpu.h>
17 #include <linux/cpu_cooling.h>
18 #include <linux/cpufreq.h>
19 #include <linux/cpumask.h>
21 #include <linux/platform_device.h>
22 #include <linux/pm_opp.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/slab.h>
25 #include <linux/thermal.h>
27 #define MIN_VOLT_SHIFT (100000)
28 #define MAX_VOLT_SHIFT (200000)
29 #define MAX_VOLT_LIMIT (1150000)
30 #define VOLT_TOL (10000)
33 * The struct mtk_cpu_dvfs_info holds necessary information for doing CPU DVFS
34 * on each CPU power/clock domain of Mediatek SoCs. Each CPU cluster in
35 * Mediatek SoCs has two voltage inputs, Vproc and Vsram. In some cases the two
36 * voltage inputs need to be controlled under a hardware limitation:
37 * 100mV < Vsram - Vproc < 200mV
39 * When scaling the clock frequency of a CPU clock domain, the clock source
40 * needs to be switched to another stable PLL clock temporarily until
41 * the original PLL becomes stable at target frequency.
43 struct mtk_cpu_dvfs_info
{
45 struct device
*cpu_dev
;
46 struct regulator
*proc_reg
;
47 struct regulator
*sram_reg
;
49 struct clk
*inter_clk
;
50 struct thermal_cooling_device
*cdev
;
51 struct list_head list_head
;
52 int intermediate_voltage
;
53 bool need_voltage_tracking
;
56 static LIST_HEAD(dvfs_info_list
);
58 static struct mtk_cpu_dvfs_info
*mtk_cpu_dvfs_info_lookup(int cpu
)
60 struct mtk_cpu_dvfs_info
*info
;
61 struct list_head
*list
;
63 list_for_each(list
, &dvfs_info_list
) {
64 info
= list_entry(list
, struct mtk_cpu_dvfs_info
, list_head
);
66 if (cpumask_test_cpu(cpu
, &info
->cpus
))
73 static int mtk_cpufreq_voltage_tracking(struct mtk_cpu_dvfs_info
*info
,
76 struct regulator
*proc_reg
= info
->proc_reg
;
77 struct regulator
*sram_reg
= info
->sram_reg
;
78 int old_vproc
, old_vsram
, new_vsram
, vsram
, vproc
, ret
;
80 old_vproc
= regulator_get_voltage(proc_reg
);
82 pr_err("%s: invalid Vproc value: %d\n", __func__
, old_vproc
);
85 /* Vsram should not exceed the maximum allowed voltage of SoC. */
86 new_vsram
= min(new_vproc
+ MIN_VOLT_SHIFT
, MAX_VOLT_LIMIT
);
88 if (old_vproc
< new_vproc
) {
90 * When scaling up voltages, Vsram and Vproc scale up step
91 * by step. At each step, set Vsram to (Vproc + 200mV) first,
92 * then set Vproc to (Vsram - 100mV).
93 * Keep doing it until Vsram and Vproc hit target voltages.
96 old_vsram
= regulator_get_voltage(sram_reg
);
98 pr_err("%s: invalid Vsram value: %d\n",
102 old_vproc
= regulator_get_voltage(proc_reg
);
104 pr_err("%s: invalid Vproc value: %d\n",
105 __func__
, old_vproc
);
109 vsram
= min(new_vsram
, old_vproc
+ MAX_VOLT_SHIFT
);
111 if (vsram
+ VOLT_TOL
>= MAX_VOLT_LIMIT
) {
112 vsram
= MAX_VOLT_LIMIT
;
115 * If the target Vsram hits the maximum voltage,
116 * try to set the exact voltage value first.
118 ret
= regulator_set_voltage(sram_reg
, vsram
,
121 ret
= regulator_set_voltage(sram_reg
,
127 ret
= regulator_set_voltage(sram_reg
, vsram
,
130 vproc
= vsram
- MIN_VOLT_SHIFT
;
135 ret
= regulator_set_voltage(proc_reg
, vproc
,
138 regulator_set_voltage(sram_reg
, old_vsram
,
142 } while (vproc
< new_vproc
|| vsram
< new_vsram
);
143 } else if (old_vproc
> new_vproc
) {
145 * When scaling down voltages, Vsram and Vproc scale down step
146 * by step. At each step, set Vproc to (Vsram - 200mV) first,
147 * then set Vproc to (Vproc + 100mV).
148 * Keep doing it until Vsram and Vproc hit target voltages.
151 old_vproc
= regulator_get_voltage(proc_reg
);
153 pr_err("%s: invalid Vproc value: %d\n",
154 __func__
, old_vproc
);
157 old_vsram
= regulator_get_voltage(sram_reg
);
159 pr_err("%s: invalid Vsram value: %d\n",
160 __func__
, old_vsram
);
164 vproc
= max(new_vproc
, old_vsram
- MAX_VOLT_SHIFT
);
165 ret
= regulator_set_voltage(proc_reg
, vproc
,
170 if (vproc
== new_vproc
)
173 vsram
= max(new_vsram
, vproc
+ MIN_VOLT_SHIFT
);
175 if (vsram
+ VOLT_TOL
>= MAX_VOLT_LIMIT
) {
176 vsram
= MAX_VOLT_LIMIT
;
179 * If the target Vsram hits the maximum voltage,
180 * try to set the exact voltage value first.
182 ret
= regulator_set_voltage(sram_reg
, vsram
,
185 ret
= regulator_set_voltage(sram_reg
,
189 ret
= regulator_set_voltage(sram_reg
, vsram
,
194 regulator_set_voltage(proc_reg
, old_vproc
,
198 } while (vproc
> new_vproc
+ VOLT_TOL
||
199 vsram
> new_vsram
+ VOLT_TOL
);
205 static int mtk_cpufreq_set_voltage(struct mtk_cpu_dvfs_info
*info
, int vproc
)
207 if (info
->need_voltage_tracking
)
208 return mtk_cpufreq_voltage_tracking(info
, vproc
);
210 return regulator_set_voltage(info
->proc_reg
, vproc
,
214 static int mtk_cpufreq_set_target(struct cpufreq_policy
*policy
,
217 struct cpufreq_frequency_table
*freq_table
= policy
->freq_table
;
218 struct clk
*cpu_clk
= policy
->clk
;
219 struct clk
*armpll
= clk_get_parent(cpu_clk
);
220 struct mtk_cpu_dvfs_info
*info
= policy
->driver_data
;
221 struct device
*cpu_dev
= info
->cpu_dev
;
222 struct dev_pm_opp
*opp
;
223 long freq_hz
, old_freq_hz
;
224 int vproc
, old_vproc
, inter_vproc
, target_vproc
, ret
;
226 inter_vproc
= info
->intermediate_voltage
;
228 old_freq_hz
= clk_get_rate(cpu_clk
);
229 old_vproc
= regulator_get_voltage(info
->proc_reg
);
231 pr_err("%s: invalid Vproc value: %d\n", __func__
, old_vproc
);
235 freq_hz
= freq_table
[index
].frequency
* 1000;
238 opp
= dev_pm_opp_find_freq_ceil(cpu_dev
, &freq_hz
);
241 pr_err("cpu%d: failed to find OPP for %ld\n",
242 policy
->cpu
, freq_hz
);
245 vproc
= dev_pm_opp_get_voltage(opp
);
249 * If the new voltage or the intermediate voltage is higher than the
250 * current voltage, scale up voltage first.
252 target_vproc
= (inter_vproc
> vproc
) ? inter_vproc
: vproc
;
253 if (old_vproc
< target_vproc
) {
254 ret
= mtk_cpufreq_set_voltage(info
, target_vproc
);
256 pr_err("cpu%d: failed to scale up voltage!\n",
258 mtk_cpufreq_set_voltage(info
, old_vproc
);
263 /* Reparent the CPU clock to intermediate clock. */
264 ret
= clk_set_parent(cpu_clk
, info
->inter_clk
);
266 pr_err("cpu%d: failed to re-parent cpu clock!\n",
268 mtk_cpufreq_set_voltage(info
, old_vproc
);
273 /* Set the original PLL to target rate. */
274 ret
= clk_set_rate(armpll
, freq_hz
);
276 pr_err("cpu%d: failed to scale cpu clock rate!\n",
278 clk_set_parent(cpu_clk
, armpll
);
279 mtk_cpufreq_set_voltage(info
, old_vproc
);
283 /* Set parent of CPU clock back to the original PLL. */
284 ret
= clk_set_parent(cpu_clk
, armpll
);
286 pr_err("cpu%d: failed to re-parent cpu clock!\n",
288 mtk_cpufreq_set_voltage(info
, inter_vproc
);
294 * If the new voltage is lower than the intermediate voltage or the
295 * original voltage, scale down to the new voltage.
297 if (vproc
< inter_vproc
|| vproc
< old_vproc
) {
298 ret
= mtk_cpufreq_set_voltage(info
, vproc
);
300 pr_err("cpu%d: failed to scale down voltage!\n",
302 clk_set_parent(cpu_clk
, info
->inter_clk
);
303 clk_set_rate(armpll
, old_freq_hz
);
304 clk_set_parent(cpu_clk
, armpll
);
312 static void mtk_cpufreq_ready(struct cpufreq_policy
*policy
)
314 struct mtk_cpu_dvfs_info
*info
= policy
->driver_data
;
315 struct device_node
*np
= of_node_get(info
->cpu_dev
->of_node
);
320 if (of_find_property(np
, "#cooling-cells", NULL
)) {
321 info
->cdev
= of_cpufreq_cooling_register(np
,
322 policy
->related_cpus
);
324 if (IS_ERR(info
->cdev
)) {
325 dev_err(info
->cpu_dev
,
326 "running cpufreq without cooling device: %ld\n",
327 PTR_ERR(info
->cdev
));
336 static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info
*info
, int cpu
)
338 struct device
*cpu_dev
;
339 struct regulator
*proc_reg
= ERR_PTR(-ENODEV
);
340 struct regulator
*sram_reg
= ERR_PTR(-ENODEV
);
341 struct clk
*cpu_clk
= ERR_PTR(-ENODEV
);
342 struct clk
*inter_clk
= ERR_PTR(-ENODEV
);
343 struct dev_pm_opp
*opp
;
347 cpu_dev
= get_cpu_device(cpu
);
349 pr_err("failed to get cpu%d device\n", cpu
);
353 cpu_clk
= clk_get(cpu_dev
, "cpu");
354 if (IS_ERR(cpu_clk
)) {
355 if (PTR_ERR(cpu_clk
) == -EPROBE_DEFER
)
356 pr_warn("cpu clk for cpu%d not ready, retry.\n", cpu
);
358 pr_err("failed to get cpu clk for cpu%d\n", cpu
);
360 ret
= PTR_ERR(cpu_clk
);
364 inter_clk
= clk_get(cpu_dev
, "intermediate");
365 if (IS_ERR(inter_clk
)) {
366 if (PTR_ERR(inter_clk
) == -EPROBE_DEFER
)
367 pr_warn("intermediate clk for cpu%d not ready, retry.\n",
370 pr_err("failed to get intermediate clk for cpu%d\n",
373 ret
= PTR_ERR(inter_clk
);
374 goto out_free_resources
;
377 proc_reg
= regulator_get_exclusive(cpu_dev
, "proc");
378 if (IS_ERR(proc_reg
)) {
379 if (PTR_ERR(proc_reg
) == -EPROBE_DEFER
)
380 pr_warn("proc regulator for cpu%d not ready, retry.\n",
383 pr_err("failed to get proc regulator for cpu%d\n",
386 ret
= PTR_ERR(proc_reg
);
387 goto out_free_resources
;
390 /* Both presence and absence of sram regulator are valid cases. */
391 sram_reg
= regulator_get_exclusive(cpu_dev
, "sram");
393 /* Get OPP-sharing information from "operating-points-v2" bindings */
394 ret
= dev_pm_opp_of_get_sharing_cpus(cpu_dev
, &info
->cpus
);
396 pr_err("failed to get OPP-sharing information for cpu%d\n",
398 goto out_free_resources
;
401 ret
= dev_pm_opp_of_cpumask_add_table(&info
->cpus
);
403 pr_warn("no OPP table for cpu%d\n", cpu
);
404 goto out_free_resources
;
407 /* Search a safe voltage for intermediate frequency. */
408 rate
= clk_get_rate(inter_clk
);
410 opp
= dev_pm_opp_find_freq_ceil(cpu_dev
, &rate
);
413 pr_err("failed to get intermediate opp for cpu%d\n", cpu
);
415 goto out_free_opp_table
;
417 info
->intermediate_voltage
= dev_pm_opp_get_voltage(opp
);
420 info
->cpu_dev
= cpu_dev
;
421 info
->proc_reg
= proc_reg
;
422 info
->sram_reg
= IS_ERR(sram_reg
) ? NULL
: sram_reg
;
423 info
->cpu_clk
= cpu_clk
;
424 info
->inter_clk
= inter_clk
;
427 * If SRAM regulator is present, software "voltage tracking" is needed
428 * for this CPU power domain.
430 info
->need_voltage_tracking
= !IS_ERR(sram_reg
);
435 dev_pm_opp_of_cpumask_remove_table(&info
->cpus
);
438 if (!IS_ERR(proc_reg
))
439 regulator_put(proc_reg
);
440 if (!IS_ERR(sram_reg
))
441 regulator_put(sram_reg
);
442 if (!IS_ERR(cpu_clk
))
444 if (!IS_ERR(inter_clk
))
450 static void mtk_cpu_dvfs_info_release(struct mtk_cpu_dvfs_info
*info
)
452 if (!IS_ERR(info
->proc_reg
))
453 regulator_put(info
->proc_reg
);
454 if (!IS_ERR(info
->sram_reg
))
455 regulator_put(info
->sram_reg
);
456 if (!IS_ERR(info
->cpu_clk
))
457 clk_put(info
->cpu_clk
);
458 if (!IS_ERR(info
->inter_clk
))
459 clk_put(info
->inter_clk
);
461 dev_pm_opp_of_cpumask_remove_table(&info
->cpus
);
464 static int mtk_cpufreq_init(struct cpufreq_policy
*policy
)
466 struct mtk_cpu_dvfs_info
*info
;
467 struct cpufreq_frequency_table
*freq_table
;
470 info
= mtk_cpu_dvfs_info_lookup(policy
->cpu
);
472 pr_err("dvfs info for cpu%d is not initialized.\n",
477 ret
= dev_pm_opp_init_cpufreq_table(info
->cpu_dev
, &freq_table
);
479 pr_err("failed to init cpufreq table for cpu%d: %d\n",
484 ret
= cpufreq_table_validate_and_show(policy
, freq_table
);
486 pr_err("%s: invalid frequency table: %d\n", __func__
, ret
);
487 goto out_free_cpufreq_table
;
490 cpumask_copy(policy
->cpus
, &info
->cpus
);
491 policy
->driver_data
= info
;
492 policy
->clk
= info
->cpu_clk
;
496 out_free_cpufreq_table
:
497 dev_pm_opp_free_cpufreq_table(info
->cpu_dev
, &freq_table
);
501 static int mtk_cpufreq_exit(struct cpufreq_policy
*policy
)
503 struct mtk_cpu_dvfs_info
*info
= policy
->driver_data
;
505 cpufreq_cooling_unregister(info
->cdev
);
506 dev_pm_opp_free_cpufreq_table(info
->cpu_dev
, &policy
->freq_table
);
511 static struct cpufreq_driver mt8173_cpufreq_driver
= {
512 .flags
= CPUFREQ_STICKY
| CPUFREQ_NEED_INITIAL_FREQ_CHECK
|
513 CPUFREQ_HAVE_GOVERNOR_PER_POLICY
,
514 .verify
= cpufreq_generic_frequency_table_verify
,
515 .target_index
= mtk_cpufreq_set_target
,
516 .get
= cpufreq_generic_get
,
517 .init
= mtk_cpufreq_init
,
518 .exit
= mtk_cpufreq_exit
,
519 .ready
= mtk_cpufreq_ready
,
520 .name
= "mtk-cpufreq",
521 .attr
= cpufreq_generic_attr
,
524 static int mt8173_cpufreq_probe(struct platform_device
*pdev
)
526 struct mtk_cpu_dvfs_info
*info
;
527 struct list_head
*list
, *tmp
;
530 for_each_possible_cpu(cpu
) {
531 info
= mtk_cpu_dvfs_info_lookup(cpu
);
535 info
= devm_kzalloc(&pdev
->dev
, sizeof(*info
), GFP_KERNEL
);
538 goto release_dvfs_info_list
;
541 ret
= mtk_cpu_dvfs_info_init(info
, cpu
);
544 "failed to initialize dvfs info for cpu%d\n",
546 goto release_dvfs_info_list
;
549 list_add(&info
->list_head
, &dvfs_info_list
);
552 ret
= cpufreq_register_driver(&mt8173_cpufreq_driver
);
554 dev_err(&pdev
->dev
, "failed to register mtk cpufreq driver\n");
555 goto release_dvfs_info_list
;
560 release_dvfs_info_list
:
561 list_for_each_safe(list
, tmp
, &dvfs_info_list
) {
562 info
= list_entry(list
, struct mtk_cpu_dvfs_info
, list_head
);
564 mtk_cpu_dvfs_info_release(info
);
571 static struct platform_driver mt8173_cpufreq_platdrv
= {
573 .name
= "mt8173-cpufreq",
575 .probe
= mt8173_cpufreq_probe
,
578 static int mt8173_cpufreq_driver_init(void)
580 struct platform_device
*pdev
;
583 if (!of_machine_is_compatible("mediatek,mt8173"))
586 err
= platform_driver_register(&mt8173_cpufreq_platdrv
);
591 * Since there's no place to hold device registration code and no
592 * device tree based way to match cpufreq driver yet, both the driver
593 * and the device registration codes are put here to handle defer
596 pdev
= platform_device_register_simple("mt8173-cpufreq", -1, NULL
, 0);
598 pr_err("failed to register mtk-cpufreq platform device\n");
599 return PTR_ERR(pdev
);
604 device_initcall(mt8173_cpufreq_driver_init
);