2 * Copyright (c) 2006-2008 Simtec Electronics
3 * http://armlinux.simtec.co.uk/
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C24XX CPU Frequency scaling
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/interrupt.h>
16 #include <linux/ioport.h>
17 #include <linux/cpufreq.h>
18 #include <linux/cpu.h>
19 #include <linux/clk.h>
20 #include <linux/err.h>
22 #include <linux/device.h>
23 #include <linux/sysfs.h>
24 #include <linux/slab.h>
26 #include <asm/mach/arch.h>
27 #include <asm/mach/map.h>
30 #include <plat/clock.h>
31 #include <plat/cpu-freq-core.h>
33 #include <mach/regs-clock.h>
35 /* note, cpufreq support deals in kHz, no Hz */
37 static struct cpufreq_driver s3c24xx_driver
;
38 static struct s3c_cpufreq_config cpu_cur
;
39 static struct s3c_iotimings s3c24xx_iotiming
;
40 static struct cpufreq_frequency_table
*pll_reg
;
41 static unsigned int last_target
= ~0;
42 static unsigned int ftab_size
;
43 static struct cpufreq_frequency_table
*ftab
;
45 static struct clk
*_clk_mpll
;
46 static struct clk
*_clk_xtal
;
47 static struct clk
*clk_fclk
;
48 static struct clk
*clk_hclk
;
49 static struct clk
*clk_pclk
;
50 static struct clk
*clk_arm
;
52 #ifdef CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS
53 struct s3c_cpufreq_config
*s3c_cpufreq_getconfig(void)
58 struct s3c_iotimings
*s3c_cpufreq_getiotimings(void)
60 return &s3c24xx_iotiming
;
62 #endif /* CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS */
64 static void s3c_cpufreq_getcur(struct s3c_cpufreq_config
*cfg
)
66 unsigned long fclk
, pclk
, hclk
, armclk
;
68 cfg
->freq
.fclk
= fclk
= clk_get_rate(clk_fclk
);
69 cfg
->freq
.hclk
= hclk
= clk_get_rate(clk_hclk
);
70 cfg
->freq
.pclk
= pclk
= clk_get_rate(clk_pclk
);
71 cfg
->freq
.armclk
= armclk
= clk_get_rate(clk_arm
);
73 cfg
->pll
.driver_data
= __raw_readl(S3C2410_MPLLCON
);
74 cfg
->pll
.frequency
= fclk
;
76 cfg
->freq
.hclk_tns
= 1000000000 / (cfg
->freq
.hclk
/ 10);
78 cfg
->divs
.h_divisor
= fclk
/ hclk
;
79 cfg
->divs
.p_divisor
= fclk
/ pclk
;
82 static inline void s3c_cpufreq_calc(struct s3c_cpufreq_config
*cfg
)
84 unsigned long pll
= cfg
->pll
.frequency
;
87 cfg
->freq
.hclk
= pll
/ cfg
->divs
.h_divisor
;
88 cfg
->freq
.pclk
= pll
/ cfg
->divs
.p_divisor
;
90 /* convert hclk into 10ths of nanoseconds for io calcs */
91 cfg
->freq
.hclk_tns
= 1000000000 / (cfg
->freq
.hclk
/ 10);
94 static inline int closer(unsigned int target
, unsigned int n
, unsigned int c
)
96 int diff_cur
= abs(target
- c
);
97 int diff_new
= abs(target
- n
);
99 return (diff_new
< diff_cur
);
102 static void s3c_cpufreq_show(const char *pfx
,
103 struct s3c_cpufreq_config
*cfg
)
105 s3c_freq_dbg("%s: Fvco=%u, F=%lu, A=%lu, H=%lu (%u), P=%lu (%u)\n",
106 pfx
, cfg
->pll
.frequency
, cfg
->freq
.fclk
, cfg
->freq
.armclk
,
107 cfg
->freq
.hclk
, cfg
->divs
.h_divisor
,
108 cfg
->freq
.pclk
, cfg
->divs
.p_divisor
);
111 /* functions to wrapper the driver info calls to do the cpu specific work */
113 static void s3c_cpufreq_setio(struct s3c_cpufreq_config
*cfg
)
115 if (cfg
->info
->set_iotiming
)
116 (cfg
->info
->set_iotiming
)(cfg
, &s3c24xx_iotiming
);
119 static int s3c_cpufreq_calcio(struct s3c_cpufreq_config
*cfg
)
121 if (cfg
->info
->calc_iotiming
)
122 return (cfg
->info
->calc_iotiming
)(cfg
, &s3c24xx_iotiming
);
127 static void s3c_cpufreq_setrefresh(struct s3c_cpufreq_config
*cfg
)
129 (cfg
->info
->set_refresh
)(cfg
);
132 static void s3c_cpufreq_setdivs(struct s3c_cpufreq_config
*cfg
)
134 (cfg
->info
->set_divs
)(cfg
);
137 static int s3c_cpufreq_calcdivs(struct s3c_cpufreq_config
*cfg
)
139 return (cfg
->info
->calc_divs
)(cfg
);
142 static void s3c_cpufreq_setfvco(struct s3c_cpufreq_config
*cfg
)
144 cfg
->mpll
= _clk_mpll
;
145 (cfg
->info
->set_fvco
)(cfg
);
148 static inline void s3c_cpufreq_resume_clocks(void)
150 cpu_cur
.info
->resume_clocks();
153 static inline void s3c_cpufreq_updateclk(struct clk
*clk
,
156 clk_set_rate(clk
, freq
);
159 static int s3c_cpufreq_settarget(struct cpufreq_policy
*policy
,
160 unsigned int target_freq
,
161 struct cpufreq_frequency_table
*pll
)
163 struct s3c_cpufreq_freqs freqs
;
164 struct s3c_cpufreq_config cpu_new
;
167 cpu_new
= cpu_cur
; /* copy new from current */
169 s3c_cpufreq_show("cur", &cpu_cur
);
171 /* TODO - check for DMA currently outstanding */
173 cpu_new
.pll
= pll
? *pll
: cpu_cur
.pll
;
176 freqs
.pll_changing
= 1;
178 /* update our frequencies */
180 cpu_new
.freq
.armclk
= target_freq
;
181 cpu_new
.freq
.fclk
= cpu_new
.pll
.frequency
;
183 if (s3c_cpufreq_calcdivs(&cpu_new
) < 0) {
184 printk(KERN_ERR
"no divisors for %d\n", target_freq
);
185 goto err_notpossible
;
188 s3c_freq_dbg("%s: got divs\n", __func__
);
190 s3c_cpufreq_calc(&cpu_new
);
192 s3c_freq_dbg("%s: calculated frequencies for new\n", __func__
);
194 if (cpu_new
.freq
.hclk
!= cpu_cur
.freq
.hclk
) {
195 if (s3c_cpufreq_calcio(&cpu_new
) < 0) {
196 printk(KERN_ERR
"%s: no IO timings\n", __func__
);
197 goto err_notpossible
;
201 s3c_cpufreq_show("new", &cpu_new
);
203 /* setup our cpufreq parameters */
205 freqs
.old
= cpu_cur
.freq
;
206 freqs
.new = cpu_new
.freq
;
208 freqs
.freqs
.old
= cpu_cur
.freq
.armclk
/ 1000;
209 freqs
.freqs
.new = cpu_new
.freq
.armclk
/ 1000;
211 /* update f/h/p clock settings before we issue the change
212 * notification, so that drivers do not need to do anything
213 * special if they want to recalculate on CPUFREQ_PRECHANGE. */
215 s3c_cpufreq_updateclk(_clk_mpll
, cpu_new
.pll
.frequency
);
216 s3c_cpufreq_updateclk(clk_fclk
, cpu_new
.freq
.fclk
);
217 s3c_cpufreq_updateclk(clk_hclk
, cpu_new
.freq
.hclk
);
218 s3c_cpufreq_updateclk(clk_pclk
, cpu_new
.freq
.pclk
);
220 /* start the frequency change */
221 cpufreq_freq_transition_begin(policy
, &freqs
.freqs
);
223 /* If hclk is staying the same, then we do not need to
224 * re-write the IO or the refresh timings whilst we are changing
227 local_irq_save(flags
);
229 /* is our memory clock slowing down? */
230 if (cpu_new
.freq
.hclk
< cpu_cur
.freq
.hclk
) {
231 s3c_cpufreq_setrefresh(&cpu_new
);
232 s3c_cpufreq_setio(&cpu_new
);
235 if (cpu_new
.freq
.fclk
== cpu_cur
.freq
.fclk
) {
236 /* not changing PLL, just set the divisors */
238 s3c_cpufreq_setdivs(&cpu_new
);
240 if (cpu_new
.freq
.fclk
< cpu_cur
.freq
.fclk
) {
241 /* slow the cpu down, then set divisors */
243 s3c_cpufreq_setfvco(&cpu_new
);
244 s3c_cpufreq_setdivs(&cpu_new
);
246 /* set the divisors, then speed up */
248 s3c_cpufreq_setdivs(&cpu_new
);
249 s3c_cpufreq_setfvco(&cpu_new
);
253 /* did our memory clock speed up */
254 if (cpu_new
.freq
.hclk
> cpu_cur
.freq
.hclk
) {
255 s3c_cpufreq_setrefresh(&cpu_new
);
256 s3c_cpufreq_setio(&cpu_new
);
259 /* update our current settings */
262 local_irq_restore(flags
);
264 /* notify everyone we've done this */
265 cpufreq_freq_transition_end(policy
, &freqs
.freqs
, 0);
267 s3c_freq_dbg("%s: finished\n", __func__
);
271 printk(KERN_ERR
"no compatible settings for %d\n", target_freq
);
275 /* s3c_cpufreq_target
277 * called by the cpufreq core to adjust the frequency that the CPU
278 * is currently running at.
281 static int s3c_cpufreq_target(struct cpufreq_policy
*policy
,
282 unsigned int target_freq
,
283 unsigned int relation
)
285 struct cpufreq_frequency_table
*pll
;
288 /* avoid repeated calls which cause a needless amout of duplicated
289 * logging output (and CPU time as the calculation process is
291 if (target_freq
== last_target
)
294 last_target
= target_freq
;
296 s3c_freq_dbg("%s: policy %p, target %u, relation %u\n",
297 __func__
, policy
, target_freq
, relation
);
300 if (cpufreq_frequency_table_target(policy
, ftab
,
301 target_freq
, relation
,
303 s3c_freq_dbg("%s: table failed\n", __func__
);
307 s3c_freq_dbg("%s: adjust %d to entry %d (%u)\n", __func__
,
308 target_freq
, index
, ftab
[index
].frequency
);
309 target_freq
= ftab
[index
].frequency
;
312 target_freq
*= 1000; /* convert target to Hz */
314 /* find the settings for our new frequency */
316 if (!pll_reg
|| cpu_cur
.lock_pll
) {
317 /* either we've not got any PLL values, or we've locked
318 * to the current one. */
321 struct cpufreq_policy tmp_policy
;
324 /* we keep the cpu pll table in Hz, to ensure we get an
325 * accurate value for the PLL output. */
327 tmp_policy
.min
= policy
->min
* 1000;
328 tmp_policy
.max
= policy
->max
* 1000;
329 tmp_policy
.cpu
= policy
->cpu
;
331 /* cpufreq_frequency_table_target uses a pointer to 'index'
332 * which is the number of the table entry, not the value of
333 * the table entry's index field. */
335 ret
= cpufreq_frequency_table_target(&tmp_policy
, pll_reg
,
336 target_freq
, relation
,
340 printk(KERN_ERR
"%s: no PLL available\n", __func__
);
341 goto err_notpossible
;
344 pll
= pll_reg
+ index
;
346 s3c_freq_dbg("%s: target %u => %u\n",
347 __func__
, target_freq
, pll
->frequency
);
349 target_freq
= pll
->frequency
;
352 return s3c_cpufreq_settarget(policy
, target_freq
, pll
);
355 printk(KERN_ERR
"no compatible settings for %d\n", target_freq
);
359 struct clk
*s3c_cpufreq_clk_get(struct device
*dev
, const char *name
)
363 clk
= clk_get(dev
, name
);
365 printk(KERN_ERR
"cpufreq: failed to get clock '%s'\n", name
);
370 static int s3c_cpufreq_init(struct cpufreq_policy
*policy
)
372 policy
->clk
= clk_arm
;
373 return cpufreq_generic_init(policy
, ftab
, cpu_cur
.info
->latency
);
376 static int __init
s3c_cpufreq_initclks(void)
378 _clk_mpll
= s3c_cpufreq_clk_get(NULL
, "mpll");
379 _clk_xtal
= s3c_cpufreq_clk_get(NULL
, "xtal");
380 clk_fclk
= s3c_cpufreq_clk_get(NULL
, "fclk");
381 clk_hclk
= s3c_cpufreq_clk_get(NULL
, "hclk");
382 clk_pclk
= s3c_cpufreq_clk_get(NULL
, "pclk");
383 clk_arm
= s3c_cpufreq_clk_get(NULL
, "armclk");
385 if (IS_ERR(clk_fclk
) || IS_ERR(clk_hclk
) || IS_ERR(clk_pclk
) ||
386 IS_ERR(_clk_mpll
) || IS_ERR(clk_arm
) || IS_ERR(_clk_xtal
)) {
387 printk(KERN_ERR
"%s: could not get clock(s)\n", __func__
);
391 printk(KERN_INFO
"%s: clocks f=%lu,h=%lu,p=%lu,a=%lu\n", __func__
,
392 clk_get_rate(clk_fclk
) / 1000,
393 clk_get_rate(clk_hclk
) / 1000,
394 clk_get_rate(clk_pclk
) / 1000,
395 clk_get_rate(clk_arm
) / 1000);
401 static struct cpufreq_frequency_table suspend_pll
;
402 static unsigned int suspend_freq
;
404 static int s3c_cpufreq_suspend(struct cpufreq_policy
*policy
)
406 suspend_pll
.frequency
= clk_get_rate(_clk_mpll
);
407 suspend_pll
.driver_data
= __raw_readl(S3C2410_MPLLCON
);
408 suspend_freq
= clk_get_rate(clk_arm
);
413 static int s3c_cpufreq_resume(struct cpufreq_policy
*policy
)
417 s3c_freq_dbg("%s: resuming with policy %p\n", __func__
, policy
);
419 last_target
= ~0; /* invalidate last_target setting */
421 /* first, find out what speed we resumed at. */
422 s3c_cpufreq_resume_clocks();
424 /* whilst we will be called later on, we try and re-set the
425 * cpu frequencies as soon as possible so that we do not end
426 * up resuming devices and then immediately having to re-set
427 * a number of settings once these devices have restarted.
429 * as a note, it is expected devices are not used until they
430 * have been un-suspended and at that time they should have
431 * used the updated clock settings.
434 ret
= s3c_cpufreq_settarget(NULL
, suspend_freq
, &suspend_pll
);
436 printk(KERN_ERR
"%s: failed to reset pll/freq\n", __func__
);
443 #define s3c_cpufreq_resume NULL
444 #define s3c_cpufreq_suspend NULL
447 static struct cpufreq_driver s3c24xx_driver
= {
448 .flags
= CPUFREQ_STICKY
| CPUFREQ_NEED_INITIAL_FREQ_CHECK
,
449 .target
= s3c_cpufreq_target
,
450 .get
= cpufreq_generic_get
,
451 .init
= s3c_cpufreq_init
,
452 .suspend
= s3c_cpufreq_suspend
,
453 .resume
= s3c_cpufreq_resume
,
458 int __init
s3c_cpufreq_register(struct s3c_cpufreq_info
*info
)
460 if (!info
|| !info
->name
) {
461 printk(KERN_ERR
"%s: failed to pass valid information\n",
466 printk(KERN_INFO
"S3C24XX CPU Frequency driver, %s cpu support\n",
469 /* check our driver info has valid data */
471 BUG_ON(info
->set_refresh
== NULL
);
472 BUG_ON(info
->set_divs
== NULL
);
473 BUG_ON(info
->calc_divs
== NULL
);
475 /* info->set_fvco is optional, depending on whether there
476 * is a need to set the clock code. */
480 /* Note, driver registering should probably update locktime */
485 int __init
s3c_cpufreq_setboard(struct s3c_cpufreq_board
*board
)
487 struct s3c_cpufreq_board
*ours
;
490 printk(KERN_INFO
"%s: no board data\n", __func__
);
494 /* Copy the board information so that each board can make this
497 ours
= kzalloc(sizeof(*ours
), GFP_KERNEL
);
499 printk(KERN_ERR
"%s: no memory\n", __func__
);
504 cpu_cur
.board
= ours
;
509 static int __init
s3c_cpufreq_auto_io(void)
513 if (!cpu_cur
.info
->get_iotiming
) {
514 printk(KERN_ERR
"%s: get_iotiming undefined\n", __func__
);
518 printk(KERN_INFO
"%s: working out IO settings\n", __func__
);
520 ret
= (cpu_cur
.info
->get_iotiming
)(&cpu_cur
, &s3c24xx_iotiming
);
522 printk(KERN_ERR
"%s: failed to get timings\n", __func__
);
527 /* if one or is zero, then return the other, otherwise return the min */
528 #define do_min(_a, _b) ((_a) == 0 ? (_b) : (_b) == 0 ? (_a) : min(_a, _b))
531 * s3c_cpufreq_freq_min - find the minimum settings for the given freq.
532 * @dst: The destination structure
534 * @b: The other argument.
536 * Create a minimum of each frequency entry in the 'struct s3c_freq',
537 * unless the entry is zero when it is ignored and the non-zero argument
540 static void s3c_cpufreq_freq_min(struct s3c_freq
*dst
,
541 struct s3c_freq
*a
, struct s3c_freq
*b
)
543 dst
->fclk
= do_min(a
->fclk
, b
->fclk
);
544 dst
->hclk
= do_min(a
->hclk
, b
->hclk
);
545 dst
->pclk
= do_min(a
->pclk
, b
->pclk
);
546 dst
->armclk
= do_min(a
->armclk
, b
->armclk
);
549 static inline u32
calc_locktime(u32 freq
, u32 time_us
)
553 result
= freq
* time_us
;
554 result
= DIV_ROUND_UP(result
, 1000 * 1000);
559 static void s3c_cpufreq_update_loctkime(void)
561 unsigned int bits
= cpu_cur
.info
->locktime_bits
;
562 u32 rate
= (u32
)clk_get_rate(_clk_xtal
);
570 val
= calc_locktime(rate
, cpu_cur
.info
->locktime_u
) << bits
;
571 val
|= calc_locktime(rate
, cpu_cur
.info
->locktime_m
);
573 printk(KERN_INFO
"%s: new locktime is 0x%08x\n", __func__
, val
);
574 __raw_writel(val
, S3C2410_LOCKTIME
);
577 static int s3c_cpufreq_build_freq(void)
581 if (!cpu_cur
.info
->calc_freqtable
)
587 size
= cpu_cur
.info
->calc_freqtable(&cpu_cur
, NULL
, 0);
590 ftab
= kzalloc(sizeof(*ftab
) * size
, GFP_KERNEL
);
592 printk(KERN_ERR
"%s: no memory for tables\n", __func__
);
598 ret
= cpu_cur
.info
->calc_freqtable(&cpu_cur
, ftab
, size
);
599 s3c_cpufreq_addfreq(ftab
, ret
, size
, CPUFREQ_TABLE_END
);
604 static int __init
s3c_cpufreq_initcall(void)
608 if (cpu_cur
.info
&& cpu_cur
.board
) {
609 ret
= s3c_cpufreq_initclks();
613 /* get current settings */
614 s3c_cpufreq_getcur(&cpu_cur
);
615 s3c_cpufreq_show("cur", &cpu_cur
);
617 if (cpu_cur
.board
->auto_io
) {
618 ret
= s3c_cpufreq_auto_io();
620 printk(KERN_ERR
"%s: failed to get io timing\n",
626 if (cpu_cur
.board
->need_io
&& !cpu_cur
.info
->set_iotiming
) {
627 printk(KERN_ERR
"%s: no IO support registered\n",
633 if (!cpu_cur
.info
->need_pll
)
634 cpu_cur
.lock_pll
= 1;
636 s3c_cpufreq_update_loctkime();
638 s3c_cpufreq_freq_min(&cpu_cur
.max
, &cpu_cur
.board
->max
,
641 if (cpu_cur
.info
->calc_freqtable
)
642 s3c_cpufreq_build_freq();
644 ret
= cpufreq_register_driver(&s3c24xx_driver
);
651 late_initcall(s3c_cpufreq_initcall
);
654 * s3c_plltab_register - register CPU PLL table.
655 * @plls: The list of PLL entries.
656 * @plls_no: The size of the PLL entries @plls.
658 * Register the given set of PLLs with the system.
660 int __init
s3c_plltab_register(struct cpufreq_frequency_table
*plls
,
661 unsigned int plls_no
)
663 struct cpufreq_frequency_table
*vals
;
666 size
= sizeof(*vals
) * (plls_no
+ 1);
668 vals
= kzalloc(size
, GFP_KERNEL
);
670 memcpy(vals
, plls
, size
);
673 /* write a terminating entry, we don't store it in the
674 * table that is stored in the kernel */
676 vals
->frequency
= CPUFREQ_TABLE_END
;
678 printk(KERN_INFO
"cpufreq: %d PLL entries\n", plls_no
);
680 printk(KERN_ERR
"cpufreq: no memory for PLL tables\n");
682 return vals
? 0 : -ENOMEM
;