2 * drivers/cpufreq/spear-cpufreq.c
4 * CPU Frequency Scaling for SPEAr platform
6 * Copyright (C) 2012 ST Microelectronics
7 * Deepak Sikri <deepak.sikri@st.com>
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
14 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16 #include <linux/clk.h>
17 #include <linux/cpufreq.h>
18 #include <linux/err.h>
19 #include <linux/init.h>
20 #include <linux/module.h>
21 #include <linux/of_device.h>
22 #include <linux/slab.h>
23 #include <linux/types.h>
25 /* SPEAr CPUFreq driver data structure */
28 unsigned int transition_latency
;
29 struct cpufreq_frequency_table
*freq_tbl
;
33 static unsigned int spear_cpufreq_get(unsigned int cpu
)
35 return clk_get_rate(spear_cpufreq
.clk
) / 1000;
38 static struct clk
*spear1340_cpu_get_possible_parent(unsigned long newfreq
)
43 * In SPEAr1340, cpu clk's parent sys clk can take input from
46 const char *sys_clk_src
[] = {
54 * As sys clk can have multiple source with their own range
55 * limitation so we choose possible sources accordingly
57 if (newfreq
<= 300000000)
58 pclk
= 0; /* src is sys_syn_clk */
59 else if (newfreq
> 300000000 && newfreq
<= 500000000)
60 pclk
= 3; /* src is pll3_clk */
61 else if (newfreq
== 600000000)
62 pclk
= 1; /* src is pll1_clk */
64 return ERR_PTR(-EINVAL
);
66 /* Get parent to sys clock */
67 sys_pclk
= clk_get(NULL
, sys_clk_src
[pclk
]);
69 pr_err("Failed to get %s clock\n", sys_clk_src
[pclk
]);
75 * In SPEAr1340, we cannot use newfreq directly because we need to actually
76 * access a source clock (clk) which might not be ancestor of cpu at present.
77 * Hence in SPEAr1340 we would operate on source clock directly before switching
80 static int spear1340_set_cpu_rate(struct clk
*sys_pclk
, unsigned long newfreq
)
85 sys_clk
= clk_get_parent(spear_cpufreq
.clk
);
86 if (IS_ERR(sys_clk
)) {
87 pr_err("failed to get cpu's parent (sys) clock\n");
88 return PTR_ERR(sys_clk
);
91 /* Set the rate of the source clock before changing the parent */
92 ret
= clk_set_rate(sys_pclk
, newfreq
);
94 pr_err("Failed to set sys clk rate to %lu\n", newfreq
);
98 ret
= clk_set_parent(sys_clk
, sys_pclk
);
100 pr_err("Failed to set sys clk parent\n");
107 static int spear_cpufreq_target(struct cpufreq_policy
*policy
,
110 struct cpufreq_freqs freqs
;
115 freqs
.old
= spear_cpufreq_get(0);
116 newfreq
= spear_cpufreq
.freq_tbl
[index
].frequency
* 1000;
118 if (of_machine_is_compatible("st,spear1340")) {
120 * SPEAr1340 is special in the sense that due to the possibility
121 * of multiple clock sources for cpu clk's parent we can have
122 * different clock source for different frequency of cpu clk.
123 * Hence we need to choose one from amongst these possible clock
126 srcclk
= spear1340_cpu_get_possible_parent(newfreq
);
127 if (IS_ERR(srcclk
)) {
128 pr_err("Failed to get src clk\n");
129 return PTR_ERR(srcclk
);
132 /* SPEAr1340: src clk is always 2 * intended cpu clk */
136 * src clock to be altered is ancestor of cpu clock. Hence we
137 * can directly work on cpu clk
139 srcclk
= spear_cpufreq
.clk
;
142 newfreq
= clk_round_rate(srcclk
, newfreq
* mult
);
144 pr_err("clk_round_rate failed for cpu src clock\n");
148 freqs
.new = newfreq
/ 1000;
151 cpufreq_notify_transition(policy
, &freqs
, CPUFREQ_PRECHANGE
);
154 ret
= spear1340_set_cpu_rate(srcclk
, newfreq
);
156 ret
= clk_set_rate(spear_cpufreq
.clk
, newfreq
);
158 /* Get current rate after clk_set_rate, in case of failure */
160 pr_err("CPU Freq: cpu clk_set_rate failed: %d\n", ret
);
161 freqs
.new = clk_get_rate(spear_cpufreq
.clk
) / 1000;
164 cpufreq_notify_transition(policy
, &freqs
, CPUFREQ_POSTCHANGE
);
168 static int spear_cpufreq_init(struct cpufreq_policy
*policy
)
170 return cpufreq_generic_init(policy
, spear_cpufreq
.freq_tbl
,
171 spear_cpufreq
.transition_latency
);
174 static struct cpufreq_driver spear_cpufreq_driver
= {
175 .name
= "cpufreq-spear",
176 .flags
= CPUFREQ_STICKY
,
177 .verify
= cpufreq_generic_frequency_table_verify
,
178 .target_index
= spear_cpufreq_target
,
179 .get
= spear_cpufreq_get
,
180 .init
= spear_cpufreq_init
,
181 .exit
= cpufreq_generic_exit
,
182 .attr
= cpufreq_generic_attr
,
185 static int spear_cpufreq_driver_init(void)
187 struct device_node
*np
;
188 const struct property
*prop
;
189 struct cpufreq_frequency_table
*freq_tbl
;
193 np
= of_cpu_device_node_get(0);
195 pr_err("No cpu node found");
199 if (of_property_read_u32(np
, "clock-latency",
200 &spear_cpufreq
.transition_latency
))
201 spear_cpufreq
.transition_latency
= CPUFREQ_ETERNAL
;
203 prop
= of_find_property(np
, "cpufreq_tbl", NULL
);
204 if (!prop
|| !prop
->value
) {
205 pr_err("Invalid cpufreq_tbl");
210 cnt
= prop
->length
/ sizeof(u32
);
213 freq_tbl
= kmalloc(sizeof(*freq_tbl
) * (cnt
+ 1), GFP_KERNEL
);
219 for (i
= 0; i
< cnt
; i
++) {
220 freq_tbl
[i
].driver_data
= i
;
221 freq_tbl
[i
].frequency
= be32_to_cpup(val
++);
224 freq_tbl
[i
].driver_data
= i
;
225 freq_tbl
[i
].frequency
= CPUFREQ_TABLE_END
;
227 spear_cpufreq
.freq_tbl
= freq_tbl
;
231 spear_cpufreq
.clk
= clk_get(NULL
, "cpu_clk");
232 if (IS_ERR(spear_cpufreq
.clk
)) {
233 pr_err("Unable to get CPU clock\n");
234 ret
= PTR_ERR(spear_cpufreq
.clk
);
238 ret
= cpufreq_register_driver(&spear_cpufreq_driver
);
242 pr_err("failed register driver: %d\n", ret
);
243 clk_put(spear_cpufreq
.clk
);
253 late_initcall(spear_cpufreq_driver_init
);
255 MODULE_AUTHOR("Deepak Sikri <deepak.sikri@st.com>");
256 MODULE_DESCRIPTION("SPEAr CPUFreq driver");
257 MODULE_LICENSE("GPL");