2 * Copyright (C) 2010 Google, Inc.
5 * Colin Cross <ccross@google.com>
6 * Based on arch/arm/plat-omap/cpu-omap.c, (C) 2005 Nokia Corporation
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/types.h>
22 #include <linux/sched.h>
23 #include <linux/cpufreq.h>
24 #include <linux/delay.h>
25 #include <linux/init.h>
26 #include <linux/err.h>
27 #include <linux/clk.h>
30 static struct cpufreq_frequency_table freq_table
[] = {
31 { .frequency
= 216000 },
32 { .frequency
= 312000 },
33 { .frequency
= 456000 },
34 { .frequency
= 608000 },
35 { .frequency
= 760000 },
36 { .frequency
= 816000 },
37 { .frequency
= 912000 },
38 { .frequency
= 1000000 },
39 { .frequency
= CPUFREQ_TABLE_END
},
44 static struct clk
*cpu_clk
;
45 static struct clk
*pll_x_clk
;
46 static struct clk
*pll_p_clk
;
47 static struct clk
*emc_clk
;
49 static int tegra_cpu_clk_set_rate(unsigned long rate
)
54 * Take an extra reference to the main pll so it doesn't turn
55 * off when we move the cpu off of it
57 clk_prepare_enable(pll_x_clk
);
59 ret
= clk_set_parent(cpu_clk
, pll_p_clk
);
61 pr_err("Failed to switch cpu to clock pll_p\n");
65 if (rate
== clk_get_rate(pll_p_clk
))
68 ret
= clk_set_rate(pll_x_clk
, rate
);
70 pr_err("Failed to change pll_x to %lu\n", rate
);
74 ret
= clk_set_parent(cpu_clk
, pll_x_clk
);
76 pr_err("Failed to switch cpu to clock pll_x\n");
81 clk_disable_unprepare(pll_x_clk
);
85 static int tegra_target(struct cpufreq_policy
*policy
, unsigned int index
)
87 unsigned long rate
= freq_table
[index
].frequency
;
91 * Vote on memory bus frequency based on cpu frequency
92 * This sets the minimum frequency, display or avp may request higher
95 clk_set_rate(emc_clk
, 600000000); /* cpu 816 MHz, emc max */
96 else if (rate
>= 456000)
97 clk_set_rate(emc_clk
, 300000000); /* cpu 456 MHz, emc 150Mhz */
99 clk_set_rate(emc_clk
, 100000000); /* emc 50Mhz */
101 ret
= tegra_cpu_clk_set_rate(rate
* 1000);
103 pr_err("cpu-tegra: Failed to set cpu frequency to %lu kHz\n",
109 static int tegra_cpu_init(struct cpufreq_policy
*policy
)
113 if (policy
->cpu
>= NUM_CPUS
)
116 clk_prepare_enable(emc_clk
);
117 clk_prepare_enable(cpu_clk
);
119 /* FIXME: what's the actual transition time? */
120 ret
= cpufreq_generic_init(policy
, freq_table
, 300 * 1000);
122 clk_disable_unprepare(cpu_clk
);
123 clk_disable_unprepare(emc_clk
);
127 policy
->clk
= cpu_clk
;
128 policy
->suspend_freq
= freq_table
[0].frequency
;
132 static int tegra_cpu_exit(struct cpufreq_policy
*policy
)
134 clk_disable_unprepare(cpu_clk
);
135 clk_disable_unprepare(emc_clk
);
139 static struct cpufreq_driver tegra_cpufreq_driver
= {
140 .flags
= CPUFREQ_NEED_INITIAL_FREQ_CHECK
,
141 .verify
= cpufreq_generic_frequency_table_verify
,
142 .target_index
= tegra_target
,
143 .get
= cpufreq_generic_get
,
144 .init
= tegra_cpu_init
,
145 .exit
= tegra_cpu_exit
,
147 .attr
= cpufreq_generic_attr
,
149 .suspend
= cpufreq_generic_suspend
,
153 static int __init
tegra_cpufreq_init(void)
155 cpu_clk
= clk_get_sys(NULL
, "cclk");
157 return PTR_ERR(cpu_clk
);
159 pll_x_clk
= clk_get_sys(NULL
, "pll_x");
160 if (IS_ERR(pll_x_clk
))
161 return PTR_ERR(pll_x_clk
);
163 pll_p_clk
= clk_get_sys(NULL
, "pll_p");
164 if (IS_ERR(pll_p_clk
))
165 return PTR_ERR(pll_p_clk
);
167 emc_clk
= clk_get_sys("cpu", "emc");
168 if (IS_ERR(emc_clk
)) {
170 return PTR_ERR(emc_clk
);
173 return cpufreq_register_driver(&tegra_cpufreq_driver
);
176 static void __exit
tegra_cpufreq_exit(void)
178 cpufreq_unregister_driver(&tegra_cpufreq_driver
);
184 MODULE_AUTHOR("Colin Cross <ccross@android.com>");
185 MODULE_DESCRIPTION("cpufreq driver for Nvidia Tegra2");
186 MODULE_LICENSE("GPL");
187 module_init(tegra_cpufreq_init
);
188 module_exit(tegra_cpufreq_exit
);