drm/i915: Rename intel_context[engine].ringbuf
[deliverable/linux.git] / drivers / crypto / Kconfig
1
2 menuconfig CRYPTO_HW
3 bool "Hardware crypto devices"
4 default y
5 ---help---
6 Say Y here to get to see options for hardware crypto devices and
7 processors. This option alone does not add any kernel code.
8
9 If you say N, all options in this submenu will be skipped and disabled.
10
11 if CRYPTO_HW
12
13 config CRYPTO_DEV_PADLOCK
14 tristate "Support for VIA PadLock ACE"
15 depends on X86 && !UML
16 help
17 Some VIA processors come with an integrated crypto engine
18 (so called VIA PadLock ACE, Advanced Cryptography Engine)
19 that provides instructions for very fast cryptographic
20 operations with supported algorithms.
21
22 The instructions are used only when the CPU supports them.
23 Otherwise software encryption is used.
24
25 config CRYPTO_DEV_PADLOCK_AES
26 tristate "PadLock driver for AES algorithm"
27 depends on CRYPTO_DEV_PADLOCK
28 select CRYPTO_BLKCIPHER
29 select CRYPTO_AES
30 help
31 Use VIA PadLock for AES algorithm.
32
33 Available in VIA C3 and newer CPUs.
34
35 If unsure say M. The compiled module will be
36 called padlock-aes.
37
38 config CRYPTO_DEV_PADLOCK_SHA
39 tristate "PadLock driver for SHA1 and SHA256 algorithms"
40 depends on CRYPTO_DEV_PADLOCK
41 select CRYPTO_HASH
42 select CRYPTO_SHA1
43 select CRYPTO_SHA256
44 help
45 Use VIA PadLock for SHA1/SHA256 algorithms.
46
47 Available in VIA C7 and newer processors.
48
49 If unsure say M. The compiled module will be
50 called padlock-sha.
51
52 config CRYPTO_DEV_GEODE
53 tristate "Support for the Geode LX AES engine"
54 depends on X86_32 && PCI
55 select CRYPTO_ALGAPI
56 select CRYPTO_BLKCIPHER
57 help
58 Say 'Y' here to use the AMD Geode LX processor on-board AES
59 engine for the CryptoAPI AES algorithm.
60
61 To compile this driver as a module, choose M here: the module
62 will be called geode-aes.
63
64 config ZCRYPT
65 tristate "Support for PCI-attached cryptographic adapters"
66 depends on S390
67 select HW_RANDOM
68 help
69 Select this option if you want to use a PCI-attached cryptographic
70 adapter like:
71 + PCI Cryptographic Accelerator (PCICA)
72 + PCI Cryptographic Coprocessor (PCICC)
73 + PCI-X Cryptographic Coprocessor (PCIXCC)
74 + Crypto Express2 Coprocessor (CEX2C)
75 + Crypto Express2 Accelerator (CEX2A)
76 + Crypto Express3 Coprocessor (CEX3C)
77 + Crypto Express3 Accelerator (CEX3A)
78
79 config CRYPTO_SHA1_S390
80 tristate "SHA1 digest algorithm"
81 depends on S390
82 select CRYPTO_HASH
83 help
84 This is the s390 hardware accelerated implementation of the
85 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
86
87 It is available as of z990.
88
89 config CRYPTO_SHA256_S390
90 tristate "SHA256 digest algorithm"
91 depends on S390
92 select CRYPTO_HASH
93 help
94 This is the s390 hardware accelerated implementation of the
95 SHA256 secure hash standard (DFIPS 180-2).
96
97 It is available as of z9.
98
99 config CRYPTO_SHA512_S390
100 tristate "SHA384 and SHA512 digest algorithm"
101 depends on S390
102 select CRYPTO_HASH
103 help
104 This is the s390 hardware accelerated implementation of the
105 SHA512 secure hash standard.
106
107 It is available as of z10.
108
109 config CRYPTO_DES_S390
110 tristate "DES and Triple DES cipher algorithms"
111 depends on S390
112 select CRYPTO_ALGAPI
113 select CRYPTO_BLKCIPHER
114 select CRYPTO_DES
115 help
116 This is the s390 hardware accelerated implementation of the
117 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
118
119 As of z990 the ECB and CBC mode are hardware accelerated.
120 As of z196 the CTR mode is hardware accelerated.
121
122 config CRYPTO_AES_S390
123 tristate "AES cipher algorithms"
124 depends on S390
125 select CRYPTO_ALGAPI
126 select CRYPTO_BLKCIPHER
127 help
128 This is the s390 hardware accelerated implementation of the
129 AES cipher algorithms (FIPS-197).
130
131 As of z9 the ECB and CBC modes are hardware accelerated
132 for 128 bit keys.
133 As of z10 the ECB and CBC modes are hardware accelerated
134 for all AES key sizes.
135 As of z196 the CTR mode is hardware accelerated for all AES
136 key sizes and XTS mode is hardware accelerated for 256 and
137 512 bit keys.
138
139 config S390_PRNG
140 tristate "Pseudo random number generator device driver"
141 depends on S390
142 default "m"
143 help
144 Select this option if you want to use the s390 pseudo random number
145 generator. The PRNG is part of the cryptographic processor functions
146 and uses triple-DES to generate secure random numbers like the
147 ANSI X9.17 standard. User-space programs access the
148 pseudo-random-number device through the char device /dev/prandom.
149
150 It is available as of z9.
151
152 config CRYPTO_GHASH_S390
153 tristate "GHASH digest algorithm"
154 depends on S390
155 select CRYPTO_HASH
156 help
157 This is the s390 hardware accelerated implementation of the
158 GHASH message digest algorithm for GCM (Galois/Counter Mode).
159
160 It is available as of z196.
161
162 config CRYPTO_DEV_MV_CESA
163 tristate "Marvell's Cryptographic Engine"
164 depends on PLAT_ORION
165 select CRYPTO_AES
166 select CRYPTO_BLKCIPHER
167 select CRYPTO_HASH
168 select SRAM
169 help
170 This driver allows you to utilize the Cryptographic Engines and
171 Security Accelerator (CESA) which can be found on the Marvell Orion
172 and Kirkwood SoCs, such as QNAP's TS-209.
173
174 Currently the driver supports AES in ECB and CBC mode without DMA.
175
176 config CRYPTO_DEV_MARVELL_CESA
177 tristate "New Marvell's Cryptographic Engine driver"
178 depends on PLAT_ORION || ARCH_MVEBU
179 select CRYPTO_AES
180 select CRYPTO_DES
181 select CRYPTO_BLKCIPHER
182 select CRYPTO_HASH
183 select SRAM
184 help
185 This driver allows you to utilize the Cryptographic Engines and
186 Security Accelerator (CESA) which can be found on the Armada 370.
187 This driver supports CPU offload through DMA transfers.
188
189 This driver is aimed at replacing the mv_cesa driver. This will only
190 happen once it has received proper testing.
191
192 config CRYPTO_DEV_NIAGARA2
193 tristate "Niagara2 Stream Processing Unit driver"
194 select CRYPTO_DES
195 select CRYPTO_BLKCIPHER
196 select CRYPTO_HASH
197 select CRYPTO_MD5
198 select CRYPTO_SHA1
199 select CRYPTO_SHA256
200 depends on SPARC64
201 help
202 Each core of a Niagara2 processor contains a Stream
203 Processing Unit, which itself contains several cryptographic
204 sub-units. One set provides the Modular Arithmetic Unit,
205 used for SSL offload. The other set provides the Cipher
206 Group, which can perform encryption, decryption, hashing,
207 checksumming, and raw copies.
208
209 config CRYPTO_DEV_HIFN_795X
210 tristate "Driver HIFN 795x crypto accelerator chips"
211 select CRYPTO_DES
212 select CRYPTO_BLKCIPHER
213 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
214 depends on PCI
215 depends on !ARCH_DMA_ADDR_T_64BIT
216 help
217 This option allows you to have support for HIFN 795x crypto adapters.
218
219 config CRYPTO_DEV_HIFN_795X_RNG
220 bool "HIFN 795x random number generator"
221 depends on CRYPTO_DEV_HIFN_795X
222 help
223 Select this option if you want to enable the random number generator
224 on the HIFN 795x crypto adapters.
225
226 source drivers/crypto/caam/Kconfig
227
228 config CRYPTO_DEV_TALITOS
229 tristate "Talitos Freescale Security Engine (SEC)"
230 select CRYPTO_AEAD
231 select CRYPTO_AUTHENC
232 select CRYPTO_BLKCIPHER
233 select CRYPTO_HASH
234 select HW_RANDOM
235 depends on FSL_SOC
236 help
237 Say 'Y' here to use the Freescale Security Engine (SEC)
238 to offload cryptographic algorithm computation.
239
240 The Freescale SEC is present on PowerQUICC 'E' processors, such
241 as the MPC8349E and MPC8548E.
242
243 To compile this driver as a module, choose M here: the module
244 will be called talitos.
245
246 config CRYPTO_DEV_TALITOS1
247 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
248 depends on CRYPTO_DEV_TALITOS
249 depends on PPC_8xx || PPC_82xx
250 default y
251 help
252 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
253 found on MPC82xx or the Freescale Security Engine (SEC Lite)
254 version 1.2 found on MPC8xx
255
256 config CRYPTO_DEV_TALITOS2
257 bool "SEC2+ (SEC version 2.0 or upper)"
258 depends on CRYPTO_DEV_TALITOS
259 default y if !PPC_8xx
260 help
261 Say 'Y' here to use the Freescale Security Engine (SEC)
262 version 2 and following as found on MPC83xx, MPC85xx, etc ...
263
264 config CRYPTO_DEV_IXP4XX
265 tristate "Driver for IXP4xx crypto hardware acceleration"
266 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
267 select CRYPTO_DES
268 select CRYPTO_AEAD
269 select CRYPTO_AUTHENC
270 select CRYPTO_BLKCIPHER
271 help
272 Driver for the IXP4xx NPE crypto engine.
273
274 config CRYPTO_DEV_PPC4XX
275 tristate "Driver AMCC PPC4xx crypto accelerator"
276 depends on PPC && 4xx
277 select CRYPTO_HASH
278 select CRYPTO_BLKCIPHER
279 help
280 This option allows you to have support for AMCC crypto acceleration.
281
282 config HW_RANDOM_PPC4XX
283 bool "PowerPC 4xx generic true random number generator support"
284 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
285 default y
286 ---help---
287 This option provides the kernel-side support for the TRNG hardware
288 found in the security function of some PowerPC 4xx SoCs.
289
290 config CRYPTO_DEV_OMAP_SHAM
291 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
292 depends on ARCH_OMAP2PLUS
293 select CRYPTO_SHA1
294 select CRYPTO_MD5
295 select CRYPTO_SHA256
296 select CRYPTO_SHA512
297 select CRYPTO_HMAC
298 help
299 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
300 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
301
302 config CRYPTO_DEV_OMAP_AES
303 tristate "Support for OMAP AES hw engine"
304 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
305 select CRYPTO_AES
306 select CRYPTO_BLKCIPHER
307 select CRYPTO_ENGINE
308 help
309 OMAP processors have AES module accelerator. Select this if you
310 want to use the OMAP module for AES algorithms.
311
312 config CRYPTO_DEV_OMAP_DES
313 tristate "Support for OMAP DES/3DES hw engine"
314 depends on ARCH_OMAP2PLUS
315 select CRYPTO_DES
316 select CRYPTO_BLKCIPHER
317 select CRYPTO_ENGINE
318 help
319 OMAP processors have DES/3DES module accelerator. Select this if you
320 want to use the OMAP module for DES and 3DES algorithms. Currently
321 the ECB and CBC modes of operation are supported by the driver. Also
322 accesses made on unaligned boundaries are supported.
323
324 config CRYPTO_DEV_PICOXCELL
325 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
326 depends on ARCH_PICOXCELL && HAVE_CLK
327 select CRYPTO_AEAD
328 select CRYPTO_AES
329 select CRYPTO_AUTHENC
330 select CRYPTO_BLKCIPHER
331 select CRYPTO_DES
332 select CRYPTO_CBC
333 select CRYPTO_ECB
334 select CRYPTO_SEQIV
335 help
336 This option enables support for the hardware offload engines in the
337 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
338 and for 3gpp Layer 2 ciphering support.
339
340 Saying m here will build a module named pipcoxcell_crypto.
341
342 config CRYPTO_DEV_SAHARA
343 tristate "Support for SAHARA crypto accelerator"
344 depends on ARCH_MXC && OF
345 select CRYPTO_BLKCIPHER
346 select CRYPTO_AES
347 select CRYPTO_ECB
348 help
349 This option enables support for the SAHARA HW crypto accelerator
350 found in some Freescale i.MX chips.
351
352 config CRYPTO_DEV_MXC_SCC
353 tristate "Support for Freescale Security Controller (SCC)"
354 depends on ARCH_MXC && OF
355 select CRYPTO_BLKCIPHER
356 select CRYPTO_DES
357 help
358 This option enables support for the Security Controller (SCC)
359 found in Freescale i.MX25 chips.
360
361 config CRYPTO_DEV_S5P
362 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
363 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
364 depends on HAS_IOMEM && HAS_DMA
365 select CRYPTO_AES
366 select CRYPTO_BLKCIPHER
367 help
368 This option allows you to have support for S5P crypto acceleration.
369 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
370 algorithms execution.
371
372 config CRYPTO_DEV_NX
373 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
374 depends on PPC64
375 help
376 This enables support for the NX hardware cryptographic accelerator
377 coprocessor that is in IBM PowerPC P7+ or later processors. This
378 does not actually enable any drivers, it only allows you to select
379 which acceleration type (encryption and/or compression) to enable.
380
381 if CRYPTO_DEV_NX
382 source "drivers/crypto/nx/Kconfig"
383 endif
384
385 config CRYPTO_DEV_UX500
386 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
387 depends on ARCH_U8500
388 help
389 Driver for ST-Ericsson UX500 crypto engine.
390
391 if CRYPTO_DEV_UX500
392 source "drivers/crypto/ux500/Kconfig"
393 endif # if CRYPTO_DEV_UX500
394
395 config CRYPTO_DEV_BFIN_CRC
396 tristate "Support for Blackfin CRC hardware"
397 depends on BF60x
398 help
399 Newer Blackfin processors have CRC hardware. Select this if you
400 want to use the Blackfin CRC module.
401
402 config CRYPTO_DEV_ATMEL_AES
403 tristate "Support for Atmel AES hw accelerator"
404 depends on HAS_DMA
405 depends on AT_XDMAC || AT_HDMAC || COMPILE_TEST
406 select CRYPTO_AES
407 select CRYPTO_AEAD
408 select CRYPTO_BLKCIPHER
409 help
410 Some Atmel processors have AES hw accelerator.
411 Select this if you want to use the Atmel module for
412 AES algorithms.
413
414 To compile this driver as a module, choose M here: the module
415 will be called atmel-aes.
416
417 config CRYPTO_DEV_ATMEL_TDES
418 tristate "Support for Atmel DES/TDES hw accelerator"
419 depends on ARCH_AT91
420 select CRYPTO_DES
421 select CRYPTO_BLKCIPHER
422 help
423 Some Atmel processors have DES/TDES hw accelerator.
424 Select this if you want to use the Atmel module for
425 DES/TDES algorithms.
426
427 To compile this driver as a module, choose M here: the module
428 will be called atmel-tdes.
429
430 config CRYPTO_DEV_ATMEL_SHA
431 tristate "Support for Atmel SHA hw accelerator"
432 depends on ARCH_AT91
433 select CRYPTO_HASH
434 help
435 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
436 hw accelerator.
437 Select this if you want to use the Atmel module for
438 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
439
440 To compile this driver as a module, choose M here: the module
441 will be called atmel-sha.
442
443 config CRYPTO_DEV_CCP
444 bool "Support for AMD Cryptographic Coprocessor"
445 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
446 help
447 The AMD Cryptographic Coprocessor provides hardware offload support
448 for encryption, hashing and related operations.
449
450 if CRYPTO_DEV_CCP
451 source "drivers/crypto/ccp/Kconfig"
452 endif
453
454 config CRYPTO_DEV_MXS_DCP
455 tristate "Support for Freescale MXS DCP"
456 depends on (ARCH_MXS || ARCH_MXC)
457 select STMP_DEVICE
458 select CRYPTO_CBC
459 select CRYPTO_ECB
460 select CRYPTO_AES
461 select CRYPTO_BLKCIPHER
462 select CRYPTO_HASH
463 help
464 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
465 co-processor on the die.
466
467 To compile this driver as a module, choose M here: the module
468 will be called mxs-dcp.
469
470 source "drivers/crypto/qat/Kconfig"
471
472 config CRYPTO_DEV_QCE
473 tristate "Qualcomm crypto engine accelerator"
474 depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM
475 select CRYPTO_AES
476 select CRYPTO_DES
477 select CRYPTO_ECB
478 select CRYPTO_CBC
479 select CRYPTO_XTS
480 select CRYPTO_CTR
481 select CRYPTO_BLKCIPHER
482 help
483 This driver supports Qualcomm crypto engine accelerator
484 hardware. To compile this driver as a module, choose M here. The
485 module will be called qcrypto.
486
487 config CRYPTO_DEV_VMX
488 bool "Support for VMX cryptographic acceleration instructions"
489 depends on PPC64 && VSX
490 help
491 Support for VMX cryptographic acceleration instructions.
492
493 source "drivers/crypto/vmx/Kconfig"
494
495 config CRYPTO_DEV_IMGTEC_HASH
496 tristate "Imagination Technologies hardware hash accelerator"
497 depends on MIPS || COMPILE_TEST
498 depends on HAS_DMA
499 select CRYPTO_MD5
500 select CRYPTO_SHA1
501 select CRYPTO_SHA256
502 select CRYPTO_HASH
503 help
504 This driver interfaces with the Imagination Technologies
505 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
506 hashing algorithms.
507
508 config CRYPTO_DEV_SUN4I_SS
509 tristate "Support for Allwinner Security System cryptographic accelerator"
510 depends on ARCH_SUNXI && !64BIT
511 select CRYPTO_MD5
512 select CRYPTO_SHA1
513 select CRYPTO_AES
514 select CRYPTO_DES
515 select CRYPTO_BLKCIPHER
516 help
517 Some Allwinner SoC have a crypto accelerator named
518 Security System. Select this if you want to use it.
519 The Security System handle AES/DES/3DES ciphers in CBC mode
520 and SHA1 and MD5 hash algorithms.
521
522 To compile this driver as a module, choose M here: the module
523 will be called sun4i-ss.
524
525 config CRYPTO_DEV_ROCKCHIP
526 tristate "Rockchip's Cryptographic Engine driver"
527 depends on OF && ARCH_ROCKCHIP
528 select CRYPTO_AES
529 select CRYPTO_DES
530 select CRYPTO_MD5
531 select CRYPTO_SHA1
532 select CRYPTO_SHA256
533 select CRYPTO_HASH
534 select CRYPTO_BLKCIPHER
535
536 help
537 This driver interfaces with the hardware crypto accelerator.
538 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
539
540 endif # CRYPTO_HW
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