drivers/crypto/caam/ctrl.c

   1 /*
   2  * CAAM control-plane driver backend
   3  * Controller-level driver, kernel property detection, initialization
   4  *
   5  * Copyright 2008-2012 Freescale Semiconductor, Inc.
   6  */
   7
   8 #include <linux/device.h>
   9 #include <linux/of_address.h>
  10 #include <linux/of_irq.h>
  11
  12 #include "compat.h"
  13 #include "regs.h"
  14 #include "intern.h"
  15 #include "jr.h"
  16 #include "desc_constr.h"
  17 #include "error.h"
  18
  19 /*
  20  * Descriptor to instantiate RNG State Handle 0 in normal mode and
  21  * load the JDKEK, TDKEK and TDSK registers
  22  */
  23 static void build_instantiation_desc(u32 *desc, int handle, int do_sk)
  24 {
  25         u32 *jump_cmd, op_flags;
  26
  27         init_job_desc(desc, 0);
  28
  29         op_flags = OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
  30                         (handle << OP_ALG_AAI_SHIFT) | OP_ALG_AS_INIT;
  31
  32         /* INIT RNG in non-test mode */
  33         append_operation(desc, op_flags);
  34
  35         if (!handle && do_sk) {
  36                 /*
  37                  * For SH0, Secure Keys must be generated as well
  38                  */
  39
  40                 /* wait for done */
  41                 jump_cmd = append_jump(desc, JUMP_CLASS_CLASS1);
  42                 set_jump_tgt_here(desc, jump_cmd);
  43
  44                 /*
  45                  * load 1 to clear written reg:
  46                  * resets the done interrrupt and returns the RNG to idle.
  47                  */
  48                 append_load_imm_u32(desc, 1, LDST_SRCDST_WORD_CLRW);
  49
  50                 /* Initialize State Handle  */
  51                 append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
  52                                  OP_ALG_AAI_RNG4_SK);
  53         }
  54
  55         append_jump(desc, JUMP_CLASS_CLASS1 | JUMP_TYPE_HALT);
  56 }
  57
  58 /* Descriptor for deinstantiation of State Handle 0 of the RNG block. */
  59 static void build_deinstantiation_desc(u32 *desc, int handle)
  60 {
  61         init_job_desc(desc, 0);
  62
  63         /* Uninstantiate State Handle 0 */
  64         append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
  65                          (handle << OP_ALG_AAI_SHIFT) | OP_ALG_AS_INITFINAL);
  66
  67         append_jump(desc, JUMP_CLASS_CLASS1 | JUMP_TYPE_HALT);
  68 }
  69
  70 /*
  71  * run_descriptor_deco0 - runs a descriptor on DECO0, under direct control of
  72  *                        the software (no JR/QI used).
  73  * @ctrldev - pointer to device
  74  * @status - descriptor status, after being run
  75  *
  76  * Return: - 0 if no error occurred
  77  *         - -ENODEV if the DECO couldn't be acquired
  78  *         - -EAGAIN if an error occurred while executing the descriptor
  79  */
  80 static inline int run_descriptor_deco0(struct device *ctrldev, u32 *desc,
  81                                         u32 *status)
  82 {
  83         struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctrldev);
  84         struct caam_full __iomem *topregs;
  85         unsigned int timeout = 100000;
  86         u32 deco_dbg_reg, flags;
  87         int i;
  88
  89         /* Set the bit to request direct access to DECO0 */
  90         topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
  91
  92         if (ctrlpriv->virt_en == 1)
  93                 setbits32(&topregs->ctrl.deco_rsr, DECORSR_JR0);
  94
  95         while (!(rd_reg32(&topregs->ctrl.deco_rsr) & DECORSR_VALID) &&
  96                --timeout)
  97                 cpu_relax();
  98
  99         setbits32(&topregs->ctrl.deco_rq, DECORR_RQD0ENABLE);
 100
 101         while (!(rd_reg32(&topregs->ctrl.deco_rq) & DECORR_DEN0) &&
 102                                                                  --timeout)
 103                 cpu_relax();
 104
 105         if (!timeout) {
 106                 dev_err(ctrldev, "failed to acquire DECO 0\n");
 107                 clrbits32(&topregs->ctrl.deco_rq, DECORR_RQD0ENABLE);
 108                 return -ENODEV;
 109         }
 110
 111         for (i = 0; i < desc_len(desc); i++)
 112                 wr_reg32(&topregs->deco.descbuf[i], *(desc + i));
 113
 114         flags = DECO_JQCR_WHL;
 115         /*
 116          * If the descriptor length is longer than 4 words, then the
 117          * FOUR bit in JRCTRL register must be set.
 118          */
 119         if (desc_len(desc) >= 4)
 120                 flags |= DECO_JQCR_FOUR;
 121
 122         /* Instruct the DECO to execute it */
 123         wr_reg32(&topregs->deco.jr_ctl_hi, flags);
 124
 125         timeout = 10000000;
 126         do {
 127                 deco_dbg_reg = rd_reg32(&topregs->deco.desc_dbg);
 128                 /*
 129                  * If an error occured in the descriptor, then
 130                  * the DECO status field will be set to 0x0D
 131                  */
 132                 if ((deco_dbg_reg & DESC_DBG_DECO_STAT_MASK) ==
 133                     DESC_DBG_DECO_STAT_HOST_ERR)
 134                         break;
 135                 cpu_relax();
 136         } while ((deco_dbg_reg & DESC_DBG_DECO_STAT_VALID) && --timeout);
 137
 138         *status = rd_reg32(&topregs->deco.op_status_hi) &
 139                   DECO_OP_STATUS_HI_ERR_MASK;
 140
 141         if (ctrlpriv->virt_en == 1)
 142                 clrbits32(&topregs->ctrl.deco_rsr, DECORSR_JR0);
 143
 144         /* Mark the DECO as free */
 145         clrbits32(&topregs->ctrl.deco_rq, DECORR_RQD0ENABLE);
 146
 147         if (!timeout)
 148                 return -EAGAIN;
 149
 150         return 0;
 151 }
 152
 153 /*
 154  * instantiate_rng - builds and executes a descriptor on DECO0,
 155  *                   which initializes the RNG block.
 156  * @ctrldev - pointer to device
 157  * @state_handle_mask - bitmask containing the instantiation status
 158  *                      for the RNG4 state handles which exist in
 159  *                      the RNG4 block: 1 if it's been instantiated
 160  *                      by an external entry, 0 otherwise.
 161  * @gen_sk  - generate data to be loaded into the JDKEK, TDKEK and TDSK;
 162  *            Caution: this can be done only once; if the keys need to be
 163  *            regenerated, a POR is required
 164  *
 165  * Return: - 0 if no error occurred
 166  *         - -ENOMEM if there isn't enough memory to allocate the descriptor
 167  *         - -ENODEV if DECO0 couldn't be acquired
 168  *         - -EAGAIN if an error occurred when executing the descriptor
 169  *            f.i. there was a RNG hardware error due to not "good enough"
 170  *            entropy being aquired.
 171  */
 172 static int instantiate_rng(struct device *ctrldev, int state_handle_mask,
 173                            int gen_sk)
 174 {
 175         struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctrldev);
 176         struct caam_full __iomem *topregs;
 177         struct rng4tst __iomem *r4tst;
 178         u32 *desc, status, rdsta_val;
 179         int ret = 0, sh_idx;
 180
 181         topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
 182         r4tst = &topregs->ctrl.r4tst[0];
 183
 184         desc = kmalloc(CAAM_CMD_SZ * 7, GFP_KERNEL);
 185         if (!desc)
 186                 return -ENOMEM;
 187
 188         for (sh_idx = 0; sh_idx < RNG4_MAX_HANDLES; sh_idx++) {
 189                 /*
 190                  * If the corresponding bit is set, this state handle
 191                  * was initialized by somebody else, so it's left alone.
 192                  */
 193                 if ((1 << sh_idx) & state_handle_mask)
 194                         continue;
 195
 196                 /* Create the descriptor for instantiating RNG State Handle */
 197                 build_instantiation_desc(desc, sh_idx, gen_sk);
 198
 199                 /* Try to run it through DECO0 */
 200                 ret = run_descriptor_deco0(ctrldev, desc, &status);
 201
 202                 /*
 203                  * If ret is not 0, or descriptor status is not 0, then
 204                  * something went wrong. No need to try the next state
 205                  * handle (if available), bail out here.
 206                  * Also, if for some reason, the State Handle didn't get
 207                  * instantiated although the descriptor has finished
 208                  * without any error (HW optimizations for later
 209                  * CAAM eras), then try again.
 210                  */
 211                 rdsta_val =
 212                         rd_reg32(&topregs->ctrl.r4tst[0].rdsta) & RDSTA_IFMASK;
 213                 if (status || !(rdsta_val & (1 << sh_idx)))
 214                         ret = -EAGAIN;
 215                 if (ret)
 216                         break;
 217
 218                 dev_info(ctrldev, "Instantiated RNG4 SH%d\n", sh_idx);
 219                 /* Clear the contents before recreating the descriptor */
 220                 memset(desc, 0x00, CAAM_CMD_SZ * 7);
 221         }
 222
 223         kfree(desc);
 224
 225         return ret;
 226 }
 227
 228 /*
 229  * deinstantiate_rng - builds and executes a descriptor on DECO0,
 230  *                     which deinitializes the RNG block.
 231  * @ctrldev - pointer to device
 232  * @state_handle_mask - bitmask containing the instantiation status
 233  *                      for the RNG4 state handles which exist in
 234  *                      the RNG4 block: 1 if it's been instantiated
 235  *
 236  * Return: - 0 if no error occurred
 237  *         - -ENOMEM if there isn't enough memory to allocate the descriptor
 238  *         - -ENODEV if DECO0 couldn't be acquired
 239  *         - -EAGAIN if an error occurred when executing the descriptor
 240  */
 241 static int deinstantiate_rng(struct device *ctrldev, int state_handle_mask)
 242 {
 243         u32 *desc, status;
 244         int sh_idx, ret = 0;
 245
 246         desc = kmalloc(CAAM_CMD_SZ * 3, GFP_KERNEL);
 247         if (!desc)
 248                 return -ENOMEM;
 249
 250         for (sh_idx = 0; sh_idx < RNG4_MAX_HANDLES; sh_idx++) {
 251                 /*
 252                  * If the corresponding bit is set, then it means the state
 253                  * handle was initialized by us, and thus it needs to be
 254                  * deintialized as well
 255                  */
 256                 if ((1 << sh_idx) & state_handle_mask) {
 257                         /*
 258                          * Create the descriptor for deinstantating this state
 259                          * handle
 260                          */
 261                         build_deinstantiation_desc(desc, sh_idx);
 262
 263                         /* Try to run it through DECO0 */
 264                         ret = run_descriptor_deco0(ctrldev, desc, &status);
 265
 266                         if (ret || status) {
 267                                 dev_err(ctrldev,
 268                                         "Failed to deinstantiate RNG4 SH%d\n",
 269                                         sh_idx);
 270                                 break;
 271                         }
 272                         dev_info(ctrldev, "Deinstantiated RNG4 SH%d\n", sh_idx);
 273                 }
 274         }
 275
 276         kfree(desc);
 277
 278         return ret;
 279 }
 280
 281 static int caam_remove(struct platform_device *pdev)
 282 {
 283         struct device *ctrldev;
 284         struct caam_drv_private *ctrlpriv;
 285         struct caam_full __iomem *topregs;
 286         int ring, ret = 0;
 287
 288         ctrldev = &pdev->dev;
 289         ctrlpriv = dev_get_drvdata(ctrldev);
 290         topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
 291
 292         /* Remove platform devices for JobRs */
 293         for (ring = 0; ring < ctrlpriv->total_jobrs; ring++) {
 294                 if (ctrlpriv->jrpdev[ring])
 295                         of_device_unregister(ctrlpriv->jrpdev[ring]);
 296         }
 297
 298         /* De-initialize RNG state handles initialized by this driver. */
 299         if (ctrlpriv->rng4_sh_init)
 300                 deinstantiate_rng(ctrldev, ctrlpriv->rng4_sh_init);
 301
 302         /* Shut down debug views */
 303 #ifdef CONFIG_DEBUG_FS
 304         debugfs_remove_recursive(ctrlpriv->dfs_root);
 305 #endif
 306
 307         /* Unmap controller region */
 308         iounmap(&topregs->ctrl);
 309
 310         return ret;
 311 }
 312
 313 /*
 314  * kick_trng - sets the various parameters for enabling the initialization
 315  *             of the RNG4 block in CAAM
 316  * @pdev - pointer to the platform device
 317  * @ent_delay - Defines the length (in system clocks) of each entropy sample.
 318  */
 319 static void kick_trng(struct platform_device *pdev, int ent_delay)
 320 {
 321         struct device *ctrldev = &pdev->dev;
 322         struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctrldev);
 323         struct caam_full __iomem *topregs;
 324         struct rng4tst __iomem *r4tst;
 325         u32 val;
 326
 327         topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
 328         r4tst = &topregs->ctrl.r4tst[0];
 329
 330         /* put RNG4 into program mode */
 331         setbits32(&r4tst->rtmctl, RTMCTL_PRGM);
 332
 333         /*
 334          * Performance-wise, it does not make sense to
 335          * set the delay to a value that is lower
 336          * than the last one that worked (i.e. the state handles
 337          * were instantiated properly. Thus, instead of wasting
 338          * time trying to set the values controlling the sample
 339          * frequency, the function simply returns.
 340          */
 341         val = (rd_reg32(&r4tst->rtsdctl) & RTSDCTL_ENT_DLY_MASK)
 342               >> RTSDCTL_ENT_DLY_SHIFT;
 343         if (ent_delay <= val) {
 344                 /* put RNG4 into run mode */
 345                 clrbits32(&r4tst->rtmctl, RTMCTL_PRGM);
 346                 return;
 347         }
 348
 349         val = rd_reg32(&r4tst->rtsdctl);
 350         val = (val & ~RTSDCTL_ENT_DLY_MASK) |
 351               (ent_delay << RTSDCTL_ENT_DLY_SHIFT);
 352         wr_reg32(&r4tst->rtsdctl, val);
 353         /* min. freq. count, equal to 1/4 of the entropy sample length */
 354         wr_reg32(&r4tst->rtfrqmin, ent_delay >> 2);
 355         /* max. freq. count, equal to 8 times the entropy sample length */
 356         wr_reg32(&r4tst->rtfrqmax, ent_delay << 3);
 357         /* put RNG4 into run mode */
 358         clrbits32(&r4tst->rtmctl, RTMCTL_PRGM);
 359 }
 360
 361 /**
 362  * caam_get_era() - Return the ERA of the SEC on SoC, based
 363  * on "sec-era" propery in the DTS. This property is updated by u-boot.
 364  **/
 365 int caam_get_era(void)
 366 {
 367         struct device_node *caam_node;
 368         for_each_compatible_node(caam_node, NULL, "fsl,sec-v4.0") {
 369                 const uint32_t *prop = (uint32_t *)of_get_property(caam_node,
 370                                 "fsl,sec-era",
 371                                 NULL);
 372                 return prop ? *prop : -ENOTSUPP;
 373         }
 374
 375         return -ENOTSUPP;
 376 }
 377 EXPORT_SYMBOL(caam_get_era);
 378
 379 /* Probe routine for CAAM top (controller) level */
 380 static int caam_probe(struct platform_device *pdev)
 381 {
 382         int ret, ring, rspec, gen_sk, ent_delay = RTSDCTL_ENT_DLY_MIN;
 383         u64 caam_id;
 384         struct device *dev;
 385         struct device_node *nprop, *np;
 386         struct caam_ctrl __iomem *ctrl;
 387         struct caam_full __iomem *topregs;
 388         struct caam_drv_private *ctrlpriv;
 389 #ifdef CONFIG_DEBUG_FS
 390         struct caam_perfmon *perfmon;
 391 #endif
 392         u32 scfgr, comp_params;
 393         u32 cha_vid_ls;
 394
 395         ctrlpriv = devm_kzalloc(&pdev->dev, sizeof(struct caam_drv_private),
 396                                 GFP_KERNEL);
 397         if (!ctrlpriv)
 398                 return -ENOMEM;
 399
 400         dev = &pdev->dev;
 401         dev_set_drvdata(dev, ctrlpriv);
 402         ctrlpriv->pdev = pdev;
 403         nprop = pdev->dev.of_node;
 404
 405         /* Get configuration properties from device tree */
 406         /* First, get register page */
 407         ctrl = of_iomap(nprop, 0);
 408         if (ctrl == NULL) {
 409                 dev_err(dev, "caam: of_iomap() failed\n");
 410                 return -ENOMEM;
 411         }
 412         ctrlpriv->ctrl = (struct caam_ctrl __force *)ctrl;
 413
 414         /* topregs used to derive pointers to CAAM sub-blocks only */
 415         topregs = (struct caam_full __iomem *)ctrl;
 416
 417         /* Get the IRQ of the controller (for security violations only) */
 418         ctrlpriv->secvio_irq = irq_of_parse_and_map(nprop, 0);
 419
 420         /*
 421          * Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel,
 422          * long pointers in master configuration register
 423          */
 424         setbits32(&topregs->ctrl.mcr, MCFGR_WDENABLE |
 425                   (sizeof(dma_addr_t) == sizeof(u64) ? MCFGR_LONG_PTR : 0));
 426
 427         /*
 428          *  Read the Compile Time paramters and SCFGR to determine
 429          * if Virtualization is enabled for this platform
 430          */
 431         comp_params = rd_reg32(&topregs->ctrl.perfmon.comp_parms_ms);
 432         scfgr = rd_reg32(&topregs->ctrl.scfgr);
 433
 434         ctrlpriv->virt_en = 0;
 435         if (comp_params & CTPR_MS_VIRT_EN_INCL) {
 436                 /* VIRT_EN_INCL = 1 & VIRT_EN_POR = 1 or
 437                  * VIRT_EN_INCL = 1 & VIRT_EN_POR = 0 & SCFGR_VIRT_EN = 1
 438                  */
 439                 if ((comp_params & CTPR_MS_VIRT_EN_POR) ||
 440                     (!(comp_params & CTPR_MS_VIRT_EN_POR) &&
 441                        (scfgr & SCFGR_VIRT_EN)))
 442                                 ctrlpriv->virt_en = 1;
 443         } else {
 444                 /* VIRT_EN_INCL = 0 && VIRT_EN_POR_VALUE = 1 */
 445                 if (comp_params & CTPR_MS_VIRT_EN_POR)
 446                                 ctrlpriv->virt_en = 1;
 447         }
 448
 449         if (ctrlpriv->virt_en == 1)
 450                 setbits32(&topregs->ctrl.jrstart, JRSTART_JR0_START |
 451                           JRSTART_JR1_START | JRSTART_JR2_START |
 452                           JRSTART_JR3_START);
 453
 454         if (sizeof(dma_addr_t) == sizeof(u64))
 455                 if (of_device_is_compatible(nprop, "fsl,sec-v5.0"))
 456                         dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40));
 457                 else
 458                         dma_set_mask_and_coherent(dev, DMA_BIT_MASK(36));
 459         else
 460                 dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
 461
 462         /*
 463          * Detect and enable JobRs
 464          * First, find out how many ring spec'ed, allocate references
 465          * for all, then go probe each one.
 466          */
 467         rspec = 0;
 468         for_each_available_child_of_node(nprop, np)
 469                 if (of_device_is_compatible(np, "fsl,sec-v4.0-job-ring") ||
 470                     of_device_is_compatible(np, "fsl,sec4.0-job-ring"))
 471                         rspec++;
 472
 473         ctrlpriv->jrpdev = devm_kzalloc(&pdev->dev,
 474                                         sizeof(struct platform_device *) * rspec,
 475                                         GFP_KERNEL);
 476         if (ctrlpriv->jrpdev == NULL) {
 477                 iounmap(&topregs->ctrl);
 478                 return -ENOMEM;
 479         }
 480
 481         ring = 0;
 482         ctrlpriv->total_jobrs = 0;
 483         for_each_available_child_of_node(nprop, np)
 484                 if (of_device_is_compatible(np, "fsl,sec-v4.0-job-ring") ||
 485                     of_device_is_compatible(np, "fsl,sec4.0-job-ring")) {
 486                         ctrlpriv->jrpdev[ring] =
 487                                 of_platform_device_create(np, NULL, dev);
 488                         if (!ctrlpriv->jrpdev[ring]) {
 489                                 pr_warn("JR%d Platform device creation error\n",
 490                                         ring);
 491                                 continue;
 492                         }
 493                         ctrlpriv->total_jobrs++;
 494                         ring++;
 495                 }
 496
 497         /* Check to see if QI present. If so, enable */
 498         ctrlpriv->qi_present =
 499                         !!(rd_reg32(&topregs->ctrl.perfmon.comp_parms_ms) &
 500                            CTPR_MS_QI_MASK);
 501         if (ctrlpriv->qi_present) {
 502                 ctrlpriv->qi = (struct caam_queue_if __force *)&topregs->qi;
 503                 /* This is all that's required to physically enable QI */
 504                 wr_reg32(&topregs->qi.qi_control_lo, QICTL_DQEN);
 505         }
 506
 507         /* If no QI and no rings specified, quit and go home */
 508         if ((!ctrlpriv->qi_present) && (!ctrlpriv->total_jobrs)) {
 509                 dev_err(dev, "no queues configured, terminating\n");
 510                 caam_remove(pdev);
 511                 return -ENOMEM;
 512         }
 513
 514         cha_vid_ls = rd_reg32(&topregs->ctrl.perfmon.cha_id_ls);
 515
 516         /*
 517          * If SEC has RNG version >= 4 and RNG state handle has not been
 518          * already instantiated, do RNG instantiation
 519          */
 520         if ((cha_vid_ls & CHA_ID_LS_RNG_MASK) >> CHA_ID_LS_RNG_SHIFT >= 4) {
 521                 ctrlpriv->rng4_sh_init =
 522                         rd_reg32(&topregs->ctrl.r4tst[0].rdsta);
 523                 /*
 524                  * If the secure keys (TDKEK, JDKEK, TDSK), were already
 525                  * generated, signal this to the function that is instantiating
 526                  * the state handles. An error would occur if RNG4 attempts
 527                  * to regenerate these keys before the next POR.
 528                  */
 529                 gen_sk = ctrlpriv->rng4_sh_init & RDSTA_SKVN ? 0 : 1;
 530                 ctrlpriv->rng4_sh_init &= RDSTA_IFMASK;
 531                 do {
 532                         int inst_handles =
 533                                 rd_reg32(&topregs->ctrl.r4tst[0].rdsta) &
 534                                                                 RDSTA_IFMASK;
 535                         /*
 536                          * If either SH were instantiated by somebody else
 537                          * (e.g. u-boot) then it is assumed that the entropy
 538                          * parameters are properly set and thus the function
 539                          * setting these (kick_trng(...)) is skipped.
 540                          * Also, if a handle was instantiated, do not change
 541                          * the TRNG parameters.
 542                          */
 543                         if (!(ctrlpriv->rng4_sh_init || inst_handles)) {
 544                                 kick_trng(pdev, ent_delay);
 545                                 ent_delay += 400;
 546                         }
 547                         /*
 548                          * if instantiate_rng(...) fails, the loop will rerun
 549                          * and the kick_trng(...) function will modfiy the
 550                          * upper and lower limits of the entropy sampling
 551                          * interval, leading to a sucessful initialization of
 552                          * the RNG.
 553                          */
 554                         ret = instantiate_rng(dev, inst_handles,
 555                                               gen_sk);
 556                 } while ((ret == -EAGAIN) && (ent_delay < RTSDCTL_ENT_DLY_MAX));
 557                 if (ret) {
 558                         dev_err(dev, "failed to instantiate RNG");
 559                         caam_remove(pdev);
 560                         return ret;
 561                 }
 562                 /*
 563                  * Set handles init'ed by this module as the complement of the
 564                  * already initialized ones
 565                  */
 566                 ctrlpriv->rng4_sh_init = ~ctrlpriv->rng4_sh_init & RDSTA_IFMASK;
 567
 568                 /* Enable RDB bit so that RNG works faster */
 569                 setbits32(&topregs->ctrl.scfgr, SCFGR_RDBENABLE);
 570         }
 571
 572         /* NOTE: RTIC detection ought to go here, around Si time */
 573
 574         caam_id = (u64)rd_reg32(&topregs->ctrl.perfmon.caam_id_ms) << 32 |
 575                   (u64)rd_reg32(&topregs->ctrl.perfmon.caam_id_ls);
 576
 577         /* Report "alive" for developer to see */
 578         dev_info(dev, "device ID = 0x%016llx (Era %d)\n", caam_id,
 579                  caam_get_era());
 580         dev_info(dev, "job rings = %d, qi = %d\n",
 581                  ctrlpriv->total_jobrs, ctrlpriv->qi_present);
 582
 583 #ifdef CONFIG_DEBUG_FS
 584         /*
 585          * FIXME: needs better naming distinction, as some amalgamation of
 586          * "caam" and nprop->full_name. The OF name isn't distinctive,
 587          * but does separate instances
 588          */
 589         perfmon = (struct caam_perfmon __force *)&ctrl->perfmon;
 590
 591         ctrlpriv->dfs_root = debugfs_create_dir(dev_name(dev), NULL);
 592         ctrlpriv->ctl = debugfs_create_dir("ctl", ctrlpriv->dfs_root);
 593
 594         /* Controller-level - performance monitor counters */
 595         ctrlpriv->ctl_rq_dequeued =
 596                 debugfs_create_u64("rq_dequeued",
 597                                    S_IRUSR | S_IRGRP | S_IROTH,
 598                                    ctrlpriv->ctl, &perfmon->req_dequeued);
 599         ctrlpriv->ctl_ob_enc_req =
 600                 debugfs_create_u64("ob_rq_encrypted",
 601                                    S_IRUSR | S_IRGRP | S_IROTH,
 602                                    ctrlpriv->ctl, &perfmon->ob_enc_req);
 603         ctrlpriv->ctl_ib_dec_req =
 604                 debugfs_create_u64("ib_rq_decrypted",
 605                                    S_IRUSR | S_IRGRP | S_IROTH,
 606                                    ctrlpriv->ctl, &perfmon->ib_dec_req);
 607         ctrlpriv->ctl_ob_enc_bytes =
 608                 debugfs_create_u64("ob_bytes_encrypted",
 609                                    S_IRUSR | S_IRGRP | S_IROTH,
 610                                    ctrlpriv->ctl, &perfmon->ob_enc_bytes);
 611         ctrlpriv->ctl_ob_prot_bytes =
 612                 debugfs_create_u64("ob_bytes_protected",
 613                                    S_IRUSR | S_IRGRP | S_IROTH,
 614                                    ctrlpriv->ctl, &perfmon->ob_prot_bytes);
 615         ctrlpriv->ctl_ib_dec_bytes =
 616                 debugfs_create_u64("ib_bytes_decrypted",
 617                                    S_IRUSR | S_IRGRP | S_IROTH,
 618                                    ctrlpriv->ctl, &perfmon->ib_dec_bytes);
 619         ctrlpriv->ctl_ib_valid_bytes =
 620                 debugfs_create_u64("ib_bytes_validated",
 621                                    S_IRUSR | S_IRGRP | S_IROTH,
 622                                    ctrlpriv->ctl, &perfmon->ib_valid_bytes);
 623
 624         /* Controller level - global status values */
 625         ctrlpriv->ctl_faultaddr =
 626                 debugfs_create_u64("fault_addr",
 627                                    S_IRUSR | S_IRGRP | S_IROTH,
 628                                    ctrlpriv->ctl, &perfmon->faultaddr);
 629         ctrlpriv->ctl_faultdetail =
 630                 debugfs_create_u32("fault_detail",
 631                                    S_IRUSR | S_IRGRP | S_IROTH,
 632                                    ctrlpriv->ctl, &perfmon->faultdetail);
 633         ctrlpriv->ctl_faultstatus =
 634                 debugfs_create_u32("fault_status",
 635                                    S_IRUSR | S_IRGRP | S_IROTH,
 636                                    ctrlpriv->ctl, &perfmon->status);
 637
 638         /* Internal covering keys (useful in non-secure mode only) */
 639         ctrlpriv->ctl_kek_wrap.data = &ctrlpriv->ctrl->kek[0];
 640         ctrlpriv->ctl_kek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
 641         ctrlpriv->ctl_kek = debugfs_create_blob("kek",
 642                                                 S_IRUSR |
 643                                                 S_IRGRP | S_IROTH,
 644                                                 ctrlpriv->ctl,
 645                                                 &ctrlpriv->ctl_kek_wrap);
 646
 647         ctrlpriv->ctl_tkek_wrap.data = &ctrlpriv->ctrl->tkek[0];
 648         ctrlpriv->ctl_tkek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
 649         ctrlpriv->ctl_tkek = debugfs_create_blob("tkek",
 650                                                  S_IRUSR |
 651                                                  S_IRGRP | S_IROTH,
 652                                                  ctrlpriv->ctl,
 653                                                  &ctrlpriv->ctl_tkek_wrap);
 654
 655         ctrlpriv->ctl_tdsk_wrap.data = &ctrlpriv->ctrl->tdsk[0];
 656         ctrlpriv->ctl_tdsk_wrap.size = KEK_KEY_SIZE * sizeof(u32);
 657         ctrlpriv->ctl_tdsk = debugfs_create_blob("tdsk",
 658                                                  S_IRUSR |
 659                                                  S_IRGRP | S_IROTH,
 660                                                  ctrlpriv->ctl,
 661                                                  &ctrlpriv->ctl_tdsk_wrap);
 662 #endif
 663         return 0;
 664 }
 665
 666 static struct of_device_id caam_match[] = {
 667         {
 668                 .compatible = "fsl,sec-v4.0",
 669         },
 670         {
 671                 .compatible = "fsl,sec4.0",
 672         },
 673         {},
 674 };
 675 MODULE_DEVICE_TABLE(of, caam_match);
 676
 677 static struct platform_driver caam_driver = {
 678         .driver = {
 679                 .name = "caam",
 680                 .owner = THIS_MODULE,
 681                 .of_match_table = caam_match,
 682         },
 683         .probe       = caam_probe,
 684         .remove      = caam_remove,
 685 };
 686
 687 module_platform_driver(caam_driver);
 688
 689 MODULE_LICENSE("GPL");
 690 MODULE_DESCRIPTION("FSL CAAM request backend");
 691 MODULE_AUTHOR("Freescale Semiconductor - NMG/STC");