2 * Support for OMAP DES and Triple DES HW acceleration.
4 * Copyright (c) 2013 Texas Instruments Incorporated
5 * Author: Joel Fernandes <joelf@ti.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
13 #define pr_fmt(fmt) "%s: " fmt, __func__
16 #define prn(num) printk(#num "=%d\n", num)
17 #define prx(num) printk(#num "=%x\n", num)
19 #define prn(num) do { } while (0)
20 #define prx(num) do { } while (0)
23 #include <linux/err.h>
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/errno.h>
27 #include <linux/kernel.h>
28 #include <linux/platform_device.h>
29 #include <linux/scatterlist.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/dmaengine.h>
32 #include <linux/pm_runtime.h>
34 #include <linux/of_device.h>
35 #include <linux/of_address.h>
37 #include <linux/crypto.h>
38 #include <linux/interrupt.h>
39 #include <crypto/scatterwalk.h>
40 #include <crypto/des.h>
41 #include <crypto/algapi.h>
43 #define DST_MAXBURST 2
45 #define DES_BLOCK_WORDS (DES_BLOCK_SIZE >> 2)
47 #define _calc_walked(inout) (dd->inout##_walk.offset - dd->inout##_sg->offset)
49 #define DES_REG_KEY(dd, x) ((dd)->pdata->key_ofs - \
52 #define DES_REG_IV(dd, x) ((dd)->pdata->iv_ofs + ((x) * 0x04))
54 #define DES_REG_CTRL(dd) ((dd)->pdata->ctrl_ofs)
55 #define DES_REG_CTRL_CBC BIT(4)
56 #define DES_REG_CTRL_TDES BIT(3)
57 #define DES_REG_CTRL_DIRECTION BIT(2)
58 #define DES_REG_CTRL_INPUT_READY BIT(1)
59 #define DES_REG_CTRL_OUTPUT_READY BIT(0)
61 #define DES_REG_DATA_N(dd, x) ((dd)->pdata->data_ofs + ((x) * 0x04))
63 #define DES_REG_REV(dd) ((dd)->pdata->rev_ofs)
65 #define DES_REG_MASK(dd) ((dd)->pdata->mask_ofs)
67 #define DES_REG_LENGTH_N(x) (0x24 + ((x) * 0x04))
69 #define DES_REG_IRQ_STATUS(dd) ((dd)->pdata->irq_status_ofs)
70 #define DES_REG_IRQ_ENABLE(dd) ((dd)->pdata->irq_enable_ofs)
71 #define DES_REG_IRQ_DATA_IN BIT(1)
72 #define DES_REG_IRQ_DATA_OUT BIT(2)
74 #define FLAGS_MODE_MASK 0x000f
75 #define FLAGS_ENCRYPT BIT(0)
76 #define FLAGS_CBC BIT(1)
77 #define FLAGS_INIT BIT(4)
78 #define FLAGS_BUSY BIT(6)
81 struct omap_des_dev
*dd
;
84 u32 key
[(3 * DES_KEY_SIZE
) / sizeof(u32
)];
88 struct omap_des_reqctx
{
92 #define OMAP_DES_QUEUE_LENGTH 1
93 #define OMAP_DES_CACHE_SIZE 0
95 struct omap_des_algs_info
{
96 struct crypto_alg
*algs_list
;
98 unsigned int registered
;
101 struct omap_des_pdata
{
102 struct omap_des_algs_info
*algs_info
;
103 unsigned int algs_info_size
;
105 void (*trigger
)(struct omap_des_dev
*dd
, int length
);
126 struct omap_des_dev
{
127 struct list_head list
;
128 unsigned long phys_base
;
129 void __iomem
*io_base
;
130 struct omap_des_ctx
*ctx
;
135 struct tasklet_struct done_task
;
137 struct ablkcipher_request
*req
;
138 struct crypto_engine
*engine
;
140 * total is used by PIO mode for book keeping so introduce
141 * variable total_save as need it to calc page_order
146 struct scatterlist
*in_sg
;
147 struct scatterlist
*out_sg
;
149 /* Buffers for copying for unaligned cases */
150 struct scatterlist in_sgl
;
151 struct scatterlist out_sgl
;
152 struct scatterlist
*orig_out
;
155 struct scatter_walk in_walk
;
156 struct scatter_walk out_walk
;
157 struct dma_chan
*dma_lch_in
;
158 struct dma_chan
*dma_lch_out
;
162 const struct omap_des_pdata
*pdata
;
165 /* keep registered devices data here */
166 static LIST_HEAD(dev_list
);
167 static DEFINE_SPINLOCK(list_lock
);
170 #define omap_des_read(dd, offset) \
173 _read_ret = __raw_readl(dd->io_base + offset); \
174 pr_err("omap_des_read(" #offset "=%#x)= %#x\n", \
175 offset, _read_ret); \
179 static inline u32
omap_des_read(struct omap_des_dev
*dd
, u32 offset
)
181 return __raw_readl(dd
->io_base
+ offset
);
186 #define omap_des_write(dd, offset, value) \
188 pr_err("omap_des_write(" #offset "=%#x) value=%#x\n", \
190 __raw_writel(value, dd->io_base + offset); \
193 static inline void omap_des_write(struct omap_des_dev
*dd
, u32 offset
,
196 __raw_writel(value
, dd
->io_base
+ offset
);
200 static inline void omap_des_write_mask(struct omap_des_dev
*dd
, u32 offset
,
205 val
= omap_des_read(dd
, offset
);
208 omap_des_write(dd
, offset
, val
);
211 static void omap_des_write_n(struct omap_des_dev
*dd
, u32 offset
,
212 u32
*value
, int count
)
214 for (; count
--; value
++, offset
+= 4)
215 omap_des_write(dd
, offset
, *value
);
218 static int omap_des_hw_init(struct omap_des_dev
*dd
)
223 * clocks are enabled when request starts and disabled when finished.
224 * It may be long delays between requests.
225 * Device might go to off mode to save power.
227 err
= pm_runtime_get_sync(dd
->dev
);
229 pm_runtime_put_noidle(dd
->dev
);
230 dev_err(dd
->dev
, "%s: failed to get_sync(%d)\n", __func__
, err
);
234 if (!(dd
->flags
& FLAGS_INIT
)) {
235 dd
->flags
|= FLAGS_INIT
;
242 static int omap_des_write_ctrl(struct omap_des_dev
*dd
)
246 u32 val
= 0, mask
= 0;
248 err
= omap_des_hw_init(dd
);
252 key32
= dd
->ctx
->keylen
/ sizeof(u32
);
254 /* it seems a key should always be set even if it has not changed */
255 for (i
= 0; i
< key32
; i
++) {
256 omap_des_write(dd
, DES_REG_KEY(dd
, i
),
257 __le32_to_cpu(dd
->ctx
->key
[i
]));
260 if ((dd
->flags
& FLAGS_CBC
) && dd
->req
->info
)
261 omap_des_write_n(dd
, DES_REG_IV(dd
, 0), dd
->req
->info
, 2);
263 if (dd
->flags
& FLAGS_CBC
)
264 val
|= DES_REG_CTRL_CBC
;
265 if (dd
->flags
& FLAGS_ENCRYPT
)
266 val
|= DES_REG_CTRL_DIRECTION
;
268 val
|= DES_REG_CTRL_TDES
;
270 mask
|= DES_REG_CTRL_CBC
| DES_REG_CTRL_DIRECTION
| DES_REG_CTRL_TDES
;
272 omap_des_write_mask(dd
, DES_REG_CTRL(dd
), val
, mask
);
277 static void omap_des_dma_trigger_omap4(struct omap_des_dev
*dd
, int length
)
281 omap_des_write(dd
, DES_REG_LENGTH_N(0), length
);
283 val
= dd
->pdata
->dma_start
;
285 if (dd
->dma_lch_out
!= NULL
)
286 val
|= dd
->pdata
->dma_enable_out
;
287 if (dd
->dma_lch_in
!= NULL
)
288 val
|= dd
->pdata
->dma_enable_in
;
290 mask
= dd
->pdata
->dma_enable_out
| dd
->pdata
->dma_enable_in
|
291 dd
->pdata
->dma_start
;
293 omap_des_write_mask(dd
, DES_REG_MASK(dd
), val
, mask
);
296 static void omap_des_dma_stop(struct omap_des_dev
*dd
)
300 mask
= dd
->pdata
->dma_enable_out
| dd
->pdata
->dma_enable_in
|
301 dd
->pdata
->dma_start
;
303 omap_des_write_mask(dd
, DES_REG_MASK(dd
), 0, mask
);
306 static struct omap_des_dev
*omap_des_find_dev(struct omap_des_ctx
*ctx
)
308 struct omap_des_dev
*dd
= NULL
, *tmp
;
310 spin_lock_bh(&list_lock
);
312 list_for_each_entry(tmp
, &dev_list
, list
) {
313 /* FIXME: take fist available des core */
319 /* already found before */
322 spin_unlock_bh(&list_lock
);
327 static void omap_des_dma_out_callback(void *data
)
329 struct omap_des_dev
*dd
= data
;
331 /* dma_lch_out - completed */
332 tasklet_schedule(&dd
->done_task
);
335 static int omap_des_dma_init(struct omap_des_dev
*dd
)
339 dd
->dma_lch_out
= NULL
;
340 dd
->dma_lch_in
= NULL
;
342 dd
->dma_lch_in
= dma_request_chan(dd
->dev
, "rx");
343 if (IS_ERR(dd
->dma_lch_in
)) {
344 dev_err(dd
->dev
, "Unable to request in DMA channel\n");
345 return PTR_ERR(dd
->dma_lch_in
);
348 dd
->dma_lch_out
= dma_request_chan(dd
->dev
, "tx");
349 if (IS_ERR(dd
->dma_lch_out
)) {
350 dev_err(dd
->dev
, "Unable to request out DMA channel\n");
351 err
= PTR_ERR(dd
->dma_lch_out
);
358 dma_release_channel(dd
->dma_lch_in
);
363 static void omap_des_dma_cleanup(struct omap_des_dev
*dd
)
368 dma_release_channel(dd
->dma_lch_out
);
369 dma_release_channel(dd
->dma_lch_in
);
372 static void sg_copy_buf(void *buf
, struct scatterlist
*sg
,
373 unsigned int start
, unsigned int nbytes
, int out
)
375 struct scatter_walk walk
;
380 scatterwalk_start(&walk
, sg
);
381 scatterwalk_advance(&walk
, start
);
382 scatterwalk_copychunks(buf
, &walk
, nbytes
, out
);
383 scatterwalk_done(&walk
, out
, 0);
386 static int omap_des_crypt_dma(struct crypto_tfm
*tfm
,
387 struct scatterlist
*in_sg
, struct scatterlist
*out_sg
,
388 int in_sg_len
, int out_sg_len
)
390 struct omap_des_ctx
*ctx
= crypto_tfm_ctx(tfm
);
391 struct omap_des_dev
*dd
= ctx
->dd
;
392 struct dma_async_tx_descriptor
*tx_in
, *tx_out
;
393 struct dma_slave_config cfg
;
397 scatterwalk_start(&dd
->in_walk
, dd
->in_sg
);
398 scatterwalk_start(&dd
->out_walk
, dd
->out_sg
);
400 /* Enable DATAIN interrupt and let it take
402 omap_des_write(dd
, DES_REG_IRQ_ENABLE(dd
), 0x2);
406 dma_sync_sg_for_device(dd
->dev
, dd
->in_sg
, in_sg_len
, DMA_TO_DEVICE
);
408 memset(&cfg
, 0, sizeof(cfg
));
410 cfg
.src_addr
= dd
->phys_base
+ DES_REG_DATA_N(dd
, 0);
411 cfg
.dst_addr
= dd
->phys_base
+ DES_REG_DATA_N(dd
, 0);
412 cfg
.src_addr_width
= DMA_SLAVE_BUSWIDTH_4_BYTES
;
413 cfg
.dst_addr_width
= DMA_SLAVE_BUSWIDTH_4_BYTES
;
414 cfg
.src_maxburst
= DST_MAXBURST
;
415 cfg
.dst_maxburst
= DST_MAXBURST
;
418 ret
= dmaengine_slave_config(dd
->dma_lch_in
, &cfg
);
420 dev_err(dd
->dev
, "can't configure IN dmaengine slave: %d\n",
425 tx_in
= dmaengine_prep_slave_sg(dd
->dma_lch_in
, in_sg
, in_sg_len
,
427 DMA_PREP_INTERRUPT
| DMA_CTRL_ACK
);
429 dev_err(dd
->dev
, "IN prep_slave_sg() failed\n");
433 /* No callback necessary */
434 tx_in
->callback_param
= dd
;
437 ret
= dmaengine_slave_config(dd
->dma_lch_out
, &cfg
);
439 dev_err(dd
->dev
, "can't configure OUT dmaengine slave: %d\n",
444 tx_out
= dmaengine_prep_slave_sg(dd
->dma_lch_out
, out_sg
, out_sg_len
,
446 DMA_PREP_INTERRUPT
| DMA_CTRL_ACK
);
448 dev_err(dd
->dev
, "OUT prep_slave_sg() failed\n");
452 tx_out
->callback
= omap_des_dma_out_callback
;
453 tx_out
->callback_param
= dd
;
455 dmaengine_submit(tx_in
);
456 dmaengine_submit(tx_out
);
458 dma_async_issue_pending(dd
->dma_lch_in
);
459 dma_async_issue_pending(dd
->dma_lch_out
);
462 dd
->pdata
->trigger(dd
, dd
->total
);
467 static int omap_des_crypt_dma_start(struct omap_des_dev
*dd
)
469 struct crypto_tfm
*tfm
= crypto_ablkcipher_tfm(
470 crypto_ablkcipher_reqtfm(dd
->req
));
473 pr_debug("total: %d\n", dd
->total
);
476 err
= dma_map_sg(dd
->dev
, dd
->in_sg
, dd
->in_sg_len
,
479 dev_err(dd
->dev
, "dma_map_sg() error\n");
483 err
= dma_map_sg(dd
->dev
, dd
->out_sg
, dd
->out_sg_len
,
486 dev_err(dd
->dev
, "dma_map_sg() error\n");
491 err
= omap_des_crypt_dma(tfm
, dd
->in_sg
, dd
->out_sg
, dd
->in_sg_len
,
493 if (err
&& !dd
->pio_only
) {
494 dma_unmap_sg(dd
->dev
, dd
->in_sg
, dd
->in_sg_len
, DMA_TO_DEVICE
);
495 dma_unmap_sg(dd
->dev
, dd
->out_sg
, dd
->out_sg_len
,
502 static void omap_des_finish_req(struct omap_des_dev
*dd
, int err
)
504 struct ablkcipher_request
*req
= dd
->req
;
506 pr_debug("err: %d\n", err
);
508 pm_runtime_put(dd
->dev
);
509 crypto_finalize_request(dd
->engine
, req
, err
);
512 static int omap_des_crypt_dma_stop(struct omap_des_dev
*dd
)
514 pr_debug("total: %d\n", dd
->total
);
516 omap_des_dma_stop(dd
);
518 dmaengine_terminate_all(dd
->dma_lch_in
);
519 dmaengine_terminate_all(dd
->dma_lch_out
);
524 static int omap_des_copy_needed(struct scatterlist
*sg
)
527 if (!IS_ALIGNED(sg
->offset
, 4))
529 if (!IS_ALIGNED(sg
->length
, DES_BLOCK_SIZE
))
536 static int omap_des_copy_sgs(struct omap_des_dev
*dd
)
538 void *buf_in
, *buf_out
;
541 pages
= dd
->total
>> PAGE_SHIFT
;
543 if (dd
->total
& (PAGE_SIZE
-1))
548 buf_in
= (void *)__get_free_pages(GFP_ATOMIC
, pages
);
549 buf_out
= (void *)__get_free_pages(GFP_ATOMIC
, pages
);
551 if (!buf_in
|| !buf_out
) {
552 pr_err("Couldn't allocated pages for unaligned cases.\n");
556 dd
->orig_out
= dd
->out_sg
;
558 sg_copy_buf(buf_in
, dd
->in_sg
, 0, dd
->total
, 0);
560 sg_init_table(&dd
->in_sgl
, 1);
561 sg_set_buf(&dd
->in_sgl
, buf_in
, dd
->total
);
562 dd
->in_sg
= &dd
->in_sgl
;
564 sg_init_table(&dd
->out_sgl
, 1);
565 sg_set_buf(&dd
->out_sgl
, buf_out
, dd
->total
);
566 dd
->out_sg
= &dd
->out_sgl
;
571 static int omap_des_handle_queue(struct omap_des_dev
*dd
,
572 struct ablkcipher_request
*req
)
575 return crypto_transfer_request_to_engine(dd
->engine
, req
);
580 static int omap_des_prepare_req(struct crypto_engine
*engine
,
581 struct ablkcipher_request
*req
)
583 struct omap_des_ctx
*ctx
= crypto_ablkcipher_ctx(
584 crypto_ablkcipher_reqtfm(req
));
585 struct omap_des_dev
*dd
= omap_des_find_dev(ctx
);
586 struct omap_des_reqctx
*rctx
;
591 /* assign new request to device */
593 dd
->total
= req
->nbytes
;
594 dd
->total_save
= req
->nbytes
;
595 dd
->in_sg
= req
->src
;
596 dd
->out_sg
= req
->dst
;
598 if (omap_des_copy_needed(dd
->in_sg
) ||
599 omap_des_copy_needed(dd
->out_sg
)) {
600 if (omap_des_copy_sgs(dd
))
601 pr_err("Failed to copy SGs for unaligned cases\n");
607 dd
->in_sg_len
= scatterwalk_bytes_sglen(dd
->in_sg
, dd
->total
);
608 dd
->out_sg_len
= scatterwalk_bytes_sglen(dd
->out_sg
, dd
->total
);
609 BUG_ON(dd
->in_sg_len
< 0 || dd
->out_sg_len
< 0);
611 rctx
= ablkcipher_request_ctx(req
);
612 ctx
= crypto_ablkcipher_ctx(crypto_ablkcipher_reqtfm(req
));
613 rctx
->mode
&= FLAGS_MODE_MASK
;
614 dd
->flags
= (dd
->flags
& ~FLAGS_MODE_MASK
) | rctx
->mode
;
619 return omap_des_write_ctrl(dd
);
622 static int omap_des_crypt_req(struct crypto_engine
*engine
,
623 struct ablkcipher_request
*req
)
625 struct omap_des_ctx
*ctx
= crypto_ablkcipher_ctx(
626 crypto_ablkcipher_reqtfm(req
));
627 struct omap_des_dev
*dd
= omap_des_find_dev(ctx
);
632 return omap_des_crypt_dma_start(dd
);
635 static void omap_des_done_task(unsigned long data
)
637 struct omap_des_dev
*dd
= (struct omap_des_dev
*)data
;
638 void *buf_in
, *buf_out
;
641 pr_debug("enter done_task\n");
644 dma_sync_sg_for_device(dd
->dev
, dd
->out_sg
, dd
->out_sg_len
,
646 dma_unmap_sg(dd
->dev
, dd
->in_sg
, dd
->in_sg_len
, DMA_TO_DEVICE
);
647 dma_unmap_sg(dd
->dev
, dd
->out_sg
, dd
->out_sg_len
,
649 omap_des_crypt_dma_stop(dd
);
652 if (dd
->sgs_copied
) {
653 buf_in
= sg_virt(&dd
->in_sgl
);
654 buf_out
= sg_virt(&dd
->out_sgl
);
656 sg_copy_buf(buf_out
, dd
->orig_out
, 0, dd
->total_save
, 1);
658 pages
= get_order(dd
->total_save
);
659 free_pages((unsigned long)buf_in
, pages
);
660 free_pages((unsigned long)buf_out
, pages
);
663 omap_des_finish_req(dd
, 0);
668 static int omap_des_crypt(struct ablkcipher_request
*req
, unsigned long mode
)
670 struct omap_des_ctx
*ctx
= crypto_ablkcipher_ctx(
671 crypto_ablkcipher_reqtfm(req
));
672 struct omap_des_reqctx
*rctx
= ablkcipher_request_ctx(req
);
673 struct omap_des_dev
*dd
;
675 pr_debug("nbytes: %d, enc: %d, cbc: %d\n", req
->nbytes
,
676 !!(mode
& FLAGS_ENCRYPT
),
677 !!(mode
& FLAGS_CBC
));
679 if (!IS_ALIGNED(req
->nbytes
, DES_BLOCK_SIZE
)) {
680 pr_err("request size is not exact amount of DES blocks\n");
684 dd
= omap_des_find_dev(ctx
);
690 return omap_des_handle_queue(dd
, req
);
693 /* ********************** ALG API ************************************ */
695 static int omap_des_setkey(struct crypto_ablkcipher
*tfm
, const u8
*key
,
698 struct omap_des_ctx
*ctx
= crypto_ablkcipher_ctx(tfm
);
700 if (keylen
!= DES_KEY_SIZE
&& keylen
!= (3*DES_KEY_SIZE
))
703 pr_debug("enter, keylen: %d\n", keylen
);
705 memcpy(ctx
->key
, key
, keylen
);
706 ctx
->keylen
= keylen
;
711 static int omap_des_ecb_encrypt(struct ablkcipher_request
*req
)
713 return omap_des_crypt(req
, FLAGS_ENCRYPT
);
716 static int omap_des_ecb_decrypt(struct ablkcipher_request
*req
)
718 return omap_des_crypt(req
, 0);
721 static int omap_des_cbc_encrypt(struct ablkcipher_request
*req
)
723 return omap_des_crypt(req
, FLAGS_ENCRYPT
| FLAGS_CBC
);
726 static int omap_des_cbc_decrypt(struct ablkcipher_request
*req
)
728 return omap_des_crypt(req
, FLAGS_CBC
);
731 static int omap_des_cra_init(struct crypto_tfm
*tfm
)
735 tfm
->crt_ablkcipher
.reqsize
= sizeof(struct omap_des_reqctx
);
740 static void omap_des_cra_exit(struct crypto_tfm
*tfm
)
745 /* ********************** ALGS ************************************ */
747 static struct crypto_alg algs_ecb_cbc
[] = {
749 .cra_name
= "ecb(des)",
750 .cra_driver_name
= "ecb-des-omap",
752 .cra_flags
= CRYPTO_ALG_TYPE_ABLKCIPHER
|
753 CRYPTO_ALG_KERN_DRIVER_ONLY
|
755 .cra_blocksize
= DES_BLOCK_SIZE
,
756 .cra_ctxsize
= sizeof(struct omap_des_ctx
),
758 .cra_type
= &crypto_ablkcipher_type
,
759 .cra_module
= THIS_MODULE
,
760 .cra_init
= omap_des_cra_init
,
761 .cra_exit
= omap_des_cra_exit
,
762 .cra_u
.ablkcipher
= {
763 .min_keysize
= DES_KEY_SIZE
,
764 .max_keysize
= DES_KEY_SIZE
,
765 .setkey
= omap_des_setkey
,
766 .encrypt
= omap_des_ecb_encrypt
,
767 .decrypt
= omap_des_ecb_decrypt
,
771 .cra_name
= "cbc(des)",
772 .cra_driver_name
= "cbc-des-omap",
774 .cra_flags
= CRYPTO_ALG_TYPE_ABLKCIPHER
|
775 CRYPTO_ALG_KERN_DRIVER_ONLY
|
777 .cra_blocksize
= DES_BLOCK_SIZE
,
778 .cra_ctxsize
= sizeof(struct omap_des_ctx
),
780 .cra_type
= &crypto_ablkcipher_type
,
781 .cra_module
= THIS_MODULE
,
782 .cra_init
= omap_des_cra_init
,
783 .cra_exit
= omap_des_cra_exit
,
784 .cra_u
.ablkcipher
= {
785 .min_keysize
= DES_KEY_SIZE
,
786 .max_keysize
= DES_KEY_SIZE
,
787 .ivsize
= DES_BLOCK_SIZE
,
788 .setkey
= omap_des_setkey
,
789 .encrypt
= omap_des_cbc_encrypt
,
790 .decrypt
= omap_des_cbc_decrypt
,
794 .cra_name
= "ecb(des3_ede)",
795 .cra_driver_name
= "ecb-des3-omap",
797 .cra_flags
= CRYPTO_ALG_TYPE_ABLKCIPHER
|
798 CRYPTO_ALG_KERN_DRIVER_ONLY
|
800 .cra_blocksize
= DES_BLOCK_SIZE
,
801 .cra_ctxsize
= sizeof(struct omap_des_ctx
),
803 .cra_type
= &crypto_ablkcipher_type
,
804 .cra_module
= THIS_MODULE
,
805 .cra_init
= omap_des_cra_init
,
806 .cra_exit
= omap_des_cra_exit
,
807 .cra_u
.ablkcipher
= {
808 .min_keysize
= 3*DES_KEY_SIZE
,
809 .max_keysize
= 3*DES_KEY_SIZE
,
810 .setkey
= omap_des_setkey
,
811 .encrypt
= omap_des_ecb_encrypt
,
812 .decrypt
= omap_des_ecb_decrypt
,
816 .cra_name
= "cbc(des3_ede)",
817 .cra_driver_name
= "cbc-des3-omap",
819 .cra_flags
= CRYPTO_ALG_TYPE_ABLKCIPHER
|
820 CRYPTO_ALG_KERN_DRIVER_ONLY
|
822 .cra_blocksize
= DES_BLOCK_SIZE
,
823 .cra_ctxsize
= sizeof(struct omap_des_ctx
),
825 .cra_type
= &crypto_ablkcipher_type
,
826 .cra_module
= THIS_MODULE
,
827 .cra_init
= omap_des_cra_init
,
828 .cra_exit
= omap_des_cra_exit
,
829 .cra_u
.ablkcipher
= {
830 .min_keysize
= 3*DES_KEY_SIZE
,
831 .max_keysize
= 3*DES_KEY_SIZE
,
832 .ivsize
= DES_BLOCK_SIZE
,
833 .setkey
= omap_des_setkey
,
834 .encrypt
= omap_des_cbc_encrypt
,
835 .decrypt
= omap_des_cbc_decrypt
,
840 static struct omap_des_algs_info omap_des_algs_info_ecb_cbc
[] = {
842 .algs_list
= algs_ecb_cbc
,
843 .size
= ARRAY_SIZE(algs_ecb_cbc
),
848 static const struct omap_des_pdata omap_des_pdata_omap4
= {
849 .algs_info
= omap_des_algs_info_ecb_cbc
,
850 .algs_info_size
= ARRAY_SIZE(omap_des_algs_info_ecb_cbc
),
851 .trigger
= omap_des_dma_trigger_omap4
,
858 .irq_status_ofs
= 0x3c,
859 .irq_enable_ofs
= 0x40,
860 .dma_enable_in
= BIT(5),
861 .dma_enable_out
= BIT(6),
862 .major_mask
= 0x0700,
864 .minor_mask
= 0x003f,
868 static irqreturn_t
omap_des_irq(int irq
, void *dev_id
)
870 struct omap_des_dev
*dd
= dev_id
;
874 status
= omap_des_read(dd
, DES_REG_IRQ_STATUS(dd
));
875 if (status
& DES_REG_IRQ_DATA_IN
) {
876 omap_des_write(dd
, DES_REG_IRQ_ENABLE(dd
), 0x0);
880 BUG_ON(_calc_walked(in
) > dd
->in_sg
->length
);
882 src
= sg_virt(dd
->in_sg
) + _calc_walked(in
);
884 for (i
= 0; i
< DES_BLOCK_WORDS
; i
++) {
885 omap_des_write(dd
, DES_REG_DATA_N(dd
, i
), *src
);
887 scatterwalk_advance(&dd
->in_walk
, 4);
888 if (dd
->in_sg
->length
== _calc_walked(in
)) {
889 dd
->in_sg
= sg_next(dd
->in_sg
);
891 scatterwalk_start(&dd
->in_walk
,
893 src
= sg_virt(dd
->in_sg
) +
901 /* Clear IRQ status */
902 status
&= ~DES_REG_IRQ_DATA_IN
;
903 omap_des_write(dd
, DES_REG_IRQ_STATUS(dd
), status
);
905 /* Enable DATA_OUT interrupt */
906 omap_des_write(dd
, DES_REG_IRQ_ENABLE(dd
), 0x4);
908 } else if (status
& DES_REG_IRQ_DATA_OUT
) {
909 omap_des_write(dd
, DES_REG_IRQ_ENABLE(dd
), 0x0);
913 BUG_ON(_calc_walked(out
) > dd
->out_sg
->length
);
915 dst
= sg_virt(dd
->out_sg
) + _calc_walked(out
);
917 for (i
= 0; i
< DES_BLOCK_WORDS
; i
++) {
918 *dst
= omap_des_read(dd
, DES_REG_DATA_N(dd
, i
));
919 scatterwalk_advance(&dd
->out_walk
, 4);
920 if (dd
->out_sg
->length
== _calc_walked(out
)) {
921 dd
->out_sg
= sg_next(dd
->out_sg
);
923 scatterwalk_start(&dd
->out_walk
,
925 dst
= sg_virt(dd
->out_sg
) +
933 BUG_ON(dd
->total
< DES_BLOCK_SIZE
);
935 dd
->total
-= DES_BLOCK_SIZE
;
937 /* Clear IRQ status */
938 status
&= ~DES_REG_IRQ_DATA_OUT
;
939 omap_des_write(dd
, DES_REG_IRQ_STATUS(dd
), status
);
942 /* All bytes read! */
943 tasklet_schedule(&dd
->done_task
);
945 /* Enable DATA_IN interrupt for next block */
946 omap_des_write(dd
, DES_REG_IRQ_ENABLE(dd
), 0x2);
952 static const struct of_device_id omap_des_of_match
[] = {
954 .compatible
= "ti,omap4-des",
955 .data
= &omap_des_pdata_omap4
,
959 MODULE_DEVICE_TABLE(of
, omap_des_of_match
);
961 static int omap_des_get_of(struct omap_des_dev
*dd
,
962 struct platform_device
*pdev
)
964 const struct of_device_id
*match
;
966 match
= of_match_device(of_match_ptr(omap_des_of_match
), &pdev
->dev
);
968 dev_err(&pdev
->dev
, "no compatible OF match\n");
972 dd
->pdata
= match
->data
;
977 static int omap_des_get_of(struct omap_des_dev
*dd
,
984 static int omap_des_get_pdev(struct omap_des_dev
*dd
,
985 struct platform_device
*pdev
)
987 /* non-DT devices get pdata from pdev */
988 dd
->pdata
= pdev
->dev
.platform_data
;
993 static int omap_des_probe(struct platform_device
*pdev
)
995 struct device
*dev
= &pdev
->dev
;
996 struct omap_des_dev
*dd
;
997 struct crypto_alg
*algp
;
998 struct resource
*res
;
999 int err
= -ENOMEM
, i
, j
, irq
= -1;
1002 dd
= devm_kzalloc(dev
, sizeof(struct omap_des_dev
), GFP_KERNEL
);
1004 dev_err(dev
, "unable to alloc data struct.\n");
1008 platform_set_drvdata(pdev
, dd
);
1010 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1012 dev_err(dev
, "no MEM resource info\n");
1016 err
= (dev
->of_node
) ? omap_des_get_of(dd
, pdev
) :
1017 omap_des_get_pdev(dd
, pdev
);
1021 dd
->io_base
= devm_ioremap_resource(dev
, res
);
1022 if (IS_ERR(dd
->io_base
)) {
1023 err
= PTR_ERR(dd
->io_base
);
1026 dd
->phys_base
= res
->start
;
1028 pm_runtime_enable(dev
);
1029 pm_runtime_irq_safe(dev
);
1030 err
= pm_runtime_get_sync(dev
);
1032 pm_runtime_put_noidle(dev
);
1033 dev_err(dd
->dev
, "%s: failed to get_sync(%d)\n", __func__
, err
);
1037 omap_des_dma_stop(dd
);
1039 reg
= omap_des_read(dd
, DES_REG_REV(dd
));
1041 pm_runtime_put_sync(dev
);
1043 dev_info(dev
, "OMAP DES hw accel rev: %u.%u\n",
1044 (reg
& dd
->pdata
->major_mask
) >> dd
->pdata
->major_shift
,
1045 (reg
& dd
->pdata
->minor_mask
) >> dd
->pdata
->minor_shift
);
1047 tasklet_init(&dd
->done_task
, omap_des_done_task
, (unsigned long)dd
);
1049 err
= omap_des_dma_init(dd
);
1050 if (err
== -EPROBE_DEFER
) {
1052 } else if (err
&& DES_REG_IRQ_STATUS(dd
) && DES_REG_IRQ_ENABLE(dd
)) {
1055 irq
= platform_get_irq(pdev
, 0);
1057 dev_err(dev
, "can't get IRQ resource\n");
1061 err
= devm_request_irq(dev
, irq
, omap_des_irq
, 0,
1064 dev_err(dev
, "Unable to grab omap-des IRQ\n");
1070 INIT_LIST_HEAD(&dd
->list
);
1071 spin_lock(&list_lock
);
1072 list_add_tail(&dd
->list
, &dev_list
);
1073 spin_unlock(&list_lock
);
1075 for (i
= 0; i
< dd
->pdata
->algs_info_size
; i
++) {
1076 for (j
= 0; j
< dd
->pdata
->algs_info
[i
].size
; j
++) {
1077 algp
= &dd
->pdata
->algs_info
[i
].algs_list
[j
];
1079 pr_debug("reg alg: %s\n", algp
->cra_name
);
1080 INIT_LIST_HEAD(&algp
->cra_list
);
1082 err
= crypto_register_alg(algp
);
1086 dd
->pdata
->algs_info
[i
].registered
++;
1090 /* Initialize des crypto engine */
1091 dd
->engine
= crypto_engine_alloc_init(dev
, 1);
1095 dd
->engine
->prepare_request
= omap_des_prepare_req
;
1096 dd
->engine
->crypt_one_request
= omap_des_crypt_req
;
1097 err
= crypto_engine_start(dd
->engine
);
1104 crypto_engine_exit(dd
->engine
);
1106 for (i
= dd
->pdata
->algs_info_size
- 1; i
>= 0; i
--)
1107 for (j
= dd
->pdata
->algs_info
[i
].registered
- 1; j
>= 0; j
--)
1108 crypto_unregister_alg(
1109 &dd
->pdata
->algs_info
[i
].algs_list
[j
]);
1111 omap_des_dma_cleanup(dd
);
1113 tasklet_kill(&dd
->done_task
);
1115 pm_runtime_disable(dev
);
1119 dev_err(dev
, "initialization failed.\n");
1123 static int omap_des_remove(struct platform_device
*pdev
)
1125 struct omap_des_dev
*dd
= platform_get_drvdata(pdev
);
1131 spin_lock(&list_lock
);
1132 list_del(&dd
->list
);
1133 spin_unlock(&list_lock
);
1135 for (i
= dd
->pdata
->algs_info_size
- 1; i
>= 0; i
--)
1136 for (j
= dd
->pdata
->algs_info
[i
].registered
- 1; j
>= 0; j
--)
1137 crypto_unregister_alg(
1138 &dd
->pdata
->algs_info
[i
].algs_list
[j
]);
1140 tasklet_kill(&dd
->done_task
);
1141 omap_des_dma_cleanup(dd
);
1142 pm_runtime_disable(dd
->dev
);
1148 #ifdef CONFIG_PM_SLEEP
1149 static int omap_des_suspend(struct device
*dev
)
1151 pm_runtime_put_sync(dev
);
1155 static int omap_des_resume(struct device
*dev
)
1159 err
= pm_runtime_get_sync(dev
);
1161 pm_runtime_put_noidle(dev
);
1162 dev_err(dev
, "%s: failed to get_sync(%d)\n", __func__
, err
);
1169 static SIMPLE_DEV_PM_OPS(omap_des_pm_ops
, omap_des_suspend
, omap_des_resume
);
1171 static struct platform_driver omap_des_driver
= {
1172 .probe
= omap_des_probe
,
1173 .remove
= omap_des_remove
,
1176 .pm
= &omap_des_pm_ops
,
1177 .of_match_table
= of_match_ptr(omap_des_of_match
),
1181 module_platform_driver(omap_des_driver
);
1183 MODULE_DESCRIPTION("OMAP DES hw acceleration support.");
1184 MODULE_LICENSE("GPL v2");
1185 MODULE_AUTHOR("Joel Fernandes <joelf@ti.com>");