4 * Support for VIA PadLock hardware crypto engine.
6 * Copyright (c) 2004 Michal Ludvig <michal@logix.cz>
8 * Key expansion routine taken from crypto/aes.c
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * ---------------------------------------------------------------------------
16 * Copyright (c) 2002, Dr Brian Gladman <brg@gladman.me.uk>, Worcester, UK.
17 * All rights reserved.
21 * The free distribution and use of this software in both source and binary
22 * form is allowed (with or without changes) provided that:
24 * 1. distributions of this source code include the above copyright
25 * notice, this list of conditions and the following disclaimer;
27 * 2. distributions in binary form include the above copyright
28 * notice, this list of conditions and the following disclaimer
29 * in the documentation and/or other associated materials;
31 * 3. the copyright holder's name is not used to endorse products
32 * built using this software without specific written permission.
34 * ALTERNATIVELY, provided that this notice is retained in full, this product
35 * may be distributed under the terms of the GNU General Public License (GPL),
36 * in which case the provisions of the GPL apply INSTEAD OF those given above.
40 * This software is provided 'as is' with no explicit or implied warranties
41 * in respect of its properties, including, but not limited to, correctness
42 * and/or fitness for purpose.
43 * ---------------------------------------------------------------------------
46 #include <linux/module.h>
47 #include <linux/init.h>
48 #include <linux/types.h>
49 #include <linux/errno.h>
50 #include <linux/crypto.h>
51 #include <linux/interrupt.h>
52 #include <linux/kernel.h>
53 #include <asm/byteorder.h>
56 #define AES_MIN_KEY_SIZE 16 /* in uint8_t units */
57 #define AES_MAX_KEY_SIZE 32 /* ditto */
58 #define AES_BLOCK_SIZE 16 /* ditto */
59 #define AES_EXTENDED_KEY_SIZE 64 /* in uint32_t units */
60 #define AES_EXTENDED_KEY_SIZE_B (AES_EXTENDED_KEY_SIZE * sizeof(uint32_t))
64 unsigned int __attribute__ ((__packed__
))
71 } __attribute__ ((__aligned__(PADLOCK_ALIGNMENT
)));
73 /* Whenever making any changes to the following
74 * structure *make sure* you keep E, d_data
75 * and cword aligned on 16 Bytes boundaries!!! */
83 u32 E
[AES_EXTENDED_KEY_SIZE
]
84 __attribute__ ((__aligned__(PADLOCK_ALIGNMENT
)));
85 u32 d_data
[AES_EXTENDED_KEY_SIZE
]
86 __attribute__ ((__aligned__(PADLOCK_ALIGNMENT
)));
89 /* ====== Key management routines ====== */
91 static inline uint32_t
92 generic_rotr32 (const uint32_t x
, const unsigned bits
)
94 const unsigned n
= bits
% 32;
95 return (x
>> n
) | (x
<< (32 - n
));
98 static inline uint32_t
99 generic_rotl32 (const uint32_t x
, const unsigned bits
)
101 const unsigned n
= bits
% 32;
102 return (x
<< n
) | (x
>> (32 - n
));
105 #define rotl generic_rotl32
106 #define rotr generic_rotr32
109 * #define byte(x, nr) ((unsigned char)((x) >> (nr*8)))
111 static inline uint8_t
112 byte(const uint32_t x
, const unsigned n
)
114 return x
>> (n
<< 3);
120 static uint8_t pow_tab
[256];
121 static uint8_t log_tab
[256];
122 static uint8_t sbx_tab
[256];
123 static uint8_t isb_tab
[256];
124 static uint32_t rco_tab
[10];
125 static uint32_t ft_tab
[4][256];
126 static uint32_t it_tab
[4][256];
128 static uint32_t fl_tab
[4][256];
129 static uint32_t il_tab
[4][256];
131 static inline uint8_t
132 f_mult (uint8_t a
, uint8_t b
)
134 uint8_t aa
= log_tab
[a
], cc
= aa
+ log_tab
[b
];
136 return pow_tab
[cc
+ (cc
< aa
? 1 : 0)];
139 #define ff_mult(a,b) (a && b ? f_mult(a, b) : 0)
141 #define f_rn(bo, bi, n, k) \
142 bo[n] = ft_tab[0][byte(bi[n],0)] ^ \
143 ft_tab[1][byte(bi[(n + 1) & 3],1)] ^ \
144 ft_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
145 ft_tab[3][byte(bi[(n + 3) & 3],3)] ^ *(k + n)
147 #define i_rn(bo, bi, n, k) \
148 bo[n] = it_tab[0][byte(bi[n],0)] ^ \
149 it_tab[1][byte(bi[(n + 3) & 3],1)] ^ \
150 it_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
151 it_tab[3][byte(bi[(n + 1) & 3],3)] ^ *(k + n)
154 ( fl_tab[0][byte(x, 0)] ^ \
155 fl_tab[1][byte(x, 1)] ^ \
156 fl_tab[2][byte(x, 2)] ^ \
157 fl_tab[3][byte(x, 3)] )
159 #define f_rl(bo, bi, n, k) \
160 bo[n] = fl_tab[0][byte(bi[n],0)] ^ \
161 fl_tab[1][byte(bi[(n + 1) & 3],1)] ^ \
162 fl_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
163 fl_tab[3][byte(bi[(n + 3) & 3],3)] ^ *(k + n)
165 #define i_rl(bo, bi, n, k) \
166 bo[n] = il_tab[0][byte(bi[n],0)] ^ \
167 il_tab[1][byte(bi[(n + 3) & 3],1)] ^ \
168 il_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
169 il_tab[3][byte(bi[(n + 1) & 3],3)] ^ *(k + n)
177 /* log and power tables for GF(2**8) finite field with
178 0x011b as modular polynomial - the simplest prmitive
179 root is 0x03, used here to generate the tables */
181 for (i
= 0, p
= 1; i
< 256; ++i
) {
182 pow_tab
[i
] = (uint8_t) p
;
183 log_tab
[p
] = (uint8_t) i
;
185 p
^= (p
<< 1) ^ (p
& 0x80 ? 0x01b : 0);
190 for (i
= 0, p
= 1; i
< 10; ++i
) {
193 p
= (p
<< 1) ^ (p
& 0x80 ? 0x01b : 0);
196 for (i
= 0; i
< 256; ++i
) {
197 p
= (i
? pow_tab
[255 - log_tab
[i
]] : 0);
198 q
= ((p
>> 7) | (p
<< 1)) ^ ((p
>> 6) | (p
<< 2));
199 p
^= 0x63 ^ q
^ ((q
>> 6) | (q
<< 2));
201 isb_tab
[p
] = (uint8_t) i
;
204 for (i
= 0; i
< 256; ++i
) {
209 fl_tab
[1][i
] = rotl (t
, 8);
210 fl_tab
[2][i
] = rotl (t
, 16);
211 fl_tab
[3][i
] = rotl (t
, 24);
213 t
= ((uint32_t) ff_mult (2, p
)) |
214 ((uint32_t) p
<< 8) |
215 ((uint32_t) p
<< 16) | ((uint32_t) ff_mult (3, p
) << 24);
218 ft_tab
[1][i
] = rotl (t
, 8);
219 ft_tab
[2][i
] = rotl (t
, 16);
220 ft_tab
[3][i
] = rotl (t
, 24);
226 il_tab
[1][i
] = rotl (t
, 8);
227 il_tab
[2][i
] = rotl (t
, 16);
228 il_tab
[3][i
] = rotl (t
, 24);
230 t
= ((uint32_t) ff_mult (14, p
)) |
231 ((uint32_t) ff_mult (9, p
) << 8) |
232 ((uint32_t) ff_mult (13, p
) << 16) |
233 ((uint32_t) ff_mult (11, p
) << 24);
236 it_tab
[1][i
] = rotl (t
, 8);
237 it_tab
[2][i
] = rotl (t
, 16);
238 it_tab
[3][i
] = rotl (t
, 24);
242 #define star_x(x) (((x) & 0x7f7f7f7f) << 1) ^ ((((x) & 0x80808080) >> 7) * 0x1b)
244 #define imix_col(y,x) \
250 (y) ^= rotr(u ^ t, 8) ^ \
254 /* initialise the key schedule from the user supplied key */
257 { t = rotr(t, 8); t = ls_box(t) ^ rco_tab[i]; \
258 t ^= E_KEY[4 * i]; E_KEY[4 * i + 4] = t; \
259 t ^= E_KEY[4 * i + 1]; E_KEY[4 * i + 5] = t; \
260 t ^= E_KEY[4 * i + 2]; E_KEY[4 * i + 6] = t; \
261 t ^= E_KEY[4 * i + 3]; E_KEY[4 * i + 7] = t; \
265 { t = rotr(t, 8); t = ls_box(t) ^ rco_tab[i]; \
266 t ^= E_KEY[6 * i]; E_KEY[6 * i + 6] = t; \
267 t ^= E_KEY[6 * i + 1]; E_KEY[6 * i + 7] = t; \
268 t ^= E_KEY[6 * i + 2]; E_KEY[6 * i + 8] = t; \
269 t ^= E_KEY[6 * i + 3]; E_KEY[6 * i + 9] = t; \
270 t ^= E_KEY[6 * i + 4]; E_KEY[6 * i + 10] = t; \
271 t ^= E_KEY[6 * i + 5]; E_KEY[6 * i + 11] = t; \
275 { t = rotr(t, 8); ; t = ls_box(t) ^ rco_tab[i]; \
276 t ^= E_KEY[8 * i]; E_KEY[8 * i + 8] = t; \
277 t ^= E_KEY[8 * i + 1]; E_KEY[8 * i + 9] = t; \
278 t ^= E_KEY[8 * i + 2]; E_KEY[8 * i + 10] = t; \
279 t ^= E_KEY[8 * i + 3]; E_KEY[8 * i + 11] = t; \
280 t = E_KEY[8 * i + 4] ^ ls_box(t); \
281 E_KEY[8 * i + 12] = t; \
282 t ^= E_KEY[8 * i + 5]; E_KEY[8 * i + 13] = t; \
283 t ^= E_KEY[8 * i + 6]; E_KEY[8 * i + 14] = t; \
284 t ^= E_KEY[8 * i + 7]; E_KEY[8 * i + 15] = t; \
287 /* Tells whether the ACE is capable to generate
288 the extended key for a given key_len. */
290 aes_hw_extkey_available(uint8_t key_len
)
292 /* TODO: We should check the actual CPU model/stepping
293 as it's possible that the capability will be
294 added in the next CPU revisions. */
300 static inline struct aes_ctx
*aes_ctx(struct crypto_tfm
*tfm
)
302 unsigned long addr
= (unsigned long)crypto_tfm_ctx(tfm
);
303 unsigned long align
= PADLOCK_ALIGNMENT
;
305 if (align
<= crypto_tfm_ctx_alignment())
307 return (struct aes_ctx
*)ALIGN(addr
, align
);
310 static int aes_set_key(struct crypto_tfm
*tfm
, const u8
*in_key
,
311 unsigned int key_len
, u32
*flags
)
313 struct aes_ctx
*ctx
= aes_ctx(tfm
);
314 const __le32
*key
= (const __le32
*)in_key
;
315 uint32_t i
, t
, u
, v
, w
;
316 uint32_t P
[AES_EXTENDED_KEY_SIZE
];
319 if (key_len
!= 16 && key_len
!= 24 && key_len
!= 32) {
320 *flags
|= CRYPTO_TFM_RES_BAD_KEY_LEN
;
324 ctx
->key_length
= key_len
;
327 * If the hardware is capable of generating the extended key
328 * itself we must supply the plain key for both encryption
333 E_KEY
[0] = le32_to_cpu(key
[0]);
334 E_KEY
[1] = le32_to_cpu(key
[1]);
335 E_KEY
[2] = le32_to_cpu(key
[2]);
336 E_KEY
[3] = le32_to_cpu(key
[3]);
338 /* Prepare control words. */
339 memset(&ctx
->cword
, 0, sizeof(ctx
->cword
));
341 ctx
->cword
.decrypt
.encdec
= 1;
342 ctx
->cword
.encrypt
.rounds
= 10 + (key_len
- 16) / 4;
343 ctx
->cword
.decrypt
.rounds
= ctx
->cword
.encrypt
.rounds
;
344 ctx
->cword
.encrypt
.ksize
= (key_len
- 16) / 8;
345 ctx
->cword
.decrypt
.ksize
= ctx
->cword
.encrypt
.ksize
;
347 /* Don't generate extended keys if the hardware can do it. */
348 if (aes_hw_extkey_available(key_len
))
351 ctx
->D
= ctx
->d_data
;
352 ctx
->cword
.encrypt
.keygen
= 1;
353 ctx
->cword
.decrypt
.keygen
= 1;
358 for (i
= 0; i
< 10; ++i
)
363 E_KEY
[4] = le32_to_cpu(key
[4]);
364 t
= E_KEY
[5] = le32_to_cpu(key
[5]);
365 for (i
= 0; i
< 8; ++i
)
370 E_KEY
[4] = le32_to_cpu(key
[4]);
371 E_KEY
[5] = le32_to_cpu(key
[5]);
372 E_KEY
[6] = le32_to_cpu(key
[6]);
373 t
= E_KEY
[7] = le32_to_cpu(key
[7]);
374 for (i
= 0; i
< 7; ++i
)
384 for (i
= 4; i
< key_len
+ 24; ++i
) {
385 imix_col (D_KEY
[i
], E_KEY
[i
]);
388 /* PadLock needs a different format of the decryption key. */
389 rounds
= 10 + (key_len
- 16) / 4;
391 for (i
= 0; i
< rounds
; i
++) {
392 P
[((i
+ 1) * 4) + 0] = D_KEY
[((rounds
- i
- 1) * 4) + 0];
393 P
[((i
+ 1) * 4) + 1] = D_KEY
[((rounds
- i
- 1) * 4) + 1];
394 P
[((i
+ 1) * 4) + 2] = D_KEY
[((rounds
- i
- 1) * 4) + 2];
395 P
[((i
+ 1) * 4) + 3] = D_KEY
[((rounds
- i
- 1) * 4) + 3];
398 P
[0] = E_KEY
[(rounds
* 4) + 0];
399 P
[1] = E_KEY
[(rounds
* 4) + 1];
400 P
[2] = E_KEY
[(rounds
* 4) + 2];
401 P
[3] = E_KEY
[(rounds
* 4) + 3];
403 memcpy(D_KEY
, P
, AES_EXTENDED_KEY_SIZE_B
);
408 /* ====== Encryption/decryption routines ====== */
410 /* These are the real call to PadLock. */
411 static inline void padlock_xcrypt_ecb(const u8
*input
, u8
*output
, void *key
,
412 void *control_word
, u32 count
)
414 asm volatile ("pushfl; popfl"); /* enforce key reload. */
415 asm volatile (".byte 0xf3,0x0f,0xa7,0xc8" /* rep xcryptecb */
416 : "+S"(input
), "+D"(output
)
417 : "d"(control_word
), "b"(key
), "c"(count
));
420 static inline u8
*padlock_xcrypt_cbc(const u8
*input
, u8
*output
, void *key
,
421 u8
*iv
, void *control_word
, u32 count
)
423 /* Enforce key reload. */
424 asm volatile ("pushfl; popfl");
426 asm volatile (".byte 0xf3,0x0f,0xa7,0xd0"
427 : "+S" (input
), "+D" (output
), "+a" (iv
)
428 : "d" (control_word
), "b" (key
), "c" (count
));
432 static void aes_encrypt(struct crypto_tfm
*tfm
, u8
*out
, const u8
*in
)
434 struct aes_ctx
*ctx
= aes_ctx(tfm
);
435 padlock_xcrypt_ecb(in
, out
, ctx
->E
, &ctx
->cword
.encrypt
, 1);
438 static void aes_decrypt(struct crypto_tfm
*tfm
, u8
*out
, const u8
*in
)
440 struct aes_ctx
*ctx
= aes_ctx(tfm
);
441 padlock_xcrypt_ecb(in
, out
, ctx
->D
, &ctx
->cword
.decrypt
, 1);
444 static unsigned int aes_encrypt_ecb(const struct cipher_desc
*desc
, u8
*out
,
445 const u8
*in
, unsigned int nbytes
)
447 struct aes_ctx
*ctx
= aes_ctx(desc
->tfm
);
448 padlock_xcrypt_ecb(in
, out
, ctx
->E
, &ctx
->cword
.encrypt
,
449 nbytes
/ AES_BLOCK_SIZE
);
450 return nbytes
& ~(AES_BLOCK_SIZE
- 1);
453 static unsigned int aes_decrypt_ecb(const struct cipher_desc
*desc
, u8
*out
,
454 const u8
*in
, unsigned int nbytes
)
456 struct aes_ctx
*ctx
= aes_ctx(desc
->tfm
);
457 padlock_xcrypt_ecb(in
, out
, ctx
->D
, &ctx
->cword
.decrypt
,
458 nbytes
/ AES_BLOCK_SIZE
);
459 return nbytes
& ~(AES_BLOCK_SIZE
- 1);
462 static unsigned int aes_encrypt_cbc(const struct cipher_desc
*desc
, u8
*out
,
463 const u8
*in
, unsigned int nbytes
)
465 struct aes_ctx
*ctx
= aes_ctx(desc
->tfm
);
468 iv
= padlock_xcrypt_cbc(in
, out
, ctx
->E
, desc
->info
,
469 &ctx
->cword
.encrypt
, nbytes
/ AES_BLOCK_SIZE
);
470 memcpy(desc
->info
, iv
, AES_BLOCK_SIZE
);
472 return nbytes
& ~(AES_BLOCK_SIZE
- 1);
475 static unsigned int aes_decrypt_cbc(const struct cipher_desc
*desc
, u8
*out
,
476 const u8
*in
, unsigned int nbytes
)
478 struct aes_ctx
*ctx
= aes_ctx(desc
->tfm
);
479 padlock_xcrypt_cbc(in
, out
, ctx
->D
, desc
->info
, &ctx
->cword
.decrypt
,
480 nbytes
/ AES_BLOCK_SIZE
);
481 return nbytes
& ~(AES_BLOCK_SIZE
- 1);
484 static struct crypto_alg aes_alg
= {
486 .cra_driver_name
= "aes-padlock",
487 .cra_priority
= PADLOCK_CRA_PRIORITY
,
488 .cra_flags
= CRYPTO_ALG_TYPE_CIPHER
,
489 .cra_blocksize
= AES_BLOCK_SIZE
,
490 .cra_ctxsize
= sizeof(struct aes_ctx
),
491 .cra_alignmask
= PADLOCK_ALIGNMENT
- 1,
492 .cra_module
= THIS_MODULE
,
493 .cra_list
= LIST_HEAD_INIT(aes_alg
.cra_list
),
496 .cia_min_keysize
= AES_MIN_KEY_SIZE
,
497 .cia_max_keysize
= AES_MAX_KEY_SIZE
,
498 .cia_setkey
= aes_set_key
,
499 .cia_encrypt
= aes_encrypt
,
500 .cia_decrypt
= aes_decrypt
,
501 .cia_encrypt_ecb
= aes_encrypt_ecb
,
502 .cia_decrypt_ecb
= aes_decrypt_ecb
,
503 .cia_encrypt_cbc
= aes_encrypt_cbc
,
504 .cia_decrypt_cbc
= aes_decrypt_cbc
,
509 static int __init
padlock_init(void)
513 if (!cpu_has_xcrypt
) {
514 printk(KERN_ERR PFX
"VIA PadLock not detected.\n");
518 if (!cpu_has_xcrypt_enabled
) {
519 printk(KERN_ERR PFX
"VIA PadLock detected, but not enabled. Hmm, strange...\n");
524 if ((ret
= crypto_register_alg(&aes_alg
))) {
525 printk(KERN_ERR PFX
"VIA PadLock AES initialization failed.\n");
529 printk(KERN_NOTICE PFX
"Using VIA PadLock ACE for AES algorithm.\n");
534 static void __exit
padlock_fini(void)
536 crypto_unregister_alg(&aes_alg
);
539 module_init(padlock_init
);
540 module_exit(padlock_fini
);
542 MODULE_DESCRIPTION("VIA PadLock AES algorithm support");
543 MODULE_LICENSE("GPL");
544 MODULE_AUTHOR("Michal Ludvig");
546 MODULE_ALIAS("aes-padlock");
548 /* This module used to be called padlock. */
549 MODULE_ALIAS("padlock");