crypto: rockchip - add crypto driver for rk3288
[deliverable/linux.git] / drivers / crypto / rockchip / rk3288_crypto.h
1 #ifndef __RK3288_CRYPTO_H__
2 #define __RK3288_CRYPTO_H__
3
4 #include <crypto/aes.h>
5 #include <crypto/des.h>
6 #include <crypto/algapi.h>
7 #include <linux/interrupt.h>
8 #include <linux/delay.h>
9
10 #define _SBF(v, f) ((v) << (f))
11
12 /* Crypto control registers*/
13 #define RK_CRYPTO_INTSTS 0x0000
14 #define RK_CRYPTO_PKA_DONE_INT BIT(5)
15 #define RK_CRYPTO_HASH_DONE_INT BIT(4)
16 #define RK_CRYPTO_HRDMA_ERR_INT BIT(3)
17 #define RK_CRYPTO_HRDMA_DONE_INT BIT(2)
18 #define RK_CRYPTO_BCDMA_ERR_INT BIT(1)
19 #define RK_CRYPTO_BCDMA_DONE_INT BIT(0)
20
21 #define RK_CRYPTO_INTENA 0x0004
22 #define RK_CRYPTO_PKA_DONE_ENA BIT(5)
23 #define RK_CRYPTO_HASH_DONE_ENA BIT(4)
24 #define RK_CRYPTO_HRDMA_ERR_ENA BIT(3)
25 #define RK_CRYPTO_HRDMA_DONE_ENA BIT(2)
26 #define RK_CRYPTO_BCDMA_ERR_ENA BIT(1)
27 #define RK_CRYPTO_BCDMA_DONE_ENA BIT(0)
28
29 #define RK_CRYPTO_CTRL 0x0008
30 #define RK_CRYPTO_WRITE_MASK _SBF(0xFFFF, 16)
31 #define RK_CRYPTO_TRNG_FLUSH BIT(9)
32 #define RK_CRYPTO_TRNG_START BIT(8)
33 #define RK_CRYPTO_PKA_FLUSH BIT(7)
34 #define RK_CRYPTO_HASH_FLUSH BIT(6)
35 #define RK_CRYPTO_BLOCK_FLUSH BIT(5)
36 #define RK_CRYPTO_PKA_START BIT(4)
37 #define RK_CRYPTO_HASH_START BIT(3)
38 #define RK_CRYPTO_BLOCK_START BIT(2)
39 #define RK_CRYPTO_TDES_START BIT(1)
40 #define RK_CRYPTO_AES_START BIT(0)
41
42 #define RK_CRYPTO_CONF 0x000c
43 /* HASH Receive DMA Address Mode: fix | increment */
44 #define RK_CRYPTO_HR_ADDR_MODE BIT(8)
45 /* Block Transmit DMA Address Mode: fix | increment */
46 #define RK_CRYPTO_BT_ADDR_MODE BIT(7)
47 /* Block Receive DMA Address Mode: fix | increment */
48 #define RK_CRYPTO_BR_ADDR_MODE BIT(6)
49 #define RK_CRYPTO_BYTESWAP_HRFIFO BIT(5)
50 #define RK_CRYPTO_BYTESWAP_BTFIFO BIT(4)
51 #define RK_CRYPTO_BYTESWAP_BRFIFO BIT(3)
52 /* AES = 0 OR DES = 1 */
53 #define RK_CRYPTO_DESSEL BIT(2)
54 #define RK_CYYPTO_HASHINSEL_INDEPENDENT_SOURCE _SBF(0x00, 0)
55 #define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_INPUT _SBF(0x01, 0)
56 #define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_OUTPUT _SBF(0x02, 0)
57
58 /* Block Receiving DMA Start Address Register */
59 #define RK_CRYPTO_BRDMAS 0x0010
60 /* Block Transmitting DMA Start Address Register */
61 #define RK_CRYPTO_BTDMAS 0x0014
62 /* Block Receiving DMA Length Register */
63 #define RK_CRYPTO_BRDMAL 0x0018
64 /* Hash Receiving DMA Start Address Register */
65 #define RK_CRYPTO_HRDMAS 0x001c
66 /* Hash Receiving DMA Length Register */
67 #define RK_CRYPTO_HRDMAL 0x0020
68
69 /* AES registers */
70 #define RK_CRYPTO_AES_CTRL 0x0080
71 #define RK_CRYPTO_AES_BYTESWAP_CNT BIT(11)
72 #define RK_CRYPTO_AES_BYTESWAP_KEY BIT(10)
73 #define RK_CRYPTO_AES_BYTESWAP_IV BIT(9)
74 #define RK_CRYPTO_AES_BYTESWAP_DO BIT(8)
75 #define RK_CRYPTO_AES_BYTESWAP_DI BIT(7)
76 #define RK_CRYPTO_AES_KEY_CHANGE BIT(6)
77 #define RK_CRYPTO_AES_ECB_MODE _SBF(0x00, 4)
78 #define RK_CRYPTO_AES_CBC_MODE _SBF(0x01, 4)
79 #define RK_CRYPTO_AES_CTR_MODE _SBF(0x02, 4)
80 #define RK_CRYPTO_AES_128BIT_key _SBF(0x00, 2)
81 #define RK_CRYPTO_AES_192BIT_key _SBF(0x01, 2)
82 #define RK_CRYPTO_AES_256BIT_key _SBF(0x02, 2)
83 /* Slave = 0 / fifo = 1 */
84 #define RK_CRYPTO_AES_FIFO_MODE BIT(1)
85 /* Encryption = 0 , Decryption = 1 */
86 #define RK_CRYPTO_AES_DEC BIT(0)
87
88 #define RK_CRYPTO_AES_STS 0x0084
89 #define RK_CRYPTO_AES_DONE BIT(0)
90
91 /* AES Input Data 0-3 Register */
92 #define RK_CRYPTO_AES_DIN_0 0x0088
93 #define RK_CRYPTO_AES_DIN_1 0x008c
94 #define RK_CRYPTO_AES_DIN_2 0x0090
95 #define RK_CRYPTO_AES_DIN_3 0x0094
96
97 /* AES output Data 0-3 Register */
98 #define RK_CRYPTO_AES_DOUT_0 0x0098
99 #define RK_CRYPTO_AES_DOUT_1 0x009c
100 #define RK_CRYPTO_AES_DOUT_2 0x00a0
101 #define RK_CRYPTO_AES_DOUT_3 0x00a4
102
103 /* AES IV Data 0-3 Register */
104 #define RK_CRYPTO_AES_IV_0 0x00a8
105 #define RK_CRYPTO_AES_IV_1 0x00ac
106 #define RK_CRYPTO_AES_IV_2 0x00b0
107 #define RK_CRYPTO_AES_IV_3 0x00b4
108
109 /* AES Key Data 0-3 Register */
110 #define RK_CRYPTO_AES_KEY_0 0x00b8
111 #define RK_CRYPTO_AES_KEY_1 0x00bc
112 #define RK_CRYPTO_AES_KEY_2 0x00c0
113 #define RK_CRYPTO_AES_KEY_3 0x00c4
114 #define RK_CRYPTO_AES_KEY_4 0x00c8
115 #define RK_CRYPTO_AES_KEY_5 0x00cc
116 #define RK_CRYPTO_AES_KEY_6 0x00d0
117 #define RK_CRYPTO_AES_KEY_7 0x00d4
118
119 /* des/tdes */
120 #define RK_CRYPTO_TDES_CTRL 0x0100
121 #define RK_CRYPTO_TDES_BYTESWAP_KEY BIT(8)
122 #define RK_CRYPTO_TDES_BYTESWAP_IV BIT(7)
123 #define RK_CRYPTO_TDES_BYTESWAP_DO BIT(6)
124 #define RK_CRYPTO_TDES_BYTESWAP_DI BIT(5)
125 /* 0: ECB, 1: CBC */
126 #define RK_CRYPTO_TDES_CHAINMODE_CBC BIT(4)
127 /* TDES Key Mode, 0 : EDE, 1 : EEE */
128 #define RK_CRYPTO_TDES_EEE BIT(3)
129 /* 0: DES, 1:TDES */
130 #define RK_CRYPTO_TDES_SELECT BIT(2)
131 /* 0: Slave, 1:Fifo */
132 #define RK_CRYPTO_TDES_FIFO_MODE BIT(1)
133 /* Encryption = 0 , Decryption = 1 */
134 #define RK_CRYPTO_TDES_DEC BIT(0)
135
136 #define RK_CRYPTO_TDES_STS 0x0104
137 #define RK_CRYPTO_TDES_DONE BIT(0)
138
139 #define RK_CRYPTO_TDES_DIN_0 0x0108
140 #define RK_CRYPTO_TDES_DIN_1 0x010c
141 #define RK_CRYPTO_TDES_DOUT_0 0x0110
142 #define RK_CRYPTO_TDES_DOUT_1 0x0114
143 #define RK_CRYPTO_TDES_IV_0 0x0118
144 #define RK_CRYPTO_TDES_IV_1 0x011c
145 #define RK_CRYPTO_TDES_KEY1_0 0x0120
146 #define RK_CRYPTO_TDES_KEY1_1 0x0124
147 #define RK_CRYPTO_TDES_KEY2_0 0x0128
148 #define RK_CRYPTO_TDES_KEY2_1 0x012c
149 #define RK_CRYPTO_TDES_KEY3_0 0x0130
150 #define RK_CRYPTO_TDES_KEY3_1 0x0134
151
152 #define CRYPTO_READ(dev, offset) \
153 readl_relaxed(((dev)->reg + (offset)))
154 #define CRYPTO_WRITE(dev, offset, val) \
155 writel_relaxed((val), ((dev)->reg + (offset)))
156
157 struct rk_crypto_info {
158 struct device *dev;
159 struct clk *aclk;
160 struct clk *hclk;
161 struct clk *sclk;
162 struct clk *dmaclk;
163 struct reset_control *rst;
164 void __iomem *reg;
165 int irq;
166 struct crypto_queue queue;
167 struct tasklet_struct crypto_tasklet;
168 struct ablkcipher_request *ablk_req;
169 /* device lock */
170 spinlock_t lock;
171
172 /* the public variable */
173 struct scatterlist *sg_src;
174 struct scatterlist *sg_dst;
175 struct scatterlist sg_tmp;
176 struct scatterlist *first;
177 unsigned int left_bytes;
178 void *addr_vir;
179 int aligned;
180 int align_size;
181 size_t nents;
182 unsigned int total;
183 unsigned int count;
184 u32 mode;
185 dma_addr_t addr_in;
186 dma_addr_t addr_out;
187 int (*start)(struct rk_crypto_info *dev);
188 int (*update)(struct rk_crypto_info *dev);
189 void (*complete)(struct rk_crypto_info *dev, int err);
190 int (*enable_clk)(struct rk_crypto_info *dev);
191 void (*disable_clk)(struct rk_crypto_info *dev);
192 int (*load_data)(struct rk_crypto_info *dev,
193 struct scatterlist *sg_src,
194 struct scatterlist *sg_dst);
195 void (*unload_data)(struct rk_crypto_info *dev);
196 };
197
198 /* the private variable of cipher */
199 struct rk_cipher_ctx {
200 struct rk_crypto_info *dev;
201 unsigned int keylen;
202 };
203
204 struct rk_crypto_tmp {
205 struct rk_crypto_info *dev;
206 struct crypto_alg alg;
207 };
208
209 extern struct rk_crypto_tmp rk_ecb_aes_alg;
210 extern struct rk_crypto_tmp rk_cbc_aes_alg;
211 extern struct rk_crypto_tmp rk_ecb_des_alg;
212 extern struct rk_crypto_tmp rk_cbc_des_alg;
213 extern struct rk_crypto_tmp rk_ecb_des3_ede_alg;
214 extern struct rk_crypto_tmp rk_cbc_des3_ede_alg;
215
216 #endif
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