drivers/dma/Kconfig

   1 #
   2 # DMA engine configuration
   3 #
   4
   5 menuconfig DMADEVICES
   6         bool "DMA Engine support"
   7         depends on HAS_DMA
   8         help
   9           DMA engines can do asynchronous data transfers without
  10           involving the host CPU.  Currently, this framework can be
  11           used to offload memory copies in the network stack and
  12           RAID operations in the MD driver.  This menu only presents
  13           DMA Device drivers supported by the configured arch, it may
  14           be empty in some cases.
  15
  16 config DMADEVICES_DEBUG
  17         bool "DMA Engine debugging"
  18         depends on DMADEVICES != n
  19         help
  20           This is an option for use by developers; most people should
  21           say N here.  This enables DMA engine core and driver debugging.
  22
  23 config DMADEVICES_VDEBUG
  24         bool "DMA Engine verbose debugging"
  25         depends on DMADEVICES_DEBUG != n
  26         help
  27           This is an option for use by developers; most people should
  28           say N here.  This enables deeper (more verbose) debugging of
  29           the DMA engine core and drivers.
  30
  31
  32 if DMADEVICES
  33
  34 comment "DMA Devices"
  35
  36 config INTEL_MID_DMAC
  37         tristate "Intel MID DMA support for Peripheral DMA controllers"
  38         depends on PCI && X86
  39         select DMA_ENGINE
  40         default n
  41         help
  42           Enable support for the Intel(R) MID DMA engine present
  43           in Intel MID chipsets.
  44
  45           Say Y here if you have such a chipset.
  46
  47           If unsure, say N.
  48
  49 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
  50         bool
  51
  52 config AMBA_PL08X
  53         bool "ARM PrimeCell PL080 or PL081 support"
  54         depends on ARM_AMBA
  55         select DMA_ENGINE
  56         select DMA_VIRTUAL_CHANNELS
  57         help
  58           Platform has a PL08x DMAC device
  59           which can provide DMA engine support
  60
  61 config INTEL_IOATDMA
  62         tristate "Intel I/OAT DMA support"
  63         depends on PCI && X86
  64         select DMA_ENGINE
  65         select DCA
  66         select ASYNC_TX_DISABLE_PQ_VAL_DMA
  67         select ASYNC_TX_DISABLE_XOR_VAL_DMA
  68         help
  69           Enable support for the Intel(R) I/OAT DMA engine present
  70           in recent Intel Xeon chipsets.
  71
  72           Say Y here if you have such a chipset.
  73
  74           If unsure, say N.
  75
  76 config INTEL_IOP_ADMA
  77         tristate "Intel IOP ADMA support"
  78         depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
  79         select DMA_ENGINE
  80         select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  81         help
  82           Enable support for the Intel(R) IOP Series RAID engines.
  83
  84 config DW_DMAC
  85         tristate "Synopsys DesignWare AHB DMA support"
  86         select DMA_ENGINE
  87         default y if CPU_AT32AP7000
  88         help
  89           Support the Synopsys DesignWare AHB DMA controller.  This
  90           can be integrated in chips such as the Atmel AT32ap7000.
  91
  92 config DW_DMAC_BIG_ENDIAN_IO
  93         bool "Use big endian I/O register access"
  94         default y if AVR32
  95         depends on DW_DMAC
  96         help
  97           Say yes here to use big endian I/O access when reading and writing
  98           to the DMA controller registers. This is needed on some platforms,
  99           like the Atmel AVR32 architecture.
 100
 101           If unsure, use the default setting.
 102
 103 config AT_HDMAC
 104         tristate "Atmel AHB DMA support"
 105         depends on ARCH_AT91
 106         select DMA_ENGINE
 107         help
 108           Support the Atmel AHB DMA controller.
 109
 110 config FSL_DMA
 111         tristate "Freescale Elo and Elo Plus DMA support"
 112         depends on FSL_SOC
 113         select DMA_ENGINE
 114         select ASYNC_TX_ENABLE_CHANNEL_SWITCH
 115         ---help---
 116           Enable support for the Freescale Elo and Elo Plus DMA controllers.
 117           The Elo is the DMA controller on some 82xx and 83xx parts, and the
 118           Elo Plus is the DMA controller on 85xx and 86xx parts.
 119
 120 config MPC512X_DMA
 121         tristate "Freescale MPC512x built-in DMA engine support"
 122         depends on PPC_MPC512x || PPC_MPC831x
 123         select DMA_ENGINE
 124         ---help---
 125           Enable support for the Freescale MPC512x built-in DMA engine.
 126
 127 source "drivers/dma/bestcomm/Kconfig"
 128
 129 config MV_XOR
 130         bool "Marvell XOR engine support"
 131         depends on PLAT_ORION
 132         select DMA_ENGINE
 133         select ASYNC_TX_ENABLE_CHANNEL_SWITCH
 134         ---help---
 135           Enable support for the Marvell XOR engine.
 136
 137 config MX3_IPU
 138         bool "MX3x Image Processing Unit support"
 139         depends on ARCH_MXC
 140         select DMA_ENGINE
 141         default y
 142         help
 143           If you plan to use the Image Processing unit in the i.MX3x, say
 144           Y here. If unsure, select Y.
 145
 146 config MX3_IPU_IRQS
 147         int "Number of dynamically mapped interrupts for IPU"
 148         depends on MX3_IPU
 149         range 2 137
 150         default 4
 151         help
 152           Out of 137 interrupt sources on i.MX31 IPU only very few are used.
 153           To avoid bloating the irq_desc[] array we allocate a sufficient
 154           number of IRQ slots and map them dynamically to specific sources.
 155
 156 config TXX9_DMAC
 157         tristate "Toshiba TXx9 SoC DMA support"
 158         depends on MACH_TX49XX || MACH_TX39XX
 159         select DMA_ENGINE
 160         help
 161           Support the TXx9 SoC internal DMA controller.  This can be
 162           integrated in chips such as the Toshiba TX4927/38/39.
 163
 164 config TEGRA20_APB_DMA
 165         bool "NVIDIA Tegra20 APB DMA support"
 166         depends on ARCH_TEGRA
 167         select DMA_ENGINE
 168         help
 169           Support for the NVIDIA Tegra20 APB DMA controller driver. The
 170           DMA controller is having multiple DMA channel which can be
 171           configured for different peripherals like audio, UART, SPI,
 172           I2C etc which is in APB bus.
 173           This DMA controller transfers data from memory to peripheral fifo
 174           or vice versa. It does not support memory to memory data transfer.
 175
 176
 177
 178 config SH_DMAE
 179         tristate "Renesas SuperH DMAC support"
 180         depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
 181         depends on !SH_DMA_API
 182         select DMA_ENGINE
 183         help
 184           Enable support for the Renesas SuperH DMA controllers.
 185
 186 config COH901318
 187         bool "ST-Ericsson COH901318 DMA support"
 188         select DMA_ENGINE
 189         depends on ARCH_U300
 190         help
 191           Enable support for ST-Ericsson COH 901 318 DMA.
 192
 193 config STE_DMA40
 194         bool "ST-Ericsson DMA40 support"
 195         depends on ARCH_U8500
 196         select DMA_ENGINE
 197         help
 198           Support for ST-Ericsson DMA40 controller
 199
 200 config AMCC_PPC440SPE_ADMA
 201         tristate "AMCC PPC440SPe ADMA support"
 202         depends on 440SPe || 440SP
 203         select DMA_ENGINE
 204         select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
 205         select ASYNC_TX_ENABLE_CHANNEL_SWITCH
 206         help
 207           Enable support for the AMCC PPC440SPe RAID engines.
 208
 209 config TIMB_DMA
 210         tristate "Timberdale FPGA DMA support"
 211         depends on MFD_TIMBERDALE || HAS_IOMEM
 212         select DMA_ENGINE
 213         help
 214           Enable support for the Timberdale FPGA DMA engine.
 215
 216 config SIRF_DMA
 217         tristate "CSR SiRFprimaII/SiRFmarco DMA support"
 218         depends on ARCH_SIRF
 219         select DMA_ENGINE
 220         help
 221           Enable support for the CSR SiRFprimaII DMA engine.
 222
 223 config TI_EDMA
 224         tristate "TI EDMA support"
 225         depends on ARCH_DAVINCI
 226         select DMA_ENGINE
 227         select DMA_VIRTUAL_CHANNELS
 228         default n
 229         help
 230           Enable support for the TI EDMA controller. This DMA
 231           engine is found on TI DaVinci and AM33xx parts.
 232
 233 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
 234         bool
 235
 236 config PL330_DMA
 237         tristate "DMA API Driver for PL330"
 238         select DMA_ENGINE
 239         depends on ARM_AMBA
 240         help
 241           Select if your platform has one or more PL330 DMACs.
 242           You need to provide platform specific settings via
 243           platform_data for a dma-pl330 device.
 244
 245 config PCH_DMA
 246         tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
 247         depends on PCI && X86
 248         select DMA_ENGINE
 249         help
 250           Enable support for Intel EG20T PCH DMA engine.
 251
 252           This driver also can be used for LAPIS Semiconductor IOH(Input/
 253           Output Hub), ML7213, ML7223 and ML7831.
 254           ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
 255           for MP(Media Phone) use and ML7831 IOH is for general purpose use.
 256           ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
 257           ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
 258
 259 config IMX_SDMA
 260         tristate "i.MX SDMA support"
 261         depends on ARCH_MXC
 262         select DMA_ENGINE
 263         help
 264           Support the i.MX SDMA engine. This engine is integrated into
 265           Freescale i.MX25/31/35/51/53 chips.
 266
 267 config IMX_DMA
 268         tristate "i.MX DMA support"
 269         depends on ARCH_MXC
 270         select DMA_ENGINE
 271         help
 272           Support the i.MX DMA engine. This engine is integrated into
 273           Freescale i.MX1/21/27 chips.
 274
 275 config MXS_DMA
 276         bool "MXS DMA support"
 277         depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
 278         select STMP_DEVICE
 279         select DMA_ENGINE
 280         help
 281           Support the MXS DMA engine. This engine including APBH-DMA
 282           and APBX-DMA is integrated into Freescale i.MX23/28 chips.
 283
 284 config EP93XX_DMA
 285         bool "Cirrus Logic EP93xx DMA support"
 286         depends on ARCH_EP93XX
 287         select DMA_ENGINE
 288         help
 289           Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
 290
 291 config DMA_SA11X0
 292         tristate "SA-11x0 DMA support"
 293         depends on ARCH_SA1100
 294         select DMA_ENGINE
 295         select DMA_VIRTUAL_CHANNELS
 296         help
 297           Support the DMA engine found on Intel StrongARM SA-1100 and
 298           SA-1110 SoCs.  This DMA engine can only be used with on-chip
 299           devices.
 300
 301 config MMP_TDMA
 302         bool "MMP Two-Channel DMA support"
 303         depends on ARCH_MMP
 304         select DMA_ENGINE
 305         help
 306           Support the MMP Two-Channel DMA engine.
 307           This engine used for MMP Audio DMA and pxa910 SQU.
 308
 309           Say Y here if you enabled MMP ADMA, otherwise say N.
 310
 311 config DMA_OMAP
 312         tristate "OMAP DMA support"
 313         depends on ARCH_OMAP
 314         select DMA_ENGINE
 315         select DMA_VIRTUAL_CHANNELS
 316
 317 config MMP_PDMA
 318         bool "MMP PDMA support"
 319         depends on (ARCH_MMP || ARCH_PXA)
 320         select DMA_ENGINE
 321         help
 322           Support the MMP PDMA engine for PXA and MMP platfrom.
 323
 324 config DMA_ENGINE
 325         bool
 326
 327 config DMA_VIRTUAL_CHANNELS
 328         tristate
 329
 330 config DMA_OF
 331         def_bool y
 332         depends on OF
 333
 334 comment "DMA Clients"
 335         depends on DMA_ENGINE
 336
 337 config NET_DMA
 338         bool "Network: TCP receive copy offload"
 339         depends on DMA_ENGINE && NET
 340         default (INTEL_IOATDMA || FSL_DMA)
 341         help
 342           This enables the use of DMA engines in the network stack to
 343           offload receive copy-to-user operations, freeing CPU cycles.
 344
 345           Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
 346           say N.
 347
 348 config ASYNC_TX_DMA
 349         bool "Async_tx: Offload support for the async_tx api"
 350         depends on DMA_ENGINE
 351         help
 352           This allows the async_tx api to take advantage of offload engines for
 353           memcpy, memset, xor, and raid6 p+q operations.  If your platform has
 354           a dma engine that can perform raid operations and you have enabled
 355           MD_RAID456 say Y.
 356
 357           If unsure, say N.
 358
 359 config DMATEST
 360         tristate "DMA Test client"
 361         depends on DMA_ENGINE
 362         help
 363           Simple DMA test client. Say N unless you're debugging a
 364           DMA Device driver.
 365
 366 endif