2 # DMA engine configuration
6 bool "DMA Engine support"
9 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be
11 used to offload memory copies in the network stack and
12 RAID operations in the MD driver. This menu only presents
13 DMA Device drivers supported by the configured arch, it may
14 be empty in some cases.
16 config DMADEVICES_DEBUG
17 bool "DMA Engine debugging"
18 depends on DMADEVICES != n
20 This is an option for use by developers; most people should
21 say N here. This enables DMA engine core and driver debugging.
23 config DMADEVICES_VDEBUG
24 bool "DMA Engine verbose debugging"
25 depends on DMADEVICES_DEBUG != n
27 This is an option for use by developers; most people should
28 say N here. This enables deeper (more verbose) debugging of
29 the DMA engine core and drivers.
37 tristate "Intel MID DMA support for Peripheral DMA controllers"
42 Enable support for the Intel(R) MID DMA engine present
43 in Intel MID chipsets.
45 Say Y here if you have such a chipset.
49 config ASYNC_TX_DISABLE_CHANNEL_SWITCH
53 bool "ARM PrimeCell PL080 or PL081 support"
54 depends on ARM_AMBA && EXPERIMENTAL
57 Platform has a PL08x DMAC device
58 which can provide DMA engine support
61 tristate "Intel I/OAT DMA support"
65 select ASYNC_TX_DISABLE_CHANNEL_SWITCH
66 select ASYNC_TX_DISABLE_PQ_VAL_DMA
67 select ASYNC_TX_DISABLE_XOR_VAL_DMA
69 Enable support for the Intel(R) I/OAT DMA engine present
70 in recent Intel Xeon chipsets.
72 Say Y here if you have such a chipset.
77 tristate "Intel IOP ADMA support"
78 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
81 Enable support for the Intel(R) IOP Series RAID engines.
84 tristate "Synopsys DesignWare AHB DMA support"
87 default y if CPU_AT32AP7000
89 Support the Synopsys DesignWare AHB DMA controller. This
90 can be integrated in chips such as the Atmel AT32ap7000.
93 tristate "Atmel AHB DMA support"
94 depends on ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
97 Support the Atmel AHB DMA controller. This can be integrated in
98 chips such as the Atmel AT91SAM9RL.
101 tristate "Freescale Elo and Elo Plus DMA support"
105 Enable support for the Freescale Elo and Elo Plus DMA controllers.
106 The Elo is the DMA controller on some 82xx and 83xx parts, and the
107 Elo Plus is the DMA controller on 85xx and 86xx parts.
110 tristate "Freescale MPC512x built-in DMA engine support"
111 depends on PPC_MPC512x
114 Enable support for the Freescale MPC512x built-in DMA engine.
117 bool "Marvell XOR engine support"
118 depends on PLAT_ORION
121 Enable support for the Marvell XOR engine.
124 bool "MX3x Image Processing Unit support"
129 If you plan to use the Image Processing unit in the i.MX3x, say
130 Y here. If unsure, select Y.
133 int "Number of dynamically mapped interrupts for IPU"
138 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
139 To avoid bloating the irq_desc[] array we allocate a sufficient
140 number of IRQ slots and map them dynamically to specific sources.
143 tristate "Toshiba TXx9 SoC DMA support"
144 depends on MACH_TX49XX || MACH_TX39XX
147 Support the TXx9 SoC internal DMA controller. This can be
148 integrated in chips such as the Toshiba TX4927/38/39.
151 tristate "Renesas SuperH DMAC support"
152 depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
153 depends on !SH_DMA_API
156 Enable support for the Renesas SuperH DMA controllers.
159 bool "ST-Ericsson COH901318 DMA support"
163 Enable support for ST-Ericsson COH 901 318 DMA.
166 bool "ST-Ericsson DMA40 support"
167 depends on ARCH_U8500
170 Support for ST-Ericsson DMA40 controller
172 config AMCC_PPC440SPE_ADMA
173 tristate "AMCC PPC440SPe ADMA support"
174 depends on 440SPe || 440SP
176 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
178 Enable support for the AMCC PPC440SPe RAID engines.
181 tristate "Timberdale FPGA DMA support"
182 depends on MFD_TIMBERDALE || HAS_IOMEM
185 Enable support for the Timberdale FPGA DMA engine.
187 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
191 tristate "DMA API Driver for PL330"
195 Select if your platform has one or more PL330 DMACs.
196 You need to provide platform specific settings via
197 platform_data for a dma-pl330 device.
200 tristate "Topcliff PCH DMA support"
201 depends on PCI && X86
204 Enable support for the Topcliff PCH DMA engine.
209 comment "DMA Clients"
210 depends on DMA_ENGINE
213 bool "Network: TCP receive copy offload"
214 depends on DMA_ENGINE && NET
215 default (INTEL_IOATDMA || FSL_DMA)
217 This enables the use of DMA engines in the network stack to
218 offload receive copy-to-user operations, freeing CPU cycles.
220 Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
224 bool "Async_tx: Offload support for the async_tx api"
225 depends on DMA_ENGINE
227 This allows the async_tx api to take advantage of offload engines for
228 memcpy, memset, xor, and raid6 p+q operations. If your platform has
229 a dma engine that can perform raid operations and you have enabled
235 tristate "DMA Test client"
236 depends on DMA_ENGINE
238 Simple DMA test client. Say N unless you're debugging a