2 * DMA Engine test module
4 * Copyright (C) 2007 Atmel Corporation
5 * Copyright (C) 2013 Intel Corporation
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13 #include <linux/delay.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/dmaengine.h>
16 #include <linux/freezer.h>
17 #include <linux/init.h>
18 #include <linux/kthread.h>
19 #include <linux/module.h>
20 #include <linux/moduleparam.h>
21 #include <linux/random.h>
22 #include <linux/slab.h>
23 #include <linux/wait.h>
25 static unsigned int test_buf_size
= 16384;
26 module_param(test_buf_size
, uint
, S_IRUGO
| S_IWUSR
);
27 MODULE_PARM_DESC(test_buf_size
, "Size of the memcpy test buffer");
29 static char test_channel
[20];
30 module_param_string(channel
, test_channel
, sizeof(test_channel
),
32 MODULE_PARM_DESC(channel
, "Bus ID of the channel to test (default: any)");
34 static char test_device
[20];
35 module_param_string(device
, test_device
, sizeof(test_device
),
37 MODULE_PARM_DESC(device
, "Bus ID of the DMA Engine to test (default: any)");
39 static unsigned int threads_per_chan
= 1;
40 module_param(threads_per_chan
, uint
, S_IRUGO
| S_IWUSR
);
41 MODULE_PARM_DESC(threads_per_chan
,
42 "Number of threads to start per channel (default: 1)");
44 static unsigned int max_channels
;
45 module_param(max_channels
, uint
, S_IRUGO
| S_IWUSR
);
46 MODULE_PARM_DESC(max_channels
,
47 "Maximum number of channels to use (default: all)");
49 static unsigned int iterations
;
50 module_param(iterations
, uint
, S_IRUGO
| S_IWUSR
);
51 MODULE_PARM_DESC(iterations
,
52 "Iterations before stopping test (default: infinite)");
54 static unsigned int xor_sources
= 3;
55 module_param(xor_sources
, uint
, S_IRUGO
| S_IWUSR
);
56 MODULE_PARM_DESC(xor_sources
,
57 "Number of xor source buffers (default: 3)");
59 static unsigned int pq_sources
= 3;
60 module_param(pq_sources
, uint
, S_IRUGO
| S_IWUSR
);
61 MODULE_PARM_DESC(pq_sources
,
62 "Number of p+q source buffers (default: 3)");
64 static int timeout
= 3000;
65 module_param(timeout
, uint
, S_IRUGO
| S_IWUSR
);
66 MODULE_PARM_DESC(timeout
, "Transfer Timeout in msec (default: 3000), "
67 "Pass -1 for infinite timeout");
70 * struct dmatest_params - test parameters.
71 * @buf_size: size of the memcpy test buffer
72 * @channel: bus ID of the channel to test
73 * @device: bus ID of the DMA Engine to test
74 * @threads_per_chan: number of threads to start per channel
75 * @max_channels: maximum number of channels to use
76 * @iterations: iterations before stopping test
77 * @xor_sources: number of xor source buffers
78 * @pq_sources: number of p+q source buffers
79 * @timeout: transfer timeout in msec, -1 for infinite timeout
81 struct dmatest_params
{
82 unsigned int buf_size
;
85 unsigned int threads_per_chan
;
86 unsigned int max_channels
;
87 unsigned int iterations
;
88 unsigned int xor_sources
;
89 unsigned int pq_sources
;
94 * struct dmatest_info - test information.
95 * @params: test parameters
96 * @lock: access protection to the fields of this structure
98 static struct dmatest_info
{
100 struct dmatest_params params
;
103 struct list_head channels
;
104 unsigned int nr_channels
;
108 .channels
= LIST_HEAD_INIT(test_info
.channels
),
109 .lock
= __MUTEX_INITIALIZER(test_info
.lock
),
112 static int dmatest_run_set(const char *val
, const struct kernel_param
*kp
);
113 static int dmatest_run_get(char *val
, const struct kernel_param
*kp
);
114 static struct kernel_param_ops run_ops
= {
115 .set
= dmatest_run_set
,
116 .get
= dmatest_run_get
,
118 static bool dmatest_run
;
119 module_param_cb(run
, &run_ops
, &dmatest_run
, S_IRUGO
| S_IWUSR
);
120 MODULE_PARM_DESC(run
, "Run the test (default: false)");
122 /* Maximum amount of mismatched bytes in buffer to print */
123 #define MAX_ERROR_COUNT 32
126 * Initialization patterns. All bytes in the source buffer has bit 7
127 * set, all bytes in the destination buffer has bit 7 cleared.
129 * Bit 6 is set for all bytes which are to be copied by the DMA
130 * engine. Bit 5 is set for all bytes which are to be overwritten by
133 * The remaining bits are the inverse of a counter which increments by
134 * one for each byte address.
136 #define PATTERN_SRC 0x80
137 #define PATTERN_DST 0x00
138 #define PATTERN_COPY 0x40
139 #define PATTERN_OVERWRITE 0x20
140 #define PATTERN_COUNT_MASK 0x1f
142 struct dmatest_thread
{
143 struct list_head node
;
144 struct dmatest_info
*info
;
145 struct task_struct
*task
;
146 struct dma_chan
*chan
;
149 enum dma_transaction_type type
;
153 struct dmatest_chan
{
154 struct list_head node
;
155 struct dma_chan
*chan
;
156 struct list_head threads
;
159 static bool dmatest_match_channel(struct dmatest_params
*params
,
160 struct dma_chan
*chan
)
162 if (params
->channel
[0] == '\0')
164 return strcmp(dma_chan_name(chan
), params
->channel
) == 0;
167 static bool dmatest_match_device(struct dmatest_params
*params
,
168 struct dma_device
*device
)
170 if (params
->device
[0] == '\0')
172 return strcmp(dev_name(device
->dev
), params
->device
) == 0;
175 static unsigned long dmatest_random(void)
179 get_random_bytes(&buf
, sizeof(buf
));
183 static void dmatest_init_srcs(u8
**bufs
, unsigned int start
, unsigned int len
,
184 unsigned int buf_size
)
189 for (; (buf
= *bufs
); bufs
++) {
190 for (i
= 0; i
< start
; i
++)
191 buf
[i
] = PATTERN_SRC
| (~i
& PATTERN_COUNT_MASK
);
192 for ( ; i
< start
+ len
; i
++)
193 buf
[i
] = PATTERN_SRC
| PATTERN_COPY
194 | (~i
& PATTERN_COUNT_MASK
);
195 for ( ; i
< buf_size
; i
++)
196 buf
[i
] = PATTERN_SRC
| (~i
& PATTERN_COUNT_MASK
);
201 static void dmatest_init_dsts(u8
**bufs
, unsigned int start
, unsigned int len
,
202 unsigned int buf_size
)
207 for (; (buf
= *bufs
); bufs
++) {
208 for (i
= 0; i
< start
; i
++)
209 buf
[i
] = PATTERN_DST
| (~i
& PATTERN_COUNT_MASK
);
210 for ( ; i
< start
+ len
; i
++)
211 buf
[i
] = PATTERN_DST
| PATTERN_OVERWRITE
212 | (~i
& PATTERN_COUNT_MASK
);
213 for ( ; i
< buf_size
; i
++)
214 buf
[i
] = PATTERN_DST
| (~i
& PATTERN_COUNT_MASK
);
218 static void dmatest_mismatch(u8 actual
, u8 pattern
, unsigned int index
,
219 unsigned int counter
, bool is_srcbuf
)
221 u8 diff
= actual
^ pattern
;
222 u8 expected
= pattern
| (~counter
& PATTERN_COUNT_MASK
);
223 const char *thread_name
= current
->comm
;
226 pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n",
227 thread_name
, index
, expected
, actual
);
228 else if ((pattern
& PATTERN_COPY
)
229 && (diff
& (PATTERN_COPY
| PATTERN_OVERWRITE
)))
230 pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n",
231 thread_name
, index
, expected
, actual
);
232 else if (diff
& PATTERN_SRC
)
233 pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n",
234 thread_name
, index
, expected
, actual
);
236 pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n",
237 thread_name
, index
, expected
, actual
);
240 static unsigned int dmatest_verify(u8
**bufs
, unsigned int start
,
241 unsigned int end
, unsigned int counter
, u8 pattern
,
245 unsigned int error_count
= 0;
249 unsigned int counter_orig
= counter
;
251 for (; (buf
= *bufs
); bufs
++) {
252 counter
= counter_orig
;
253 for (i
= start
; i
< end
; i
++) {
255 expected
= pattern
| (~counter
& PATTERN_COUNT_MASK
);
256 if (actual
!= expected
) {
257 if (error_count
< MAX_ERROR_COUNT
)
258 dmatest_mismatch(actual
, pattern
, i
,
266 if (error_count
> MAX_ERROR_COUNT
)
267 pr_warn("%s: %u errors suppressed\n",
268 current
->comm
, error_count
- MAX_ERROR_COUNT
);
273 /* poor man's completion - we want to use wait_event_freezable() on it */
274 struct dmatest_done
{
276 wait_queue_head_t
*wait
;
279 static void dmatest_callback(void *arg
)
281 struct dmatest_done
*done
= arg
;
284 wake_up_all(done
->wait
);
287 static inline void unmap_src(struct device
*dev
, dma_addr_t
*addr
, size_t len
,
291 dma_unmap_single(dev
, addr
[count
], len
, DMA_TO_DEVICE
);
294 static inline void unmap_dst(struct device
*dev
, dma_addr_t
*addr
, size_t len
,
298 dma_unmap_single(dev
, addr
[count
], len
, DMA_BIDIRECTIONAL
);
301 static unsigned int min_odd(unsigned int x
, unsigned int y
)
303 unsigned int val
= min(x
, y
);
305 return val
% 2 ? val
: val
- 1;
308 static void result(const char *err
, unsigned int n
, unsigned int src_off
,
309 unsigned int dst_off
, unsigned int len
, unsigned long data
)
311 pr_info("%s: result #%u: '%s' with src_off=0x%x ""dst_off=0x%x len=0x%x (%lu)",
312 current
->comm
, n
, err
, src_off
, dst_off
, len
, data
);
315 static void dbg_result(const char *err
, unsigned int n
, unsigned int src_off
,
316 unsigned int dst_off
, unsigned int len
,
319 pr_debug("%s: result #%u: '%s' with src_off=0x%x ""dst_off=0x%x len=0x%x (%lu)",
320 current
->comm
, n
, err
, src_off
, dst_off
, len
, data
);
324 * This function repeatedly tests DMA transfers of various lengths and
325 * offsets for a given operation type until it is told to exit by
326 * kthread_stop(). There may be multiple threads running this function
327 * in parallel for a single channel, and there may be multiple channels
328 * being tested in parallel.
330 * Before each test, the source and destination buffer is initialized
331 * with a known pattern. This pattern is different depending on
332 * whether it's in an area which is supposed to be copied or
333 * overwritten, and different in the source and destination buffers.
334 * So if the DMA engine doesn't copy exactly what we tell it to copy,
337 static int dmatest_func(void *data
)
339 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_wait
);
340 struct dmatest_thread
*thread
= data
;
341 struct dmatest_done done
= { .wait
= &done_wait
};
342 struct dmatest_info
*info
;
343 struct dmatest_params
*params
;
344 struct dma_chan
*chan
;
345 struct dma_device
*dev
;
346 unsigned int src_off
, dst_off
, len
;
347 unsigned int error_count
;
348 unsigned int failed_tests
= 0;
349 unsigned int total_tests
= 0;
351 enum dma_status status
;
352 enum dma_ctrl_flags flags
;
365 params
= &info
->params
;
368 if (thread
->type
== DMA_MEMCPY
)
369 src_cnt
= dst_cnt
= 1;
370 else if (thread
->type
== DMA_XOR
) {
371 /* force odd to ensure dst = src */
372 src_cnt
= min_odd(params
->xor_sources
| 1, dev
->max_xor
);
374 } else if (thread
->type
== DMA_PQ
) {
375 /* force odd to ensure dst = src */
376 src_cnt
= min_odd(params
->pq_sources
| 1, dma_maxpq(dev
, 0));
379 pq_coefs
= kmalloc(params
->pq_sources
+1, GFP_KERNEL
);
381 goto err_thread_type
;
383 for (i
= 0; i
< src_cnt
; i
++)
386 goto err_thread_type
;
388 thread
->srcs
= kcalloc(src_cnt
+1, sizeof(u8
*), GFP_KERNEL
);
391 for (i
= 0; i
< src_cnt
; i
++) {
392 thread
->srcs
[i
] = kmalloc(params
->buf_size
, GFP_KERNEL
);
393 if (!thread
->srcs
[i
])
396 thread
->srcs
[i
] = NULL
;
398 thread
->dsts
= kcalloc(dst_cnt
+1, sizeof(u8
*), GFP_KERNEL
);
401 for (i
= 0; i
< dst_cnt
; i
++) {
402 thread
->dsts
[i
] = kmalloc(params
->buf_size
, GFP_KERNEL
);
403 if (!thread
->dsts
[i
])
406 thread
->dsts
[i
] = NULL
;
408 set_user_nice(current
, 10);
411 * src and dst buffers are freed by ourselves below
413 flags
= DMA_CTRL_ACK
| DMA_PREP_INTERRUPT
;
415 while (!kthread_should_stop()
416 && !(params
->iterations
&& total_tests
>= params
->iterations
)) {
417 struct dma_async_tx_descriptor
*tx
= NULL
;
418 dma_addr_t dma_srcs
[src_cnt
];
419 dma_addr_t dma_dsts
[dst_cnt
];
424 /* honor alignment restrictions */
425 if (thread
->type
== DMA_MEMCPY
)
426 align
= dev
->copy_align
;
427 else if (thread
->type
== DMA_XOR
)
428 align
= dev
->xor_align
;
429 else if (thread
->type
== DMA_PQ
)
430 align
= dev
->pq_align
;
432 if (1 << align
> params
->buf_size
) {
433 pr_err("%u-byte buffer too small for %d-byte alignment\n",
434 params
->buf_size
, 1 << align
);
438 len
= dmatest_random() % params
->buf_size
+ 1;
439 len
= (len
>> align
) << align
;
442 src_off
= dmatest_random() % (params
->buf_size
- len
+ 1);
443 dst_off
= dmatest_random() % (params
->buf_size
- len
+ 1);
445 src_off
= (src_off
>> align
) << align
;
446 dst_off
= (dst_off
>> align
) << align
;
448 dmatest_init_srcs(thread
->srcs
, src_off
, len
, params
->buf_size
);
449 dmatest_init_dsts(thread
->dsts
, dst_off
, len
, params
->buf_size
);
451 for (i
= 0; i
< src_cnt
; i
++) {
452 u8
*buf
= thread
->srcs
[i
] + src_off
;
454 dma_srcs
[i
] = dma_map_single(dev
->dev
, buf
, len
,
456 ret
= dma_mapping_error(dev
->dev
, dma_srcs
[i
]);
458 unmap_src(dev
->dev
, dma_srcs
, len
, i
);
459 result("src mapping error", total_tests
,
460 src_off
, dst_off
, len
, ret
);
465 /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
466 for (i
= 0; i
< dst_cnt
; i
++) {
467 dma_dsts
[i
] = dma_map_single(dev
->dev
, thread
->dsts
[i
],
470 ret
= dma_mapping_error(dev
->dev
, dma_dsts
[i
]);
472 unmap_src(dev
->dev
, dma_srcs
, len
, src_cnt
);
473 unmap_dst(dev
->dev
, dma_dsts
, params
->buf_size
,
475 result("dst mapping error", total_tests
,
476 src_off
, dst_off
, len
, ret
);
482 if (thread
->type
== DMA_MEMCPY
)
483 tx
= dev
->device_prep_dma_memcpy(chan
,
484 dma_dsts
[0] + dst_off
,
487 else if (thread
->type
== DMA_XOR
)
488 tx
= dev
->device_prep_dma_xor(chan
,
489 dma_dsts
[0] + dst_off
,
492 else if (thread
->type
== DMA_PQ
) {
493 dma_addr_t dma_pq
[dst_cnt
];
495 for (i
= 0; i
< dst_cnt
; i
++)
496 dma_pq
[i
] = dma_dsts
[i
] + dst_off
;
497 tx
= dev
->device_prep_dma_pq(chan
, dma_pq
, dma_srcs
,
503 unmap_src(dev
->dev
, dma_srcs
, len
, src_cnt
);
504 unmap_dst(dev
->dev
, dma_dsts
, params
->buf_size
,
506 result("prep error", total_tests
, src_off
,
514 tx
->callback
= dmatest_callback
;
515 tx
->callback_param
= &done
;
516 cookie
= tx
->tx_submit(tx
);
518 if (dma_submit_error(cookie
)) {
519 result("submit error", total_tests
, src_off
,
525 dma_async_issue_pending(chan
);
527 wait_event_freezable_timeout(done_wait
, done
.done
,
528 msecs_to_jiffies(params
->timeout
));
530 status
= dma_async_is_tx_complete(chan
, cookie
, NULL
, NULL
);
534 * We're leaving the timed out dma operation with
535 * dangling pointer to done_wait. To make this
536 * correct, we'll need to allocate wait_done for
537 * each test iteration and perform "who's gonna
538 * free it this time?" dancing. For now, just
541 result("test timed out", total_tests
, src_off
, dst_off
,
545 } else if (status
!= DMA_SUCCESS
) {
546 result(status
== DMA_ERROR
?
547 "completion error status" :
548 "completion busy status", total_tests
, src_off
,
554 /* Unmap by myself */
555 unmap_src(dev
->dev
, dma_srcs
, len
, src_cnt
);
556 unmap_dst(dev
->dev
, dma_dsts
, params
->buf_size
, dst_cnt
);
560 pr_debug("%s: verifying source buffer...\n", current
->comm
);
561 error_count
+= dmatest_verify(thread
->srcs
, 0, src_off
,
562 0, PATTERN_SRC
, true);
563 error_count
+= dmatest_verify(thread
->srcs
, src_off
,
564 src_off
+ len
, src_off
,
565 PATTERN_SRC
| PATTERN_COPY
, true);
566 error_count
+= dmatest_verify(thread
->srcs
, src_off
+ len
,
567 params
->buf_size
, src_off
+ len
,
570 pr_debug("%s: verifying dest buffer...\n", current
->comm
);
571 error_count
+= dmatest_verify(thread
->dsts
, 0, dst_off
,
572 0, PATTERN_DST
, false);
573 error_count
+= dmatest_verify(thread
->dsts
, dst_off
,
574 dst_off
+ len
, src_off
,
575 PATTERN_SRC
| PATTERN_COPY
, false);
576 error_count
+= dmatest_verify(thread
->dsts
, dst_off
+ len
,
577 params
->buf_size
, dst_off
+ len
,
581 result("data error", total_tests
, src_off
, dst_off
,
585 dbg_result("test passed", total_tests
, src_off
, dst_off
,
591 for (i
= 0; thread
->dsts
[i
]; i
++)
592 kfree(thread
->dsts
[i
]);
596 for (i
= 0; thread
->srcs
[i
]; i
++)
597 kfree(thread
->srcs
[i
]);
603 pr_info("%s: terminating after %u tests, %u failures (status %d)\n",
604 current
->comm
, total_tests
, failed_tests
, ret
);
606 /* terminate all transfers on specified channels */
608 dmaengine_terminate_all(chan
);
612 if (params
->iterations
> 0)
613 while (!kthread_should_stop()) {
614 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wait_dmatest_exit
);
615 interruptible_sleep_on(&wait_dmatest_exit
);
621 static void dmatest_cleanup_channel(struct dmatest_chan
*dtc
)
623 struct dmatest_thread
*thread
;
624 struct dmatest_thread
*_thread
;
627 list_for_each_entry_safe(thread
, _thread
, &dtc
->threads
, node
) {
628 ret
= kthread_stop(thread
->task
);
629 pr_debug("thread %s exited with status %d\n",
630 thread
->task
->comm
, ret
);
631 list_del(&thread
->node
);
635 /* terminate all transfers on specified channels */
636 dmaengine_terminate_all(dtc
->chan
);
641 static int dmatest_add_threads(struct dmatest_info
*info
,
642 struct dmatest_chan
*dtc
, enum dma_transaction_type type
)
644 struct dmatest_params
*params
= &info
->params
;
645 struct dmatest_thread
*thread
;
646 struct dma_chan
*chan
= dtc
->chan
;
650 if (type
== DMA_MEMCPY
)
652 else if (type
== DMA_XOR
)
654 else if (type
== DMA_PQ
)
659 for (i
= 0; i
< params
->threads_per_chan
; i
++) {
660 thread
= kzalloc(sizeof(struct dmatest_thread
), GFP_KERNEL
);
662 pr_warn("No memory for %s-%s%u\n",
663 dma_chan_name(chan
), op
, i
);
667 thread
->chan
= dtc
->chan
;
670 thread
->task
= kthread_run(dmatest_func
, thread
, "%s-%s%u",
671 dma_chan_name(chan
), op
, i
);
672 if (IS_ERR(thread
->task
)) {
673 pr_warn("Failed to run thread %s-%s%u\n",
674 dma_chan_name(chan
), op
, i
);
679 /* srcbuf and dstbuf are allocated by the thread itself */
681 list_add_tail(&thread
->node
, &dtc
->threads
);
687 static int dmatest_add_channel(struct dmatest_info
*info
,
688 struct dma_chan
*chan
)
690 struct dmatest_chan
*dtc
;
691 struct dma_device
*dma_dev
= chan
->device
;
692 unsigned int thread_count
= 0;
695 dtc
= kmalloc(sizeof(struct dmatest_chan
), GFP_KERNEL
);
697 pr_warn("No memory for %s\n", dma_chan_name(chan
));
702 INIT_LIST_HEAD(&dtc
->threads
);
704 if (dma_has_cap(DMA_MEMCPY
, dma_dev
->cap_mask
)) {
705 cnt
= dmatest_add_threads(info
, dtc
, DMA_MEMCPY
);
706 thread_count
+= cnt
> 0 ? cnt
: 0;
708 if (dma_has_cap(DMA_XOR
, dma_dev
->cap_mask
)) {
709 cnt
= dmatest_add_threads(info
, dtc
, DMA_XOR
);
710 thread_count
+= cnt
> 0 ? cnt
: 0;
712 if (dma_has_cap(DMA_PQ
, dma_dev
->cap_mask
)) {
713 cnt
= dmatest_add_threads(info
, dtc
, DMA_PQ
);
714 thread_count
+= cnt
> 0 ? cnt
: 0;
717 pr_info("Started %u threads using %s\n",
718 thread_count
, dma_chan_name(chan
));
720 list_add_tail(&dtc
->node
, &info
->channels
);
726 static bool filter(struct dma_chan
*chan
, void *param
)
728 struct dmatest_params
*params
= param
;
730 if (!dmatest_match_channel(params
, chan
) ||
731 !dmatest_match_device(params
, chan
->device
))
737 static int run_threaded_test(struct dmatest_info
*info
)
740 struct dma_chan
*chan
;
741 struct dmatest_params
*params
= &info
->params
;
744 /* Copy test parameters */
745 params
->buf_size
= test_buf_size
;
746 strlcpy(params
->channel
, strim(test_channel
), sizeof(params
->channel
));
747 strlcpy(params
->device
, strim(test_device
), sizeof(params
->device
));
748 params
->threads_per_chan
= threads_per_chan
;
749 params
->max_channels
= max_channels
;
750 params
->iterations
= iterations
;
751 params
->xor_sources
= xor_sources
;
752 params
->pq_sources
= pq_sources
;
753 params
->timeout
= timeout
;
756 dma_cap_set(DMA_MEMCPY
, mask
);
758 chan
= dma_request_channel(mask
, filter
, params
);
760 err
= dmatest_add_channel(info
, chan
);
762 dma_release_channel(chan
);
763 break; /* add_channel failed, punt */
766 break; /* no more channels available */
767 if (params
->max_channels
&&
768 info
->nr_channels
>= params
->max_channels
)
769 break; /* we have all we need */
775 static void stop_threaded_test(struct dmatest_info
*info
)
777 struct dmatest_chan
*dtc
, *_dtc
;
778 struct dma_chan
*chan
;
780 list_for_each_entry_safe(dtc
, _dtc
, &info
->channels
, node
) {
781 list_del(&dtc
->node
);
783 dmatest_cleanup_channel(dtc
);
784 pr_debug("dropped channel %s\n", dma_chan_name(chan
));
785 dma_release_channel(chan
);
788 info
->nr_channels
= 0;
791 static int restart_threaded_test(struct dmatest_info
*info
, bool run
)
793 /* we might be called early to set run=, defer running until all
794 * parameters have been evaluated
799 /* Stop any running test first */
800 stop_threaded_test(info
);
802 /* Run test with new parameters */
803 return run_threaded_test(info
);
806 static bool is_threaded_test_run(struct dmatest_info
*info
)
808 struct dmatest_chan
*dtc
;
810 list_for_each_entry(dtc
, &info
->channels
, node
) {
811 struct dmatest_thread
*thread
;
813 list_for_each_entry(thread
, &dtc
->threads
, node
) {
822 static int dmatest_run_get(char *val
, const struct kernel_param
*kp
)
824 struct dmatest_info
*info
= &test_info
;
826 mutex_lock(&info
->lock
);
827 if (is_threaded_test_run(info
)) {
830 stop_threaded_test(info
);
833 mutex_unlock(&info
->lock
);
835 return param_get_bool(val
, kp
);
838 static int dmatest_run_set(const char *val
, const struct kernel_param
*kp
)
840 struct dmatest_info
*info
= &test_info
;
843 mutex_lock(&info
->lock
);
844 ret
= param_set_bool(val
, kp
);
846 mutex_unlock(&info
->lock
);
850 if (is_threaded_test_run(info
))
852 else if (dmatest_run
)
853 ret
= restart_threaded_test(info
, dmatest_run
);
855 mutex_unlock(&info
->lock
);
860 static int __init
dmatest_init(void)
862 struct dmatest_info
*info
= &test_info
;
866 mutex_lock(&info
->lock
);
867 ret
= run_threaded_test(info
);
868 mutex_unlock(&info
->lock
);
871 /* module parameters are stable, inittime tests are started,
872 * let userspace take over 'run' control
874 info
->did_init
= true;
878 /* when compiled-in wait for drivers to load first */
879 late_initcall(dmatest_init
);
881 static void __exit
dmatest_exit(void)
883 struct dmatest_info
*info
= &test_info
;
885 mutex_lock(&info
->lock
);
886 stop_threaded_test(info
);
887 mutex_unlock(&info
->lock
);
889 module_exit(dmatest_exit
);
891 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
892 MODULE_LICENSE("GPL v2");