2 * DMA Engine test module
4 * Copyright (C) 2007 Atmel Corporation
5 * Copyright (C) 2013 Intel Corporation
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13 #include <linux/delay.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/dmaengine.h>
16 #include <linux/freezer.h>
17 #include <linux/init.h>
18 #include <linux/kthread.h>
19 #include <linux/module.h>
20 #include <linux/moduleparam.h>
21 #include <linux/random.h>
22 #include <linux/slab.h>
23 #include <linux/wait.h>
25 static unsigned int test_buf_size
= 16384;
26 module_param(test_buf_size
, uint
, S_IRUGO
| S_IWUSR
);
27 MODULE_PARM_DESC(test_buf_size
, "Size of the memcpy test buffer");
29 static char test_channel
[20];
30 module_param_string(channel
, test_channel
, sizeof(test_channel
),
32 MODULE_PARM_DESC(channel
, "Bus ID of the channel to test (default: any)");
34 static char test_device
[32];
35 module_param_string(device
, test_device
, sizeof(test_device
),
37 MODULE_PARM_DESC(device
, "Bus ID of the DMA Engine to test (default: any)");
39 static unsigned int threads_per_chan
= 1;
40 module_param(threads_per_chan
, uint
, S_IRUGO
| S_IWUSR
);
41 MODULE_PARM_DESC(threads_per_chan
,
42 "Number of threads to start per channel (default: 1)");
44 static unsigned int max_channels
;
45 module_param(max_channels
, uint
, S_IRUGO
| S_IWUSR
);
46 MODULE_PARM_DESC(max_channels
,
47 "Maximum number of channels to use (default: all)");
49 static unsigned int iterations
;
50 module_param(iterations
, uint
, S_IRUGO
| S_IWUSR
);
51 MODULE_PARM_DESC(iterations
,
52 "Iterations before stopping test (default: infinite)");
54 static unsigned int sg_buffers
= 1;
55 module_param(sg_buffers
, uint
, S_IRUGO
| S_IWUSR
);
56 MODULE_PARM_DESC(sg_buffers
,
57 "Number of scatter gather buffers (default: 1)");
59 static unsigned int dmatest
= 1;
60 module_param(dmatest
, uint
, S_IRUGO
| S_IWUSR
);
61 MODULE_PARM_DESC(dmatest
,
62 "dmatest 0-memcpy 1-slave_sg (default: 1)");
64 static unsigned int xor_sources
= 3;
65 module_param(xor_sources
, uint
, S_IRUGO
| S_IWUSR
);
66 MODULE_PARM_DESC(xor_sources
,
67 "Number of xor source buffers (default: 3)");
69 static unsigned int pq_sources
= 3;
70 module_param(pq_sources
, uint
, S_IRUGO
| S_IWUSR
);
71 MODULE_PARM_DESC(pq_sources
,
72 "Number of p+q source buffers (default: 3)");
74 static int timeout
= 3000;
75 module_param(timeout
, uint
, S_IRUGO
| S_IWUSR
);
76 MODULE_PARM_DESC(timeout
, "Transfer Timeout in msec (default: 3000), "
77 "Pass -1 for infinite timeout");
80 module_param(noverify
, bool, S_IRUGO
| S_IWUSR
);
81 MODULE_PARM_DESC(noverify
, "Disable random data setup and verification");
84 module_param(verbose
, bool, S_IRUGO
| S_IWUSR
);
85 MODULE_PARM_DESC(verbose
, "Enable \"success\" result messages (default: off)");
88 * struct dmatest_params - test parameters.
89 * @buf_size: size of the memcpy test buffer
90 * @channel: bus ID of the channel to test
91 * @device: bus ID of the DMA Engine to test
92 * @threads_per_chan: number of threads to start per channel
93 * @max_channels: maximum number of channels to use
94 * @iterations: iterations before stopping test
95 * @xor_sources: number of xor source buffers
96 * @pq_sources: number of p+q source buffers
97 * @timeout: transfer timeout in msec, -1 for infinite timeout
99 struct dmatest_params
{
100 unsigned int buf_size
;
103 unsigned int threads_per_chan
;
104 unsigned int max_channels
;
105 unsigned int iterations
;
106 unsigned int xor_sources
;
107 unsigned int pq_sources
;
113 * struct dmatest_info - test information.
114 * @params: test parameters
115 * @lock: access protection to the fields of this structure
117 static struct dmatest_info
{
118 /* Test parameters */
119 struct dmatest_params params
;
122 struct list_head channels
;
123 unsigned int nr_channels
;
127 .channels
= LIST_HEAD_INIT(test_info
.channels
),
128 .lock
= __MUTEX_INITIALIZER(test_info
.lock
),
131 static int dmatest_run_set(const char *val
, const struct kernel_param
*kp
);
132 static int dmatest_run_get(char *val
, const struct kernel_param
*kp
);
133 static const struct kernel_param_ops run_ops
= {
134 .set
= dmatest_run_set
,
135 .get
= dmatest_run_get
,
137 static bool dmatest_run
;
138 module_param_cb(run
, &run_ops
, &dmatest_run
, S_IRUGO
| S_IWUSR
);
139 MODULE_PARM_DESC(run
, "Run the test (default: false)");
141 /* Maximum amount of mismatched bytes in buffer to print */
142 #define MAX_ERROR_COUNT 32
145 * Initialization patterns. All bytes in the source buffer has bit 7
146 * set, all bytes in the destination buffer has bit 7 cleared.
148 * Bit 6 is set for all bytes which are to be copied by the DMA
149 * engine. Bit 5 is set for all bytes which are to be overwritten by
152 * The remaining bits are the inverse of a counter which increments by
153 * one for each byte address.
155 #define PATTERN_SRC 0x80
156 #define PATTERN_DST 0x00
157 #define PATTERN_COPY 0x40
158 #define PATTERN_OVERWRITE 0x20
159 #define PATTERN_COUNT_MASK 0x1f
161 struct dmatest_thread
{
162 struct list_head node
;
163 struct dmatest_info
*info
;
164 struct task_struct
*task
;
165 struct dma_chan
*chan
;
168 enum dma_transaction_type type
;
172 struct dmatest_chan
{
173 struct list_head node
;
174 struct dma_chan
*chan
;
175 struct list_head threads
;
178 static DECLARE_WAIT_QUEUE_HEAD(thread_wait
);
181 static bool is_threaded_test_run(struct dmatest_info
*info
)
183 struct dmatest_chan
*dtc
;
185 list_for_each_entry(dtc
, &info
->channels
, node
) {
186 struct dmatest_thread
*thread
;
188 list_for_each_entry(thread
, &dtc
->threads
, node
) {
197 static int dmatest_wait_get(char *val
, const struct kernel_param
*kp
)
199 struct dmatest_info
*info
= &test_info
;
200 struct dmatest_params
*params
= &info
->params
;
202 if (params
->iterations
)
203 wait_event(thread_wait
, !is_threaded_test_run(info
));
205 return param_get_bool(val
, kp
);
208 static const struct kernel_param_ops wait_ops
= {
209 .get
= dmatest_wait_get
,
210 .set
= param_set_bool
,
212 module_param_cb(wait
, &wait_ops
, &wait
, S_IRUGO
);
213 MODULE_PARM_DESC(wait
, "Wait for tests to complete (default: false)");
215 static bool dmatest_match_channel(struct dmatest_params
*params
,
216 struct dma_chan
*chan
)
218 if (params
->channel
[0] == '\0')
220 return strcmp(dma_chan_name(chan
), params
->channel
) == 0;
223 static bool dmatest_match_device(struct dmatest_params
*params
,
224 struct dma_device
*device
)
226 if (params
->device
[0] == '\0')
228 return strcmp(dev_name(device
->dev
), params
->device
) == 0;
231 static unsigned long dmatest_random(void)
235 prandom_bytes(&buf
, sizeof(buf
));
239 static void dmatest_init_srcs(u8
**bufs
, unsigned int start
, unsigned int len
,
240 unsigned int buf_size
)
245 for (; (buf
= *bufs
); bufs
++) {
246 for (i
= 0; i
< start
; i
++)
247 buf
[i
] = PATTERN_SRC
| (~i
& PATTERN_COUNT_MASK
);
248 for ( ; i
< start
+ len
; i
++)
249 buf
[i
] = PATTERN_SRC
| PATTERN_COPY
250 | (~i
& PATTERN_COUNT_MASK
);
251 for ( ; i
< buf_size
; i
++)
252 buf
[i
] = PATTERN_SRC
| (~i
& PATTERN_COUNT_MASK
);
257 static void dmatest_init_dsts(u8
**bufs
, unsigned int start
, unsigned int len
,
258 unsigned int buf_size
)
263 for (; (buf
= *bufs
); bufs
++) {
264 for (i
= 0; i
< start
; i
++)
265 buf
[i
] = PATTERN_DST
| (~i
& PATTERN_COUNT_MASK
);
266 for ( ; i
< start
+ len
; i
++)
267 buf
[i
] = PATTERN_DST
| PATTERN_OVERWRITE
268 | (~i
& PATTERN_COUNT_MASK
);
269 for ( ; i
< buf_size
; i
++)
270 buf
[i
] = PATTERN_DST
| (~i
& PATTERN_COUNT_MASK
);
274 static void dmatest_mismatch(u8 actual
, u8 pattern
, unsigned int index
,
275 unsigned int counter
, bool is_srcbuf
)
277 u8 diff
= actual
^ pattern
;
278 u8 expected
= pattern
| (~counter
& PATTERN_COUNT_MASK
);
279 const char *thread_name
= current
->comm
;
282 pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n",
283 thread_name
, index
, expected
, actual
);
284 else if ((pattern
& PATTERN_COPY
)
285 && (diff
& (PATTERN_COPY
| PATTERN_OVERWRITE
)))
286 pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n",
287 thread_name
, index
, expected
, actual
);
288 else if (diff
& PATTERN_SRC
)
289 pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n",
290 thread_name
, index
, expected
, actual
);
292 pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n",
293 thread_name
, index
, expected
, actual
);
296 static unsigned int dmatest_verify(u8
**bufs
, unsigned int start
,
297 unsigned int end
, unsigned int counter
, u8 pattern
,
301 unsigned int error_count
= 0;
305 unsigned int counter_orig
= counter
;
307 for (; (buf
= *bufs
); bufs
++) {
308 counter
= counter_orig
;
309 for (i
= start
; i
< end
; i
++) {
311 expected
= pattern
| (~counter
& PATTERN_COUNT_MASK
);
312 if (actual
!= expected
) {
313 if (error_count
< MAX_ERROR_COUNT
)
314 dmatest_mismatch(actual
, pattern
, i
,
322 if (error_count
> MAX_ERROR_COUNT
)
323 pr_warn("%s: %u errors suppressed\n",
324 current
->comm
, error_count
- MAX_ERROR_COUNT
);
329 /* poor man's completion - we want to use wait_event_freezable() on it */
330 struct dmatest_done
{
332 wait_queue_head_t
*wait
;
335 static void dmatest_callback(void *arg
)
337 struct dmatest_done
*done
= arg
;
340 wake_up_all(done
->wait
);
343 static unsigned int min_odd(unsigned int x
, unsigned int y
)
345 unsigned int val
= min(x
, y
);
347 return val
% 2 ? val
: val
- 1;
350 static void result(const char *err
, unsigned int n
, unsigned int src_off
,
351 unsigned int dst_off
, unsigned int len
, unsigned long data
)
353 pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
354 current
->comm
, n
, err
, src_off
, dst_off
, len
, data
);
357 static void dbg_result(const char *err
, unsigned int n
, unsigned int src_off
,
358 unsigned int dst_off
, unsigned int len
,
361 pr_debug("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
362 current
->comm
, n
, err
, src_off
, dst_off
, len
, data
);
365 #define verbose_result(err, n, src_off, dst_off, len, data) ({ \
367 result(err, n, src_off, dst_off, len, data); \
369 dbg_result(err, n, src_off, dst_off, len, data);\
372 static unsigned long long dmatest_persec(s64 runtime
, unsigned int val
)
374 unsigned long long per_sec
= 1000000;
379 /* drop precision until runtime is 32-bits */
380 while (runtime
> UINT_MAX
) {
386 do_div(per_sec
, runtime
);
390 static unsigned long long dmatest_KBs(s64 runtime
, unsigned long long len
)
392 return dmatest_persec(runtime
, len
>> 10);
396 * This function repeatedly tests DMA transfers of various lengths and
397 * offsets for a given operation type until it is told to exit by
398 * kthread_stop(). There may be multiple threads running this function
399 * in parallel for a single channel, and there may be multiple channels
400 * being tested in parallel.
402 * Before each test, the source and destination buffer is initialized
403 * with a known pattern. This pattern is different depending on
404 * whether it's in an area which is supposed to be copied or
405 * overwritten, and different in the source and destination buffers.
406 * So if the DMA engine doesn't copy exactly what we tell it to copy,
409 static int dmatest_func(void *data
)
411 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_wait
);
412 struct dmatest_thread
*thread
= data
;
413 struct dmatest_done done
= { .wait
= &done_wait
};
414 struct dmatest_info
*info
;
415 struct dmatest_params
*params
;
416 struct dma_chan
*chan
;
417 struct dma_device
*dev
;
418 unsigned int error_count
;
419 unsigned int failed_tests
= 0;
420 unsigned int total_tests
= 0;
422 enum dma_status status
;
423 enum dma_ctrl_flags flags
;
431 unsigned long long total_len
= 0;
439 params
= &info
->params
;
442 if (thread
->type
== DMA_MEMCPY
)
443 src_cnt
= dst_cnt
= 1;
444 else if (thread
->type
== DMA_SG
)
445 src_cnt
= dst_cnt
= sg_buffers
;
446 else if (thread
->type
== DMA_XOR
) {
447 /* force odd to ensure dst = src */
448 src_cnt
= min_odd(params
->xor_sources
| 1, dev
->max_xor
);
450 } else if (thread
->type
== DMA_PQ
) {
451 /* force odd to ensure dst = src */
452 src_cnt
= min_odd(params
->pq_sources
| 1, dma_maxpq(dev
, 0));
455 pq_coefs
= kmalloc(params
->pq_sources
+1, GFP_KERNEL
);
457 goto err_thread_type
;
459 for (i
= 0; i
< src_cnt
; i
++)
462 goto err_thread_type
;
464 thread
->srcs
= kcalloc(src_cnt
+1, sizeof(u8
*), GFP_KERNEL
);
467 for (i
= 0; i
< src_cnt
; i
++) {
468 thread
->srcs
[i
] = kmalloc(params
->buf_size
, GFP_KERNEL
);
469 if (!thread
->srcs
[i
])
472 thread
->srcs
[i
] = NULL
;
474 thread
->dsts
= kcalloc(dst_cnt
+1, sizeof(u8
*), GFP_KERNEL
);
477 for (i
= 0; i
< dst_cnt
; i
++) {
478 thread
->dsts
[i
] = kmalloc(params
->buf_size
, GFP_KERNEL
);
479 if (!thread
->dsts
[i
])
482 thread
->dsts
[i
] = NULL
;
484 set_user_nice(current
, 10);
487 * src and dst buffers are freed by ourselves below
489 flags
= DMA_CTRL_ACK
| DMA_PREP_INTERRUPT
;
492 while (!kthread_should_stop()
493 && !(params
->iterations
&& total_tests
>= params
->iterations
)) {
494 struct dma_async_tx_descriptor
*tx
= NULL
;
495 struct dmaengine_unmap_data
*um
;
496 dma_addr_t srcs
[src_cnt
];
498 unsigned int src_off
, dst_off
, len
;
500 struct scatterlist tx_sg
[src_cnt
];
501 struct scatterlist rx_sg
[src_cnt
];
505 /* honor alignment restrictions */
506 if (thread
->type
== DMA_MEMCPY
)
507 align
= dev
->copy_align
;
508 else if (thread
->type
== DMA_XOR
)
509 align
= dev
->xor_align
;
510 else if (thread
->type
== DMA_PQ
)
511 align
= dev
->pq_align
;
513 if (1 << align
> params
->buf_size
) {
514 pr_err("%u-byte buffer too small for %d-byte alignment\n",
515 params
->buf_size
, 1 << align
);
519 if (params
->noverify
)
520 len
= params
->buf_size
;
522 len
= dmatest_random() % params
->buf_size
+ 1;
524 len
= (len
>> align
) << align
;
530 if (params
->noverify
) {
534 src_off
= dmatest_random() % (params
->buf_size
- len
+ 1);
535 dst_off
= dmatest_random() % (params
->buf_size
- len
+ 1);
537 src_off
= (src_off
>> align
) << align
;
538 dst_off
= (dst_off
>> align
) << align
;
540 dmatest_init_srcs(thread
->srcs
, src_off
, len
,
542 dmatest_init_dsts(thread
->dsts
, dst_off
, len
,
546 um
= dmaengine_get_unmap_data(dev
->dev
, src_cnt
+dst_cnt
,
550 result("unmap data NULL", total_tests
,
551 src_off
, dst_off
, len
, ret
);
555 um
->len
= params
->buf_size
;
556 for (i
= 0; i
< src_cnt
; i
++) {
557 void *buf
= thread
->srcs
[i
];
558 struct page
*pg
= virt_to_page(buf
);
559 unsigned pg_off
= (unsigned long) buf
& ~PAGE_MASK
;
561 um
->addr
[i
] = dma_map_page(dev
->dev
, pg
, pg_off
,
562 um
->len
, DMA_TO_DEVICE
);
563 srcs
[i
] = um
->addr
[i
] + src_off
;
564 ret
= dma_mapping_error(dev
->dev
, um
->addr
[i
]);
566 dmaengine_unmap_put(um
);
567 result("src mapping error", total_tests
,
568 src_off
, dst_off
, len
, ret
);
574 /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
575 dsts
= &um
->addr
[src_cnt
];
576 for (i
= 0; i
< dst_cnt
; i
++) {
577 void *buf
= thread
->dsts
[i
];
578 struct page
*pg
= virt_to_page(buf
);
579 unsigned pg_off
= (unsigned long) buf
& ~PAGE_MASK
;
581 dsts
[i
] = dma_map_page(dev
->dev
, pg
, pg_off
, um
->len
,
583 ret
= dma_mapping_error(dev
->dev
, dsts
[i
]);
585 dmaengine_unmap_put(um
);
586 result("dst mapping error", total_tests
,
587 src_off
, dst_off
, len
, ret
);
594 sg_init_table(tx_sg
, src_cnt
);
595 sg_init_table(rx_sg
, src_cnt
);
596 for (i
= 0; i
< src_cnt
; i
++) {
597 sg_dma_address(&rx_sg
[i
]) = srcs
[i
];
598 sg_dma_address(&tx_sg
[i
]) = dsts
[i
] + dst_off
;
599 sg_dma_len(&tx_sg
[i
]) = len
;
600 sg_dma_len(&rx_sg
[i
]) = len
;
603 if (thread
->type
== DMA_MEMCPY
)
604 tx
= dev
->device_prep_dma_memcpy(chan
,
606 srcs
[0], len
, flags
);
607 else if (thread
->type
== DMA_SG
)
608 tx
= dev
->device_prep_dma_sg(chan
, tx_sg
, src_cnt
,
609 rx_sg
, src_cnt
, flags
);
610 else if (thread
->type
== DMA_XOR
)
611 tx
= dev
->device_prep_dma_xor(chan
,
615 else if (thread
->type
== DMA_PQ
) {
616 dma_addr_t dma_pq
[dst_cnt
];
618 for (i
= 0; i
< dst_cnt
; i
++)
619 dma_pq
[i
] = dsts
[i
] + dst_off
;
620 tx
= dev
->device_prep_dma_pq(chan
, dma_pq
, srcs
,
626 dmaengine_unmap_put(um
);
627 result("prep error", total_tests
, src_off
,
635 tx
->callback
= dmatest_callback
;
636 tx
->callback_param
= &done
;
637 cookie
= tx
->tx_submit(tx
);
639 if (dma_submit_error(cookie
)) {
640 dmaengine_unmap_put(um
);
641 result("submit error", total_tests
, src_off
,
647 dma_async_issue_pending(chan
);
649 wait_event_freezable_timeout(done_wait
, done
.done
,
650 msecs_to_jiffies(params
->timeout
));
652 status
= dma_async_is_tx_complete(chan
, cookie
, NULL
, NULL
);
656 * We're leaving the timed out dma operation with
657 * dangling pointer to done_wait. To make this
658 * correct, we'll need to allocate wait_done for
659 * each test iteration and perform "who's gonna
660 * free it this time?" dancing. For now, just
663 dmaengine_unmap_put(um
);
664 result("test timed out", total_tests
, src_off
, dst_off
,
668 } else if (status
!= DMA_COMPLETE
) {
669 dmaengine_unmap_put(um
);
670 result(status
== DMA_ERROR
?
671 "completion error status" :
672 "completion busy status", total_tests
, src_off
,
678 dmaengine_unmap_put(um
);
680 if (params
->noverify
) {
681 verbose_result("test passed", total_tests
, src_off
,
686 pr_debug("%s: verifying source buffer...\n", current
->comm
);
687 error_count
= dmatest_verify(thread
->srcs
, 0, src_off
,
688 0, PATTERN_SRC
, true);
689 error_count
+= dmatest_verify(thread
->srcs
, src_off
,
690 src_off
+ len
, src_off
,
691 PATTERN_SRC
| PATTERN_COPY
, true);
692 error_count
+= dmatest_verify(thread
->srcs
, src_off
+ len
,
693 params
->buf_size
, src_off
+ len
,
696 pr_debug("%s: verifying dest buffer...\n", current
->comm
);
697 error_count
+= dmatest_verify(thread
->dsts
, 0, dst_off
,
698 0, PATTERN_DST
, false);
699 error_count
+= dmatest_verify(thread
->dsts
, dst_off
,
700 dst_off
+ len
, src_off
,
701 PATTERN_SRC
| PATTERN_COPY
, false);
702 error_count
+= dmatest_verify(thread
->dsts
, dst_off
+ len
,
703 params
->buf_size
, dst_off
+ len
,
707 result("data error", total_tests
, src_off
, dst_off
,
711 verbose_result("test passed", total_tests
, src_off
,
715 runtime
= ktime_us_delta(ktime_get(), ktime
);
719 for (i
= 0; thread
->dsts
[i
]; i
++)
720 kfree(thread
->dsts
[i
]);
724 for (i
= 0; thread
->srcs
[i
]; i
++)
725 kfree(thread
->srcs
[i
]);
730 pr_info("%s: summary %u tests, %u failures %llu iops %llu KB/s (%d)\n",
731 current
->comm
, total_tests
, failed_tests
,
732 dmatest_persec(runtime
, total_tests
),
733 dmatest_KBs(runtime
, total_len
), ret
);
735 /* terminate all transfers on specified channels */
737 dmaengine_terminate_all(chan
);
740 wake_up(&thread_wait
);
745 static void dmatest_cleanup_channel(struct dmatest_chan
*dtc
)
747 struct dmatest_thread
*thread
;
748 struct dmatest_thread
*_thread
;
751 list_for_each_entry_safe(thread
, _thread
, &dtc
->threads
, node
) {
752 ret
= kthread_stop(thread
->task
);
753 pr_debug("thread %s exited with status %d\n",
754 thread
->task
->comm
, ret
);
755 list_del(&thread
->node
);
756 put_task_struct(thread
->task
);
760 /* terminate all transfers on specified channels */
761 dmaengine_terminate_all(dtc
->chan
);
766 static int dmatest_add_threads(struct dmatest_info
*info
,
767 struct dmatest_chan
*dtc
, enum dma_transaction_type type
)
769 struct dmatest_params
*params
= &info
->params
;
770 struct dmatest_thread
*thread
;
771 struct dma_chan
*chan
= dtc
->chan
;
775 if (type
== DMA_MEMCPY
)
777 else if (type
== DMA_SG
)
779 else if (type
== DMA_XOR
)
781 else if (type
== DMA_PQ
)
786 for (i
= 0; i
< params
->threads_per_chan
; i
++) {
787 thread
= kzalloc(sizeof(struct dmatest_thread
), GFP_KERNEL
);
789 pr_warn("No memory for %s-%s%u\n",
790 dma_chan_name(chan
), op
, i
);
794 thread
->chan
= dtc
->chan
;
797 thread
->task
= kthread_create(dmatest_func
, thread
, "%s-%s%u",
798 dma_chan_name(chan
), op
, i
);
799 if (IS_ERR(thread
->task
)) {
800 pr_warn("Failed to create thread %s-%s%u\n",
801 dma_chan_name(chan
), op
, i
);
806 /* srcbuf and dstbuf are allocated by the thread itself */
807 get_task_struct(thread
->task
);
808 list_add_tail(&thread
->node
, &dtc
->threads
);
809 wake_up_process(thread
->task
);
815 static int dmatest_add_channel(struct dmatest_info
*info
,
816 struct dma_chan
*chan
)
818 struct dmatest_chan
*dtc
;
819 struct dma_device
*dma_dev
= chan
->device
;
820 unsigned int thread_count
= 0;
823 dtc
= kmalloc(sizeof(struct dmatest_chan
), GFP_KERNEL
);
825 pr_warn("No memory for %s\n", dma_chan_name(chan
));
830 INIT_LIST_HEAD(&dtc
->threads
);
832 if (dma_has_cap(DMA_MEMCPY
, dma_dev
->cap_mask
)) {
834 cnt
= dmatest_add_threads(info
, dtc
, DMA_MEMCPY
);
835 thread_count
+= cnt
> 0 ? cnt
: 0;
839 if (dma_has_cap(DMA_SG
, dma_dev
->cap_mask
)) {
841 cnt
= dmatest_add_threads(info
, dtc
, DMA_SG
);
842 thread_count
+= cnt
> 0 ? cnt
: 0;
846 if (dma_has_cap(DMA_XOR
, dma_dev
->cap_mask
)) {
847 cnt
= dmatest_add_threads(info
, dtc
, DMA_XOR
);
848 thread_count
+= cnt
> 0 ? cnt
: 0;
850 if (dma_has_cap(DMA_PQ
, dma_dev
->cap_mask
)) {
851 cnt
= dmatest_add_threads(info
, dtc
, DMA_PQ
);
852 thread_count
+= cnt
> 0 ? cnt
: 0;
855 pr_info("Started %u threads using %s\n",
856 thread_count
, dma_chan_name(chan
));
858 list_add_tail(&dtc
->node
, &info
->channels
);
864 static bool filter(struct dma_chan
*chan
, void *param
)
866 struct dmatest_params
*params
= param
;
868 if (!dmatest_match_channel(params
, chan
) ||
869 !dmatest_match_device(params
, chan
->device
))
875 static void request_channels(struct dmatest_info
*info
,
876 enum dma_transaction_type type
)
881 dma_cap_set(type
, mask
);
883 struct dmatest_params
*params
= &info
->params
;
884 struct dma_chan
*chan
;
886 chan
= dma_request_channel(mask
, filter
, params
);
888 if (dmatest_add_channel(info
, chan
)) {
889 dma_release_channel(chan
);
890 break; /* add_channel failed, punt */
893 break; /* no more channels available */
894 if (params
->max_channels
&&
895 info
->nr_channels
>= params
->max_channels
)
896 break; /* we have all we need */
900 static void run_threaded_test(struct dmatest_info
*info
)
902 struct dmatest_params
*params
= &info
->params
;
904 /* Copy test parameters */
905 params
->buf_size
= test_buf_size
;
906 strlcpy(params
->channel
, strim(test_channel
), sizeof(params
->channel
));
907 strlcpy(params
->device
, strim(test_device
), sizeof(params
->device
));
908 params
->threads_per_chan
= threads_per_chan
;
909 params
->max_channels
= max_channels
;
910 params
->iterations
= iterations
;
911 params
->xor_sources
= xor_sources
;
912 params
->pq_sources
= pq_sources
;
913 params
->timeout
= timeout
;
914 params
->noverify
= noverify
;
916 request_channels(info
, DMA_MEMCPY
);
917 request_channels(info
, DMA_XOR
);
918 request_channels(info
, DMA_SG
);
919 request_channels(info
, DMA_PQ
);
922 static void stop_threaded_test(struct dmatest_info
*info
)
924 struct dmatest_chan
*dtc
, *_dtc
;
925 struct dma_chan
*chan
;
927 list_for_each_entry_safe(dtc
, _dtc
, &info
->channels
, node
) {
928 list_del(&dtc
->node
);
930 dmatest_cleanup_channel(dtc
);
931 pr_debug("dropped channel %s\n", dma_chan_name(chan
));
932 dma_release_channel(chan
);
935 info
->nr_channels
= 0;
938 static void restart_threaded_test(struct dmatest_info
*info
, bool run
)
940 /* we might be called early to set run=, defer running until all
941 * parameters have been evaluated
946 /* Stop any running test first */
947 stop_threaded_test(info
);
949 /* Run test with new parameters */
950 run_threaded_test(info
);
953 static int dmatest_run_get(char *val
, const struct kernel_param
*kp
)
955 struct dmatest_info
*info
= &test_info
;
957 mutex_lock(&info
->lock
);
958 if (is_threaded_test_run(info
)) {
961 stop_threaded_test(info
);
964 mutex_unlock(&info
->lock
);
966 return param_get_bool(val
, kp
);
969 static int dmatest_run_set(const char *val
, const struct kernel_param
*kp
)
971 struct dmatest_info
*info
= &test_info
;
974 mutex_lock(&info
->lock
);
975 ret
= param_set_bool(val
, kp
);
977 mutex_unlock(&info
->lock
);
981 if (is_threaded_test_run(info
))
983 else if (dmatest_run
)
984 restart_threaded_test(info
, dmatest_run
);
986 mutex_unlock(&info
->lock
);
991 static int __init
dmatest_init(void)
993 struct dmatest_info
*info
= &test_info
;
994 struct dmatest_params
*params
= &info
->params
;
997 mutex_lock(&info
->lock
);
998 run_threaded_test(info
);
999 mutex_unlock(&info
->lock
);
1002 if (params
->iterations
&& wait
)
1003 wait_event(thread_wait
, !is_threaded_test_run(info
));
1005 /* module parameters are stable, inittime tests are started,
1006 * let userspace take over 'run' control
1008 info
->did_init
= true;
1012 /* when compiled-in wait for drivers to load first */
1013 late_initcall(dmatest_init
);
1015 static void __exit
dmatest_exit(void)
1017 struct dmatest_info
*info
= &test_info
;
1019 mutex_lock(&info
->lock
);
1020 stop_threaded_test(info
);
1021 mutex_unlock(&info
->lock
);
1023 module_exit(dmatest_exit
);
1025 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
1026 MODULE_LICENSE("GPL v2");