arm64: Distinguish between user and kernel XN bits
[deliverable/linux.git] / drivers / edac / edac_mc_sysfs.c
1 /*
2 * edac_mc kernel module
3 * (C) 2005-2007 Linux Networx (http://lnxi.com)
4 *
5 * This file may be distributed under the terms of the
6 * GNU General Public License.
7 *
8 * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com
9 *
10 * (c) 2012 - Mauro Carvalho Chehab <mchehab@redhat.com>
11 * The entire API were re-written, and ported to use struct device
12 *
13 */
14
15 #include <linux/ctype.h>
16 #include <linux/slab.h>
17 #include <linux/edac.h>
18 #include <linux/bug.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/uaccess.h>
21
22 #include "edac_core.h"
23 #include "edac_module.h"
24
25 /* MC EDAC Controls, setable by module parameter, and sysfs */
26 static int edac_mc_log_ue = 1;
27 static int edac_mc_log_ce = 1;
28 static int edac_mc_panic_on_ue;
29 static int edac_mc_poll_msec = 1000;
30
31 /* Getter functions for above */
32 int edac_mc_get_log_ue(void)
33 {
34 return edac_mc_log_ue;
35 }
36
37 int edac_mc_get_log_ce(void)
38 {
39 return edac_mc_log_ce;
40 }
41
42 int edac_mc_get_panic_on_ue(void)
43 {
44 return edac_mc_panic_on_ue;
45 }
46
47 /* this is temporary */
48 int edac_mc_get_poll_msec(void)
49 {
50 return edac_mc_poll_msec;
51 }
52
53 static int edac_set_poll_msec(const char *val, struct kernel_param *kp)
54 {
55 long l;
56 int ret;
57
58 if (!val)
59 return -EINVAL;
60
61 ret = strict_strtol(val, 0, &l);
62 if (ret == -EINVAL || ((int)l != l))
63 return -EINVAL;
64 *((int *)kp->arg) = l;
65
66 /* notify edac_mc engine to reset the poll period */
67 edac_mc_reset_delay_period(l);
68
69 return 0;
70 }
71
72 /* Parameter declarations for above */
73 module_param(edac_mc_panic_on_ue, int, 0644);
74 MODULE_PARM_DESC(edac_mc_panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
75 module_param(edac_mc_log_ue, int, 0644);
76 MODULE_PARM_DESC(edac_mc_log_ue,
77 "Log uncorrectable error to console: 0=off 1=on");
78 module_param(edac_mc_log_ce, int, 0644);
79 MODULE_PARM_DESC(edac_mc_log_ce,
80 "Log correctable error to console: 0=off 1=on");
81 module_param_call(edac_mc_poll_msec, edac_set_poll_msec, param_get_int,
82 &edac_mc_poll_msec, 0644);
83 MODULE_PARM_DESC(edac_mc_poll_msec, "Polling period in milliseconds");
84
85 static struct device *mci_pdev;
86
87 /*
88 * various constants for Memory Controllers
89 */
90 static const char *mem_types[] = {
91 [MEM_EMPTY] = "Empty",
92 [MEM_RESERVED] = "Reserved",
93 [MEM_UNKNOWN] = "Unknown",
94 [MEM_FPM] = "FPM",
95 [MEM_EDO] = "EDO",
96 [MEM_BEDO] = "BEDO",
97 [MEM_SDR] = "Unbuffered-SDR",
98 [MEM_RDR] = "Registered-SDR",
99 [MEM_DDR] = "Unbuffered-DDR",
100 [MEM_RDDR] = "Registered-DDR",
101 [MEM_RMBS] = "RMBS",
102 [MEM_DDR2] = "Unbuffered-DDR2",
103 [MEM_FB_DDR2] = "FullyBuffered-DDR2",
104 [MEM_RDDR2] = "Registered-DDR2",
105 [MEM_XDR] = "XDR",
106 [MEM_DDR3] = "Unbuffered-DDR3",
107 [MEM_RDDR3] = "Registered-DDR3"
108 };
109
110 static const char *dev_types[] = {
111 [DEV_UNKNOWN] = "Unknown",
112 [DEV_X1] = "x1",
113 [DEV_X2] = "x2",
114 [DEV_X4] = "x4",
115 [DEV_X8] = "x8",
116 [DEV_X16] = "x16",
117 [DEV_X32] = "x32",
118 [DEV_X64] = "x64"
119 };
120
121 static const char *edac_caps[] = {
122 [EDAC_UNKNOWN] = "Unknown",
123 [EDAC_NONE] = "None",
124 [EDAC_RESERVED] = "Reserved",
125 [EDAC_PARITY] = "PARITY",
126 [EDAC_EC] = "EC",
127 [EDAC_SECDED] = "SECDED",
128 [EDAC_S2ECD2ED] = "S2ECD2ED",
129 [EDAC_S4ECD4ED] = "S4ECD4ED",
130 [EDAC_S8ECD8ED] = "S8ECD8ED",
131 [EDAC_S16ECD16ED] = "S16ECD16ED"
132 };
133
134 #ifdef CONFIG_EDAC_LEGACY_SYSFS
135 /*
136 * EDAC sysfs CSROW data structures and methods
137 */
138
139 #define to_csrow(k) container_of(k, struct csrow_info, dev)
140
141 /*
142 * We need it to avoid namespace conflicts between the legacy API
143 * and the per-dimm/per-rank one
144 */
145 #define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \
146 struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
147
148 struct dev_ch_attribute {
149 struct device_attribute attr;
150 int channel;
151 };
152
153 #define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
154 struct dev_ch_attribute dev_attr_legacy_##_name = \
155 { __ATTR(_name, _mode, _show, _store), (_var) }
156
157 #define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel)
158
159 /* Set of more default csrow<id> attribute show/store functions */
160 static ssize_t csrow_ue_count_show(struct device *dev,
161 struct device_attribute *mattr, char *data)
162 {
163 struct csrow_info *csrow = to_csrow(dev);
164
165 return sprintf(data, "%u\n", csrow->ue_count);
166 }
167
168 static ssize_t csrow_ce_count_show(struct device *dev,
169 struct device_attribute *mattr, char *data)
170 {
171 struct csrow_info *csrow = to_csrow(dev);
172
173 return sprintf(data, "%u\n", csrow->ce_count);
174 }
175
176 static ssize_t csrow_size_show(struct device *dev,
177 struct device_attribute *mattr, char *data)
178 {
179 struct csrow_info *csrow = to_csrow(dev);
180 int i;
181 u32 nr_pages = 0;
182
183 for (i = 0; i < csrow->nr_channels; i++)
184 nr_pages += csrow->channels[i]->dimm->nr_pages;
185 return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages));
186 }
187
188 static ssize_t csrow_mem_type_show(struct device *dev,
189 struct device_attribute *mattr, char *data)
190 {
191 struct csrow_info *csrow = to_csrow(dev);
192
193 return sprintf(data, "%s\n", mem_types[csrow->channels[0]->dimm->mtype]);
194 }
195
196 static ssize_t csrow_dev_type_show(struct device *dev,
197 struct device_attribute *mattr, char *data)
198 {
199 struct csrow_info *csrow = to_csrow(dev);
200
201 return sprintf(data, "%s\n", dev_types[csrow->channels[0]->dimm->dtype]);
202 }
203
204 static ssize_t csrow_edac_mode_show(struct device *dev,
205 struct device_attribute *mattr,
206 char *data)
207 {
208 struct csrow_info *csrow = to_csrow(dev);
209
210 return sprintf(data, "%s\n", edac_caps[csrow->channels[0]->dimm->edac_mode]);
211 }
212
213 /* show/store functions for DIMM Label attributes */
214 static ssize_t channel_dimm_label_show(struct device *dev,
215 struct device_attribute *mattr,
216 char *data)
217 {
218 struct csrow_info *csrow = to_csrow(dev);
219 unsigned chan = to_channel(mattr);
220 struct rank_info *rank = csrow->channels[chan];
221
222 /* if field has not been initialized, there is nothing to send */
223 if (!rank->dimm->label[0])
224 return 0;
225
226 return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n",
227 rank->dimm->label);
228 }
229
230 static ssize_t channel_dimm_label_store(struct device *dev,
231 struct device_attribute *mattr,
232 const char *data, size_t count)
233 {
234 struct csrow_info *csrow = to_csrow(dev);
235 unsigned chan = to_channel(mattr);
236 struct rank_info *rank = csrow->channels[chan];
237
238 ssize_t max_size = 0;
239
240 max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
241 strncpy(rank->dimm->label, data, max_size);
242 rank->dimm->label[max_size] = '\0';
243
244 return max_size;
245 }
246
247 /* show function for dynamic chX_ce_count attribute */
248 static ssize_t channel_ce_count_show(struct device *dev,
249 struct device_attribute *mattr, char *data)
250 {
251 struct csrow_info *csrow = to_csrow(dev);
252 unsigned chan = to_channel(mattr);
253 struct rank_info *rank = csrow->channels[chan];
254
255 return sprintf(data, "%u\n", rank->ce_count);
256 }
257
258 /* cwrow<id>/attribute files */
259 DEVICE_ATTR_LEGACY(size_mb, S_IRUGO, csrow_size_show, NULL);
260 DEVICE_ATTR_LEGACY(dev_type, S_IRUGO, csrow_dev_type_show, NULL);
261 DEVICE_ATTR_LEGACY(mem_type, S_IRUGO, csrow_mem_type_show, NULL);
262 DEVICE_ATTR_LEGACY(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL);
263 DEVICE_ATTR_LEGACY(ue_count, S_IRUGO, csrow_ue_count_show, NULL);
264 DEVICE_ATTR_LEGACY(ce_count, S_IRUGO, csrow_ce_count_show, NULL);
265
266 /* default attributes of the CSROW<id> object */
267 static struct attribute *csrow_attrs[] = {
268 &dev_attr_legacy_dev_type.attr,
269 &dev_attr_legacy_mem_type.attr,
270 &dev_attr_legacy_edac_mode.attr,
271 &dev_attr_legacy_size_mb.attr,
272 &dev_attr_legacy_ue_count.attr,
273 &dev_attr_legacy_ce_count.attr,
274 NULL,
275 };
276
277 static struct attribute_group csrow_attr_grp = {
278 .attrs = csrow_attrs,
279 };
280
281 static const struct attribute_group *csrow_attr_groups[] = {
282 &csrow_attr_grp,
283 NULL
284 };
285
286 static void csrow_attr_release(struct device *dev)
287 {
288 struct csrow_info *csrow = container_of(dev, struct csrow_info, dev);
289
290 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev));
291 kfree(csrow);
292 }
293
294 static struct device_type csrow_attr_type = {
295 .groups = csrow_attr_groups,
296 .release = csrow_attr_release,
297 };
298
299 /*
300 * possible dynamic channel DIMM Label attribute files
301 *
302 */
303
304 #define EDAC_NR_CHANNELS 6
305
306 DEVICE_CHANNEL(ch0_dimm_label, S_IRUGO | S_IWUSR,
307 channel_dimm_label_show, channel_dimm_label_store, 0);
308 DEVICE_CHANNEL(ch1_dimm_label, S_IRUGO | S_IWUSR,
309 channel_dimm_label_show, channel_dimm_label_store, 1);
310 DEVICE_CHANNEL(ch2_dimm_label, S_IRUGO | S_IWUSR,
311 channel_dimm_label_show, channel_dimm_label_store, 2);
312 DEVICE_CHANNEL(ch3_dimm_label, S_IRUGO | S_IWUSR,
313 channel_dimm_label_show, channel_dimm_label_store, 3);
314 DEVICE_CHANNEL(ch4_dimm_label, S_IRUGO | S_IWUSR,
315 channel_dimm_label_show, channel_dimm_label_store, 4);
316 DEVICE_CHANNEL(ch5_dimm_label, S_IRUGO | S_IWUSR,
317 channel_dimm_label_show, channel_dimm_label_store, 5);
318
319 /* Total possible dynamic DIMM Label attribute file table */
320 static struct device_attribute *dynamic_csrow_dimm_attr[] = {
321 &dev_attr_legacy_ch0_dimm_label.attr,
322 &dev_attr_legacy_ch1_dimm_label.attr,
323 &dev_attr_legacy_ch2_dimm_label.attr,
324 &dev_attr_legacy_ch3_dimm_label.attr,
325 &dev_attr_legacy_ch4_dimm_label.attr,
326 &dev_attr_legacy_ch5_dimm_label.attr
327 };
328
329 /* possible dynamic channel ce_count attribute files */
330 DEVICE_CHANNEL(ch0_ce_count, S_IRUGO | S_IWUSR,
331 channel_ce_count_show, NULL, 0);
332 DEVICE_CHANNEL(ch1_ce_count, S_IRUGO | S_IWUSR,
333 channel_ce_count_show, NULL, 1);
334 DEVICE_CHANNEL(ch2_ce_count, S_IRUGO | S_IWUSR,
335 channel_ce_count_show, NULL, 2);
336 DEVICE_CHANNEL(ch3_ce_count, S_IRUGO | S_IWUSR,
337 channel_ce_count_show, NULL, 3);
338 DEVICE_CHANNEL(ch4_ce_count, S_IRUGO | S_IWUSR,
339 channel_ce_count_show, NULL, 4);
340 DEVICE_CHANNEL(ch5_ce_count, S_IRUGO | S_IWUSR,
341 channel_ce_count_show, NULL, 5);
342
343 /* Total possible dynamic ce_count attribute file table */
344 static struct device_attribute *dynamic_csrow_ce_count_attr[] = {
345 &dev_attr_legacy_ch0_ce_count.attr,
346 &dev_attr_legacy_ch1_ce_count.attr,
347 &dev_attr_legacy_ch2_ce_count.attr,
348 &dev_attr_legacy_ch3_ce_count.attr,
349 &dev_attr_legacy_ch4_ce_count.attr,
350 &dev_attr_legacy_ch5_ce_count.attr
351 };
352
353 static inline int nr_pages_per_csrow(struct csrow_info *csrow)
354 {
355 int chan, nr_pages = 0;
356
357 for (chan = 0; chan < csrow->nr_channels; chan++)
358 nr_pages += csrow->channels[chan]->dimm->nr_pages;
359
360 return nr_pages;
361 }
362
363 /* Create a CSROW object under specifed edac_mc_device */
364 static int edac_create_csrow_object(struct mem_ctl_info *mci,
365 struct csrow_info *csrow, int index)
366 {
367 int err, chan;
368
369 if (csrow->nr_channels >= EDAC_NR_CHANNELS)
370 return -ENODEV;
371
372 csrow->dev.type = &csrow_attr_type;
373 csrow->dev.bus = &mci->bus;
374 device_initialize(&csrow->dev);
375 csrow->dev.parent = &mci->dev;
376 dev_set_name(&csrow->dev, "csrow%d", index);
377 dev_set_drvdata(&csrow->dev, csrow);
378
379 edac_dbg(0, "creating (virtual) csrow node %s\n",
380 dev_name(&csrow->dev));
381
382 err = device_add(&csrow->dev);
383 if (err < 0)
384 return err;
385
386 for (chan = 0; chan < csrow->nr_channels; chan++) {
387 /* Only expose populated DIMMs */
388 if (!csrow->channels[chan]->dimm->nr_pages)
389 continue;
390 err = device_create_file(&csrow->dev,
391 dynamic_csrow_dimm_attr[chan]);
392 if (err < 0)
393 goto error;
394 err = device_create_file(&csrow->dev,
395 dynamic_csrow_ce_count_attr[chan]);
396 if (err < 0) {
397 device_remove_file(&csrow->dev,
398 dynamic_csrow_dimm_attr[chan]);
399 goto error;
400 }
401 }
402
403 return 0;
404
405 error:
406 for (--chan; chan >= 0; chan--) {
407 device_remove_file(&csrow->dev,
408 dynamic_csrow_dimm_attr[chan]);
409 device_remove_file(&csrow->dev,
410 dynamic_csrow_ce_count_attr[chan]);
411 }
412 put_device(&csrow->dev);
413
414 return err;
415 }
416
417 /* Create a CSROW object under specifed edac_mc_device */
418 static int edac_create_csrow_objects(struct mem_ctl_info *mci)
419 {
420 int err, i, chan;
421 struct csrow_info *csrow;
422
423 for (i = 0; i < mci->nr_csrows; i++) {
424 csrow = mci->csrows[i];
425 if (!nr_pages_per_csrow(csrow))
426 continue;
427 err = edac_create_csrow_object(mci, mci->csrows[i], i);
428 if (err < 0)
429 goto error;
430 }
431 return 0;
432
433 error:
434 for (--i; i >= 0; i--) {
435 csrow = mci->csrows[i];
436 if (!nr_pages_per_csrow(csrow))
437 continue;
438 for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
439 if (!csrow->channels[chan]->dimm->nr_pages)
440 continue;
441 device_remove_file(&csrow->dev,
442 dynamic_csrow_dimm_attr[chan]);
443 device_remove_file(&csrow->dev,
444 dynamic_csrow_ce_count_attr[chan]);
445 }
446 put_device(&mci->csrows[i]->dev);
447 }
448
449 return err;
450 }
451
452 static void edac_delete_csrow_objects(struct mem_ctl_info *mci)
453 {
454 int i, chan;
455 struct csrow_info *csrow;
456
457 for (i = mci->nr_csrows - 1; i >= 0; i--) {
458 csrow = mci->csrows[i];
459 if (!nr_pages_per_csrow(csrow))
460 continue;
461 for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
462 if (!csrow->channels[chan]->dimm->nr_pages)
463 continue;
464 edac_dbg(1, "Removing csrow %d channel %d sysfs nodes\n",
465 i, chan);
466 device_remove_file(&csrow->dev,
467 dynamic_csrow_dimm_attr[chan]);
468 device_remove_file(&csrow->dev,
469 dynamic_csrow_ce_count_attr[chan]);
470 }
471 put_device(&mci->csrows[i]->dev);
472 device_del(&mci->csrows[i]->dev);
473 }
474 }
475 #endif
476
477 /*
478 * Per-dimm (or per-rank) devices
479 */
480
481 #define to_dimm(k) container_of(k, struct dimm_info, dev)
482
483 /* show/store functions for DIMM Label attributes */
484 static ssize_t dimmdev_location_show(struct device *dev,
485 struct device_attribute *mattr, char *data)
486 {
487 struct dimm_info *dimm = to_dimm(dev);
488
489 return edac_dimm_info_location(dimm, data, PAGE_SIZE);
490 }
491
492 static ssize_t dimmdev_label_show(struct device *dev,
493 struct device_attribute *mattr, char *data)
494 {
495 struct dimm_info *dimm = to_dimm(dev);
496
497 /* if field has not been initialized, there is nothing to send */
498 if (!dimm->label[0])
499 return 0;
500
501 return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", dimm->label);
502 }
503
504 static ssize_t dimmdev_label_store(struct device *dev,
505 struct device_attribute *mattr,
506 const char *data,
507 size_t count)
508 {
509 struct dimm_info *dimm = to_dimm(dev);
510
511 ssize_t max_size = 0;
512
513 max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
514 strncpy(dimm->label, data, max_size);
515 dimm->label[max_size] = '\0';
516
517 return max_size;
518 }
519
520 static ssize_t dimmdev_size_show(struct device *dev,
521 struct device_attribute *mattr, char *data)
522 {
523 struct dimm_info *dimm = to_dimm(dev);
524
525 return sprintf(data, "%u\n", PAGES_TO_MiB(dimm->nr_pages));
526 }
527
528 static ssize_t dimmdev_mem_type_show(struct device *dev,
529 struct device_attribute *mattr, char *data)
530 {
531 struct dimm_info *dimm = to_dimm(dev);
532
533 return sprintf(data, "%s\n", mem_types[dimm->mtype]);
534 }
535
536 static ssize_t dimmdev_dev_type_show(struct device *dev,
537 struct device_attribute *mattr, char *data)
538 {
539 struct dimm_info *dimm = to_dimm(dev);
540
541 return sprintf(data, "%s\n", dev_types[dimm->dtype]);
542 }
543
544 static ssize_t dimmdev_edac_mode_show(struct device *dev,
545 struct device_attribute *mattr,
546 char *data)
547 {
548 struct dimm_info *dimm = to_dimm(dev);
549
550 return sprintf(data, "%s\n", edac_caps[dimm->edac_mode]);
551 }
552
553 /* dimm/rank attribute files */
554 static DEVICE_ATTR(dimm_label, S_IRUGO | S_IWUSR,
555 dimmdev_label_show, dimmdev_label_store);
556 static DEVICE_ATTR(dimm_location, S_IRUGO, dimmdev_location_show, NULL);
557 static DEVICE_ATTR(size, S_IRUGO, dimmdev_size_show, NULL);
558 static DEVICE_ATTR(dimm_mem_type, S_IRUGO, dimmdev_mem_type_show, NULL);
559 static DEVICE_ATTR(dimm_dev_type, S_IRUGO, dimmdev_dev_type_show, NULL);
560 static DEVICE_ATTR(dimm_edac_mode, S_IRUGO, dimmdev_edac_mode_show, NULL);
561
562 /* attributes of the dimm<id>/rank<id> object */
563 static struct attribute *dimm_attrs[] = {
564 &dev_attr_dimm_label.attr,
565 &dev_attr_dimm_location.attr,
566 &dev_attr_size.attr,
567 &dev_attr_dimm_mem_type.attr,
568 &dev_attr_dimm_dev_type.attr,
569 &dev_attr_dimm_edac_mode.attr,
570 NULL,
571 };
572
573 static struct attribute_group dimm_attr_grp = {
574 .attrs = dimm_attrs,
575 };
576
577 static const struct attribute_group *dimm_attr_groups[] = {
578 &dimm_attr_grp,
579 NULL
580 };
581
582 static void dimm_attr_release(struct device *dev)
583 {
584 struct dimm_info *dimm = container_of(dev, struct dimm_info, dev);
585
586 edac_dbg(1, "Releasing dimm device %s\n", dev_name(dev));
587 kfree(dimm);
588 }
589
590 static struct device_type dimm_attr_type = {
591 .groups = dimm_attr_groups,
592 .release = dimm_attr_release,
593 };
594
595 /* Create a DIMM object under specifed memory controller device */
596 static int edac_create_dimm_object(struct mem_ctl_info *mci,
597 struct dimm_info *dimm,
598 int index)
599 {
600 int err;
601 dimm->mci = mci;
602
603 dimm->dev.type = &dimm_attr_type;
604 dimm->dev.bus = &mci->bus;
605 device_initialize(&dimm->dev);
606
607 dimm->dev.parent = &mci->dev;
608 if (mci->mem_is_per_rank)
609 dev_set_name(&dimm->dev, "rank%d", index);
610 else
611 dev_set_name(&dimm->dev, "dimm%d", index);
612 dev_set_drvdata(&dimm->dev, dimm);
613 pm_runtime_forbid(&mci->dev);
614
615 err = device_add(&dimm->dev);
616
617 edac_dbg(0, "creating rank/dimm device %s\n", dev_name(&dimm->dev));
618
619 return err;
620 }
621
622 /*
623 * Memory controller device
624 */
625
626 #define to_mci(k) container_of(k, struct mem_ctl_info, dev)
627
628 static ssize_t mci_reset_counters_store(struct device *dev,
629 struct device_attribute *mattr,
630 const char *data, size_t count)
631 {
632 struct mem_ctl_info *mci = to_mci(dev);
633 int cnt, row, chan, i;
634 mci->ue_mc = 0;
635 mci->ce_mc = 0;
636 mci->ue_noinfo_count = 0;
637 mci->ce_noinfo_count = 0;
638
639 for (row = 0; row < mci->nr_csrows; row++) {
640 struct csrow_info *ri = mci->csrows[row];
641
642 ri->ue_count = 0;
643 ri->ce_count = 0;
644
645 for (chan = 0; chan < ri->nr_channels; chan++)
646 ri->channels[chan]->ce_count = 0;
647 }
648
649 cnt = 1;
650 for (i = 0; i < mci->n_layers; i++) {
651 cnt *= mci->layers[i].size;
652 memset(mci->ce_per_layer[i], 0, cnt * sizeof(u32));
653 memset(mci->ue_per_layer[i], 0, cnt * sizeof(u32));
654 }
655
656 mci->start_time = jiffies;
657 return count;
658 }
659
660 /* Memory scrubbing interface:
661 *
662 * A MC driver can limit the scrubbing bandwidth based on the CPU type.
663 * Therefore, ->set_sdram_scrub_rate should be made to return the actual
664 * bandwidth that is accepted or 0 when scrubbing is to be disabled.
665 *
666 * Negative value still means that an error has occurred while setting
667 * the scrub rate.
668 */
669 static ssize_t mci_sdram_scrub_rate_store(struct device *dev,
670 struct device_attribute *mattr,
671 const char *data, size_t count)
672 {
673 struct mem_ctl_info *mci = to_mci(dev);
674 unsigned long bandwidth = 0;
675 int new_bw = 0;
676
677 if (!mci->set_sdram_scrub_rate)
678 return -ENODEV;
679
680 if (strict_strtoul(data, 10, &bandwidth) < 0)
681 return -EINVAL;
682
683 new_bw = mci->set_sdram_scrub_rate(mci, bandwidth);
684 if (new_bw < 0) {
685 edac_printk(KERN_WARNING, EDAC_MC,
686 "Error setting scrub rate to: %lu\n", bandwidth);
687 return -EINVAL;
688 }
689
690 return count;
691 }
692
693 /*
694 * ->get_sdram_scrub_rate() return value semantics same as above.
695 */
696 static ssize_t mci_sdram_scrub_rate_show(struct device *dev,
697 struct device_attribute *mattr,
698 char *data)
699 {
700 struct mem_ctl_info *mci = to_mci(dev);
701 int bandwidth = 0;
702
703 if (!mci->get_sdram_scrub_rate)
704 return -ENODEV;
705
706 bandwidth = mci->get_sdram_scrub_rate(mci);
707 if (bandwidth < 0) {
708 edac_printk(KERN_DEBUG, EDAC_MC, "Error reading scrub rate\n");
709 return bandwidth;
710 }
711
712 return sprintf(data, "%d\n", bandwidth);
713 }
714
715 /* default attribute files for the MCI object */
716 static ssize_t mci_ue_count_show(struct device *dev,
717 struct device_attribute *mattr,
718 char *data)
719 {
720 struct mem_ctl_info *mci = to_mci(dev);
721
722 return sprintf(data, "%d\n", mci->ue_mc);
723 }
724
725 static ssize_t mci_ce_count_show(struct device *dev,
726 struct device_attribute *mattr,
727 char *data)
728 {
729 struct mem_ctl_info *mci = to_mci(dev);
730
731 return sprintf(data, "%d\n", mci->ce_mc);
732 }
733
734 static ssize_t mci_ce_noinfo_show(struct device *dev,
735 struct device_attribute *mattr,
736 char *data)
737 {
738 struct mem_ctl_info *mci = to_mci(dev);
739
740 return sprintf(data, "%d\n", mci->ce_noinfo_count);
741 }
742
743 static ssize_t mci_ue_noinfo_show(struct device *dev,
744 struct device_attribute *mattr,
745 char *data)
746 {
747 struct mem_ctl_info *mci = to_mci(dev);
748
749 return sprintf(data, "%d\n", mci->ue_noinfo_count);
750 }
751
752 static ssize_t mci_seconds_show(struct device *dev,
753 struct device_attribute *mattr,
754 char *data)
755 {
756 struct mem_ctl_info *mci = to_mci(dev);
757
758 return sprintf(data, "%ld\n", (jiffies - mci->start_time) / HZ);
759 }
760
761 static ssize_t mci_ctl_name_show(struct device *dev,
762 struct device_attribute *mattr,
763 char *data)
764 {
765 struct mem_ctl_info *mci = to_mci(dev);
766
767 return sprintf(data, "%s\n", mci->ctl_name);
768 }
769
770 static ssize_t mci_size_mb_show(struct device *dev,
771 struct device_attribute *mattr,
772 char *data)
773 {
774 struct mem_ctl_info *mci = to_mci(dev);
775 int total_pages = 0, csrow_idx, j;
776
777 for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) {
778 struct csrow_info *csrow = mci->csrows[csrow_idx];
779
780 for (j = 0; j < csrow->nr_channels; j++) {
781 struct dimm_info *dimm = csrow->channels[j]->dimm;
782
783 total_pages += dimm->nr_pages;
784 }
785 }
786
787 return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages));
788 }
789
790 static ssize_t mci_max_location_show(struct device *dev,
791 struct device_attribute *mattr,
792 char *data)
793 {
794 struct mem_ctl_info *mci = to_mci(dev);
795 int i;
796 char *p = data;
797
798 for (i = 0; i < mci->n_layers; i++) {
799 p += sprintf(p, "%s %d ",
800 edac_layer_name[mci->layers[i].type],
801 mci->layers[i].size - 1);
802 }
803
804 return p - data;
805 }
806
807 #ifdef CONFIG_EDAC_DEBUG
808 static ssize_t edac_fake_inject_write(struct file *file,
809 const char __user *data,
810 size_t count, loff_t *ppos)
811 {
812 struct device *dev = file->private_data;
813 struct mem_ctl_info *mci = to_mci(dev);
814 static enum hw_event_mc_err_type type;
815 u16 errcount = mci->fake_inject_count;
816
817 if (!errcount)
818 errcount = 1;
819
820 type = mci->fake_inject_ue ? HW_EVENT_ERR_UNCORRECTED
821 : HW_EVENT_ERR_CORRECTED;
822
823 printk(KERN_DEBUG
824 "Generating %d %s fake error%s to %d.%d.%d to test core handling. NOTE: this won't test the driver-specific decoding logic.\n",
825 errcount,
826 (type == HW_EVENT_ERR_UNCORRECTED) ? "UE" : "CE",
827 errcount > 1 ? "s" : "",
828 mci->fake_inject_layer[0],
829 mci->fake_inject_layer[1],
830 mci->fake_inject_layer[2]
831 );
832 edac_mc_handle_error(type, mci, errcount, 0, 0, 0,
833 mci->fake_inject_layer[0],
834 mci->fake_inject_layer[1],
835 mci->fake_inject_layer[2],
836 "FAKE ERROR", "for EDAC testing only");
837
838 return count;
839 }
840
841 static int debugfs_open(struct inode *inode, struct file *file)
842 {
843 file->private_data = inode->i_private;
844 return 0;
845 }
846
847 static const struct file_operations debug_fake_inject_fops = {
848 .open = debugfs_open,
849 .write = edac_fake_inject_write,
850 .llseek = generic_file_llseek,
851 };
852 #endif
853
854 /* default Control file */
855 DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store);
856
857 /* default Attribute files */
858 DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL);
859 DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL);
860 DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL);
861 DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL);
862 DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL);
863 DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL);
864 DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL);
865 DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL);
866
867 /* memory scrubber attribute file */
868 DEVICE_ATTR(sdram_scrub_rate, S_IRUGO | S_IWUSR, mci_sdram_scrub_rate_show,
869 mci_sdram_scrub_rate_store);
870
871 static struct attribute *mci_attrs[] = {
872 &dev_attr_reset_counters.attr,
873 &dev_attr_mc_name.attr,
874 &dev_attr_size_mb.attr,
875 &dev_attr_seconds_since_reset.attr,
876 &dev_attr_ue_noinfo_count.attr,
877 &dev_attr_ce_noinfo_count.attr,
878 &dev_attr_ue_count.attr,
879 &dev_attr_ce_count.attr,
880 &dev_attr_sdram_scrub_rate.attr,
881 &dev_attr_max_location.attr,
882 NULL
883 };
884
885 static struct attribute_group mci_attr_grp = {
886 .attrs = mci_attrs,
887 };
888
889 static const struct attribute_group *mci_attr_groups[] = {
890 &mci_attr_grp,
891 NULL
892 };
893
894 static void mci_attr_release(struct device *dev)
895 {
896 struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev);
897
898 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev));
899 kfree(mci);
900 }
901
902 static struct device_type mci_attr_type = {
903 .groups = mci_attr_groups,
904 .release = mci_attr_release,
905 };
906
907 #ifdef CONFIG_EDAC_DEBUG
908 static struct dentry *edac_debugfs;
909
910 int __init edac_debugfs_init(void)
911 {
912 edac_debugfs = debugfs_create_dir("edac", NULL);
913 if (IS_ERR(edac_debugfs)) {
914 edac_debugfs = NULL;
915 return -ENOMEM;
916 }
917 return 0;
918 }
919
920 void __exit edac_debugfs_exit(void)
921 {
922 debugfs_remove(edac_debugfs);
923 }
924
925 int edac_create_debug_nodes(struct mem_ctl_info *mci)
926 {
927 struct dentry *d, *parent;
928 char name[80];
929 int i;
930
931 if (!edac_debugfs)
932 return -ENODEV;
933
934 d = debugfs_create_dir(mci->dev.kobj.name, edac_debugfs);
935 if (!d)
936 return -ENOMEM;
937 parent = d;
938
939 for (i = 0; i < mci->n_layers; i++) {
940 sprintf(name, "fake_inject_%s",
941 edac_layer_name[mci->layers[i].type]);
942 d = debugfs_create_u8(name, S_IRUGO | S_IWUSR, parent,
943 &mci->fake_inject_layer[i]);
944 if (!d)
945 goto nomem;
946 }
947
948 d = debugfs_create_bool("fake_inject_ue", S_IRUGO | S_IWUSR, parent,
949 &mci->fake_inject_ue);
950 if (!d)
951 goto nomem;
952
953 d = debugfs_create_u16("fake_inject_count", S_IRUGO | S_IWUSR, parent,
954 &mci->fake_inject_count);
955 if (!d)
956 goto nomem;
957
958 d = debugfs_create_file("fake_inject", S_IWUSR, parent,
959 &mci->dev,
960 &debug_fake_inject_fops);
961 if (!d)
962 goto nomem;
963
964 mci->debugfs = parent;
965 return 0;
966 nomem:
967 debugfs_remove(mci->debugfs);
968 return -ENOMEM;
969 }
970 #endif
971
972 /*
973 * Create a new Memory Controller kobject instance,
974 * mc<id> under the 'mc' directory
975 *
976 * Return:
977 * 0 Success
978 * !0 Failure
979 */
980 int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
981 {
982 int i, err;
983
984 /*
985 * The memory controller needs its own bus, in order to avoid
986 * namespace conflicts at /sys/bus/edac.
987 */
988 mci->bus.name = kasprintf(GFP_KERNEL, "mc%d", mci->mc_idx);
989 if (!mci->bus.name)
990 return -ENOMEM;
991 edac_dbg(0, "creating bus %s\n", mci->bus.name);
992 err = bus_register(&mci->bus);
993 if (err < 0)
994 return err;
995
996 /* get the /sys/devices/system/edac subsys reference */
997 mci->dev.type = &mci_attr_type;
998 device_initialize(&mci->dev);
999
1000 mci->dev.parent = mci_pdev;
1001 mci->dev.bus = &mci->bus;
1002 dev_set_name(&mci->dev, "mc%d", mci->mc_idx);
1003 dev_set_drvdata(&mci->dev, mci);
1004 pm_runtime_forbid(&mci->dev);
1005
1006 edac_dbg(0, "creating device %s\n", dev_name(&mci->dev));
1007 err = device_add(&mci->dev);
1008 if (err < 0) {
1009 bus_unregister(&mci->bus);
1010 kfree(mci->bus.name);
1011 return err;
1012 }
1013
1014 /*
1015 * Create the dimm/rank devices
1016 */
1017 for (i = 0; i < mci->tot_dimms; i++) {
1018 struct dimm_info *dimm = mci->dimms[i];
1019 /* Only expose populated DIMMs */
1020 if (dimm->nr_pages == 0)
1021 continue;
1022 #ifdef CONFIG_EDAC_DEBUG
1023 edac_dbg(1, "creating dimm%d, located at ", i);
1024 if (edac_debug_level >= 1) {
1025 int lay;
1026 for (lay = 0; lay < mci->n_layers; lay++)
1027 printk(KERN_CONT "%s %d ",
1028 edac_layer_name[mci->layers[lay].type],
1029 dimm->location[lay]);
1030 printk(KERN_CONT "\n");
1031 }
1032 #endif
1033 err = edac_create_dimm_object(mci, dimm, i);
1034 if (err) {
1035 edac_dbg(1, "failure: create dimm %d obj\n", i);
1036 goto fail;
1037 }
1038 }
1039
1040 #ifdef CONFIG_EDAC_LEGACY_SYSFS
1041 err = edac_create_csrow_objects(mci);
1042 if (err < 0)
1043 goto fail;
1044 #endif
1045
1046 #ifdef CONFIG_EDAC_DEBUG
1047 edac_create_debug_nodes(mci);
1048 #endif
1049 return 0;
1050
1051 fail:
1052 for (i--; i >= 0; i--) {
1053 struct dimm_info *dimm = mci->dimms[i];
1054 if (dimm->nr_pages == 0)
1055 continue;
1056 put_device(&dimm->dev);
1057 device_del(&dimm->dev);
1058 }
1059 put_device(&mci->dev);
1060 device_del(&mci->dev);
1061 bus_unregister(&mci->bus);
1062 kfree(mci->bus.name);
1063 return err;
1064 }
1065
1066 /*
1067 * remove a Memory Controller instance
1068 */
1069 void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
1070 {
1071 int i;
1072
1073 edac_dbg(0, "\n");
1074
1075 #ifdef CONFIG_EDAC_DEBUG
1076 debugfs_remove(mci->debugfs);
1077 #endif
1078 #ifdef CONFIG_EDAC_LEGACY_SYSFS
1079 edac_delete_csrow_objects(mci);
1080 #endif
1081
1082 for (i = 0; i < mci->tot_dimms; i++) {
1083 struct dimm_info *dimm = mci->dimms[i];
1084 if (dimm->nr_pages == 0)
1085 continue;
1086 edac_dbg(0, "removing device %s\n", dev_name(&dimm->dev));
1087 put_device(&dimm->dev);
1088 device_del(&dimm->dev);
1089 }
1090 }
1091
1092 void edac_unregister_sysfs(struct mem_ctl_info *mci)
1093 {
1094 edac_dbg(1, "Unregistering device %s\n", dev_name(&mci->dev));
1095 put_device(&mci->dev);
1096 device_del(&mci->dev);
1097 bus_unregister(&mci->bus);
1098 kfree(mci->bus.name);
1099 }
1100
1101 static void mc_attr_release(struct device *dev)
1102 {
1103 /*
1104 * There's no container structure here, as this is just the mci
1105 * parent device, used to create the /sys/devices/mc sysfs node.
1106 * So, there are no attributes on it.
1107 */
1108 edac_dbg(1, "Releasing device %s\n", dev_name(dev));
1109 kfree(dev);
1110 }
1111
1112 static struct device_type mc_attr_type = {
1113 .release = mc_attr_release,
1114 };
1115 /*
1116 * Init/exit code for the module. Basically, creates/removes /sys/class/rc
1117 */
1118 int __init edac_mc_sysfs_init(void)
1119 {
1120 struct bus_type *edac_subsys;
1121 int err;
1122
1123 /* get the /sys/devices/system/edac subsys reference */
1124 edac_subsys = edac_get_sysfs_subsys();
1125 if (edac_subsys == NULL) {
1126 edac_dbg(1, "no edac_subsys\n");
1127 return -EINVAL;
1128 }
1129
1130 mci_pdev = kzalloc(sizeof(*mci_pdev), GFP_KERNEL);
1131
1132 mci_pdev->bus = edac_subsys;
1133 mci_pdev->type = &mc_attr_type;
1134 device_initialize(mci_pdev);
1135 dev_set_name(mci_pdev, "mc");
1136
1137 err = device_add(mci_pdev);
1138 if (err < 0)
1139 return err;
1140
1141 edac_dbg(0, "device %s created\n", dev_name(mci_pdev));
1142
1143 return 0;
1144 }
1145
1146 void __exit edac_mc_sysfs_exit(void)
1147 {
1148 put_device(mci_pdev);
1149 device_del(mci_pdev);
1150 edac_put_sysfs_subsys();
1151 }
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