drivers/edac/i82860_edac.c

   1 /*
   2  * Intel 82860 Memory Controller kernel module
   3  * (C) 2005 Red Hat (http://www.redhat.com)
   4  * This file may be distributed under the terms of the
   5  * GNU General Public License.
   6  *
   7  * Written by Ben Woodard <woodard@redhat.com>
   8  * shamelessly copied from and based upon the edac_i82875 driver
   9  * by Thayne Harbaugh of Linux Networx. (http://lnxi.com)
  10  */
  11
  12
  13 #include <linux/config.h>
  14 #include <linux/module.h>
  15 #include <linux/init.h>
  16 #include <linux/pci.h>
  17 #include <linux/pci_ids.h>
  18 #include <linux/slab.h>
  19 #include "edac_mc.h"
  20
  21
  22 #define i82860_printk(level, fmt, arg...) \
  23     edac_printk(level, "i82860", fmt, ##arg)
  24
  25
  26 #define i82860_mc_printk(mci, level, fmt, arg...) \
  27     edac_mc_chipset_printk(mci, level, "i82860", fmt, ##arg)
  28
  29
  30 #ifndef PCI_DEVICE_ID_INTEL_82860_0
  31 #define PCI_DEVICE_ID_INTEL_82860_0     0x2531
  32 #endif                          /* PCI_DEVICE_ID_INTEL_82860_0 */
  33
  34 #define I82860_MCHCFG 0x50
  35 #define I82860_GBA 0x60
  36 #define I82860_GBA_MASK 0x7FF
  37 #define I82860_GBA_SHIFT 24
  38 #define I82860_ERRSTS 0xC8
  39 #define I82860_EAP 0xE4
  40 #define I82860_DERRCTL_STS 0xE2
  41
  42 enum i82860_chips {
  43         I82860 = 0,
  44 };
  45
  46 struct i82860_dev_info {
  47         const char *ctl_name;
  48 };
  49
  50 struct i82860_error_info {
  51         u16 errsts;
  52         u32 eap;
  53         u16 derrsyn;
  54         u16 errsts2;
  55 };
  56
  57 static const struct i82860_dev_info i82860_devs[] = {
  58         [I82860] = {
  59                     .ctl_name = "i82860"},
  60 };
  61
  62 static struct pci_dev *mci_pdev = NULL; /* init dev: in case that AGP code
  63                                            has already registered driver */
  64
  65 static void i82860_get_error_info (struct mem_ctl_info *mci,
  66                 struct i82860_error_info *info)
  67 {
  68         /*
  69          * This is a mess because there is no atomic way to read all the
  70          * registers at once and the registers can transition from CE being
  71          * overwritten by UE.
  72          */
  73         pci_read_config_word(mci->pdev, I82860_ERRSTS, &info->errsts);
  74         pci_read_config_dword(mci->pdev, I82860_EAP, &info->eap);
  75         pci_read_config_word(mci->pdev, I82860_DERRCTL_STS, &info->derrsyn);
  76         pci_read_config_word(mci->pdev, I82860_ERRSTS, &info->errsts2);
  77
  78         pci_write_bits16(mci->pdev, I82860_ERRSTS, 0x0003, 0x0003);
  79
  80         /*
  81          * If the error is the same for both reads then the first set of reads
  82          * is valid.  If there is a change then there is a CE no info and the
  83          * second set of reads is valid and should be UE info.
  84          */
  85         if (!(info->errsts2 & 0x0003))
  86                 return;
  87         if ((info->errsts ^ info->errsts2) & 0x0003) {
  88                 pci_read_config_dword(mci->pdev, I82860_EAP, &info->eap);
  89                 pci_read_config_word(mci->pdev, I82860_DERRCTL_STS,
  90                     &info->derrsyn);
  91         }
  92 }
  93
  94 static int i82860_process_error_info (struct mem_ctl_info *mci,
  95                 struct i82860_error_info *info, int handle_errors)
  96 {
  97         int row;
  98
  99         if (!(info->errsts2 & 0x0003))
 100                 return 0;
 101
 102         if (!handle_errors)
 103                 return 1;
 104
 105         if ((info->errsts ^ info->errsts2) & 0x0003) {
 106                 edac_mc_handle_ce_no_info(mci, "UE overwrote CE");
 107                 info->errsts = info->errsts2;
 108         }
 109
 110         info->eap >>= PAGE_SHIFT;
 111         row = edac_mc_find_csrow_by_page(mci, info->eap);
 112
 113         if (info->errsts & 0x0002)
 114                 edac_mc_handle_ue(mci, info->eap, 0, row, "i82860 UE");
 115         else
 116                 edac_mc_handle_ce(mci, info->eap, 0, info->derrsyn, row,
 117                                        0, "i82860 UE");
 118
 119         return 1;
 120 }
 121
 122 static void i82860_check(struct mem_ctl_info *mci)
 123 {
 124         struct i82860_error_info info;
 125
 126         debugf1("MC%d: %s()\n", mci->mc_idx, __func__);
 127         i82860_get_error_info(mci, &info);
 128         i82860_process_error_info(mci, &info, 1);
 129 }
 130
 131 static int i82860_probe1(struct pci_dev *pdev, int dev_idx)
 132 {
 133         int rc = -ENODEV;
 134         int index;
 135         struct mem_ctl_info *mci = NULL;
 136         unsigned long last_cumul_size;
 137         struct i82860_error_info discard;
 138
 139         u16 mchcfg_ddim;        /* DRAM Data Integrity Mode 0=none,2=edac */
 140
 141         /* RDRAM has channels but these don't map onto the abstractions that
 142            edac uses.
 143            The device groups from the GRA registers seem to map reasonably
 144            well onto the notion of a chip select row.
 145            There are 16 GRA registers and since the name is associated with
 146            the channel and the GRA registers map to physical devices so we are
 147            going to make 1 channel for group.
 148          */
 149         mci = edac_mc_alloc(0, 16, 1);
 150         if (!mci)
 151                 return -ENOMEM;
 152
 153         debugf3("%s(): init mci\n", __func__);
 154
 155         mci->pdev = pdev;
 156         mci->mtype_cap = MEM_FLAG_DDR;
 157
 158
 159         mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
 160         /* I"m not sure about this but I think that all RDRAM is SECDED */
 161         mci->edac_cap = EDAC_FLAG_SECDED;
 162         /* adjust FLAGS */
 163
 164         mci->mod_name = EDAC_MOD_STR;
 165         mci->mod_ver = "$Revision: 1.1.2.6 $";
 166         mci->ctl_name = i82860_devs[dev_idx].ctl_name;
 167         mci->edac_check = i82860_check;
 168         mci->ctl_page_to_phys = NULL;
 169
 170         pci_read_config_word(mci->pdev, I82860_MCHCFG, &mchcfg_ddim);
 171         mchcfg_ddim = mchcfg_ddim & 0x180;
 172
 173         /*
 174          * The group row boundary (GRA) reg values are boundary address
 175          * for each DRAM row with a granularity of 16MB.  GRA regs are
 176          * cumulative; therefore GRA15 will contain the total memory contained
 177          * in all eight rows.
 178          */
 179         for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
 180                 u16 value;
 181                 u32 cumul_size;
 182                 struct csrow_info *csrow = &mci->csrows[index];
 183
 184                 pci_read_config_word(mci->pdev, I82860_GBA + index * 2,
 185                                      &value);
 186
 187                 cumul_size = (value & I82860_GBA_MASK) <<
 188                     (I82860_GBA_SHIFT - PAGE_SHIFT);
 189                 debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
 190                         cumul_size);
 191                 if (cumul_size == last_cumul_size)
 192                         continue;       /* not populated */
 193
 194                 csrow->first_page = last_cumul_size;
 195                 csrow->last_page = cumul_size - 1;
 196                 csrow->nr_pages = cumul_size - last_cumul_size;
 197                 last_cumul_size = cumul_size;
 198                 csrow->grain = 1 << 12; /* I82860_EAP has 4KiB reolution */
 199                 csrow->mtype = MEM_RMBS;
 200                 csrow->dtype = DEV_UNKNOWN;
 201                 csrow->edac_mode = mchcfg_ddim ? EDAC_SECDED : EDAC_NONE;
 202         }
 203
 204         i82860_get_error_info(mci, &discard);  /* clear counters */
 205
 206         if (edac_mc_add_mc(mci)) {
 207                 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
 208                 edac_mc_free(mci);
 209         } else {
 210                 /* get this far and it's successful */
 211                 debugf3("%s(): success\n", __func__);
 212                 rc = 0;
 213         }
 214         return rc;
 215 }
 216
 217 /* returns count (>= 0), or negative on error */
 218 static int __devinit i82860_init_one(struct pci_dev *pdev,
 219                                      const struct pci_device_id *ent)
 220 {
 221         int rc;
 222
 223         debugf0("%s()\n", __func__);
 224
 225         i82860_printk(KERN_INFO, "i82860 init one\n");
 226         if(pci_enable_device(pdev) < 0)
 227                 return -EIO;
 228         rc = i82860_probe1(pdev, ent->driver_data);
 229         if(rc == 0)
 230                 mci_pdev = pci_dev_get(pdev);
 231         return rc;
 232 }
 233
 234 static void __devexit i82860_remove_one(struct pci_dev *pdev)
 235 {
 236         struct mem_ctl_info *mci;
 237
 238         debugf0("%s()\n", __func__);
 239
 240         if ((mci = edac_mc_del_mc(pdev)) == NULL)
 241                 return;
 242
 243         edac_mc_free(mci);
 244 }
 245
 246 static const struct pci_device_id i82860_pci_tbl[] __devinitdata = {
 247         {PCI_VEND_DEV(INTEL, 82860_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
 248          I82860},
 249         {0,}                    /* 0 terminated list. */
 250 };
 251
 252 MODULE_DEVICE_TABLE(pci, i82860_pci_tbl);
 253
 254 static struct pci_driver i82860_driver = {
 255         .name = EDAC_MOD_STR,
 256         .probe = i82860_init_one,
 257         .remove = __devexit_p(i82860_remove_one),
 258         .id_table = i82860_pci_tbl,
 259 };
 260
 261 static int __init i82860_init(void)
 262 {
 263         int pci_rc;
 264
 265         debugf3("%s()\n", __func__);
 266         if ((pci_rc = pci_register_driver(&i82860_driver)) < 0)
 267                 goto fail0;
 268
 269         if (!mci_pdev) {
 270                 mci_pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
 271                                           PCI_DEVICE_ID_INTEL_82860_0, NULL);
 272                 if (mci_pdev == NULL) {
 273                         debugf0("860 pci_get_device fail\n");
 274                         pci_rc = -ENODEV;
 275                         goto fail1;
 276                 }
 277                 pci_rc = i82860_init_one(mci_pdev, i82860_pci_tbl);
 278                 if (pci_rc < 0) {
 279                         debugf0("860 init fail\n");
 280                         pci_rc = -ENODEV;
 281                         goto fail1;
 282                 }
 283         }
 284         return 0;
 285
 286 fail1:
 287         pci_unregister_driver(&i82860_driver);
 288
 289 fail0:
 290         if (mci_pdev != NULL)
 291                 pci_dev_put(mci_pdev);
 292
 293         return pci_rc;
 294 }
 295
 296 static void __exit i82860_exit(void)
 297 {
 298         debugf3("%s()\n", __func__);
 299
 300         pci_unregister_driver(&i82860_driver);
 301
 302         if (mci_pdev != NULL)
 303                 pci_dev_put(mci_pdev);
 304 }
 305
 306 module_init(i82860_init);
 307 module_exit(i82860_exit);
 308
 309 MODULE_LICENSE("GPL");
 310 MODULE_AUTHOR
 311     ("Red Hat Inc. (http://www.redhat.com) Ben Woodard <woodard@redhat.com>");
 312 MODULE_DESCRIPTION("ECC support for Intel 82860 memory hub controllers");