1 /* Copyright (c) 2010,2015, The Linux Foundation. All rights reserved.
2 * Copyright (C) 2015 Linaro Ltd.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #include <linux/platform_device.h>
15 #include <linux/module.h>
16 #include <linux/cpumask.h>
17 #include <linux/export.h>
18 #include <linux/types.h>
19 #include <linux/qcom_scm.h>
21 #include <linux/of_platform.h>
22 #include <linux/clk.h>
29 struct clk
*iface_clk
;
33 static struct qcom_scm
*__scm
;
35 static int qcom_scm_clk_enable(void)
39 ret
= clk_prepare_enable(__scm
->core_clk
);
43 ret
= clk_prepare_enable(__scm
->iface_clk
);
47 ret
= clk_prepare_enable(__scm
->bus_clk
);
54 clk_disable_unprepare(__scm
->iface_clk
);
56 clk_disable_unprepare(__scm
->core_clk
);
61 static void qcom_scm_clk_disable(void)
63 clk_disable_unprepare(__scm
->core_clk
);
64 clk_disable_unprepare(__scm
->iface_clk
);
65 clk_disable_unprepare(__scm
->bus_clk
);
69 * qcom_scm_set_cold_boot_addr() - Set the cold boot address for cpus
70 * @entry: Entry point function for the cpus
71 * @cpus: The cpumask of cpus that will use the entry point
73 * Set the cold boot address of the cpus. Any cpu outside the supported
74 * range would be removed from the cpu present mask.
76 int qcom_scm_set_cold_boot_addr(void *entry
, const cpumask_t
*cpus
)
78 return __qcom_scm_set_cold_boot_addr(entry
, cpus
);
80 EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr
);
83 * qcom_scm_set_warm_boot_addr() - Set the warm boot address for cpus
84 * @entry: Entry point function for the cpus
85 * @cpus: The cpumask of cpus that will use the entry point
87 * Set the Linux entry point for the SCM to transfer control to when coming
88 * out of a power down. CPU power down may be executed on cpuidle or hotplug.
90 int qcom_scm_set_warm_boot_addr(void *entry
, const cpumask_t
*cpus
)
92 return __qcom_scm_set_warm_boot_addr(__scm
->dev
, entry
, cpus
);
94 EXPORT_SYMBOL(qcom_scm_set_warm_boot_addr
);
97 * qcom_scm_cpu_power_down() - Power down the cpu
98 * @flags - Flags to flush cache
100 * This is an end point to power down cpu. If there was a pending interrupt,
101 * the control would return from this function, otherwise, the cpu jumps to the
102 * warm boot entry point set for this cpu upon reset.
104 void qcom_scm_cpu_power_down(u32 flags
)
106 __qcom_scm_cpu_power_down(flags
);
108 EXPORT_SYMBOL(qcom_scm_cpu_power_down
);
111 * qcom_scm_hdcp_available() - Check if secure environment supports HDCP.
113 * Return true if HDCP is supported, false if not.
115 bool qcom_scm_hdcp_available(void)
117 int ret
= qcom_scm_clk_enable();
122 ret
= __qcom_scm_is_call_available(__scm
->dev
, QCOM_SCM_SVC_HDCP
,
125 qcom_scm_clk_disable();
127 return ret
> 0 ? true : false;
129 EXPORT_SYMBOL(qcom_scm_hdcp_available
);
132 * qcom_scm_hdcp_req() - Send HDCP request.
133 * @req: HDCP request array
134 * @req_cnt: HDCP request array count
135 * @resp: response buffer passed to SCM
137 * Write HDCP register(s) through SCM.
139 int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req
*req
, u32 req_cnt
, u32
*resp
)
141 int ret
= qcom_scm_clk_enable();
146 ret
= __qcom_scm_hdcp_req(__scm
->dev
, req
, req_cnt
, resp
);
147 qcom_scm_clk_disable();
150 EXPORT_SYMBOL(qcom_scm_hdcp_req
);
152 static int qcom_scm_probe(struct platform_device
*pdev
)
154 struct qcom_scm
*scm
;
157 scm
= devm_kzalloc(&pdev
->dev
, sizeof(*scm
), GFP_KERNEL
);
161 scm
->core_clk
= devm_clk_get(&pdev
->dev
, "core");
162 if (IS_ERR(scm
->core_clk
)) {
163 if (PTR_ERR(scm
->core_clk
) == -EPROBE_DEFER
)
164 return PTR_ERR(scm
->core_clk
);
166 scm
->core_clk
= NULL
;
169 if (of_device_is_compatible(pdev
->dev
.of_node
, "qcom,scm")) {
170 scm
->iface_clk
= devm_clk_get(&pdev
->dev
, "iface");
171 if (IS_ERR(scm
->iface_clk
)) {
172 if (PTR_ERR(scm
->iface_clk
) != -EPROBE_DEFER
)
173 dev_err(&pdev
->dev
, "failed to acquire iface clk\n");
174 return PTR_ERR(scm
->iface_clk
);
177 scm
->bus_clk
= devm_clk_get(&pdev
->dev
, "bus");
178 if (IS_ERR(scm
->bus_clk
)) {
179 if (PTR_ERR(scm
->bus_clk
) != -EPROBE_DEFER
)
180 dev_err(&pdev
->dev
, "failed to acquire bus clk\n");
181 return PTR_ERR(scm
->bus_clk
);
185 /* vote for max clk rate for highest performance */
186 ret
= clk_set_rate(scm
->core_clk
, INT_MAX
);
191 __scm
->dev
= &pdev
->dev
;
198 static const struct of_device_id qcom_scm_dt_match
[] = {
199 { .compatible
= "qcom,scm-apq8064",},
200 { .compatible
= "qcom,scm-msm8660",},
201 { .compatible
= "qcom,scm-msm8960",},
202 { .compatible
= "qcom,scm",},
206 MODULE_DEVICE_TABLE(of
, qcom_scm_dt_match
);
208 static struct platform_driver qcom_scm_driver
= {
211 .of_match_table
= qcom_scm_dt_match
,
213 .probe
= qcom_scm_probe
,
216 static int __init
qcom_scm_init(void)
218 struct device_node
*np
, *fw_np
;
221 fw_np
= of_find_node_by_name(NULL
, "firmware");
226 np
= of_find_matching_node(fw_np
, qcom_scm_dt_match
);
235 ret
= of_platform_populate(fw_np
, qcom_scm_dt_match
, NULL
, NULL
);
242 return platform_driver_register(&qcom_scm_driver
);
245 arch_initcall(qcom_scm_init
);
247 static void __exit
qcom_scm_exit(void)
249 platform_driver_unregister(&qcom_scm_driver
);
251 module_exit(qcom_scm_exit
);
253 MODULE_DESCRIPTION("Qualcomm SCM driver");
254 MODULE_LICENSE("GPL v2");