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gpio: pca953x: Add set_multiple to allow multiple bits to be set in one write.
[deliverable/linux.git] / drivers / gpio / gpio-pca953x.c
1 /*
2 * PCA953x 4/8/16/24/40 bit I/O ports
3 *
4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
5 * Copyright (C) 2007 Marvell International Ltd.
6 *
7 * Derived from drivers/i2c/chips/pca9539.c
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 */
13
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/gpio.h>
17 #include <linux/interrupt.h>
18 #include <linux/i2c.h>
19 #include <linux/platform_data/pca953x.h>
20 #include <linux/slab.h>
21 #include <linux/of_platform.h>
22 #include <linux/acpi.h>
23
24 #define PCA953X_INPUT 0
25 #define PCA953X_OUTPUT 1
26 #define PCA953X_INVERT 2
27 #define PCA953X_DIRECTION 3
28
29 #define REG_ADDR_AI 0x80
30
31 #define PCA957X_IN 0
32 #define PCA957X_INVRT 1
33 #define PCA957X_BKEN 2
34 #define PCA957X_PUPD 3
35 #define PCA957X_CFG 4
36 #define PCA957X_OUT 5
37 #define PCA957X_MSK 6
38 #define PCA957X_INTS 7
39
40 #define PCA_GPIO_MASK 0x00FF
41 #define PCA_INT 0x0100
42 #define PCA953X_TYPE 0x1000
43 #define PCA957X_TYPE 0x2000
44 #define PCA_TYPE_MASK 0xF000
45
46 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
47
48 static const struct i2c_device_id pca953x_id[] = {
49 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
50 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
51 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
52 { "pca9536", 4 | PCA953X_TYPE, },
53 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
54 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
55 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
56 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
57 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
58 { "pca9556", 8 | PCA953X_TYPE, },
59 { "pca9557", 8 | PCA953X_TYPE, },
60 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
61 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
62 { "pca9698", 40 | PCA953X_TYPE, },
63
64 { "max7310", 8 | PCA953X_TYPE, },
65 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
66 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
67 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
68 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
69 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
70 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
71 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
72 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
73 { "xra1202", 8 | PCA953X_TYPE },
74 { }
75 };
76 MODULE_DEVICE_TABLE(i2c, pca953x_id);
77
78 static const struct acpi_device_id pca953x_acpi_ids[] = {
79 { "INT3491", 16 | PCA953X_TYPE | PCA_INT, },
80 { }
81 };
82 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
83
84 #define MAX_BANK 5
85 #define BANK_SZ 8
86
87 #define NBANK(chip) (chip->gpio_chip.ngpio / BANK_SZ)
88
89 struct pca953x_chip {
90 unsigned gpio_start;
91 u8 reg_output[MAX_BANK];
92 u8 reg_direction[MAX_BANK];
93 struct mutex i2c_lock;
94
95 #ifdef CONFIG_GPIO_PCA953X_IRQ
96 struct mutex irq_lock;
97 u8 irq_mask[MAX_BANK];
98 u8 irq_stat[MAX_BANK];
99 u8 irq_trig_raise[MAX_BANK];
100 u8 irq_trig_fall[MAX_BANK];
101 #endif
102
103 struct i2c_client *client;
104 struct gpio_chip gpio_chip;
105 const char *const *names;
106 int chip_type;
107 unsigned long driver_data;
108 };
109
110 static inline struct pca953x_chip *to_pca(struct gpio_chip *gc)
111 {
112 return container_of(gc, struct pca953x_chip, gpio_chip);
113 }
114
115 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
116 int off)
117 {
118 int ret;
119 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
120 int offset = off / BANK_SZ;
121
122 ret = i2c_smbus_read_byte_data(chip->client,
123 (reg << bank_shift) + offset);
124 *val = ret;
125
126 if (ret < 0) {
127 dev_err(&chip->client->dev, "failed reading register\n");
128 return ret;
129 }
130
131 return 0;
132 }
133
134 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
135 int off)
136 {
137 int ret = 0;
138 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
139 int offset = off / BANK_SZ;
140
141 ret = i2c_smbus_write_byte_data(chip->client,
142 (reg << bank_shift) + offset, val);
143
144 if (ret < 0) {
145 dev_err(&chip->client->dev, "failed writing register\n");
146 return ret;
147 }
148
149 return 0;
150 }
151
152 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
153 {
154 int ret = 0;
155
156 if (chip->gpio_chip.ngpio <= 8)
157 ret = i2c_smbus_write_byte_data(chip->client, reg, *val);
158 else if (chip->gpio_chip.ngpio >= 24) {
159 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
160 ret = i2c_smbus_write_i2c_block_data(chip->client,
161 (reg << bank_shift) | REG_ADDR_AI,
162 NBANK(chip), val);
163 } else {
164 switch (chip->chip_type) {
165 case PCA953X_TYPE:
166 ret = i2c_smbus_write_word_data(chip->client,
167 reg << 1, (u16) *val);
168 break;
169 case PCA957X_TYPE:
170 ret = i2c_smbus_write_byte_data(chip->client, reg << 1,
171 val[0]);
172 if (ret < 0)
173 break;
174 ret = i2c_smbus_write_byte_data(chip->client,
175 (reg << 1) + 1,
176 val[1]);
177 break;
178 }
179 }
180
181 if (ret < 0) {
182 dev_err(&chip->client->dev, "failed writing register\n");
183 return ret;
184 }
185
186 return 0;
187 }
188
189 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
190 {
191 int ret;
192
193 if (chip->gpio_chip.ngpio <= 8) {
194 ret = i2c_smbus_read_byte_data(chip->client, reg);
195 *val = ret;
196 } else if (chip->gpio_chip.ngpio >= 24) {
197 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
198
199 ret = i2c_smbus_read_i2c_block_data(chip->client,
200 (reg << bank_shift) | REG_ADDR_AI,
201 NBANK(chip), val);
202 } else {
203 ret = i2c_smbus_read_word_data(chip->client, reg << 1);
204 val[0] = (u16)ret & 0xFF;
205 val[1] = (u16)ret >> 8;
206 }
207 if (ret < 0) {
208 dev_err(&chip->client->dev, "failed reading register\n");
209 return ret;
210 }
211
212 return 0;
213 }
214
215 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
216 {
217 struct pca953x_chip *chip = to_pca(gc);
218 u8 reg_val;
219 int ret, offset = 0;
220
221 mutex_lock(&chip->i2c_lock);
222 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
223
224 switch (chip->chip_type) {
225 case PCA953X_TYPE:
226 offset = PCA953X_DIRECTION;
227 break;
228 case PCA957X_TYPE:
229 offset = PCA957X_CFG;
230 break;
231 }
232 ret = pca953x_write_single(chip, offset, reg_val, off);
233 if (ret)
234 goto exit;
235
236 chip->reg_direction[off / BANK_SZ] = reg_val;
237 ret = 0;
238 exit:
239 mutex_unlock(&chip->i2c_lock);
240 return ret;
241 }
242
243 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
244 unsigned off, int val)
245 {
246 struct pca953x_chip *chip = to_pca(gc);
247 u8 reg_val;
248 int ret, offset = 0;
249
250 mutex_lock(&chip->i2c_lock);
251 /* set output level */
252 if (val)
253 reg_val = chip->reg_output[off / BANK_SZ]
254 | (1u << (off % BANK_SZ));
255 else
256 reg_val = chip->reg_output[off / BANK_SZ]
257 & ~(1u << (off % BANK_SZ));
258
259 switch (chip->chip_type) {
260 case PCA953X_TYPE:
261 offset = PCA953X_OUTPUT;
262 break;
263 case PCA957X_TYPE:
264 offset = PCA957X_OUT;
265 break;
266 }
267 ret = pca953x_write_single(chip, offset, reg_val, off);
268 if (ret)
269 goto exit;
270
271 chip->reg_output[off / BANK_SZ] = reg_val;
272
273 /* then direction */
274 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
275 switch (chip->chip_type) {
276 case PCA953X_TYPE:
277 offset = PCA953X_DIRECTION;
278 break;
279 case PCA957X_TYPE:
280 offset = PCA957X_CFG;
281 break;
282 }
283 ret = pca953x_write_single(chip, offset, reg_val, off);
284 if (ret)
285 goto exit;
286
287 chip->reg_direction[off / BANK_SZ] = reg_val;
288 ret = 0;
289 exit:
290 mutex_unlock(&chip->i2c_lock);
291 return ret;
292 }
293
294 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
295 {
296 struct pca953x_chip *chip = to_pca(gc);
297 u32 reg_val;
298 int ret, offset = 0;
299
300 mutex_lock(&chip->i2c_lock);
301 switch (chip->chip_type) {
302 case PCA953X_TYPE:
303 offset = PCA953X_INPUT;
304 break;
305 case PCA957X_TYPE:
306 offset = PCA957X_IN;
307 break;
308 }
309 ret = pca953x_read_single(chip, offset, &reg_val, off);
310 mutex_unlock(&chip->i2c_lock);
311 if (ret < 0) {
312 /* NOTE: diagnostic already emitted; that's all we should
313 * do unless gpio_*_value_cansleep() calls become different
314 * from their nonsleeping siblings (and report faults).
315 */
316 return 0;
317 }
318
319 return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0;
320 }
321
322 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
323 {
324 struct pca953x_chip *chip = to_pca(gc);
325 u8 reg_val;
326 int ret, offset = 0;
327
328 mutex_lock(&chip->i2c_lock);
329 if (val)
330 reg_val = chip->reg_output[off / BANK_SZ]
331 | (1u << (off % BANK_SZ));
332 else
333 reg_val = chip->reg_output[off / BANK_SZ]
334 & ~(1u << (off % BANK_SZ));
335
336 switch (chip->chip_type) {
337 case PCA953X_TYPE:
338 offset = PCA953X_OUTPUT;
339 break;
340 case PCA957X_TYPE:
341 offset = PCA957X_OUT;
342 break;
343 }
344 ret = pca953x_write_single(chip, offset, reg_val, off);
345 if (ret)
346 goto exit;
347
348 chip->reg_output[off / BANK_SZ] = reg_val;
349 exit:
350 mutex_unlock(&chip->i2c_lock);
351 }
352
353
354 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
355 unsigned long *mask, unsigned long *bits)
356 {
357 struct pca953x_chip *chip = to_pca(gc);
358 u8 reg_val[MAX_BANK];
359 int ret, offset = 0;
360 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
361 int bank;
362
363 switch (chip->chip_type) {
364 case PCA953X_TYPE:
365 offset = PCA953X_OUTPUT;
366 break;
367 case PCA957X_TYPE:
368 offset = PCA957X_OUT;
369 break;
370 }
371
372 memcpy(reg_val, chip->reg_output, NBANK(chip));
373 mutex_lock(&chip->i2c_lock);
374 for(bank=0; bank<NBANK(chip); bank++) {
375 unsigned bankmask = mask[bank/4] >> ((bank % 4) * 8);
376 if(bankmask) {
377 unsigned bankval = bits[bank/4] >> ((bank % 4) * 8);
378 reg_val[bank] = (reg_val[bank] & ~bankmask) | bankval;
379 }
380 }
381 ret = i2c_smbus_write_i2c_block_data(chip->client, offset << bank_shift, NBANK(chip), reg_val);
382 if (ret)
383 goto exit;
384
385 memcpy(chip->reg_output, reg_val, NBANK(chip));
386 exit:
387 mutex_unlock(&chip->i2c_lock);
388 }
389
390 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
391 {
392 struct gpio_chip *gc;
393
394 gc = &chip->gpio_chip;
395
396 gc->direction_input = pca953x_gpio_direction_input;
397 gc->direction_output = pca953x_gpio_direction_output;
398 gc->get = pca953x_gpio_get_value;
399 gc->set = pca953x_gpio_set_value;
400 gc->set_multiple = pca953x_gpio_set_multiple;
401 gc->can_sleep = true;
402
403 gc->base = chip->gpio_start;
404 gc->ngpio = gpios;
405 gc->label = chip->client->name;
406 gc->parent = &chip->client->dev;
407 gc->owner = THIS_MODULE;
408 gc->names = chip->names;
409 }
410
411 #ifdef CONFIG_GPIO_PCA953X_IRQ
412 static void pca953x_irq_mask(struct irq_data *d)
413 {
414 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
415 struct pca953x_chip *chip = to_pca(gc);
416
417 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
418 }
419
420 static void pca953x_irq_unmask(struct irq_data *d)
421 {
422 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
423 struct pca953x_chip *chip = to_pca(gc);
424
425 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
426 }
427
428 static void pca953x_irq_bus_lock(struct irq_data *d)
429 {
430 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
431 struct pca953x_chip *chip = to_pca(gc);
432
433 mutex_lock(&chip->irq_lock);
434 }
435
436 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
437 {
438 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
439 struct pca953x_chip *chip = to_pca(gc);
440 u8 new_irqs;
441 int level, i;
442
443 /* Look for any newly setup interrupt */
444 for (i = 0; i < NBANK(chip); i++) {
445 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
446 new_irqs &= ~chip->reg_direction[i];
447
448 while (new_irqs) {
449 level = __ffs(new_irqs);
450 pca953x_gpio_direction_input(&chip->gpio_chip,
451 level + (BANK_SZ * i));
452 new_irqs &= ~(1 << level);
453 }
454 }
455
456 mutex_unlock(&chip->irq_lock);
457 }
458
459 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
460 {
461 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
462 struct pca953x_chip *chip = to_pca(gc);
463 int bank_nb = d->hwirq / BANK_SZ;
464 u8 mask = 1 << (d->hwirq % BANK_SZ);
465
466 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
467 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
468 d->irq, type);
469 return -EINVAL;
470 }
471
472 if (type & IRQ_TYPE_EDGE_FALLING)
473 chip->irq_trig_fall[bank_nb] |= mask;
474 else
475 chip->irq_trig_fall[bank_nb] &= ~mask;
476
477 if (type & IRQ_TYPE_EDGE_RISING)
478 chip->irq_trig_raise[bank_nb] |= mask;
479 else
480 chip->irq_trig_raise[bank_nb] &= ~mask;
481
482 return 0;
483 }
484
485 static struct irq_chip pca953x_irq_chip = {
486 .name = "pca953x",
487 .irq_mask = pca953x_irq_mask,
488 .irq_unmask = pca953x_irq_unmask,
489 .irq_bus_lock = pca953x_irq_bus_lock,
490 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock,
491 .irq_set_type = pca953x_irq_set_type,
492 };
493
494 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
495 {
496 u8 cur_stat[MAX_BANK];
497 u8 old_stat[MAX_BANK];
498 bool pending_seen = false;
499 bool trigger_seen = false;
500 u8 trigger[MAX_BANK];
501 int ret, i, offset = 0;
502
503 switch (chip->chip_type) {
504 case PCA953X_TYPE:
505 offset = PCA953X_INPUT;
506 break;
507 case PCA957X_TYPE:
508 offset = PCA957X_IN;
509 break;
510 }
511 ret = pca953x_read_regs(chip, offset, cur_stat);
512 if (ret)
513 return false;
514
515 /* Remove output pins from the equation */
516 for (i = 0; i < NBANK(chip); i++)
517 cur_stat[i] &= chip->reg_direction[i];
518
519 memcpy(old_stat, chip->irq_stat, NBANK(chip));
520
521 for (i = 0; i < NBANK(chip); i++) {
522 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
523 if (trigger[i])
524 trigger_seen = true;
525 }
526
527 if (!trigger_seen)
528 return false;
529
530 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
531
532 for (i = 0; i < NBANK(chip); i++) {
533 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
534 (cur_stat[i] & chip->irq_trig_raise[i]);
535 pending[i] &= trigger[i];
536 if (pending[i])
537 pending_seen = true;
538 }
539
540 return pending_seen;
541 }
542
543 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
544 {
545 struct pca953x_chip *chip = devid;
546 u8 pending[MAX_BANK];
547 u8 level;
548 unsigned nhandled = 0;
549 int i;
550
551 if (!pca953x_irq_pending(chip, pending))
552 return IRQ_NONE;
553
554 for (i = 0; i < NBANK(chip); i++) {
555 while (pending[i]) {
556 level = __ffs(pending[i]);
557 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain,
558 level + (BANK_SZ * i)));
559 pending[i] &= ~(1 << level);
560 nhandled++;
561 }
562 }
563
564 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
565 }
566
567 static int pca953x_irq_setup(struct pca953x_chip *chip,
568 int irq_base)
569 {
570 struct i2c_client *client = chip->client;
571 int ret, i, offset = 0;
572
573 if (client->irq && irq_base != -1
574 && (chip->driver_data & PCA_INT)) {
575
576 switch (chip->chip_type) {
577 case PCA953X_TYPE:
578 offset = PCA953X_INPUT;
579 break;
580 case PCA957X_TYPE:
581 offset = PCA957X_IN;
582 break;
583 }
584 ret = pca953x_read_regs(chip, offset, chip->irq_stat);
585 if (ret)
586 return ret;
587
588 /*
589 * There is no way to know which GPIO line generated the
590 * interrupt. We have to rely on the previous read for
591 * this purpose.
592 */
593 for (i = 0; i < NBANK(chip); i++)
594 chip->irq_stat[i] &= chip->reg_direction[i];
595 mutex_init(&chip->irq_lock);
596
597 ret = devm_request_threaded_irq(&client->dev,
598 client->irq,
599 NULL,
600 pca953x_irq_handler,
601 IRQF_TRIGGER_LOW | IRQF_ONESHOT |
602 IRQF_SHARED,
603 dev_name(&client->dev), chip);
604 if (ret) {
605 dev_err(&client->dev, "failed to request irq %d\n",
606 client->irq);
607 return ret;
608 }
609
610 ret = gpiochip_irqchip_add(&chip->gpio_chip,
611 &pca953x_irq_chip,
612 irq_base,
613 handle_simple_irq,
614 IRQ_TYPE_NONE);
615 if (ret) {
616 dev_err(&client->dev,
617 "could not connect irqchip to gpiochip\n");
618 return ret;
619 }
620
621 gpiochip_set_chained_irqchip(&chip->gpio_chip,
622 &pca953x_irq_chip,
623 client->irq, NULL);
624 }
625
626 return 0;
627 }
628
629 #else /* CONFIG_GPIO_PCA953X_IRQ */
630 static int pca953x_irq_setup(struct pca953x_chip *chip,
631 int irq_base)
632 {
633 struct i2c_client *client = chip->client;
634
635 if (irq_base != -1 && (chip->driver_data & PCA_INT))
636 dev_warn(&client->dev, "interrupt support not compiled in\n");
637
638 return 0;
639 }
640 #endif
641
642 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
643 {
644 int ret;
645 u8 val[MAX_BANK];
646
647 ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output);
648 if (ret)
649 goto out;
650
651 ret = pca953x_read_regs(chip, PCA953X_DIRECTION,
652 chip->reg_direction);
653 if (ret)
654 goto out;
655
656 /* set platform specific polarity inversion */
657 if (invert)
658 memset(val, 0xFF, NBANK(chip));
659 else
660 memset(val, 0, NBANK(chip));
661
662 ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
663 out:
664 return ret;
665 }
666
667 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
668 {
669 int ret;
670 u8 val[MAX_BANK];
671
672 ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output);
673 if (ret)
674 goto out;
675 ret = pca953x_read_regs(chip, PCA957X_CFG, chip->reg_direction);
676 if (ret)
677 goto out;
678
679 /* set platform specific polarity inversion */
680 if (invert)
681 memset(val, 0xFF, NBANK(chip));
682 else
683 memset(val, 0, NBANK(chip));
684 ret = pca953x_write_regs(chip, PCA957X_INVRT, val);
685 if (ret)
686 goto out;
687
688 /* To enable register 6, 7 to control pull up and pull down */
689 memset(val, 0x02, NBANK(chip));
690 ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
691 if (ret)
692 goto out;
693
694 return 0;
695 out:
696 return ret;
697 }
698
699 static const struct of_device_id pca953x_dt_ids[];
700
701 static int pca953x_probe(struct i2c_client *client,
702 const struct i2c_device_id *id)
703 {
704 struct pca953x_platform_data *pdata;
705 struct pca953x_chip *chip;
706 int irq_base = 0;
707 int ret;
708 u32 invert = 0;
709
710 chip = devm_kzalloc(&client->dev,
711 sizeof(struct pca953x_chip), GFP_KERNEL);
712 if (chip == NULL)
713 return -ENOMEM;
714
715 pdata = dev_get_platdata(&client->dev);
716 if (pdata) {
717 irq_base = pdata->irq_base;
718 chip->gpio_start = pdata->gpio_base;
719 invert = pdata->invert;
720 chip->names = pdata->names;
721 } else {
722 chip->gpio_start = -1;
723 irq_base = 0;
724 }
725
726 chip->client = client;
727
728 if (id) {
729 chip->driver_data = id->driver_data;
730 } else {
731 const struct acpi_device_id *id;
732 const struct of_device_id *match;
733
734 match = of_match_device(pca953x_dt_ids, &client->dev);
735 if (match) {
736 chip->driver_data = (int)(uintptr_t)match->data;
737 } else {
738 id = acpi_match_device(pca953x_acpi_ids, &client->dev);
739 if (!id)
740 return -ENODEV;
741
742 chip->driver_data = id->driver_data;
743 }
744 }
745
746 chip->chip_type = PCA_CHIP_TYPE(chip->driver_data);
747
748 mutex_init(&chip->i2c_lock);
749
750 /* initialize cached registers from their original values.
751 * we can't share this chip with another i2c master.
752 */
753 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
754
755 if (chip->chip_type == PCA953X_TYPE)
756 ret = device_pca953x_init(chip, invert);
757 else
758 ret = device_pca957x_init(chip, invert);
759 if (ret)
760 return ret;
761
762 ret = gpiochip_add(&chip->gpio_chip);
763 if (ret)
764 return ret;
765
766 ret = pca953x_irq_setup(chip, irq_base);
767 if (ret)
768 return ret;
769
770 if (pdata && pdata->setup) {
771 ret = pdata->setup(client, chip->gpio_chip.base,
772 chip->gpio_chip.ngpio, pdata->context);
773 if (ret < 0)
774 dev_warn(&client->dev, "setup failed, %d\n", ret);
775 }
776
777 i2c_set_clientdata(client, chip);
778 return 0;
779 }
780
781 static int pca953x_remove(struct i2c_client *client)
782 {
783 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
784 struct pca953x_chip *chip = i2c_get_clientdata(client);
785 int ret = 0;
786
787 if (pdata && pdata->teardown) {
788 ret = pdata->teardown(client, chip->gpio_chip.base,
789 chip->gpio_chip.ngpio, pdata->context);
790 if (ret < 0) {
791 dev_err(&client->dev, "%s failed, %d\n",
792 "teardown", ret);
793 return ret;
794 }
795 }
796
797 gpiochip_remove(&chip->gpio_chip);
798
799 return 0;
800 }
801
802 /* convenience to stop overlong match-table lines */
803 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
804 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
805
806 static const struct of_device_id pca953x_dt_ids[] = {
807 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
808 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
809 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
810 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
811 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
812 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
813 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
814 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
815 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
816 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
817 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
818 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
819 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
820 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
821
822 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
823 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
824 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
825 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
826
827 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
828 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
829 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
830 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
831
832 { .compatible = "onsemi,pca9654", .data = OF_953X( 8, PCA_INT), },
833
834 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
835 { }
836 };
837
838 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
839
840 static struct i2c_driver pca953x_driver = {
841 .driver = {
842 .name = "pca953x",
843 .of_match_table = pca953x_dt_ids,
844 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
845 },
846 .probe = pca953x_probe,
847 .remove = pca953x_remove,
848 .id_table = pca953x_id,
849 };
850
851 static int __init pca953x_init(void)
852 {
853 return i2c_add_driver(&pca953x_driver);
854 }
855 /* register after i2c postcore initcall and before
856 * subsys initcalls that may rely on these GPIOs
857 */
858 subsys_initcall(pca953x_init);
859
860 static void __exit pca953x_exit(void)
861 {
862 i2c_del_driver(&pca953x_driver);
863 }
864 module_exit(pca953x_exit);
865
866 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
867 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
868 MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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