drivers/gpio/gpio-pcf857x.c

   1 /*
   2  * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
   3  *
   4  * Copyright (C) 2007 David Brownell
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  */
  20
  21 #include <linux/gpio.h>
  22 #include <linux/i2c.h>
  23 #include <linux/i2c/pcf857x.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/irq.h>
  26 #include <linux/irqdomain.h>
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/of.h>
  30 #include <linux/of_device.h>
  31 #include <linux/slab.h>
  32 #include <linux/spinlock.h>
  33
  34
  35 static const struct i2c_device_id pcf857x_id[] = {
  36         { "pcf8574", 8 },
  37         { "pcf8574a", 8 },
  38         { "pca8574", 8 },
  39         { "pca9670", 8 },
  40         { "pca9672", 8 },
  41         { "pca9674", 8 },
  42         { "pcf8575", 16 },
  43         { "pca8575", 16 },
  44         { "pca9671", 16 },
  45         { "pca9673", 16 },
  46         { "pca9675", 16 },
  47         { "max7328", 8 },
  48         { "max7329", 8 },
  49         { "tca9554", 8 },
  50         { }
  51 };
  52 MODULE_DEVICE_TABLE(i2c, pcf857x_id);
  53
  54 #ifdef CONFIG_OF
  55 static const struct of_device_id pcf857x_of_table[] = {
  56         { .compatible = "nxp,pcf8574" },
  57         { .compatible = "nxp,pcf8574a" },
  58         { .compatible = "nxp,pca8574" },
  59         { .compatible = "nxp,pca9670" },
  60         { .compatible = "nxp,pca9672" },
  61         { .compatible = "nxp,pca9674" },
  62         { .compatible = "nxp,pcf8575" },
  63         { .compatible = "nxp,pca8575" },
  64         { .compatible = "nxp,pca9671" },
  65         { .compatible = "nxp,pca9673" },
  66         { .compatible = "nxp,pca9675" },
  67         { .compatible = "maxim,max7328" },
  68         { .compatible = "maxim,max7329" },
  69         { .compatible = "ti,tca9554" },
  70         { }
  71 };
  72 MODULE_DEVICE_TABLE(of, pcf857x_of_table);
  73 #endif
  74
  75 /*
  76  * The pcf857x, pca857x, and pca967x chips only expose one read and one
  77  * write register.  Writing a "one" bit (to match the reset state) lets
  78  * that pin be used as an input; it's not an open-drain model, but acts
  79  * a bit like one.  This is described as "quasi-bidirectional"; read the
  80  * chip documentation for details.
  81  *
  82  * Many other I2C GPIO expander chips (like the pca953x models) have
  83  * more complex register models and more conventional circuitry using
  84  * push/pull drivers.  They often use the same 0x20..0x27 addresses as
  85  * pcf857x parts, making the "legacy" I2C driver model problematic.
  86  */
  87 struct pcf857x {
  88         struct gpio_chip        chip;
  89         struct i2c_client       *client;
  90         struct mutex            lock;           /* protect 'out' */
  91         spinlock_t              slock;          /* protect irq demux */
  92         unsigned                out;            /* software latch */
  93         unsigned                status;         /* current status */
  94
  95         int (*write)(struct i2c_client *client, unsigned data);
  96         int (*read)(struct i2c_client *client);
  97 };
  98
  99 /*-------------------------------------------------------------------------*/
 100
 101 /* Talk to 8-bit I/O expander */
 102
 103 static int i2c_write_le8(struct i2c_client *client, unsigned data)
 104 {
 105         return i2c_smbus_write_byte(client, data);
 106 }
 107
 108 static int i2c_read_le8(struct i2c_client *client)
 109 {
 110         return (int)i2c_smbus_read_byte(client);
 111 }
 112
 113 /* Talk to 16-bit I/O expander */
 114
 115 static int i2c_write_le16(struct i2c_client *client, unsigned word)
 116 {
 117         u8 buf[2] = { word & 0xff, word >> 8, };
 118         int status;
 119
 120         status = i2c_master_send(client, buf, 2);
 121         return (status < 0) ? status : 0;
 122 }
 123
 124 static int i2c_read_le16(struct i2c_client *client)
 125 {
 126         u8 buf[2];
 127         int status;
 128
 129         status = i2c_master_recv(client, buf, 2);
 130         if (status < 0)
 131                 return status;
 132         return (buf[1] << 8) | buf[0];
 133 }
 134
 135 /*-------------------------------------------------------------------------*/
 136
 137 static int pcf857x_input(struct gpio_chip *chip, unsigned offset)
 138 {
 139         struct pcf857x  *gpio = container_of(chip, struct pcf857x, chip);
 140         int             status;
 141
 142         mutex_lock(&gpio->lock);
 143         gpio->out |= (1 << offset);
 144         status = gpio->write(gpio->client, gpio->out);
 145         mutex_unlock(&gpio->lock);
 146
 147         return status;
 148 }
 149
 150 static int pcf857x_get(struct gpio_chip *chip, unsigned offset)
 151 {
 152         struct pcf857x  *gpio = container_of(chip, struct pcf857x, chip);
 153         int             value;
 154
 155         value = gpio->read(gpio->client);
 156         return (value < 0) ? 0 : (value & (1 << offset));
 157 }
 158
 159 static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value)
 160 {
 161         struct pcf857x  *gpio = container_of(chip, struct pcf857x, chip);
 162         unsigned        bit = 1 << offset;
 163         int             status;
 164
 165         mutex_lock(&gpio->lock);
 166         if (value)
 167                 gpio->out |= bit;
 168         else
 169                 gpio->out &= ~bit;
 170         status = gpio->write(gpio->client, gpio->out);
 171         mutex_unlock(&gpio->lock);
 172
 173         return status;
 174 }
 175
 176 static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value)
 177 {
 178         pcf857x_output(chip, offset, value);
 179 }
 180
 181 /*-------------------------------------------------------------------------*/
 182
 183 static irqreturn_t pcf857x_irq(int irq, void *data)
 184 {
 185         struct pcf857x  *gpio = data;
 186         unsigned long change, i, status, flags;
 187
 188         status = gpio->read(gpio->client);
 189
 190         spin_lock_irqsave(&gpio->slock, flags);
 191
 192         /*
 193          * call the interrupt handler iff gpio is used as
 194          * interrupt source, just to avoid bad irqs
 195          */
 196
 197         change = (gpio->status ^ status);
 198         for_each_set_bit(i, &change, gpio->chip.ngpio)
 199                 handle_nested_irq(irq_find_mapping(gpio->chip.irqdomain, i));
 200         gpio->status = status;
 201
 202         spin_unlock_irqrestore(&gpio->slock, flags);
 203
 204         return IRQ_HANDLED;
 205 }
 206
 207 /*
 208  * NOP functions
 209  */
 210 static void noop(struct irq_data *data) { }
 211
 212 static unsigned int noop_ret(struct irq_data *data)
 213 {
 214         return 0;
 215 }
 216
 217 static int pcf857x_irq_set_wake(struct irq_data *data, unsigned int on)
 218 {
 219         struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
 220
 221         irq_set_irq_wake(gpio->client->irq, on);
 222         return 0;
 223 }
 224
 225 static struct irq_chip pcf857x_irq_chip = {
 226         .name           = "pcf857x",
 227         .irq_startup    = noop_ret,
 228         .irq_shutdown   = noop,
 229         .irq_enable     = noop,
 230         .irq_disable    = noop,
 231         .irq_ack        = noop,
 232         .irq_mask       = noop,
 233         .irq_unmask     = noop,
 234         .irq_set_wake   = pcf857x_irq_set_wake,
 235 };
 236
 237 /*-------------------------------------------------------------------------*/
 238
 239 static int pcf857x_probe(struct i2c_client *client,
 240                          const struct i2c_device_id *id)
 241 {
 242         struct pcf857x_platform_data    *pdata = dev_get_platdata(&client->dev);
 243         struct device_node              *np = client->dev.of_node;
 244         struct pcf857x                  *gpio;
 245         unsigned int                    n_latch = 0;
 246         int                             status;
 247
 248         if (IS_ENABLED(CONFIG_OF) && np)
 249                 of_property_read_u32(np, "lines-initial-states", &n_latch);
 250         else if (pdata)
 251                 n_latch = pdata->n_latch;
 252         else
 253                 dev_dbg(&client->dev, "no platform data\n");
 254
 255         /* Allocate, initialize, and register this gpio_chip. */
 256         gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL);
 257         if (!gpio)
 258                 return -ENOMEM;
 259
 260         mutex_init(&gpio->lock);
 261         spin_lock_init(&gpio->slock);
 262
 263         gpio->chip.base                 = pdata ? pdata->gpio_base : -1;
 264         gpio->chip.can_sleep            = true;
 265         gpio->chip.dev                  = &client->dev;
 266         gpio->chip.owner                = THIS_MODULE;
 267         gpio->chip.get                  = pcf857x_get;
 268         gpio->chip.set                  = pcf857x_set;
 269         gpio->chip.direction_input      = pcf857x_input;
 270         gpio->chip.direction_output     = pcf857x_output;
 271         gpio->chip.ngpio                = id->driver_data;
 272
 273         /* NOTE:  the OnSemi jlc1562b is also largely compatible with
 274          * these parts, notably for output.  It has a low-resolution
 275          * DAC instead of pin change IRQs; and its inputs can be the
 276          * result of comparators.
 277          */
 278
 279         /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
 280          * 9670, 9672, 9764, and 9764a use quite a variety.
 281          *
 282          * NOTE: we don't distinguish here between *4 and *4a parts.
 283          */
 284         if (gpio->chip.ngpio == 8) {
 285                 gpio->write     = i2c_write_le8;
 286                 gpio->read      = i2c_read_le8;
 287
 288                 if (!i2c_check_functionality(client->adapter,
 289                                 I2C_FUNC_SMBUS_BYTE))
 290                         status = -EIO;
 291
 292                 /* fail if there's no chip present */
 293                 else
 294                         status = i2c_smbus_read_byte(client);
 295
 296         /* '75/'75c addresses are 0x20..0x27, just like the '74;
 297          * the '75c doesn't have a current source pulling high.
 298          * 9671, 9673, and 9765 use quite a variety of addresses.
 299          *
 300          * NOTE: we don't distinguish here between '75 and '75c parts.
 301          */
 302         } else if (gpio->chip.ngpio == 16) {
 303                 gpio->write     = i2c_write_le16;
 304                 gpio->read      = i2c_read_le16;
 305
 306                 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
 307                         status = -EIO;
 308
 309                 /* fail if there's no chip present */
 310                 else
 311                         status = i2c_read_le16(client);
 312
 313         } else {
 314                 dev_dbg(&client->dev, "unsupported number of gpios\n");
 315                 status = -EINVAL;
 316         }
 317
 318         if (status < 0)
 319                 goto fail;
 320
 321         gpio->chip.label = client->name;
 322
 323         gpio->client = client;
 324         i2c_set_clientdata(client, gpio);
 325
 326         /* NOTE:  these chips have strange "quasi-bidirectional" I/O pins.
 327          * We can't actually know whether a pin is configured (a) as output
 328          * and driving the signal low, or (b) as input and reporting a low
 329          * value ... without knowing the last value written since the chip
 330          * came out of reset (if any).  We can't read the latched output.
 331          *
 332          * In short, the only reliable solution for setting up pin direction
 333          * is to do it explicitly.  The setup() method can do that, but it
 334          * may cause transient glitching since it can't know the last value
 335          * written (some pins may need to be driven low).
 336          *
 337          * Using n_latch avoids that trouble.  When left initialized to zero,
 338          * our software copy of the "latch" then matches the chip's all-ones
 339          * reset state.  Otherwise it flags pins to be driven low.
 340          */
 341         gpio->out = ~n_latch;
 342         gpio->status = gpio->out;
 343
 344         status = gpiochip_add(&gpio->chip);
 345         if (status < 0)
 346                 goto fail;
 347
 348         /* Enable irqchip if we have an interrupt */
 349         if (client->irq) {
 350                 status = gpiochip_irqchip_add(&gpio->chip, &pcf857x_irq_chip,
 351                                               0, handle_level_irq,
 352                                               IRQ_TYPE_NONE);
 353                 if (status) {
 354                         dev_err(&client->dev, "cannot add irqchip\n");
 355                         goto fail_irq;
 356                 }
 357
 358                 status = devm_request_threaded_irq(&client->dev, client->irq,
 359                                         NULL, pcf857x_irq, IRQF_ONESHOT |
 360                                         IRQF_TRIGGER_FALLING | IRQF_SHARED,
 361                                         dev_name(&client->dev), gpio);
 362                 if (status)
 363                         goto fail_irq;
 364
 365                 gpiochip_set_chained_irqchip(&gpio->chip, &pcf857x_irq_chip,
 366                                              client->irq, NULL);
 367         }
 368
 369         /* Let platform code set up the GPIOs and their users.
 370          * Now is the first time anyone could use them.
 371          */
 372         if (pdata && pdata->setup) {
 373                 status = pdata->setup(client,
 374                                 gpio->chip.base, gpio->chip.ngpio,
 375                                 pdata->context);
 376                 if (status < 0)
 377                         dev_warn(&client->dev, "setup --> %d\n", status);
 378         }
 379
 380         dev_info(&client->dev, "probed\n");
 381
 382         return 0;
 383
 384 fail_irq:
 385         gpiochip_remove(&gpio->chip);
 386
 387 fail:
 388         dev_dbg(&client->dev, "probe error %d for '%s'\n", status,
 389                 client->name);
 390
 391         return status;
 392 }
 393
 394 static int pcf857x_remove(struct i2c_client *client)
 395 {
 396         struct pcf857x_platform_data    *pdata = dev_get_platdata(&client->dev);
 397         struct pcf857x                  *gpio = i2c_get_clientdata(client);
 398         int                             status = 0;
 399
 400         if (pdata && pdata->teardown) {
 401                 status = pdata->teardown(client,
 402                                 gpio->chip.base, gpio->chip.ngpio,
 403                                 pdata->context);
 404                 if (status < 0) {
 405                         dev_err(&client->dev, "%s --> %d\n",
 406                                         "teardown", status);
 407                         return status;
 408                 }
 409         }
 410
 411         gpiochip_remove(&gpio->chip);
 412         return status;
 413 }
 414
 415 static struct i2c_driver pcf857x_driver = {
 416         .driver = {
 417                 .name   = "pcf857x",
 418                 .owner  = THIS_MODULE,
 419                 .of_match_table = of_match_ptr(pcf857x_of_table),
 420         },
 421         .probe  = pcf857x_probe,
 422         .remove = pcf857x_remove,
 423         .id_table = pcf857x_id,
 424 };
 425
 426 static int __init pcf857x_init(void)
 427 {
 428         return i2c_add_driver(&pcf857x_driver);
 429 }
 430 /* register after i2c postcore initcall and before
 431  * subsys initcalls that may rely on these GPIOs
 432  */
 433 subsys_initcall(pcf857x_init);
 434
 435 static void __exit pcf857x_exit(void)
 436 {
 437         i2c_del_driver(&pcf857x_driver);
 438 }
 439 module_exit(pcf857x_exit);
 440
 441 MODULE_LICENSE("GPL");
 442 MODULE_AUTHOR("David Brownell");