2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
24 * Authors: Dave Airlie
29 #include <drm/amdgpu_drm.h>
34 * The GART (Graphics Aperture Remapping Table) is an aperture
35 * in the GPU's address space. System pages can be mapped into
36 * the aperture and look like contiguous pages from the GPU's
37 * perspective. A page table maps the pages in the aperture
38 * to the actual backing pages in system memory.
40 * Radeon GPUs support both an internal GART, as described above,
41 * and AGP. AGP works similarly, but the GART table is configured
42 * and maintained by the northbridge rather than the driver.
43 * Radeon hw has a separate AGP aperture that is programmed to
44 * point to the AGP aperture provided by the northbridge and the
45 * requests are passed through to the northbridge aperture.
46 * Both AGP and internal GART can be used at the same time, however
47 * that is not currently supported by the driver.
49 * This file handles the common internal GART management.
53 * Common GART table functions.
56 * amdgpu_gart_table_ram_alloc - allocate system ram for gart page table
58 * @adev: amdgpu_device pointer
60 * Allocate system memory for GART page table
61 * (r1xx-r3xx, non-pcie r4xx, rs400). These asics require the
62 * gart table to be in system memory.
63 * Returns 0 for success, -ENOMEM for failure.
65 int amdgpu_gart_table_ram_alloc(struct amdgpu_device
*adev
)
69 ptr
= pci_alloc_consistent(adev
->pdev
, adev
->gart
.table_size
,
70 &adev
->gart
.table_addr
);
76 set_memory_uc((unsigned long)ptr
,
77 adev
->gart
.table_size
>> PAGE_SHIFT
);
81 memset((void *)adev
->gart
.ptr
, 0, adev
->gart
.table_size
);
86 * amdgpu_gart_table_ram_free - free system ram for gart page table
88 * @adev: amdgpu_device pointer
90 * Free system memory for GART page table
91 * (r1xx-r3xx, non-pcie r4xx, rs400). These asics require the
92 * gart table to be in system memory.
94 void amdgpu_gart_table_ram_free(struct amdgpu_device
*adev
)
96 if (adev
->gart
.ptr
== NULL
) {
101 set_memory_wb((unsigned long)adev
->gart
.ptr
,
102 adev
->gart
.table_size
>> PAGE_SHIFT
);
105 pci_free_consistent(adev
->pdev
, adev
->gart
.table_size
,
106 (void *)adev
->gart
.ptr
,
107 adev
->gart
.table_addr
);
108 adev
->gart
.ptr
= NULL
;
109 adev
->gart
.table_addr
= 0;
113 * amdgpu_gart_table_vram_alloc - allocate vram for gart page table
115 * @adev: amdgpu_device pointer
117 * Allocate video memory for GART page table
118 * (pcie r4xx, r5xx+). These asics require the
119 * gart table to be in video memory.
120 * Returns 0 for success, error for failure.
122 int amdgpu_gart_table_vram_alloc(struct amdgpu_device
*adev
)
126 if (adev
->gart
.robj
== NULL
) {
127 r
= amdgpu_bo_create(adev
, adev
->gart
.table_size
,
128 PAGE_SIZE
, true, AMDGPU_GEM_DOMAIN_VRAM
,
129 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED
,
130 NULL
, NULL
, &adev
->gart
.robj
);
139 * amdgpu_gart_table_vram_pin - pin gart page table in vram
141 * @adev: amdgpu_device pointer
143 * Pin the GART page table in vram so it will not be moved
144 * by the memory manager (pcie r4xx, r5xx+). These asics require the
145 * gart table to be in video memory.
146 * Returns 0 for success, error for failure.
148 int amdgpu_gart_table_vram_pin(struct amdgpu_device
*adev
)
153 r
= amdgpu_bo_reserve(adev
->gart
.robj
, false);
154 if (unlikely(r
!= 0))
156 r
= amdgpu_bo_pin(adev
->gart
.robj
,
157 AMDGPU_GEM_DOMAIN_VRAM
, &gpu_addr
);
159 amdgpu_bo_unreserve(adev
->gart
.robj
);
162 r
= amdgpu_bo_kmap(adev
->gart
.robj
, &adev
->gart
.ptr
);
164 amdgpu_bo_unpin(adev
->gart
.robj
);
165 amdgpu_bo_unreserve(adev
->gart
.robj
);
166 adev
->gart
.table_addr
= gpu_addr
;
171 * amdgpu_gart_table_vram_unpin - unpin gart page table in vram
173 * @adev: amdgpu_device pointer
175 * Unpin the GART page table in vram (pcie r4xx, r5xx+).
176 * These asics require the gart table to be in video memory.
178 void amdgpu_gart_table_vram_unpin(struct amdgpu_device
*adev
)
182 if (adev
->gart
.robj
== NULL
) {
185 r
= amdgpu_bo_reserve(adev
->gart
.robj
, false);
186 if (likely(r
== 0)) {
187 amdgpu_bo_kunmap(adev
->gart
.robj
);
188 amdgpu_bo_unpin(adev
->gart
.robj
);
189 amdgpu_bo_unreserve(adev
->gart
.robj
);
190 adev
->gart
.ptr
= NULL
;
195 * amdgpu_gart_table_vram_free - free gart page table vram
197 * @adev: amdgpu_device pointer
199 * Free the video memory used for the GART page table
200 * (pcie r4xx, r5xx+). These asics require the gart table to
201 * be in video memory.
203 void amdgpu_gart_table_vram_free(struct amdgpu_device
*adev
)
205 if (adev
->gart
.robj
== NULL
) {
208 amdgpu_bo_unref(&adev
->gart
.robj
);
212 * Common gart functions.
215 * amdgpu_gart_unbind - unbind pages from the gart page table
217 * @adev: amdgpu_device pointer
218 * @offset: offset into the GPU's gart aperture
219 * @pages: number of pages to unbind
221 * Unbinds the requested pages from the gart page table and
222 * replaces them with the dummy page (all asics).
224 void amdgpu_gart_unbind(struct amdgpu_device
*adev
, uint64_t offset
,
231 uint32_t flags
= AMDGPU_PTE_SYSTEM
;
233 if (!adev
->gart
.ready
) {
234 WARN(1, "trying to unbind memory from uninitialized GART !\n");
238 t
= offset
/ AMDGPU_GPU_PAGE_SIZE
;
239 p
= t
/ (PAGE_SIZE
/ AMDGPU_GPU_PAGE_SIZE
);
240 for (i
= 0; i
< pages
; i
++, p
++) {
241 #ifdef CONFIG_AMDGPU_GART_DEBUGFS
242 adev
->gart
.pages
[p
] = NULL
;
244 page_base
= adev
->dummy_page
.addr
;
248 for (j
= 0; j
< (PAGE_SIZE
/ AMDGPU_GPU_PAGE_SIZE
); j
++, t
++) {
249 amdgpu_gart_set_pte_pde(adev
, adev
->gart
.ptr
,
250 t
, page_base
, flags
);
251 page_base
+= AMDGPU_GPU_PAGE_SIZE
;
255 amdgpu_gart_flush_gpu_tlb(adev
, 0);
259 * amdgpu_gart_bind - bind pages into the gart page table
261 * @adev: amdgpu_device pointer
262 * @offset: offset into the GPU's gart aperture
263 * @pages: number of pages to bind
264 * @pagelist: pages to bind
265 * @dma_addr: DMA addresses of pages
267 * Binds the requested pages to the gart page table
269 * Returns 0 for success, -EINVAL for failure.
271 int amdgpu_gart_bind(struct amdgpu_device
*adev
, uint64_t offset
,
272 int pages
, struct page
**pagelist
, dma_addr_t
*dma_addr
,
280 if (!adev
->gart
.ready
) {
281 WARN(1, "trying to bind memory to uninitialized GART !\n");
285 t
= offset
/ AMDGPU_GPU_PAGE_SIZE
;
286 p
= t
/ (PAGE_SIZE
/ AMDGPU_GPU_PAGE_SIZE
);
288 for (i
= 0; i
< pages
; i
++, p
++) {
289 #ifdef CONFIG_AMDGPU_GART_DEBUGFS
290 adev
->gart
.pages
[p
] = pagelist
[i
];
292 if (adev
->gart
.ptr
) {
293 page_base
= dma_addr
[i
];
294 for (j
= 0; j
< (PAGE_SIZE
/ AMDGPU_GPU_PAGE_SIZE
); j
++, t
++) {
295 amdgpu_gart_set_pte_pde(adev
, adev
->gart
.ptr
, t
, page_base
, flags
);
296 page_base
+= AMDGPU_GPU_PAGE_SIZE
;
301 amdgpu_gart_flush_gpu_tlb(adev
, 0);
306 * amdgpu_gart_init - init the driver info for managing the gart
308 * @adev: amdgpu_device pointer
310 * Allocate the dummy page and init the gart driver info (all asics).
311 * Returns 0 for success, error for failure.
313 int amdgpu_gart_init(struct amdgpu_device
*adev
)
317 if (adev
->dummy_page
.page
)
320 /* We need PAGE_SIZE >= AMDGPU_GPU_PAGE_SIZE */
321 if (PAGE_SIZE
< AMDGPU_GPU_PAGE_SIZE
) {
322 DRM_ERROR("Page size is smaller than GPU page size!\n");
325 r
= amdgpu_dummy_page_init(adev
);
328 /* Compute table size */
329 adev
->gart
.num_cpu_pages
= adev
->mc
.gtt_size
/ PAGE_SIZE
;
330 adev
->gart
.num_gpu_pages
= adev
->mc
.gtt_size
/ AMDGPU_GPU_PAGE_SIZE
;
331 DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n",
332 adev
->gart
.num_cpu_pages
, adev
->gart
.num_gpu_pages
);
334 #ifdef CONFIG_AMDGPU_GART_DEBUGFS
335 /* Allocate pages table */
336 adev
->gart
.pages
= vzalloc(sizeof(void *) * adev
->gart
.num_cpu_pages
);
337 if (adev
->gart
.pages
== NULL
) {
338 amdgpu_gart_fini(adev
);
347 * amdgpu_gart_fini - tear down the driver info for managing the gart
349 * @adev: amdgpu_device pointer
351 * Tear down the gart driver info and free the dummy page (all asics).
353 void amdgpu_gart_fini(struct amdgpu_device
*adev
)
355 if (adev
->gart
.ready
) {
357 amdgpu_gart_unbind(adev
, 0, adev
->gart
.num_cpu_pages
);
359 adev
->gart
.ready
= false;
360 #ifdef CONFIG_AMDGPU_GART_DEBUGFS
361 vfree(adev
->gart
.pages
);
362 adev
->gart
.pages
= NULL
;
364 amdgpu_dummy_page_fini(adev
);