drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  */
  28 #include <linux/ktime.h>
  29 #include <drm/drmP.h>
  30 #include <drm/amdgpu_drm.h>
  31 #include "amdgpu.h"
  32
  33 void amdgpu_gem_object_free(struct drm_gem_object *gobj)
  34 {
  35         struct amdgpu_bo *robj = gem_to_amdgpu_bo(gobj);
  36
  37         if (robj) {
  38                 if (robj->gem_base.import_attach)
  39                         drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
  40                 amdgpu_mn_unregister(robj);
  41                 amdgpu_bo_unref(&robj);
  42         }
  43 }
  44
  45 int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size,
  46                                 int alignment, u32 initial_domain,
  47                                 u64 flags, bool kernel,
  48                                 struct drm_gem_object **obj)
  49 {
  50         struct amdgpu_bo *robj;
  51         unsigned long max_size;
  52         int r;
  53
  54         *obj = NULL;
  55         /* At least align on page size */
  56         if (alignment < PAGE_SIZE) {
  57                 alignment = PAGE_SIZE;
  58         }
  59
  60         if (!(initial_domain & (AMDGPU_GEM_DOMAIN_GDS | AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA))) {
  61                 /* Maximum bo size is the unpinned gtt size since we use the gtt to
  62                  * handle vram to system pool migrations.
  63                  */
  64                 max_size = adev->mc.gtt_size - adev->gart_pin_size;
  65                 if (size > max_size) {
  66                         DRM_DEBUG("Allocation size %ldMb bigger than %ldMb limit\n",
  67                                   size >> 20, max_size >> 20);
  68                         return -ENOMEM;
  69                 }
  70         }
  71 retry:
  72         r = amdgpu_bo_create(adev, size, alignment, kernel, initial_domain,
  73                              flags, NULL, NULL, &robj);
  74         if (r) {
  75                 if (r != -ERESTARTSYS) {
  76                         if (initial_domain == AMDGPU_GEM_DOMAIN_VRAM) {
  77                                 initial_domain |= AMDGPU_GEM_DOMAIN_GTT;
  78                                 goto retry;
  79                         }
  80                         DRM_ERROR("Failed to allocate GEM object (%ld, %d, %u, %d)\n",
  81                                   size, initial_domain, alignment, r);
  82                 }
  83                 return r;
  84         }
  85         *obj = &robj->gem_base;
  86         robj->pid = task_pid_nr(current);
  87
  88         mutex_lock(&adev->gem.mutex);
  89         list_add_tail(&robj->list, &adev->gem.objects);
  90         mutex_unlock(&adev->gem.mutex);
  91
  92         return 0;
  93 }
  94
  95 int amdgpu_gem_init(struct amdgpu_device *adev)
  96 {
  97         INIT_LIST_HEAD(&adev->gem.objects);
  98         return 0;
  99 }
 100
 101 void amdgpu_gem_fini(struct amdgpu_device *adev)
 102 {
 103         amdgpu_bo_force_delete(adev);
 104 }
 105
 106 /*
 107  * Call from drm_gem_handle_create which appear in both new and open ioctl
 108  * case.
 109  */
 110 int amdgpu_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
 111 {
 112         struct amdgpu_bo *rbo = gem_to_amdgpu_bo(obj);
 113         struct amdgpu_device *adev = rbo->adev;
 114         struct amdgpu_fpriv *fpriv = file_priv->driver_priv;
 115         struct amdgpu_vm *vm = &fpriv->vm;
 116         struct amdgpu_bo_va *bo_va;
 117         int r;
 118
 119         r = amdgpu_bo_reserve(rbo, false);
 120         if (r) {
 121                 return r;
 122         }
 123
 124         bo_va = amdgpu_vm_bo_find(vm, rbo);
 125         if (!bo_va) {
 126                 bo_va = amdgpu_vm_bo_add(adev, vm, rbo);
 127         } else {
 128                 ++bo_va->ref_count;
 129         }
 130         amdgpu_bo_unreserve(rbo);
 131
 132         return 0;
 133 }
 134
 135 void amdgpu_gem_object_close(struct drm_gem_object *obj,
 136                              struct drm_file *file_priv)
 137 {
 138         struct amdgpu_bo *rbo = gem_to_amdgpu_bo(obj);
 139         struct amdgpu_device *adev = rbo->adev;
 140         struct amdgpu_fpriv *fpriv = file_priv->driver_priv;
 141         struct amdgpu_vm *vm = &fpriv->vm;
 142         struct amdgpu_bo_va *bo_va;
 143         int r;
 144
 145         r = amdgpu_bo_reserve(rbo, true);
 146         if (r) {
 147                 dev_err(adev->dev, "leaking bo va because "
 148                         "we fail to reserve bo (%d)\n", r);
 149                 return;
 150         }
 151         bo_va = amdgpu_vm_bo_find(vm, rbo);
 152         if (bo_va) {
 153                 if (--bo_va->ref_count == 0) {
 154                         amdgpu_vm_bo_rmv(adev, bo_va);
 155                 }
 156         }
 157         amdgpu_bo_unreserve(rbo);
 158 }
 159
 160 static int amdgpu_gem_handle_lockup(struct amdgpu_device *adev, int r)
 161 {
 162         if (r == -EDEADLK) {
 163                 r = amdgpu_gpu_reset(adev);
 164                 if (!r)
 165                         r = -EAGAIN;
 166         }
 167         return r;
 168 }
 169
 170 /*
 171  * GEM ioctls.
 172  */
 173 int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
 174                             struct drm_file *filp)
 175 {
 176         struct amdgpu_device *adev = dev->dev_private;
 177         union drm_amdgpu_gem_create *args = data;
 178         uint64_t size = args->in.bo_size;
 179         struct drm_gem_object *gobj;
 180         uint32_t handle;
 181         bool kernel = false;
 182         int r;
 183
 184         /* create a gem object to contain this object in */
 185         if (args->in.domains & (AMDGPU_GEM_DOMAIN_GDS |
 186             AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {
 187                 kernel = true;
 188                 if (args->in.domains == AMDGPU_GEM_DOMAIN_GDS)
 189                         size = size << AMDGPU_GDS_SHIFT;
 190                 else if (args->in.domains == AMDGPU_GEM_DOMAIN_GWS)
 191                         size = size << AMDGPU_GWS_SHIFT;
 192                 else if (args->in.domains == AMDGPU_GEM_DOMAIN_OA)
 193                         size = size << AMDGPU_OA_SHIFT;
 194                 else {
 195                         r = -EINVAL;
 196                         goto error_unlock;
 197                 }
 198         }
 199         size = roundup(size, PAGE_SIZE);
 200
 201         r = amdgpu_gem_object_create(adev, size, args->in.alignment,
 202                                      (u32)(0xffffffff & args->in.domains),
 203                                      args->in.domain_flags,
 204                                      kernel, &gobj);
 205         if (r)
 206                 goto error_unlock;
 207
 208         r = drm_gem_handle_create(filp, gobj, &handle);
 209         /* drop reference from allocate - handle holds it now */
 210         drm_gem_object_unreference_unlocked(gobj);
 211         if (r)
 212                 goto error_unlock;
 213
 214         memset(args, 0, sizeof(*args));
 215         args->out.handle = handle;
 216         return 0;
 217
 218 error_unlock:
 219         r = amdgpu_gem_handle_lockup(adev, r);
 220         return r;
 221 }
 222
 223 int amdgpu_gem_userptr_ioctl(struct drm_device *dev, void *data,
 224                              struct drm_file *filp)
 225 {
 226         struct amdgpu_device *adev = dev->dev_private;
 227         struct drm_amdgpu_gem_userptr *args = data;
 228         struct drm_gem_object *gobj;
 229         struct amdgpu_bo *bo;
 230         uint32_t handle;
 231         int r;
 232
 233         if (offset_in_page(args->addr | args->size))
 234                 return -EINVAL;
 235
 236         /* reject unknown flag values */
 237         if (args->flags & ~(AMDGPU_GEM_USERPTR_READONLY |
 238             AMDGPU_GEM_USERPTR_ANONONLY | AMDGPU_GEM_USERPTR_VALIDATE |
 239             AMDGPU_GEM_USERPTR_REGISTER))
 240                 return -EINVAL;
 241
 242         if (!(args->flags & AMDGPU_GEM_USERPTR_ANONONLY) ||
 243                    !(args->flags & AMDGPU_GEM_USERPTR_REGISTER)) {
 244
 245                 /* if we want to write to it we must require anonymous
 246                    memory and install a MMU notifier */
 247                 return -EACCES;
 248         }
 249
 250         /* create a gem object to contain this object in */
 251         r = amdgpu_gem_object_create(adev, args->size, 0,
 252                                      AMDGPU_GEM_DOMAIN_CPU, 0,
 253                                      0, &gobj);
 254         if (r)
 255                 goto handle_lockup;
 256
 257         bo = gem_to_amdgpu_bo(gobj);
 258         r = amdgpu_ttm_tt_set_userptr(bo->tbo.ttm, args->addr, args->flags);
 259         if (r)
 260                 goto release_object;
 261
 262         if (args->flags & AMDGPU_GEM_USERPTR_REGISTER) {
 263                 r = amdgpu_mn_register(bo, args->addr);
 264                 if (r)
 265                         goto release_object;
 266         }
 267
 268         if (args->flags & AMDGPU_GEM_USERPTR_VALIDATE) {
 269                 down_read(&current->mm->mmap_sem);
 270                 r = amdgpu_bo_reserve(bo, true);
 271                 if (r) {
 272                         up_read(&current->mm->mmap_sem);
 273                         goto release_object;
 274                 }
 275
 276                 amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_GTT);
 277                 r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
 278                 amdgpu_bo_unreserve(bo);
 279                 up_read(&current->mm->mmap_sem);
 280                 if (r)
 281                         goto release_object;
 282         }
 283
 284         r = drm_gem_handle_create(filp, gobj, &handle);
 285         /* drop reference from allocate - handle holds it now */
 286         drm_gem_object_unreference_unlocked(gobj);
 287         if (r)
 288                 goto handle_lockup;
 289
 290         args->handle = handle;
 291         return 0;
 292
 293 release_object:
 294         drm_gem_object_unreference_unlocked(gobj);
 295
 296 handle_lockup:
 297         r = amdgpu_gem_handle_lockup(adev, r);
 298
 299         return r;
 300 }
 301
 302 int amdgpu_mode_dumb_mmap(struct drm_file *filp,
 303                           struct drm_device *dev,
 304                           uint32_t handle, uint64_t *offset_p)
 305 {
 306         struct drm_gem_object *gobj;
 307         struct amdgpu_bo *robj;
 308
 309         gobj = drm_gem_object_lookup(dev, filp, handle);
 310         if (gobj == NULL) {
 311                 return -ENOENT;
 312         }
 313         robj = gem_to_amdgpu_bo(gobj);
 314         if (amdgpu_ttm_tt_has_userptr(robj->tbo.ttm) ||
 315             (robj->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)) {
 316                 drm_gem_object_unreference_unlocked(gobj);
 317                 return -EPERM;
 318         }
 319         *offset_p = amdgpu_bo_mmap_offset(robj);
 320         drm_gem_object_unreference_unlocked(gobj);
 321         return 0;
 322 }
 323
 324 int amdgpu_gem_mmap_ioctl(struct drm_device *dev, void *data,
 325                           struct drm_file *filp)
 326 {
 327         union drm_amdgpu_gem_mmap *args = data;
 328         uint32_t handle = args->in.handle;
 329         memset(args, 0, sizeof(*args));
 330         return amdgpu_mode_dumb_mmap(filp, dev, handle, &args->out.addr_ptr);
 331 }
 332
 333 /**
 334  * amdgpu_gem_timeout - calculate jiffies timeout from absolute value
 335  *
 336  * @timeout_ns: timeout in ns
 337  *
 338  * Calculate the timeout in jiffies from an absolute timeout in ns.
 339  */
 340 unsigned long amdgpu_gem_timeout(uint64_t timeout_ns)
 341 {
 342         unsigned long timeout_jiffies;
 343         ktime_t timeout;
 344
 345         /* clamp timeout if it's to large */
 346         if (((int64_t)timeout_ns) < 0)
 347                 return MAX_SCHEDULE_TIMEOUT;
 348
 349         timeout = ktime_sub(ns_to_ktime(timeout_ns), ktime_get());
 350         if (ktime_to_ns(timeout) < 0)
 351                 return 0;
 352
 353         timeout_jiffies = nsecs_to_jiffies(ktime_to_ns(timeout));
 354         /*  clamp timeout to avoid unsigned-> signed overflow */
 355         if (timeout_jiffies > MAX_SCHEDULE_TIMEOUT )
 356                 return MAX_SCHEDULE_TIMEOUT - 1;
 357
 358         return timeout_jiffies;
 359 }
 360
 361 int amdgpu_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
 362                               struct drm_file *filp)
 363 {
 364         struct amdgpu_device *adev = dev->dev_private;
 365         union drm_amdgpu_gem_wait_idle *args = data;
 366         struct drm_gem_object *gobj;
 367         struct amdgpu_bo *robj;
 368         uint32_t handle = args->in.handle;
 369         unsigned long timeout = amdgpu_gem_timeout(args->in.timeout);
 370         int r = 0;
 371         long ret;
 372
 373         gobj = drm_gem_object_lookup(dev, filp, handle);
 374         if (gobj == NULL) {
 375                 return -ENOENT;
 376         }
 377         robj = gem_to_amdgpu_bo(gobj);
 378         if (timeout == 0)
 379                 ret = reservation_object_test_signaled_rcu(robj->tbo.resv, true);
 380         else
 381                 ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, timeout);
 382
 383         /* ret == 0 means not signaled,
 384          * ret > 0 means signaled
 385          * ret < 0 means interrupted before timeout
 386          */
 387         if (ret >= 0) {
 388                 memset(args, 0, sizeof(*args));
 389                 args->out.status = (ret == 0);
 390         } else
 391                 r = ret;
 392
 393         drm_gem_object_unreference_unlocked(gobj);
 394         r = amdgpu_gem_handle_lockup(adev, r);
 395         return r;
 396 }
 397
 398 int amdgpu_gem_metadata_ioctl(struct drm_device *dev, void *data,
 399                                 struct drm_file *filp)
 400 {
 401         struct drm_amdgpu_gem_metadata *args = data;
 402         struct drm_gem_object *gobj;
 403         struct amdgpu_bo *robj;
 404         int r = -1;
 405
 406         DRM_DEBUG("%d \n", args->handle);
 407         gobj = drm_gem_object_lookup(dev, filp, args->handle);
 408         if (gobj == NULL)
 409                 return -ENOENT;
 410         robj = gem_to_amdgpu_bo(gobj);
 411
 412         r = amdgpu_bo_reserve(robj, false);
 413         if (unlikely(r != 0))
 414                 goto out;
 415
 416         if (args->op == AMDGPU_GEM_METADATA_OP_GET_METADATA) {
 417                 amdgpu_bo_get_tiling_flags(robj, &args->data.tiling_info);
 418                 r = amdgpu_bo_get_metadata(robj, args->data.data,
 419                                            sizeof(args->data.data),
 420                                            &args->data.data_size_bytes,
 421                                            &args->data.flags);
 422         } else if (args->op == AMDGPU_GEM_METADATA_OP_SET_METADATA) {
 423                 if (args->data.data_size_bytes > sizeof(args->data.data)) {
 424                         r = -EINVAL;
 425                         goto unreserve;
 426                 }
 427                 r = amdgpu_bo_set_tiling_flags(robj, args->data.tiling_info);
 428                 if (!r)
 429                         r = amdgpu_bo_set_metadata(robj, args->data.data,
 430                                                    args->data.data_size_bytes,
 431                                                    args->data.flags);
 432         }
 433
 434 unreserve:
 435         amdgpu_bo_unreserve(robj);
 436 out:
 437         drm_gem_object_unreference_unlocked(gobj);
 438         return r;
 439 }
 440
 441 /**
 442  * amdgpu_gem_va_update_vm -update the bo_va in its VM
 443  *
 444  * @adev: amdgpu_device pointer
 445  * @bo_va: bo_va to update
 446  *
 447  * Update the bo_va directly after setting it's address. Errors are not
 448  * vital here, so they are not reported back to userspace.
 449  */
 450 static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,
 451                                     struct amdgpu_bo_va *bo_va, uint32_t operation)
 452 {
 453         struct ttm_validate_buffer tv, *entry;
 454         struct amdgpu_bo_list_entry *vm_bos;
 455         struct ww_acquire_ctx ticket;
 456         struct list_head list, duplicates;
 457         unsigned domain;
 458         int r;
 459
 460         INIT_LIST_HEAD(&list);
 461         INIT_LIST_HEAD(&duplicates);
 462
 463         tv.bo = &bo_va->bo->tbo;
 464         tv.shared = true;
 465         list_add(&tv.head, &list);
 466
 467         vm_bos = amdgpu_vm_get_bos(adev, bo_va->vm, &list);
 468         if (!vm_bos)
 469                 return;
 470
 471         /* Provide duplicates to avoid -EALREADY */
 472         r = ttm_eu_reserve_buffers(&ticket, &list, true, &duplicates);
 473         if (r)
 474                 goto error_free;
 475
 476         list_for_each_entry(entry, &list, head) {
 477                 domain = amdgpu_mem_type_to_domain(entry->bo->mem.mem_type);
 478                 /* if anything is swapped out don't swap it in here,
 479                    just abort and wait for the next CS */
 480                 if (domain == AMDGPU_GEM_DOMAIN_CPU)
 481                         goto error_unreserve;
 482         }
 483
 484         mutex_lock(&bo_va->vm->mutex);
 485         r = amdgpu_vm_clear_freed(adev, bo_va->vm);
 486         if (r)
 487                 goto error_unlock;
 488
 489
 490         if (operation == AMDGPU_VA_OP_MAP)
 491                 r = amdgpu_vm_bo_update(adev, bo_va, &bo_va->bo->tbo.mem);
 492
 493 error_unlock:
 494         mutex_unlock(&bo_va->vm->mutex);
 495
 496 error_unreserve:
 497         ttm_eu_backoff_reservation(&ticket, &list);
 498
 499 error_free:
 500         drm_free_large(vm_bos);
 501
 502         if (r && r != -ERESTARTSYS)
 503                 DRM_ERROR("Couldn't update BO_VA (%d)\n", r);
 504 }
 505
 506
 507
 508 int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
 509                           struct drm_file *filp)
 510 {
 511         struct drm_amdgpu_gem_va *args = data;
 512         struct drm_gem_object *gobj;
 513         struct amdgpu_device *adev = dev->dev_private;
 514         struct amdgpu_fpriv *fpriv = filp->driver_priv;
 515         struct amdgpu_bo *rbo;
 516         struct amdgpu_bo_va *bo_va;
 517         uint32_t invalid_flags, va_flags = 0;
 518         int r = 0;
 519
 520         if (!adev->vm_manager.enabled)
 521                 return -ENOTTY;
 522
 523         if (args->va_address < AMDGPU_VA_RESERVED_SIZE) {
 524                 dev_err(&dev->pdev->dev,
 525                         "va_address 0x%lX is in reserved area 0x%X\n",
 526                         (unsigned long)args->va_address,
 527                         AMDGPU_VA_RESERVED_SIZE);
 528                 return -EINVAL;
 529         }
 530
 531         invalid_flags = ~(AMDGPU_VM_DELAY_UPDATE | AMDGPU_VM_PAGE_READABLE |
 532                         AMDGPU_VM_PAGE_WRITEABLE | AMDGPU_VM_PAGE_EXECUTABLE);
 533         if ((args->flags & invalid_flags)) {
 534                 dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
 535                         args->flags, invalid_flags);
 536                 return -EINVAL;
 537         }
 538
 539         switch (args->operation) {
 540         case AMDGPU_VA_OP_MAP:
 541         case AMDGPU_VA_OP_UNMAP:
 542                 break;
 543         default:
 544                 dev_err(&dev->pdev->dev, "unsupported operation %d\n",
 545                         args->operation);
 546                 return -EINVAL;
 547         }
 548
 549         gobj = drm_gem_object_lookup(dev, filp, args->handle);
 550         if (gobj == NULL)
 551                 return -ENOENT;
 552
 553         rbo = gem_to_amdgpu_bo(gobj);
 554         r = amdgpu_bo_reserve(rbo, false);
 555         if (r) {
 556                 drm_gem_object_unreference_unlocked(gobj);
 557                 return r;
 558         }
 559
 560         bo_va = amdgpu_vm_bo_find(&fpriv->vm, rbo);
 561         if (!bo_va) {
 562                 amdgpu_bo_unreserve(rbo);
 563                 return -ENOENT;
 564         }
 565
 566         switch (args->operation) {
 567         case AMDGPU_VA_OP_MAP:
 568                 if (args->flags & AMDGPU_VM_PAGE_READABLE)
 569                         va_flags |= AMDGPU_PTE_READABLE;
 570                 if (args->flags & AMDGPU_VM_PAGE_WRITEABLE)
 571                         va_flags |= AMDGPU_PTE_WRITEABLE;
 572                 if (args->flags & AMDGPU_VM_PAGE_EXECUTABLE)
 573                         va_flags |= AMDGPU_PTE_EXECUTABLE;
 574                 r = amdgpu_vm_bo_map(adev, bo_va, args->va_address,
 575                                      args->offset_in_bo, args->map_size,
 576                                      va_flags);
 577                 break;
 578         case AMDGPU_VA_OP_UNMAP:
 579                 r = amdgpu_vm_bo_unmap(adev, bo_va, args->va_address);
 580                 break;
 581         default:
 582                 break;
 583         }
 584
 585         if (!r && !(args->flags & AMDGPU_VM_DELAY_UPDATE))
 586                 amdgpu_gem_va_update_vm(adev, bo_va, args->operation);
 587
 588         drm_gem_object_unreference_unlocked(gobj);
 589         return r;
 590 }
 591
 592 int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
 593                         struct drm_file *filp)
 594 {
 595         struct drm_amdgpu_gem_op *args = data;
 596         struct drm_gem_object *gobj;
 597         struct amdgpu_bo *robj;
 598         int r;
 599
 600         gobj = drm_gem_object_lookup(dev, filp, args->handle);
 601         if (gobj == NULL) {
 602                 return -ENOENT;
 603         }
 604         robj = gem_to_amdgpu_bo(gobj);
 605
 606         r = amdgpu_bo_reserve(robj, false);
 607         if (unlikely(r))
 608                 goto out;
 609
 610         switch (args->op) {
 611         case AMDGPU_GEM_OP_GET_GEM_CREATE_INFO: {
 612                 struct drm_amdgpu_gem_create_in info;
 613                 void __user *out = (void __user *)(long)args->value;
 614
 615                 info.bo_size = robj->gem_base.size;
 616                 info.alignment = robj->tbo.mem.page_alignment << PAGE_SHIFT;
 617                 info.domains = robj->initial_domain;
 618                 info.domain_flags = robj->flags;
 619                 amdgpu_bo_unreserve(robj);
 620                 if (copy_to_user(out, &info, sizeof(info)))
 621                         r = -EFAULT;
 622                 break;
 623         }
 624         case AMDGPU_GEM_OP_SET_PLACEMENT:
 625                 if (amdgpu_ttm_tt_has_userptr(robj->tbo.ttm)) {
 626                         r = -EPERM;
 627                         amdgpu_bo_unreserve(robj);
 628                         break;
 629                 }
 630                 robj->initial_domain = args->value & (AMDGPU_GEM_DOMAIN_VRAM |
 631                                                       AMDGPU_GEM_DOMAIN_GTT |
 632                                                       AMDGPU_GEM_DOMAIN_CPU);
 633                 amdgpu_bo_unreserve(robj);
 634                 break;
 635         default:
 636                 amdgpu_bo_unreserve(robj);
 637                 r = -EINVAL;
 638         }
 639
 640 out:
 641         drm_gem_object_unreference_unlocked(gobj);
 642         return r;
 643 }
 644
 645 int amdgpu_mode_dumb_create(struct drm_file *file_priv,
 646                             struct drm_device *dev,
 647                             struct drm_mode_create_dumb *args)
 648 {
 649         struct amdgpu_device *adev = dev->dev_private;
 650         struct drm_gem_object *gobj;
 651         uint32_t handle;
 652         int r;
 653
 654         args->pitch = amdgpu_align_pitch(adev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
 655         args->size = (u64)args->pitch * args->height;
 656         args->size = ALIGN(args->size, PAGE_SIZE);
 657
 658         r = amdgpu_gem_object_create(adev, args->size, 0,
 659                                      AMDGPU_GEM_DOMAIN_VRAM,
 660                                      AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
 661                                      ttm_bo_type_device,
 662                                      &gobj);
 663         if (r)
 664                 return -ENOMEM;
 665
 666         r = drm_gem_handle_create(file_priv, gobj, &handle);
 667         /* drop reference from allocate - handle holds it now */
 668         drm_gem_object_unreference_unlocked(gobj);
 669         if (r) {
 670                 return r;
 671         }
 672         args->handle = handle;
 673         return 0;
 674 }
 675
 676 #if defined(CONFIG_DEBUG_FS)
 677 static int amdgpu_debugfs_gem_info(struct seq_file *m, void *data)
 678 {
 679         struct drm_info_node *node = (struct drm_info_node *)m->private;
 680         struct drm_device *dev = node->minor->dev;
 681         struct amdgpu_device *adev = dev->dev_private;
 682         struct amdgpu_bo *rbo;
 683         unsigned i = 0;
 684
 685         mutex_lock(&adev->gem.mutex);
 686         list_for_each_entry(rbo, &adev->gem.objects, list) {
 687                 unsigned domain;
 688                 const char *placement;
 689
 690                 domain = amdgpu_mem_type_to_domain(rbo->tbo.mem.mem_type);
 691                 switch (domain) {
 692                 case AMDGPU_GEM_DOMAIN_VRAM:
 693                         placement = "VRAM";
 694                         break;
 695                 case AMDGPU_GEM_DOMAIN_GTT:
 696                         placement = " GTT";
 697                         break;
 698                 case AMDGPU_GEM_DOMAIN_CPU:
 699                 default:
 700                         placement = " CPU";
 701                         break;
 702                 }
 703                 seq_printf(m, "bo[0x%08x] %8ldkB %8ldMB %s pid %8ld\n",
 704                            i, amdgpu_bo_size(rbo) >> 10, amdgpu_bo_size(rbo) >> 20,
 705                            placement, (unsigned long)rbo->pid);
 706                 i++;
 707         }
 708         mutex_unlock(&adev->gem.mutex);
 709         return 0;
 710 }
 711
 712 static struct drm_info_list amdgpu_debugfs_gem_list[] = {
 713         {"amdgpu_gem_info", &amdgpu_debugfs_gem_info, 0, NULL},
 714 };
 715 #endif
 716
 717 int amdgpu_gem_debugfs_init(struct amdgpu_device *adev)
 718 {
 719 #if defined(CONFIG_DEBUG_FS)
 720         return amdgpu_debugfs_add_files(adev, amdgpu_debugfs_gem_list, 1);
 721 #endif
 722         return 0;
 723 }