2 * Copyright 2015 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
27 #include "amd_shared.h"
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include "amdgpu_pm.h"
31 #include <drm/amdgpu_drm.h>
32 #include "amdgpu_powerplay.h"
36 static int amdgpu_powerplay_init(struct amdgpu_device
*adev
)
39 struct amd_powerplay
*amd_pp
;
41 amd_pp
= &(adev
->powerplay
);
43 if (adev
->pp_enabled
) {
44 #ifdef CONFIG_DRM_AMD_POWERPLAY
45 struct amd_pp_init
*pp_init
;
47 pp_init
= kzalloc(sizeof(struct amd_pp_init
), GFP_KERNEL
);
52 pp_init
->chip_family
= adev
->family
;
53 pp_init
->chip_id
= adev
->asic_type
;
54 pp_init
->device
= amdgpu_cgs_create_device(adev
);
56 ret
= amd_powerplay_init(pp_init
, amd_pp
);
60 amd_pp
->pp_handle
= (void *)adev
;
62 switch (adev
->asic_type
) {
63 #ifdef CONFIG_DRM_AMDGPU_CIK
66 amd_pp
->ip_funcs
= &ci_dpm_ip_funcs
;
71 amd_pp
->ip_funcs
= &kv_dpm_ip_funcs
;
75 amd_pp
->ip_funcs
= &iceland_dpm_ip_funcs
;
78 amd_pp
->ip_funcs
= &tonga_dpm_ip_funcs
;
81 amd_pp
->ip_funcs
= &fiji_dpm_ip_funcs
;
85 amd_pp
->ip_funcs
= &cz_dpm_ip_funcs
;
95 static int amdgpu_pp_early_init(void *handle
)
97 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
100 #ifdef CONFIG_DRM_AMD_POWERPLAY
101 switch (adev
->asic_type
) {
104 adev
->pp_enabled
= (amdgpu_powerplay
> 0) ? true : false;
107 adev
->pp_enabled
= (amdgpu_powerplay
> 0) ? true : false;
111 adev
->pp_enabled
= false;
114 ret
= amdgpu_powerplay_init(adev
);
118 if (adev
->powerplay
.ip_funcs
->early_init
)
119 ret
= adev
->powerplay
.ip_funcs
->early_init(
120 adev
->powerplay
.pp_handle
);
125 static int amdgpu_pp_late_init(void *handle
)
128 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
130 if (adev
->powerplay
.ip_funcs
->late_init
)
131 ret
= adev
->powerplay
.ip_funcs
->late_init(
132 adev
->powerplay
.pp_handle
);
134 #ifdef CONFIG_DRM_AMD_POWERPLAY
135 if (adev
->pp_enabled
)
136 amdgpu_pm_sysfs_init(adev
);
141 static int amdgpu_pp_sw_init(void *handle
)
144 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
146 if (adev
->powerplay
.ip_funcs
->sw_init
)
147 ret
= adev
->powerplay
.ip_funcs
->sw_init(
148 adev
->powerplay
.pp_handle
);
150 #ifdef CONFIG_DRM_AMD_POWERPLAY
151 if (adev
->pp_enabled
) {
153 adev
->pm
.dpm_enabled
= false;
155 adev
->pm
.dpm_enabled
= true;
162 static int amdgpu_pp_sw_fini(void *handle
)
165 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
167 if (adev
->powerplay
.ip_funcs
->sw_fini
)
168 ret
= adev
->powerplay
.ip_funcs
->sw_fini(
169 adev
->powerplay
.pp_handle
);
173 #ifdef CONFIG_DRM_AMD_POWERPLAY
174 if (adev
->pp_enabled
) {
175 amdgpu_pm_sysfs_fini(adev
);
176 amd_powerplay_fini(adev
->powerplay
.pp_handle
);
183 static int amdgpu_pp_hw_init(void *handle
)
186 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
188 if (adev
->pp_enabled
&& adev
->firmware
.smu_load
)
189 amdgpu_ucode_init_bo(adev
);
191 if (adev
->powerplay
.ip_funcs
->hw_init
)
192 ret
= adev
->powerplay
.ip_funcs
->hw_init(
193 adev
->powerplay
.pp_handle
);
198 static int amdgpu_pp_hw_fini(void *handle
)
201 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
203 if (adev
->powerplay
.ip_funcs
->hw_fini
)
204 ret
= adev
->powerplay
.ip_funcs
->hw_fini(
205 adev
->powerplay
.pp_handle
);
207 if (adev
->pp_enabled
&& adev
->firmware
.smu_load
)
208 amdgpu_ucode_fini_bo(adev
);
213 static int amdgpu_pp_suspend(void *handle
)
216 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
218 if (adev
->powerplay
.ip_funcs
->suspend
)
219 ret
= adev
->powerplay
.ip_funcs
->suspend(
220 adev
->powerplay
.pp_handle
);
224 static int amdgpu_pp_resume(void *handle
)
227 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
229 if (adev
->powerplay
.ip_funcs
->resume
)
230 ret
= adev
->powerplay
.ip_funcs
->resume(
231 adev
->powerplay
.pp_handle
);
235 static int amdgpu_pp_set_clockgating_state(void *handle
,
236 enum amd_clockgating_state state
)
239 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
241 if (adev
->powerplay
.ip_funcs
->set_clockgating_state
)
242 ret
= adev
->powerplay
.ip_funcs
->set_clockgating_state(
243 adev
->powerplay
.pp_handle
, state
);
247 static int amdgpu_pp_set_powergating_state(void *handle
,
248 enum amd_powergating_state state
)
251 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
253 if (adev
->powerplay
.ip_funcs
->set_powergating_state
)
254 ret
= adev
->powerplay
.ip_funcs
->set_powergating_state(
255 adev
->powerplay
.pp_handle
, state
);
260 static bool amdgpu_pp_is_idle(void *handle
)
263 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
265 if (adev
->powerplay
.ip_funcs
->is_idle
)
266 ret
= adev
->powerplay
.ip_funcs
->is_idle(
267 adev
->powerplay
.pp_handle
);
271 static int amdgpu_pp_wait_for_idle(void *handle
)
274 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
276 if (adev
->powerplay
.ip_funcs
->wait_for_idle
)
277 ret
= adev
->powerplay
.ip_funcs
->wait_for_idle(
278 adev
->powerplay
.pp_handle
);
282 static int amdgpu_pp_soft_reset(void *handle
)
285 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
287 if (adev
->powerplay
.ip_funcs
->soft_reset
)
288 ret
= adev
->powerplay
.ip_funcs
->soft_reset(
289 adev
->powerplay
.pp_handle
);
293 static void amdgpu_pp_print_status(void *handle
)
295 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
297 if (adev
->powerplay
.ip_funcs
->print_status
)
298 adev
->powerplay
.ip_funcs
->print_status(
299 adev
->powerplay
.pp_handle
);
302 const struct amd_ip_funcs amdgpu_pp_ip_funcs
= {
303 .early_init
= amdgpu_pp_early_init
,
304 .late_init
= amdgpu_pp_late_init
,
305 .sw_init
= amdgpu_pp_sw_init
,
306 .sw_fini
= amdgpu_pp_sw_fini
,
307 .hw_init
= amdgpu_pp_hw_init
,
308 .hw_fini
= amdgpu_pp_hw_fini
,
309 .suspend
= amdgpu_pp_suspend
,
310 .resume
= amdgpu_pp_resume
,
311 .is_idle
= amdgpu_pp_is_idle
,
312 .wait_for_idle
= amdgpu_pp_wait_for_idle
,
313 .soft_reset
= amdgpu_pp_soft_reset
,
314 .print_status
= amdgpu_pp_print_status
,
315 .set_clockgating_state
= amdgpu_pp_set_clockgating_state
,
316 .set_powergating_state
= amdgpu_pp_set_powergating_state
,