2 * Copyright 2008 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Author: Stanislaw Skowronek
25 #include <linux/module.h>
26 #include <linux/sched.h>
27 #include <linux/slab.h>
28 #include <asm/unaligned.h>
33 #include "atom-names.h"
34 #include "atom-bits.h"
37 #define ATOM_COND_ABOVE 0
38 #define ATOM_COND_ABOVEOREQUAL 1
39 #define ATOM_COND_ALWAYS 2
40 #define ATOM_COND_BELOW 3
41 #define ATOM_COND_BELOWOREQUAL 4
42 #define ATOM_COND_EQUAL 5
43 #define ATOM_COND_NOTEQUAL 6
45 #define ATOM_PORT_ATI 0
46 #define ATOM_PORT_PCI 1
47 #define ATOM_PORT_SYSIO 2
49 #define ATOM_UNIT_MICROSEC 0
50 #define ATOM_UNIT_MILLISEC 1
56 struct atom_context
*ctx
;
61 unsigned long last_jump_jiffies
;
65 int amdgpu_atom_debug
= 0;
66 static int amdgpu_atom_execute_table_locked(struct atom_context
*ctx
, int index
, uint32_t * params
);
67 int amdgpu_atom_execute_table(struct atom_context
*ctx
, int index
, uint32_t * params
);
69 static uint32_t atom_arg_mask
[8] =
70 { 0xFFFFFFFF, 0xFFFF, 0xFFFF00, 0xFFFF0000, 0xFF, 0xFF00, 0xFF0000,
72 static int atom_arg_shift
[8] = { 0, 0, 8, 16, 0, 8, 16, 24 };
74 static int atom_dst_to_src
[8][4] = {
75 /* translate destination alignment field to the source alignment encoding */
85 static int atom_def_dst
[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };
87 static int debug_depth
= 0;
89 static void debug_print_spaces(int n
)
95 #define DEBUG(...) do if (amdgpu_atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while (0)
96 #define SDEBUG(...) do if (amdgpu_atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while (0)
98 #define DEBUG(...) do { } while (0)
99 #define SDEBUG(...) do { } while (0)
102 static uint32_t atom_iio_execute(struct atom_context
*ctx
, int base
,
103 uint32_t index
, uint32_t data
)
105 uint32_t temp
= 0xCDCDCDCD;
113 temp
= ctx
->card
->ioreg_read(ctx
->card
, CU16(base
+ 1));
117 ctx
->card
->ioreg_write(ctx
->card
, CU16(base
+ 1), temp
);
122 ~((0xFFFFFFFF >> (32 - CU8(base
+ 1))) <<
128 (0xFFFFFFFF >> (32 - CU8(base
+ 1))) << CU8(base
+
132 case ATOM_IIO_MOVE_INDEX
:
134 ~((0xFFFFFFFF >> (32 - CU8(base
+ 1))) <<
137 ((index
>> CU8(base
+ 2)) &
138 (0xFFFFFFFF >> (32 - CU8(base
+ 1)))) << CU8(base
+
142 case ATOM_IIO_MOVE_DATA
:
144 ~((0xFFFFFFFF >> (32 - CU8(base
+ 1))) <<
147 ((data
>> CU8(base
+ 2)) &
148 (0xFFFFFFFF >> (32 - CU8(base
+ 1)))) << CU8(base
+
152 case ATOM_IIO_MOVE_ATTR
:
154 ~((0xFFFFFFFF >> (32 - CU8(base
+ 1))) <<
158 io_attr
>> CU8(base
+ 2)) & (0xFFFFFFFF >> (32 -
169 printk(KERN_INFO
"Unknown IIO opcode.\n");
174 static uint32_t atom_get_src_int(atom_exec_context
*ctx
, uint8_t attr
,
175 int *ptr
, uint32_t *saved
, int print
)
177 uint32_t idx
, val
= 0xCDCDCDCD, align
, arg
;
178 struct atom_context
*gctx
= ctx
->ctx
;
180 align
= (attr
>> 3) & 7;
186 DEBUG("REG[0x%04X]", idx
);
187 idx
+= gctx
->reg_block
;
188 switch (gctx
->io_mode
) {
190 val
= gctx
->card
->reg_read(gctx
->card
, idx
);
194 "PCI registers are not implemented.\n");
198 "SYSIO registers are not implemented.\n");
201 if (!(gctx
->io_mode
& 0x80)) {
202 printk(KERN_INFO
"Bad IO mode.\n");
205 if (!gctx
->iio
[gctx
->io_mode
& 0x7F]) {
207 "Undefined indirect IO read method %d.\n",
208 gctx
->io_mode
& 0x7F);
212 atom_iio_execute(gctx
,
213 gctx
->iio
[gctx
->io_mode
& 0x7F],
220 /* get_unaligned_le32 avoids unaligned accesses from atombios
221 * tables, noticed on a DEC Alpha. */
222 val
= get_unaligned_le32((u32
*)&ctx
->ps
[idx
]);
224 DEBUG("PS[0x%02X,0x%04X]", idx
, val
);
230 DEBUG("WS[0x%02X]", idx
);
232 case ATOM_WS_QUOTIENT
:
233 val
= gctx
->divmul
[0];
235 case ATOM_WS_REMAINDER
:
236 val
= gctx
->divmul
[1];
238 case ATOM_WS_DATAPTR
:
239 val
= gctx
->data_block
;
244 case ATOM_WS_OR_MASK
:
245 val
= 1 << gctx
->shift
;
247 case ATOM_WS_AND_MASK
:
248 val
= ~(1 << gctx
->shift
);
250 case ATOM_WS_FB_WINDOW
:
253 case ATOM_WS_ATTRIBUTES
:
257 val
= gctx
->reg_block
;
267 if (gctx
->data_block
)
268 DEBUG("ID[0x%04X+%04X]", idx
, gctx
->data_block
);
270 DEBUG("ID[0x%04X]", idx
);
272 val
= U32(idx
+ gctx
->data_block
);
277 if ((gctx
->fb_base
+ (idx
* 4)) > gctx
->scratch_size_bytes
) {
278 DRM_ERROR("ATOM: fb read beyond scratch region: %d vs. %d\n",
279 gctx
->fb_base
+ (idx
* 4), gctx
->scratch_size_bytes
);
282 val
= gctx
->scratch
[(gctx
->fb_base
/ 4) + idx
];
284 DEBUG("FB[0x%02X]", idx
);
292 DEBUG("IMM 0x%08X\n", val
);
296 case ATOM_SRC_WORD16
:
300 DEBUG("IMM 0x%04X\n", val
);
304 case ATOM_SRC_BYTE16
:
305 case ATOM_SRC_BYTE24
:
309 DEBUG("IMM 0x%02X\n", val
);
317 DEBUG("PLL[0x%02X]", idx
);
318 val
= gctx
->card
->pll_read(gctx
->card
, idx
);
324 DEBUG("MC[0x%02X]", idx
);
325 val
= gctx
->card
->mc_read(gctx
->card
, idx
);
330 val
&= atom_arg_mask
[align
];
331 val
>>= atom_arg_shift
[align
];
335 DEBUG(".[31:0] -> 0x%08X\n", val
);
338 DEBUG(".[15:0] -> 0x%04X\n", val
);
341 DEBUG(".[23:8] -> 0x%04X\n", val
);
343 case ATOM_SRC_WORD16
:
344 DEBUG(".[31:16] -> 0x%04X\n", val
);
347 DEBUG(".[7:0] -> 0x%02X\n", val
);
350 DEBUG(".[15:8] -> 0x%02X\n", val
);
352 case ATOM_SRC_BYTE16
:
353 DEBUG(".[23:16] -> 0x%02X\n", val
);
355 case ATOM_SRC_BYTE24
:
356 DEBUG(".[31:24] -> 0x%02X\n", val
);
362 static void atom_skip_src_int(atom_exec_context
*ctx
, uint8_t attr
, int *ptr
)
364 uint32_t align
= (attr
>> 3) & 7, arg
= attr
& 7;
384 case ATOM_SRC_WORD16
:
389 case ATOM_SRC_BYTE16
:
390 case ATOM_SRC_BYTE24
:
398 static uint32_t atom_get_src(atom_exec_context
*ctx
, uint8_t attr
, int *ptr
)
400 return atom_get_src_int(ctx
, attr
, ptr
, NULL
, 1);
403 static uint32_t atom_get_src_direct(atom_exec_context
*ctx
, uint8_t align
, int *ptr
)
405 uint32_t val
= 0xCDCDCDCD;
414 case ATOM_SRC_WORD16
:
420 case ATOM_SRC_BYTE16
:
421 case ATOM_SRC_BYTE24
:
429 static uint32_t atom_get_dst(atom_exec_context
*ctx
, int arg
, uint8_t attr
,
430 int *ptr
, uint32_t *saved
, int print
)
432 return atom_get_src_int(ctx
,
433 arg
| atom_dst_to_src
[(attr
>> 3) &
434 7][(attr
>> 6) & 3] << 3,
438 static void atom_skip_dst(atom_exec_context
*ctx
, int arg
, uint8_t attr
, int *ptr
)
440 atom_skip_src_int(ctx
,
441 arg
| atom_dst_to_src
[(attr
>> 3) & 7][(attr
>> 6) &
445 static void atom_put_dst(atom_exec_context
*ctx
, int arg
, uint8_t attr
,
446 int *ptr
, uint32_t val
, uint32_t saved
)
449 atom_dst_to_src
[(attr
>> 3) & 7][(attr
>> 6) & 3], old_val
=
451 struct atom_context
*gctx
= ctx
->ctx
;
452 old_val
&= atom_arg_mask
[align
] >> atom_arg_shift
[align
];
453 val
<<= atom_arg_shift
[align
];
454 val
&= atom_arg_mask
[align
];
455 saved
&= ~atom_arg_mask
[align
];
461 DEBUG("REG[0x%04X]", idx
);
462 idx
+= gctx
->reg_block
;
463 switch (gctx
->io_mode
) {
466 gctx
->card
->reg_write(gctx
->card
, idx
,
469 gctx
->card
->reg_write(gctx
->card
, idx
, val
);
473 "PCI registers are not implemented.\n");
477 "SYSIO registers are not implemented.\n");
480 if (!(gctx
->io_mode
& 0x80)) {
481 printk(KERN_INFO
"Bad IO mode.\n");
484 if (!gctx
->iio
[gctx
->io_mode
& 0xFF]) {
486 "Undefined indirect IO write method %d.\n",
487 gctx
->io_mode
& 0x7F);
490 atom_iio_execute(gctx
, gctx
->iio
[gctx
->io_mode
& 0xFF],
497 DEBUG("PS[0x%02X]", idx
);
498 ctx
->ps
[idx
] = cpu_to_le32(val
);
503 DEBUG("WS[0x%02X]", idx
);
505 case ATOM_WS_QUOTIENT
:
506 gctx
->divmul
[0] = val
;
508 case ATOM_WS_REMAINDER
:
509 gctx
->divmul
[1] = val
;
511 case ATOM_WS_DATAPTR
:
512 gctx
->data_block
= val
;
517 case ATOM_WS_OR_MASK
:
518 case ATOM_WS_AND_MASK
:
520 case ATOM_WS_FB_WINDOW
:
523 case ATOM_WS_ATTRIBUTES
:
527 gctx
->reg_block
= val
;
536 if ((gctx
->fb_base
+ (idx
* 4)) > gctx
->scratch_size_bytes
) {
537 DRM_ERROR("ATOM: fb write beyond scratch region: %d vs. %d\n",
538 gctx
->fb_base
+ (idx
* 4), gctx
->scratch_size_bytes
);
540 gctx
->scratch
[(gctx
->fb_base
/ 4) + idx
] = val
;
541 DEBUG("FB[0x%02X]", idx
);
546 DEBUG("PLL[0x%02X]", idx
);
547 gctx
->card
->pll_write(gctx
->card
, idx
, val
);
552 DEBUG("MC[0x%02X]", idx
);
553 gctx
->card
->mc_write(gctx
->card
, idx
, val
);
558 DEBUG(".[31:0] <- 0x%08X\n", old_val
);
561 DEBUG(".[15:0] <- 0x%04X\n", old_val
);
564 DEBUG(".[23:8] <- 0x%04X\n", old_val
);
566 case ATOM_SRC_WORD16
:
567 DEBUG(".[31:16] <- 0x%04X\n", old_val
);
570 DEBUG(".[7:0] <- 0x%02X\n", old_val
);
573 DEBUG(".[15:8] <- 0x%02X\n", old_val
);
575 case ATOM_SRC_BYTE16
:
576 DEBUG(".[23:16] <- 0x%02X\n", old_val
);
578 case ATOM_SRC_BYTE24
:
579 DEBUG(".[31:24] <- 0x%02X\n", old_val
);
584 static void atom_op_add(atom_exec_context
*ctx
, int *ptr
, int arg
)
586 uint8_t attr
= U8((*ptr
)++);
587 uint32_t dst
, src
, saved
;
590 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 1);
592 src
= atom_get_src(ctx
, attr
, ptr
);
595 atom_put_dst(ctx
, arg
, attr
, &dptr
, dst
, saved
);
598 static void atom_op_and(atom_exec_context
*ctx
, int *ptr
, int arg
)
600 uint8_t attr
= U8((*ptr
)++);
601 uint32_t dst
, src
, saved
;
604 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 1);
606 src
= atom_get_src(ctx
, attr
, ptr
);
609 atom_put_dst(ctx
, arg
, attr
, &dptr
, dst
, saved
);
612 static void atom_op_beep(atom_exec_context
*ctx
, int *ptr
, int arg
)
614 printk("ATOM BIOS beeped!\n");
617 static void atom_op_calltable(atom_exec_context
*ctx
, int *ptr
, int arg
)
619 int idx
= U8((*ptr
)++);
622 if (idx
< ATOM_TABLE_NAMES_CNT
)
623 SDEBUG(" table: %d (%s)\n", idx
, atom_table_names
[idx
]);
625 SDEBUG(" table: %d\n", idx
);
626 if (U16(ctx
->ctx
->cmd_table
+ 4 + 2 * idx
))
627 r
= amdgpu_atom_execute_table_locked(ctx
->ctx
, idx
, ctx
->ps
+ ctx
->ps_shift
);
633 static void atom_op_clear(atom_exec_context
*ctx
, int *ptr
, int arg
)
635 uint8_t attr
= U8((*ptr
)++);
639 attr
|= atom_def_dst
[attr
>> 3] << 6;
640 atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 0);
642 atom_put_dst(ctx
, arg
, attr
, &dptr
, 0, saved
);
645 static void atom_op_compare(atom_exec_context
*ctx
, int *ptr
, int arg
)
647 uint8_t attr
= U8((*ptr
)++);
650 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, NULL
, 1);
652 src
= atom_get_src(ctx
, attr
, ptr
);
653 ctx
->ctx
->cs_equal
= (dst
== src
);
654 ctx
->ctx
->cs_above
= (dst
> src
);
655 SDEBUG(" result: %s %s\n", ctx
->ctx
->cs_equal
? "EQ" : "NE",
656 ctx
->ctx
->cs_above
? "GT" : "LE");
659 static void atom_op_delay(atom_exec_context
*ctx
, int *ptr
, int arg
)
661 unsigned count
= U8((*ptr
)++);
662 SDEBUG(" count: %d\n", count
);
663 if (arg
== ATOM_UNIT_MICROSEC
)
665 else if (!drm_can_sleep())
671 static void atom_op_div(atom_exec_context
*ctx
, int *ptr
, int arg
)
673 uint8_t attr
= U8((*ptr
)++);
676 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, NULL
, 1);
678 src
= atom_get_src(ctx
, attr
, ptr
);
680 ctx
->ctx
->divmul
[0] = dst
/ src
;
681 ctx
->ctx
->divmul
[1] = dst
% src
;
683 ctx
->ctx
->divmul
[0] = 0;
684 ctx
->ctx
->divmul
[1] = 0;
688 static void atom_op_div32(atom_exec_context
*ctx
, int *ptr
, int arg
)
691 uint8_t attr
= U8((*ptr
)++);
694 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, NULL
, 1);
696 src
= atom_get_src(ctx
, attr
, ptr
);
699 val64
|= ((uint64_t)ctx
->ctx
->divmul
[1]) << 32;
701 ctx
->ctx
->divmul
[0] = lower_32_bits(val64
);
702 ctx
->ctx
->divmul
[1] = upper_32_bits(val64
);
704 ctx
->ctx
->divmul
[0] = 0;
705 ctx
->ctx
->divmul
[1] = 0;
709 static void atom_op_eot(atom_exec_context
*ctx
, int *ptr
, int arg
)
711 /* functionally, a nop */
714 static void atom_op_jump(atom_exec_context
*ctx
, int *ptr
, int arg
)
716 int execute
= 0, target
= U16(*ptr
);
717 unsigned long cjiffies
;
721 case ATOM_COND_ABOVE
:
722 execute
= ctx
->ctx
->cs_above
;
724 case ATOM_COND_ABOVEOREQUAL
:
725 execute
= ctx
->ctx
->cs_above
|| ctx
->ctx
->cs_equal
;
727 case ATOM_COND_ALWAYS
:
730 case ATOM_COND_BELOW
:
731 execute
= !(ctx
->ctx
->cs_above
|| ctx
->ctx
->cs_equal
);
733 case ATOM_COND_BELOWOREQUAL
:
734 execute
= !ctx
->ctx
->cs_above
;
736 case ATOM_COND_EQUAL
:
737 execute
= ctx
->ctx
->cs_equal
;
739 case ATOM_COND_NOTEQUAL
:
740 execute
= !ctx
->ctx
->cs_equal
;
743 if (arg
!= ATOM_COND_ALWAYS
)
744 SDEBUG(" taken: %s\n", execute
? "yes" : "no");
745 SDEBUG(" target: 0x%04X\n", target
);
747 if (ctx
->last_jump
== (ctx
->start
+ target
)) {
749 if (time_after(cjiffies
, ctx
->last_jump_jiffies
)) {
750 cjiffies
-= ctx
->last_jump_jiffies
;
751 if ((jiffies_to_msecs(cjiffies
) > 5000)) {
752 DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n");
756 /* jiffies wrap around we will just wait a little longer */
757 ctx
->last_jump_jiffies
= jiffies
;
760 ctx
->last_jump
= ctx
->start
+ target
;
761 ctx
->last_jump_jiffies
= jiffies
;
763 *ptr
= ctx
->start
+ target
;
767 static void atom_op_mask(atom_exec_context
*ctx
, int *ptr
, int arg
)
769 uint8_t attr
= U8((*ptr
)++);
770 uint32_t dst
, mask
, src
, saved
;
773 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 1);
774 mask
= atom_get_src_direct(ctx
, ((attr
>> 3) & 7), ptr
);
775 SDEBUG(" mask: 0x%08x", mask
);
777 src
= atom_get_src(ctx
, attr
, ptr
);
781 atom_put_dst(ctx
, arg
, attr
, &dptr
, dst
, saved
);
784 static void atom_op_move(atom_exec_context
*ctx
, int *ptr
, int arg
)
786 uint8_t attr
= U8((*ptr
)++);
789 if (((attr
>> 3) & 7) != ATOM_SRC_DWORD
)
790 atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 0);
792 atom_skip_dst(ctx
, arg
, attr
, ptr
);
796 src
= atom_get_src(ctx
, attr
, ptr
);
798 atom_put_dst(ctx
, arg
, attr
, &dptr
, src
, saved
);
801 static void atom_op_mul(atom_exec_context
*ctx
, int *ptr
, int arg
)
803 uint8_t attr
= U8((*ptr
)++);
806 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, NULL
, 1);
808 src
= atom_get_src(ctx
, attr
, ptr
);
809 ctx
->ctx
->divmul
[0] = dst
* src
;
812 static void atom_op_mul32(atom_exec_context
*ctx
, int *ptr
, int arg
)
815 uint8_t attr
= U8((*ptr
)++);
818 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, NULL
, 1);
820 src
= atom_get_src(ctx
, attr
, ptr
);
821 val64
= (uint64_t)dst
* (uint64_t)src
;
822 ctx
->ctx
->divmul
[0] = lower_32_bits(val64
);
823 ctx
->ctx
->divmul
[1] = upper_32_bits(val64
);
826 static void atom_op_nop(atom_exec_context
*ctx
, int *ptr
, int arg
)
831 static void atom_op_or(atom_exec_context
*ctx
, int *ptr
, int arg
)
833 uint8_t attr
= U8((*ptr
)++);
834 uint32_t dst
, src
, saved
;
837 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 1);
839 src
= atom_get_src(ctx
, attr
, ptr
);
842 atom_put_dst(ctx
, arg
, attr
, &dptr
, dst
, saved
);
845 static void atom_op_postcard(atom_exec_context
*ctx
, int *ptr
, int arg
)
847 uint8_t val
= U8((*ptr
)++);
848 SDEBUG("POST card output: 0x%02X\n", val
);
851 static void atom_op_repeat(atom_exec_context
*ctx
, int *ptr
, int arg
)
853 printk(KERN_INFO
"unimplemented!\n");
856 static void atom_op_restorereg(atom_exec_context
*ctx
, int *ptr
, int arg
)
858 printk(KERN_INFO
"unimplemented!\n");
861 static void atom_op_savereg(atom_exec_context
*ctx
, int *ptr
, int arg
)
863 printk(KERN_INFO
"unimplemented!\n");
866 static void atom_op_setdatablock(atom_exec_context
*ctx
, int *ptr
, int arg
)
870 SDEBUG(" block: %d\n", idx
);
872 ctx
->ctx
->data_block
= 0;
874 ctx
->ctx
->data_block
= ctx
->start
;
876 ctx
->ctx
->data_block
= U16(ctx
->ctx
->data_table
+ 4 + 2 * idx
);
877 SDEBUG(" base: 0x%04X\n", ctx
->ctx
->data_block
);
880 static void atom_op_setfbbase(atom_exec_context
*ctx
, int *ptr
, int arg
)
882 uint8_t attr
= U8((*ptr
)++);
883 SDEBUG(" fb_base: ");
884 ctx
->ctx
->fb_base
= atom_get_src(ctx
, attr
, ptr
);
887 static void atom_op_setport(atom_exec_context
*ctx
, int *ptr
, int arg
)
893 if (port
< ATOM_IO_NAMES_CNT
)
894 SDEBUG(" port: %d (%s)\n", port
, atom_io_names
[port
]);
896 SDEBUG(" port: %d\n", port
);
898 ctx
->ctx
->io_mode
= ATOM_IO_MM
;
900 ctx
->ctx
->io_mode
= ATOM_IO_IIO
| port
;
904 ctx
->ctx
->io_mode
= ATOM_IO_PCI
;
907 case ATOM_PORT_SYSIO
:
908 ctx
->ctx
->io_mode
= ATOM_IO_SYSIO
;
914 static void atom_op_setregblock(atom_exec_context
*ctx
, int *ptr
, int arg
)
916 ctx
->ctx
->reg_block
= U16(*ptr
);
918 SDEBUG(" base: 0x%04X\n", ctx
->ctx
->reg_block
);
921 static void atom_op_shift_left(atom_exec_context
*ctx
, int *ptr
, int arg
)
923 uint8_t attr
= U8((*ptr
)++), shift
;
927 attr
|= atom_def_dst
[attr
>> 3] << 6;
929 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 1);
930 shift
= atom_get_src_direct(ctx
, ATOM_SRC_BYTE0
, ptr
);
931 SDEBUG(" shift: %d\n", shift
);
934 atom_put_dst(ctx
, arg
, attr
, &dptr
, dst
, saved
);
937 static void atom_op_shift_right(atom_exec_context
*ctx
, int *ptr
, int arg
)
939 uint8_t attr
= U8((*ptr
)++), shift
;
943 attr
|= atom_def_dst
[attr
>> 3] << 6;
945 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 1);
946 shift
= atom_get_src_direct(ctx
, ATOM_SRC_BYTE0
, ptr
);
947 SDEBUG(" shift: %d\n", shift
);
950 atom_put_dst(ctx
, arg
, attr
, &dptr
, dst
, saved
);
953 static void atom_op_shl(atom_exec_context
*ctx
, int *ptr
, int arg
)
955 uint8_t attr
= U8((*ptr
)++), shift
;
958 uint32_t dst_align
= atom_dst_to_src
[(attr
>> 3) & 7][(attr
>> 6) & 3];
960 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 1);
961 /* op needs to full dst value */
963 shift
= atom_get_src(ctx
, attr
, ptr
);
964 SDEBUG(" shift: %d\n", shift
);
966 dst
&= atom_arg_mask
[dst_align
];
967 dst
>>= atom_arg_shift
[dst_align
];
969 atom_put_dst(ctx
, arg
, attr
, &dptr
, dst
, saved
);
972 static void atom_op_shr(atom_exec_context
*ctx
, int *ptr
, int arg
)
974 uint8_t attr
= U8((*ptr
)++), shift
;
977 uint32_t dst_align
= atom_dst_to_src
[(attr
>> 3) & 7][(attr
>> 6) & 3];
979 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 1);
980 /* op needs to full dst value */
982 shift
= atom_get_src(ctx
, attr
, ptr
);
983 SDEBUG(" shift: %d\n", shift
);
985 dst
&= atom_arg_mask
[dst_align
];
986 dst
>>= atom_arg_shift
[dst_align
];
988 atom_put_dst(ctx
, arg
, attr
, &dptr
, dst
, saved
);
991 static void atom_op_sub(atom_exec_context
*ctx
, int *ptr
, int arg
)
993 uint8_t attr
= U8((*ptr
)++);
994 uint32_t dst
, src
, saved
;
997 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 1);
999 src
= atom_get_src(ctx
, attr
, ptr
);
1002 atom_put_dst(ctx
, arg
, attr
, &dptr
, dst
, saved
);
1005 static void atom_op_switch(atom_exec_context
*ctx
, int *ptr
, int arg
)
1007 uint8_t attr
= U8((*ptr
)++);
1008 uint32_t src
, val
, target
;
1009 SDEBUG(" switch: ");
1010 src
= atom_get_src(ctx
, attr
, ptr
);
1011 while (U16(*ptr
) != ATOM_CASE_END
)
1012 if (U8(*ptr
) == ATOM_CASE_MAGIC
) {
1016 atom_get_src(ctx
, (attr
& 0x38) | ATOM_ARG_IMM
,
1020 SDEBUG(" target: %04X\n", target
);
1021 *ptr
= ctx
->start
+ target
;
1026 printk(KERN_INFO
"Bad case.\n");
1032 static void atom_op_test(atom_exec_context
*ctx
, int *ptr
, int arg
)
1034 uint8_t attr
= U8((*ptr
)++);
1037 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, NULL
, 1);
1039 src
= atom_get_src(ctx
, attr
, ptr
);
1040 ctx
->ctx
->cs_equal
= ((dst
& src
) == 0);
1041 SDEBUG(" result: %s\n", ctx
->ctx
->cs_equal
? "EQ" : "NE");
1044 static void atom_op_xor(atom_exec_context
*ctx
, int *ptr
, int arg
)
1046 uint8_t attr
= U8((*ptr
)++);
1047 uint32_t dst
, src
, saved
;
1050 dst
= atom_get_dst(ctx
, arg
, attr
, ptr
, &saved
, 1);
1052 src
= atom_get_src(ctx
, attr
, ptr
);
1055 atom_put_dst(ctx
, arg
, attr
, &dptr
, dst
, saved
);
1058 static void atom_op_debug(atom_exec_context
*ctx
, int *ptr
, int arg
)
1060 uint8_t val
= U8((*ptr
)++);
1061 SDEBUG("DEBUG output: 0x%02X\n", val
);
1064 static void atom_op_processds(atom_exec_context
*ctx
, int *ptr
, int arg
)
1066 uint16_t val
= U16(*ptr
);
1068 SDEBUG("PROCESSDS output: 0x%02X\n", val
);
1072 void (*func
) (atom_exec_context
*, int *, int);
1074 } opcode_table
[ATOM_OP_CNT
] = {
1077 atom_op_move
, ATOM_ARG_REG
}, {
1078 atom_op_move
, ATOM_ARG_PS
}, {
1079 atom_op_move
, ATOM_ARG_WS
}, {
1080 atom_op_move
, ATOM_ARG_FB
}, {
1081 atom_op_move
, ATOM_ARG_PLL
}, {
1082 atom_op_move
, ATOM_ARG_MC
}, {
1083 atom_op_and
, ATOM_ARG_REG
}, {
1084 atom_op_and
, ATOM_ARG_PS
}, {
1085 atom_op_and
, ATOM_ARG_WS
}, {
1086 atom_op_and
, ATOM_ARG_FB
}, {
1087 atom_op_and
, ATOM_ARG_PLL
}, {
1088 atom_op_and
, ATOM_ARG_MC
}, {
1089 atom_op_or
, ATOM_ARG_REG
}, {
1090 atom_op_or
, ATOM_ARG_PS
}, {
1091 atom_op_or
, ATOM_ARG_WS
}, {
1092 atom_op_or
, ATOM_ARG_FB
}, {
1093 atom_op_or
, ATOM_ARG_PLL
}, {
1094 atom_op_or
, ATOM_ARG_MC
}, {
1095 atom_op_shift_left
, ATOM_ARG_REG
}, {
1096 atom_op_shift_left
, ATOM_ARG_PS
}, {
1097 atom_op_shift_left
, ATOM_ARG_WS
}, {
1098 atom_op_shift_left
, ATOM_ARG_FB
}, {
1099 atom_op_shift_left
, ATOM_ARG_PLL
}, {
1100 atom_op_shift_left
, ATOM_ARG_MC
}, {
1101 atom_op_shift_right
, ATOM_ARG_REG
}, {
1102 atom_op_shift_right
, ATOM_ARG_PS
}, {
1103 atom_op_shift_right
, ATOM_ARG_WS
}, {
1104 atom_op_shift_right
, ATOM_ARG_FB
}, {
1105 atom_op_shift_right
, ATOM_ARG_PLL
}, {
1106 atom_op_shift_right
, ATOM_ARG_MC
}, {
1107 atom_op_mul
, ATOM_ARG_REG
}, {
1108 atom_op_mul
, ATOM_ARG_PS
}, {
1109 atom_op_mul
, ATOM_ARG_WS
}, {
1110 atom_op_mul
, ATOM_ARG_FB
}, {
1111 atom_op_mul
, ATOM_ARG_PLL
}, {
1112 atom_op_mul
, ATOM_ARG_MC
}, {
1113 atom_op_div
, ATOM_ARG_REG
}, {
1114 atom_op_div
, ATOM_ARG_PS
}, {
1115 atom_op_div
, ATOM_ARG_WS
}, {
1116 atom_op_div
, ATOM_ARG_FB
}, {
1117 atom_op_div
, ATOM_ARG_PLL
}, {
1118 atom_op_div
, ATOM_ARG_MC
}, {
1119 atom_op_add
, ATOM_ARG_REG
}, {
1120 atom_op_add
, ATOM_ARG_PS
}, {
1121 atom_op_add
, ATOM_ARG_WS
}, {
1122 atom_op_add
, ATOM_ARG_FB
}, {
1123 atom_op_add
, ATOM_ARG_PLL
}, {
1124 atom_op_add
, ATOM_ARG_MC
}, {
1125 atom_op_sub
, ATOM_ARG_REG
}, {
1126 atom_op_sub
, ATOM_ARG_PS
}, {
1127 atom_op_sub
, ATOM_ARG_WS
}, {
1128 atom_op_sub
, ATOM_ARG_FB
}, {
1129 atom_op_sub
, ATOM_ARG_PLL
}, {
1130 atom_op_sub
, ATOM_ARG_MC
}, {
1131 atom_op_setport
, ATOM_PORT_ATI
}, {
1132 atom_op_setport
, ATOM_PORT_PCI
}, {
1133 atom_op_setport
, ATOM_PORT_SYSIO
}, {
1134 atom_op_setregblock
, 0}, {
1135 atom_op_setfbbase
, 0}, {
1136 atom_op_compare
, ATOM_ARG_REG
}, {
1137 atom_op_compare
, ATOM_ARG_PS
}, {
1138 atom_op_compare
, ATOM_ARG_WS
}, {
1139 atom_op_compare
, ATOM_ARG_FB
}, {
1140 atom_op_compare
, ATOM_ARG_PLL
}, {
1141 atom_op_compare
, ATOM_ARG_MC
}, {
1142 atom_op_switch
, 0}, {
1143 atom_op_jump
, ATOM_COND_ALWAYS
}, {
1144 atom_op_jump
, ATOM_COND_EQUAL
}, {
1145 atom_op_jump
, ATOM_COND_BELOW
}, {
1146 atom_op_jump
, ATOM_COND_ABOVE
}, {
1147 atom_op_jump
, ATOM_COND_BELOWOREQUAL
}, {
1148 atom_op_jump
, ATOM_COND_ABOVEOREQUAL
}, {
1149 atom_op_jump
, ATOM_COND_NOTEQUAL
}, {
1150 atom_op_test
, ATOM_ARG_REG
}, {
1151 atom_op_test
, ATOM_ARG_PS
}, {
1152 atom_op_test
, ATOM_ARG_WS
}, {
1153 atom_op_test
, ATOM_ARG_FB
}, {
1154 atom_op_test
, ATOM_ARG_PLL
}, {
1155 atom_op_test
, ATOM_ARG_MC
}, {
1156 atom_op_delay
, ATOM_UNIT_MILLISEC
}, {
1157 atom_op_delay
, ATOM_UNIT_MICROSEC
}, {
1158 atom_op_calltable
, 0}, {
1159 atom_op_repeat
, 0}, {
1160 atom_op_clear
, ATOM_ARG_REG
}, {
1161 atom_op_clear
, ATOM_ARG_PS
}, {
1162 atom_op_clear
, ATOM_ARG_WS
}, {
1163 atom_op_clear
, ATOM_ARG_FB
}, {
1164 atom_op_clear
, ATOM_ARG_PLL
}, {
1165 atom_op_clear
, ATOM_ARG_MC
}, {
1168 atom_op_mask
, ATOM_ARG_REG
}, {
1169 atom_op_mask
, ATOM_ARG_PS
}, {
1170 atom_op_mask
, ATOM_ARG_WS
}, {
1171 atom_op_mask
, ATOM_ARG_FB
}, {
1172 atom_op_mask
, ATOM_ARG_PLL
}, {
1173 atom_op_mask
, ATOM_ARG_MC
}, {
1174 atom_op_postcard
, 0}, {
1176 atom_op_savereg
, 0}, {
1177 atom_op_restorereg
, 0}, {
1178 atom_op_setdatablock
, 0}, {
1179 atom_op_xor
, ATOM_ARG_REG
}, {
1180 atom_op_xor
, ATOM_ARG_PS
}, {
1181 atom_op_xor
, ATOM_ARG_WS
}, {
1182 atom_op_xor
, ATOM_ARG_FB
}, {
1183 atom_op_xor
, ATOM_ARG_PLL
}, {
1184 atom_op_xor
, ATOM_ARG_MC
}, {
1185 atom_op_shl
, ATOM_ARG_REG
}, {
1186 atom_op_shl
, ATOM_ARG_PS
}, {
1187 atom_op_shl
, ATOM_ARG_WS
}, {
1188 atom_op_shl
, ATOM_ARG_FB
}, {
1189 atom_op_shl
, ATOM_ARG_PLL
}, {
1190 atom_op_shl
, ATOM_ARG_MC
}, {
1191 atom_op_shr
, ATOM_ARG_REG
}, {
1192 atom_op_shr
, ATOM_ARG_PS
}, {
1193 atom_op_shr
, ATOM_ARG_WS
}, {
1194 atom_op_shr
, ATOM_ARG_FB
}, {
1195 atom_op_shr
, ATOM_ARG_PLL
}, {
1196 atom_op_shr
, ATOM_ARG_MC
}, {
1197 atom_op_debug
, 0}, {
1198 atom_op_processds
, 0}, {
1199 atom_op_mul32
, ATOM_ARG_PS
}, {
1200 atom_op_mul32
, ATOM_ARG_WS
}, {
1201 atom_op_div32
, ATOM_ARG_PS
}, {
1202 atom_op_div32
, ATOM_ARG_WS
},
1205 static int amdgpu_atom_execute_table_locked(struct atom_context
*ctx
, int index
, uint32_t * params
)
1207 int base
= CU16(ctx
->cmd_table
+ 4 + 2 * index
);
1208 int len
, ws
, ps
, ptr
;
1210 atom_exec_context ectx
;
1216 len
= CU16(base
+ ATOM_CT_SIZE_PTR
);
1217 ws
= CU8(base
+ ATOM_CT_WS_PTR
);
1218 ps
= CU8(base
+ ATOM_CT_PS_PTR
) & ATOM_CT_PS_MASK
;
1219 ptr
= base
+ ATOM_CT_CODE_PTR
;
1221 SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base
, len
, ws
, ps
);
1224 ectx
.ps_shift
= ps
/ 4;
1230 ectx
.ws
= kzalloc(4 * ws
, GFP_KERNEL
);
1237 if (op
< ATOM_OP_NAMES_CNT
)
1238 SDEBUG("%s @ 0x%04X\n", atom_op_names
[op
], ptr
- 1);
1240 SDEBUG("[%d] @ 0x%04X\n", op
, ptr
- 1);
1242 DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n",
1243 base
, len
, ws
, ps
, ptr
- 1);
1248 if (op
< ATOM_OP_CNT
&& op
> 0)
1249 opcode_table
[op
].func(&ectx
, &ptr
,
1250 opcode_table
[op
].arg
);
1254 if (op
== ATOM_OP_EOT
)
1266 int amdgpu_atom_execute_table(struct atom_context
*ctx
, int index
, uint32_t * params
)
1270 mutex_lock(&ctx
->mutex
);
1271 /* reset data block */
1272 ctx
->data_block
= 0;
1273 /* reset reg block */
1275 /* reset fb window */
1278 ctx
->io_mode
= ATOM_IO_MM
;
1282 r
= amdgpu_atom_execute_table_locked(ctx
, index
, params
);
1283 mutex_unlock(&ctx
->mutex
);
1287 static int atom_iio_len
[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 };
1289 static void atom_index_iio(struct atom_context
*ctx
, int base
)
1291 ctx
->iio
= kzalloc(2 * 256, GFP_KERNEL
);
1294 while (CU8(base
) == ATOM_IIO_START
) {
1295 ctx
->iio
[CU8(base
+ 1)] = base
+ 2;
1297 while (CU8(base
) != ATOM_IIO_END
)
1298 base
+= atom_iio_len
[CU8(base
)];
1303 struct atom_context
*amdgpu_atom_parse(struct card_info
*card
, void *bios
)
1306 struct atom_context
*ctx
=
1307 kzalloc(sizeof(struct atom_context
), GFP_KERNEL
);
1318 if (CU16(0) != ATOM_BIOS_MAGIC
) {
1319 printk(KERN_INFO
"Invalid BIOS magic.\n");
1324 (CSTR(ATOM_ATI_MAGIC_PTR
), ATOM_ATI_MAGIC
,
1325 strlen(ATOM_ATI_MAGIC
))) {
1326 printk(KERN_INFO
"Invalid ATI magic.\n");
1331 base
= CU16(ATOM_ROM_TABLE_PTR
);
1333 (CSTR(base
+ ATOM_ROM_MAGIC_PTR
), ATOM_ROM_MAGIC
,
1334 strlen(ATOM_ROM_MAGIC
))) {
1335 printk(KERN_INFO
"Invalid ATOM magic.\n");
1340 ctx
->cmd_table
= CU16(base
+ ATOM_ROM_CMD_PTR
);
1341 ctx
->data_table
= CU16(base
+ ATOM_ROM_DATA_PTR
);
1342 atom_index_iio(ctx
, CU16(ctx
->data_table
+ ATOM_DATA_IIO_PTR
) + 4);
1344 amdgpu_atom_destroy(ctx
);
1348 str
= CSTR(CU16(base
+ ATOM_ROM_MSG_PTR
));
1349 while (*str
&& ((*str
== '\n') || (*str
== '\r')))
1351 /* name string isn't always 0 terminated */
1352 for (i
= 0; i
< 511; i
++) {
1354 if (name
[i
] < '.' || name
[i
] > 'z') {
1359 printk(KERN_INFO
"ATOM BIOS: %s\n", name
);
1364 int amdgpu_atom_asic_init(struct atom_context
*ctx
)
1366 int hwi
= CU16(ctx
->data_table
+ ATOM_DATA_FWI_PTR
);
1372 ps
[0] = cpu_to_le32(CU32(hwi
+ ATOM_FWI_DEFSCLK_PTR
));
1373 ps
[1] = cpu_to_le32(CU32(hwi
+ ATOM_FWI_DEFMCLK_PTR
));
1374 if (!ps
[0] || !ps
[1])
1377 if (!CU16(ctx
->cmd_table
+ 4 + 2 * ATOM_CMD_INIT
))
1379 ret
= amdgpu_atom_execute_table(ctx
, ATOM_CMD_INIT
, ps
);
1388 void amdgpu_atom_destroy(struct atom_context
*ctx
)
1394 bool amdgpu_atom_parse_data_header(struct atom_context
*ctx
, int index
,
1395 uint16_t * size
, uint8_t * frev
, uint8_t * crev
,
1396 uint16_t * data_start
)
1398 int offset
= index
* 2 + 4;
1399 int idx
= CU16(ctx
->data_table
+ offset
);
1400 u16
*mdt
= (u16
*)(ctx
->bios
+ ctx
->data_table
+ 4);
1408 *frev
= CU8(idx
+ 2);
1410 *crev
= CU8(idx
+ 3);
1415 bool amdgpu_atom_parse_cmd_header(struct atom_context
*ctx
, int index
, uint8_t * frev
,
1418 int offset
= index
* 2 + 4;
1419 int idx
= CU16(ctx
->cmd_table
+ offset
);
1420 u16
*mct
= (u16
*)(ctx
->bios
+ ctx
->cmd_table
+ 4);
1426 *frev
= CU8(idx
+ 2);
1428 *crev
= CU8(idx
+ 3);
1432 int amdgpu_atom_allocate_fb_scratch(struct atom_context
*ctx
)
1434 int index
= GetIndexIntoMasterTable(DATA
, VRAM_UsageByFirmware
);
1435 uint16_t data_offset
;
1436 int usage_bytes
= 0;
1437 struct _ATOM_VRAM_USAGE_BY_FIRMWARE
*firmware_usage
;
1439 if (amdgpu_atom_parse_data_header(ctx
, index
, NULL
, NULL
, NULL
, &data_offset
)) {
1440 firmware_usage
= (struct _ATOM_VRAM_USAGE_BY_FIRMWARE
*)(ctx
->bios
+ data_offset
);
1442 DRM_DEBUG("atom firmware requested %08x %dkb\n",
1443 le32_to_cpu(firmware_usage
->asFirmwareVramReserveInfo
[0].ulStartAddrUsedByFirmware
),
1444 le16_to_cpu(firmware_usage
->asFirmwareVramReserveInfo
[0].usFirmwareUseInKb
));
1446 usage_bytes
= le16_to_cpu(firmware_usage
->asFirmwareVramReserveInfo
[0].usFirmwareUseInKb
) * 1024;
1448 ctx
->scratch_size_bytes
= 0;
1449 if (usage_bytes
== 0)
1450 usage_bytes
= 20 * 1024;
1451 /* allocate some scratch memory */
1452 ctx
->scratch
= kzalloc(usage_bytes
, GFP_KERNEL
);
1455 ctx
->scratch_size_bytes
= usage_bytes
;