drm/amdgpu: add SMU 7.0.1 register headers
[deliverable/linux.git] / drivers / gpu / drm / amd / include / asic_reg / smu / smu_7_0_1_d.h
1 /*
2 * SMU_7_0_1 Register documentation
3 *
4 * Copyright (C) 2014 Advanced Micro Devices, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
20 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #ifndef SMU_7_0_1_D_H
25 #define SMU_7_0_1_D_H
26
27 #define mmGCK_SMC_IND_INDEX 0x80
28 #define mmGCK0_GCK_SMC_IND_INDEX 0x80
29 #define mmGCK1_GCK_SMC_IND_INDEX 0x82
30 #define mmGCK2_GCK_SMC_IND_INDEX 0x84
31 #define mmGCK3_GCK_SMC_IND_INDEX 0x86
32 #define mmGCK_SMC_IND_DATA 0x81
33 #define mmGCK0_GCK_SMC_IND_DATA 0x81
34 #define mmGCK1_GCK_SMC_IND_DATA 0x83
35 #define mmGCK2_GCK_SMC_IND_DATA 0x85
36 #define mmGCK3_GCK_SMC_IND_DATA 0x87
37 #define ixCG_DCLK_CNTL 0xc050009c
38 #define ixCG_DCLK_STATUS 0xc05000a0
39 #define ixCG_VCLK_CNTL 0xc05000a4
40 #define ixCG_VCLK_STATUS 0xc05000a8
41 #define ixCG_ECLK_CNTL 0xc05000ac
42 #define ixCG_ECLK_STATUS 0xc05000b0
43 #define ixCG_ACLK_CNTL 0xc05000dc
44 #define ixGCK_DFS_BYPASS_CNTL 0xc0500118
45 #define ixCG_SPLL_FUNC_CNTL 0xc0500140
46 #define ixCG_SPLL_FUNC_CNTL_2 0xc0500144
47 #define ixCG_SPLL_FUNC_CNTL_3 0xc0500148
48 #define ixCG_SPLL_FUNC_CNTL_4 0xc050014c
49 #define ixCG_SPLL_FUNC_CNTL_5 0xc0500150
50 #define ixCG_SPLL_FUNC_CNTL_6 0xc0500154
51 #define ixCG_SPLL_FUNC_CNTL_7 0xc0500158
52 #define ixSPLL_CNTL_MODE 0xc0500160
53 #define ixCG_SPLL_SPREAD_SPECTRUM 0xc0500164
54 #define ixCG_SPLL_SPREAD_SPECTRUM_2 0xc0500168
55 #define ixMPLL_BYPASSCLK_SEL 0xc050019c
56 #define ixCG_CLKPIN_CNTL 0xc05001a0
57 #define ixCG_CLKPIN_CNTL_2 0xc05001a4
58 #define ixCG_CLKPIN_CNTL_DC 0xc0500204
59 #define ixTHM_CLK_CNTL 0xc05001a8
60 #define ixMISC_CLK_CTRL 0xc05001ac
61 #define ixGCK_PLL_TEST_CNTL 0xc05001c0
62 #define ixGCK_PLL_TEST_CNTL_2 0xc05001c4
63 #define ixGCK_ADFS_CLK_BYPASS_CNTL1 0xc05001c8
64 #define mmSMC_IND_INDEX 0x80
65 #define mmSMC0_SMC_IND_INDEX 0x80
66 #define mmSMC1_SMC_IND_INDEX 0x82
67 #define mmSMC2_SMC_IND_INDEX 0x84
68 #define mmSMC3_SMC_IND_INDEX 0x86
69 #define mmSMC_IND_DATA 0x81
70 #define mmSMC0_SMC_IND_DATA 0x81
71 #define mmSMC1_SMC_IND_DATA 0x83
72 #define mmSMC2_SMC_IND_DATA 0x85
73 #define mmSMC3_SMC_IND_DATA 0x87
74 #define mmSMC_IND_INDEX_0 0x80
75 #define mmSMC_IND_DATA_0 0x81
76 #define mmSMC_IND_INDEX_1 0x82
77 #define mmSMC_IND_DATA_1 0x83
78 #define mmSMC_IND_INDEX_2 0x84
79 #define mmSMC_IND_DATA_2 0x85
80 #define mmSMC_IND_INDEX_3 0x86
81 #define mmSMC_IND_DATA_3 0x87
82 #define mmSMC_IND_INDEX_4 0x88
83 #define mmSMC_IND_DATA_4 0x89
84 #define mmSMC_IND_INDEX_5 0x8a
85 #define mmSMC_IND_DATA_5 0x8b
86 #define mmSMC_IND_INDEX_6 0x8c
87 #define mmSMC_IND_DATA_6 0x8d
88 #define mmSMC_IND_INDEX_7 0x8e
89 #define mmSMC_IND_DATA_7 0x8f
90 #define mmSMC_IND_ACCESS_CNTL 0x90
91 #define mmSMC_MESSAGE_0 0x94
92 #define mmSMC_RESP_0 0x95
93 #define mmSMC_MESSAGE_1 0x96
94 #define mmSMC_RESP_1 0x97
95 #define mmSMC_MESSAGE_2 0x98
96 #define mmSMC_RESP_2 0x99
97 #define mmSMC_MESSAGE_3 0x9a
98 #define mmSMC_RESP_3 0x9b
99 #define mmSMC_MESSAGE_4 0x9c
100 #define mmSMC_RESP_4 0x9d
101 #define mmSMC_MESSAGE_5 0x9e
102 #define mmSMC_RESP_5 0x9f
103 #define mmSMC_MESSAGE_6 0xa0
104 #define mmSMC_RESP_6 0xa1
105 #define mmSMC_MESSAGE_7 0xa2
106 #define mmSMC_RESP_7 0xa3
107 #define mmSMC_MSG_ARG_0 0xa4
108 #define mmSMC_MSG_ARG_1 0xa5
109 #define mmSMC_MSG_ARG_2 0xa6
110 #define mmSMC_MSG_ARG_3 0xa7
111 #define mmSMC_MSG_ARG_4 0xa8
112 #define mmSMC_MSG_ARG_5 0xa9
113 #define mmSMC_MSG_ARG_6 0xaa
114 #define mmSMC_MSG_ARG_7 0xab
115 #define mmSMC_MESSAGE_8 0xb5
116 #define mmSMC_RESP_8 0xb6
117 #define mmSMC_MESSAGE_9 0xb7
118 #define mmSMC_RESP_9 0xb8
119 #define mmSMC_MESSAGE_10 0xb9
120 #define mmSMC_RESP_10 0xba
121 #define mmSMC_MESSAGE_11 0xbb
122 #define mmSMC_RESP_11 0xbc
123 #define mmSMC_MSG_ARG_8 0xbd
124 #define mmSMC_MSG_ARG_9 0xbe
125 #define mmSMC_MSG_ARG_10 0xbf
126 #define mmSMC_MSG_ARG_11 0x91
127 #define ixSMC_SYSCON_RESET_CNTL 0x80000000
128 #define ixSMC_SYSCON_CLOCK_CNTL_0 0x80000004
129 #define ixSMC_SYSCON_CLOCK_CNTL_1 0x80000008
130 #define ixSMC_SYSCON_CLOCK_CNTL_2 0x8000000c
131 #define ixSMC_SYSCON_MISC_CNTL 0x80000010
132 #define ixSMC_SYSCON_MSG_ARG_0 0x80000068
133 #define ixSMC_PC_C 0x80000370
134 #define ixSMC_SCRATCH9 0x80000424
135 #define mmGPIOPAD_SW_INT_STAT 0x180
136 #define mmGPIOPAD_STRENGTH 0x181
137 #define mmGPIOPAD_MASK 0x182
138 #define mmGPIOPAD_A 0x183
139 #define mmGPIOPAD_EN 0x184
140 #define mmGPIOPAD_Y 0x185
141 #define mmGPIOPAD_PINSTRAPS 0x186
142 #define mmGPIOPAD_INT_STAT_EN 0x187
143 #define mmGPIOPAD_INT_STAT 0x188
144 #define mmGPIOPAD_INT_STAT_AK 0x189
145 #define mmGPIOPAD_INT_EN 0x18a
146 #define mmGPIOPAD_INT_TYPE 0x18b
147 #define mmGPIOPAD_INT_POLARITY 0x18c
148 #define mmGPIOPAD_EXTERN_TRIG_CNTL 0x18d
149 #define mmGPIOPAD_RCVR_SEL 0x191
150 #define mmGPIOPAD_PU_EN 0x192
151 #define mmGPIOPAD_PD_EN 0x193
152 #define mmCG_FPS_CNT 0x1a4
153 #define mmSMU_SMC_IND_INDEX 0x80
154 #define mmSMU0_SMU_SMC_IND_INDEX 0x80
155 #define mmSMU1_SMU_SMC_IND_INDEX 0x82
156 #define mmSMU2_SMU_SMC_IND_INDEX 0x84
157 #define mmSMU3_SMU_SMC_IND_INDEX 0x86
158 #define mmSMU_SMC_IND_DATA 0x81
159 #define mmSMU0_SMU_SMC_IND_DATA 0x81
160 #define mmSMU1_SMU_SMC_IND_DATA 0x83
161 #define mmSMU2_SMU_SMC_IND_DATA 0x85
162 #define mmSMU3_SMU_SMC_IND_DATA 0x87
163 #define ixRCU_UC_EVENTS 0xc0000004
164 #define ixRCU_MISC_CTRL 0xc0000010
165 #define ixCC_RCU_FUSES 0xc00c0000
166 #define ixCC_SMU_MISC_FUSES 0xc00c0004
167 #define ixCC_SCLK_VID_FUSES 0xc00c0008
168 #define ixCC_GIO_IOCCFG_FUSES 0xc00c000c
169 #define ixCC_GIO_IOC_FUSES 0xc00c0010
170 #define ixCC_SMU_TST_EFUSE1_MISC 0xc00c001c
171 #define ixCC_TST_ID_STRAPS 0xc00c0020
172 #define ixCC_FCTRL_FUSES 0xc00c0024
173 #define ixSMU_MAIN_PLL_OP_FREQ 0xe0003020
174 #define ixSMU_STATUS 0xe0003088
175 #define ixSMU_FIRMWARE 0xe00030a4
176 #define ixSMU_INPUT_DATA 0xe00030b8
177 #define ixSMU_EFUSE_0 0xc0100000
178 #define ixDPM_TABLE_1 0x3f000
179 #define ixDPM_TABLE_2 0x3f004
180 #define ixDPM_TABLE_3 0x3f008
181 #define ixDPM_TABLE_4 0x3f00c
182 #define ixDPM_TABLE_5 0x3f010
183 #define ixDPM_TABLE_6 0x3f014
184 #define ixDPM_TABLE_7 0x3f018
185 #define ixDPM_TABLE_8 0x3f01c
186 #define ixDPM_TABLE_9 0x3f020
187 #define ixDPM_TABLE_10 0x3f024
188 #define ixDPM_TABLE_11 0x3f028
189 #define ixDPM_TABLE_12 0x3f02c
190 #define ixDPM_TABLE_13 0x3f030
191 #define ixDPM_TABLE_14 0x3f034
192 #define ixDPM_TABLE_15 0x3f038
193 #define ixDPM_TABLE_16 0x3f03c
194 #define ixDPM_TABLE_17 0x3f040
195 #define ixDPM_TABLE_18 0x3f044
196 #define ixDPM_TABLE_19 0x3f048
197 #define ixDPM_TABLE_20 0x3f04c
198 #define ixDPM_TABLE_21 0x3f050
199 #define ixDPM_TABLE_22 0x3f054
200 #define ixDPM_TABLE_23 0x3f058
201 #define ixDPM_TABLE_24 0x3f05c
202 #define ixDPM_TABLE_25 0x3f060
203 #define ixDPM_TABLE_26 0x3f064
204 #define ixDPM_TABLE_27 0x3f068
205 #define ixDPM_TABLE_28 0x3f06c
206 #define ixDPM_TABLE_29 0x3f070
207 #define ixDPM_TABLE_30 0x3f074
208 #define ixDPM_TABLE_31 0x3f078
209 #define ixDPM_TABLE_32 0x3f07c
210 #define ixDPM_TABLE_33 0x3f080
211 #define ixDPM_TABLE_34 0x3f084
212 #define ixDPM_TABLE_35 0x3f088
213 #define ixDPM_TABLE_36 0x3f08c
214 #define ixDPM_TABLE_37 0x3f090
215 #define ixDPM_TABLE_38 0x3f094
216 #define ixDPM_TABLE_39 0x3f098
217 #define ixDPM_TABLE_40 0x3f09c
218 #define ixDPM_TABLE_41 0x3f0a0
219 #define ixDPM_TABLE_42 0x3f0a4
220 #define ixDPM_TABLE_43 0x3f0a8
221 #define ixDPM_TABLE_44 0x3f0ac
222 #define ixDPM_TABLE_45 0x3f0b0
223 #define ixDPM_TABLE_46 0x3f0b4
224 #define ixDPM_TABLE_47 0x3f0b8
225 #define ixDPM_TABLE_48 0x3f0bc
226 #define ixDPM_TABLE_49 0x3f0c0
227 #define ixDPM_TABLE_50 0x3f0c4
228 #define ixDPM_TABLE_51 0x3f0c8
229 #define ixDPM_TABLE_52 0x3f0cc
230 #define ixDPM_TABLE_53 0x3f0d0
231 #define ixDPM_TABLE_54 0x3f0d4
232 #define ixDPM_TABLE_55 0x3f0d8
233 #define ixDPM_TABLE_56 0x3f0dc
234 #define ixDPM_TABLE_57 0x3f0e0
235 #define ixDPM_TABLE_58 0x3f0e4
236 #define ixDPM_TABLE_59 0x3f0e8
237 #define ixDPM_TABLE_60 0x3f0ec
238 #define ixDPM_TABLE_61 0x3f0f0
239 #define ixDPM_TABLE_62 0x3f0f4
240 #define ixDPM_TABLE_63 0x3f0f8
241 #define ixDPM_TABLE_64 0x3f0fc
242 #define ixDPM_TABLE_65 0x3f100
243 #define ixDPM_TABLE_66 0x3f104
244 #define ixDPM_TABLE_67 0x3f108
245 #define ixDPM_TABLE_68 0x3f10c
246 #define ixDPM_TABLE_69 0x3f110
247 #define ixDPM_TABLE_70 0x3f114
248 #define ixDPM_TABLE_71 0x3f118
249 #define ixDPM_TABLE_72 0x3f11c
250 #define ixDPM_TABLE_73 0x3f120
251 #define ixDPM_TABLE_74 0x3f124
252 #define ixDPM_TABLE_75 0x3f128
253 #define ixDPM_TABLE_76 0x3f12c
254 #define ixDPM_TABLE_77 0x3f130
255 #define ixDPM_TABLE_78 0x3f134
256 #define ixDPM_TABLE_79 0x3f138
257 #define ixDPM_TABLE_80 0x3f13c
258 #define ixDPM_TABLE_81 0x3f140
259 #define ixDPM_TABLE_82 0x3f144
260 #define ixDPM_TABLE_83 0x3f148
261 #define ixDPM_TABLE_84 0x3f14c
262 #define ixDPM_TABLE_85 0x3f150
263 #define ixDPM_TABLE_86 0x3f154
264 #define ixDPM_TABLE_87 0x3f158
265 #define ixDPM_TABLE_88 0x3f15c
266 #define ixDPM_TABLE_89 0x3f160
267 #define ixDPM_TABLE_90 0x3f164
268 #define ixDPM_TABLE_91 0x3f168
269 #define ixDPM_TABLE_92 0x3f16c
270 #define ixDPM_TABLE_93 0x3f170
271 #define ixDPM_TABLE_94 0x3f174
272 #define ixDPM_TABLE_95 0x3f178
273 #define ixDPM_TABLE_96 0x3f17c
274 #define ixDPM_TABLE_97 0x3f180
275 #define ixDPM_TABLE_98 0x3f184
276 #define ixDPM_TABLE_99 0x3f188
277 #define ixDPM_TABLE_100 0x3f18c
278 #define ixDPM_TABLE_101 0x3f190
279 #define ixDPM_TABLE_102 0x3f194
280 #define ixDPM_TABLE_103 0x3f198
281 #define ixDPM_TABLE_104 0x3f19c
282 #define ixDPM_TABLE_105 0x3f1a0
283 #define ixDPM_TABLE_106 0x3f1a4
284 #define ixDPM_TABLE_107 0x3f1a8
285 #define ixDPM_TABLE_108 0x3f1ac
286 #define ixDPM_TABLE_109 0x3f1b0
287 #define ixDPM_TABLE_110 0x3f1b4
288 #define ixDPM_TABLE_111 0x3f1b8
289 #define ixDPM_TABLE_112 0x3f1bc
290 #define ixDPM_TABLE_113 0x3f1c0
291 #define ixDPM_TABLE_114 0x3f1c4
292 #define ixDPM_TABLE_115 0x3f1c8
293 #define ixDPM_TABLE_116 0x3f1cc
294 #define ixDPM_TABLE_117 0x3f1d0
295 #define ixDPM_TABLE_118 0x3f1d4
296 #define ixDPM_TABLE_119 0x3f1d8
297 #define ixDPM_TABLE_120 0x3f1dc
298 #define ixDPM_TABLE_121 0x3f1e0
299 #define ixDPM_TABLE_122 0x3f1e4
300 #define ixDPM_TABLE_123 0x3f1e8
301 #define ixDPM_TABLE_124 0x3f1ec
302 #define ixDPM_TABLE_125 0x3f1f0
303 #define ixDPM_TABLE_126 0x3f1f4
304 #define ixDPM_TABLE_127 0x3f1f8
305 #define ixDPM_TABLE_128 0x3f1fc
306 #define ixDPM_TABLE_129 0x3f200
307 #define ixDPM_TABLE_130 0x3f204
308 #define ixDPM_TABLE_131 0x3f208
309 #define ixDPM_TABLE_132 0x3f20c
310 #define ixDPM_TABLE_133 0x3f210
311 #define ixDPM_TABLE_134 0x3f214
312 #define ixDPM_TABLE_135 0x3f218
313 #define ixDPM_TABLE_136 0x3f21c
314 #define ixDPM_TABLE_137 0x3f220
315 #define ixDPM_TABLE_138 0x3f224
316 #define ixDPM_TABLE_139 0x3f228
317 #define ixDPM_TABLE_140 0x3f22c
318 #define ixDPM_TABLE_141 0x3f230
319 #define ixDPM_TABLE_142 0x3f234
320 #define ixDPM_TABLE_143 0x3f238
321 #define ixDPM_TABLE_144 0x3f23c
322 #define ixDPM_TABLE_145 0x3f240
323 #define ixDPM_TABLE_146 0x3f244
324 #define ixDPM_TABLE_147 0x3f248
325 #define ixDPM_TABLE_148 0x3f24c
326 #define ixDPM_TABLE_149 0x3f250
327 #define ixDPM_TABLE_150 0x3f254
328 #define ixDPM_TABLE_151 0x3f258
329 #define ixDPM_TABLE_152 0x3f25c
330 #define ixDPM_TABLE_153 0x3f260
331 #define ixDPM_TABLE_154 0x3f264
332 #define ixDPM_TABLE_155 0x3f268
333 #define ixDPM_TABLE_156 0x3f26c
334 #define ixDPM_TABLE_157 0x3f270
335 #define ixDPM_TABLE_158 0x3f274
336 #define ixDPM_TABLE_159 0x3f278
337 #define ixDPM_TABLE_160 0x3f27c
338 #define ixDPM_TABLE_161 0x3f280
339 #define ixDPM_TABLE_162 0x3f284
340 #define ixDPM_TABLE_163 0x3f288
341 #define ixDPM_TABLE_164 0x3f28c
342 #define ixDPM_TABLE_165 0x3f290
343 #define ixDPM_TABLE_166 0x3f294
344 #define ixDPM_TABLE_167 0x3f298
345 #define ixDPM_TABLE_168 0x3f29c
346 #define ixDPM_TABLE_169 0x3f2a0
347 #define ixDPM_TABLE_170 0x3f2a4
348 #define ixDPM_TABLE_171 0x3f2a8
349 #define ixDPM_TABLE_172 0x3f2ac
350 #define ixDPM_TABLE_173 0x3f2b0
351 #define ixDPM_TABLE_174 0x3f2b4
352 #define ixDPM_TABLE_175 0x3f2b8
353 #define ixDPM_TABLE_176 0x3f2bc
354 #define ixDPM_TABLE_177 0x3f2c0
355 #define ixDPM_TABLE_178 0x3f2c4
356 #define ixDPM_TABLE_179 0x3f2c8
357 #define ixDPM_TABLE_180 0x3f2cc
358 #define ixDPM_TABLE_181 0x3f2d0
359 #define ixDPM_TABLE_182 0x3f2d4
360 #define ixDPM_TABLE_183 0x3f2d8
361 #define ixDPM_TABLE_184 0x3f2dc
362 #define ixDPM_TABLE_185 0x3f2e0
363 #define ixDPM_TABLE_186 0x3f2e4
364 #define ixDPM_TABLE_187 0x3f2e8
365 #define ixDPM_TABLE_188 0x3f2ec
366 #define ixDPM_TABLE_189 0x3f2f0
367 #define ixDPM_TABLE_190 0x3f2f4
368 #define ixDPM_TABLE_191 0x3f2f8
369 #define ixDPM_TABLE_192 0x3f2fc
370 #define ixDPM_TABLE_193 0x3f300
371 #define ixDPM_TABLE_194 0x3f304
372 #define ixDPM_TABLE_195 0x3f308
373 #define ixDPM_TABLE_196 0x3f30c
374 #define ixDPM_TABLE_197 0x3f310
375 #define ixDPM_TABLE_198 0x3f314
376 #define ixDPM_TABLE_199 0x3f318
377 #define ixDPM_TABLE_200 0x3f31c
378 #define ixDPM_TABLE_201 0x3f320
379 #define ixDPM_TABLE_202 0x3f324
380 #define ixDPM_TABLE_203 0x3f328
381 #define ixDPM_TABLE_204 0x3f32c
382 #define ixDPM_TABLE_205 0x3f330
383 #define ixDPM_TABLE_206 0x3f334
384 #define ixDPM_TABLE_207 0x3f338
385 #define ixDPM_TABLE_208 0x3f33c
386 #define ixDPM_TABLE_209 0x3f340
387 #define ixDPM_TABLE_210 0x3f344
388 #define ixDPM_TABLE_211 0x3f348
389 #define ixDPM_TABLE_212 0x3f34c
390 #define ixDPM_TABLE_213 0x3f350
391 #define ixDPM_TABLE_214 0x3f354
392 #define ixDPM_TABLE_215 0x3f358
393 #define ixDPM_TABLE_216 0x3f35c
394 #define ixDPM_TABLE_217 0x3f360
395 #define ixDPM_TABLE_218 0x3f364
396 #define ixDPM_TABLE_219 0x3f368
397 #define ixDPM_TABLE_220 0x3f36c
398 #define ixDPM_TABLE_221 0x3f370
399 #define ixDPM_TABLE_222 0x3f374
400 #define ixDPM_TABLE_223 0x3f378
401 #define ixDPM_TABLE_224 0x3f37c
402 #define ixDPM_TABLE_225 0x3f380
403 #define ixDPM_TABLE_226 0x3f384
404 #define ixDPM_TABLE_227 0x3f388
405 #define ixDPM_TABLE_228 0x3f38c
406 #define ixDPM_TABLE_229 0x3f390
407 #define ixDPM_TABLE_230 0x3f394
408 #define ixDPM_TABLE_231 0x3f398
409 #define ixDPM_TABLE_232 0x3f39c
410 #define ixDPM_TABLE_233 0x3f3a0
411 #define ixDPM_TABLE_234 0x3f3a4
412 #define ixDPM_TABLE_235 0x3f3a8
413 #define ixDPM_TABLE_236 0x3f3ac
414 #define ixDPM_TABLE_237 0x3f3b0
415 #define ixDPM_TABLE_238 0x3f3b4
416 #define ixDPM_TABLE_239 0x3f3b8
417 #define ixDPM_TABLE_240 0x3f3bc
418 #define ixDPM_TABLE_241 0x3f3c0
419 #define ixDPM_TABLE_242 0x3f3c4
420 #define ixDPM_TABLE_243 0x3f3c8
421 #define ixDPM_TABLE_244 0x3f3cc
422 #define ixDPM_TABLE_245 0x3f3d0
423 #define ixDPM_TABLE_246 0x3f3d4
424 #define ixDPM_TABLE_247 0x3f3d8
425 #define ixDPM_TABLE_248 0x3f3dc
426 #define ixDPM_TABLE_249 0x3f3e0
427 #define ixDPM_TABLE_250 0x3f3e4
428 #define ixDPM_TABLE_251 0x3f3e8
429 #define ixDPM_TABLE_252 0x3f3ec
430 #define ixDPM_TABLE_253 0x3f3f0
431 #define ixDPM_TABLE_254 0x3f3f4
432 #define ixDPM_TABLE_255 0x3f3f8
433 #define ixDPM_TABLE_256 0x3f3fc
434 #define ixDPM_TABLE_257 0x3f400
435 #define ixDPM_TABLE_258 0x3f404
436 #define ixDPM_TABLE_259 0x3f408
437 #define ixDPM_TABLE_260 0x3f40c
438 #define ixDPM_TABLE_261 0x3f410
439 #define ixDPM_TABLE_262 0x3f414
440 #define ixDPM_TABLE_263 0x3f418
441 #define ixDPM_TABLE_264 0x3f41c
442 #define ixDPM_TABLE_265 0x3f420
443 #define ixDPM_TABLE_266 0x3f424
444 #define ixDPM_TABLE_267 0x3f428
445 #define ixDPM_TABLE_268 0x3f42c
446 #define ixDPM_TABLE_269 0x3f430
447 #define ixDPM_TABLE_270 0x3f434
448 #define ixDPM_TABLE_271 0x3f438
449 #define ixDPM_TABLE_272 0x3f43c
450 #define ixDPM_TABLE_273 0x3f440
451 #define ixDPM_TABLE_274 0x3f444
452 #define ixDPM_TABLE_275 0x3f448
453 #define ixDPM_TABLE_276 0x3f44c
454 #define ixDPM_TABLE_277 0x3f450
455 #define ixDPM_TABLE_278 0x3f454
456 #define ixDPM_TABLE_279 0x3f458
457 #define ixDPM_TABLE_280 0x3f45c
458 #define ixDPM_TABLE_281 0x3f460
459 #define ixDPM_TABLE_282 0x3f464
460 #define ixDPM_TABLE_283 0x3f468
461 #define ixDPM_TABLE_284 0x3f46c
462 #define ixDPM_TABLE_285 0x3f470
463 #define ixDPM_TABLE_286 0x3f474
464 #define ixDPM_TABLE_287 0x3f478
465 #define ixDPM_TABLE_288 0x3f47c
466 #define ixDPM_TABLE_289 0x3f480
467 #define ixDPM_TABLE_290 0x3f484
468 #define ixDPM_TABLE_291 0x3f488
469 #define ixDPM_TABLE_292 0x3f48c
470 #define ixDPM_TABLE_293 0x3f490
471 #define ixDPM_TABLE_294 0x3f494
472 #define ixDPM_TABLE_295 0x3f498
473 #define ixDPM_TABLE_296 0x3f49c
474 #define ixDPM_TABLE_297 0x3f4a0
475 #define ixDPM_TABLE_298 0x3f4a4
476 #define ixDPM_TABLE_299 0x3f4a8
477 #define ixDPM_TABLE_300 0x3f4ac
478 #define ixDPM_TABLE_301 0x3f4b0
479 #define ixDPM_TABLE_302 0x3f4b4
480 #define ixDPM_TABLE_303 0x3f4b8
481 #define ixDPM_TABLE_304 0x3f4bc
482 #define ixDPM_TABLE_305 0x3f4c0
483 #define ixDPM_TABLE_306 0x3f4c4
484 #define ixDPM_TABLE_307 0x3f4c8
485 #define ixDPM_TABLE_308 0x3f4cc
486 #define ixDPM_TABLE_309 0x3f4d0
487 #define ixDPM_TABLE_310 0x3f4d4
488 #define ixDPM_TABLE_311 0x3f4d8
489 #define ixDPM_TABLE_312 0x3f4dc
490 #define ixDPM_TABLE_313 0x3f4e0
491 #define ixDPM_TABLE_314 0x3f4e4
492 #define ixDPM_TABLE_315 0x3f4e8
493 #define ixDPM_TABLE_316 0x3f4ec
494 #define ixDPM_TABLE_317 0x3f4f0
495 #define ixDPM_TABLE_318 0x3f4f4
496 #define ixDPM_TABLE_319 0x3f4f8
497 #define ixDPM_TABLE_320 0x3f4fc
498 #define ixDPM_TABLE_321 0x3f500
499 #define ixDPM_TABLE_322 0x3f504
500 #define ixDPM_TABLE_323 0x3f508
501 #define ixDPM_TABLE_324 0x3f50c
502 #define ixDPM_TABLE_325 0x3f510
503 #define ixDPM_TABLE_326 0x3f514
504 #define ixDPM_TABLE_327 0x3f518
505 #define ixDPM_TABLE_328 0x3f51c
506 #define ixDPM_TABLE_329 0x3f520
507 #define ixDPM_TABLE_330 0x3f524
508 #define ixDPM_TABLE_331 0x3f528
509 #define ixDPM_TABLE_332 0x3f52c
510 #define ixDPM_TABLE_333 0x3f530
511 #define ixDPM_TABLE_334 0x3f534
512 #define ixDPM_TABLE_335 0x3f538
513 #define ixDPM_TABLE_336 0x3f53c
514 #define ixDPM_TABLE_337 0x3f540
515 #define ixDPM_TABLE_338 0x3f544
516 #define ixDPM_TABLE_339 0x3f548
517 #define ixDPM_TABLE_340 0x3f54c
518 #define ixDPM_TABLE_341 0x3f550
519 #define ixDPM_TABLE_342 0x3f554
520 #define ixDPM_TABLE_343 0x3f558
521 #define ixDPM_TABLE_344 0x3f55c
522 #define ixDPM_TABLE_345 0x3f560
523 #define ixDPM_TABLE_346 0x3f564
524 #define ixDPM_TABLE_347 0x3f568
525 #define ixDPM_TABLE_348 0x3f56c
526 #define ixDPM_TABLE_349 0x3f570
527 #define ixDPM_TABLE_350 0x3f574
528 #define ixDPM_TABLE_351 0x3f578
529 #define ixDPM_TABLE_352 0x3f57c
530 #define ixDPM_TABLE_353 0x3f580
531 #define ixDPM_TABLE_354 0x3f584
532 #define ixDPM_TABLE_355 0x3f588
533 #define ixDPM_TABLE_356 0x3f58c
534 #define ixDPM_TABLE_357 0x3f590
535 #define ixDPM_TABLE_358 0x3f594
536 #define ixDPM_TABLE_359 0x3f598
537 #define ixDPM_TABLE_360 0x3f59c
538 #define ixDPM_TABLE_361 0x3f5a0
539 #define ixDPM_TABLE_362 0x3f5a4
540 #define ixDPM_TABLE_363 0x3f5a8
541 #define ixDPM_TABLE_364 0x3f5ac
542 #define ixDPM_TABLE_365 0x3f5b0
543 #define ixDPM_TABLE_366 0x3f5b4
544 #define ixDPM_TABLE_367 0x3f5b8
545 #define ixDPM_TABLE_368 0x3f5bc
546 #define ixDPM_TABLE_369 0x3f5c0
547 #define ixDPM_TABLE_370 0x3f5c4
548 #define ixDPM_TABLE_371 0x3f5c8
549 #define ixDPM_TABLE_372 0x3f5cc
550 #define ixDPM_TABLE_373 0x3f5d0
551 #define ixDPM_TABLE_374 0x3f5d4
552 #define ixDPM_TABLE_375 0x3f5d8
553 #define ixDPM_TABLE_376 0x3f5dc
554 #define ixDPM_TABLE_377 0x3f5e0
555 #define ixDPM_TABLE_378 0x3f5e4
556 #define ixDPM_TABLE_379 0x3f5e8
557 #define ixDPM_TABLE_380 0x3f5ec
558 #define ixDPM_TABLE_381 0x3f5f0
559 #define ixDPM_TABLE_382 0x3f5f4
560 #define ixDPM_TABLE_383 0x3f5f8
561 #define ixDPM_TABLE_384 0x3f5fc
562 #define ixDPM_TABLE_385 0x3f600
563 #define ixDPM_TABLE_386 0x3f604
564 #define ixDPM_TABLE_387 0x3f608
565 #define ixDPM_TABLE_388 0x3f60c
566 #define ixDPM_TABLE_389 0x3f610
567 #define ixDPM_TABLE_390 0x3f614
568 #define ixDPM_TABLE_391 0x3f618
569 #define ixDPM_TABLE_392 0x3f61c
570 #define ixDPM_TABLE_393 0x3f620
571 #define ixDPM_TABLE_394 0x3f624
572 #define ixDPM_TABLE_395 0x3f628
573 #define ixDPM_TABLE_396 0x3f62c
574 #define ixDPM_TABLE_397 0x3f630
575 #define ixDPM_TABLE_398 0x3f634
576 #define ixDPM_TABLE_399 0x3f638
577 #define ixDPM_TABLE_400 0x3f63c
578 #define ixDPM_TABLE_401 0x3f640
579 #define ixDPM_TABLE_402 0x3f644
580 #define ixDPM_TABLE_403 0x3f648
581 #define ixDPM_TABLE_404 0x3f64c
582 #define ixDPM_TABLE_405 0x3f650
583 #define ixDPM_TABLE_406 0x3f654
584 #define ixDPM_TABLE_407 0x3f658
585 #define ixDPM_TABLE_408 0x3f65c
586 #define ixDPM_TABLE_409 0x3f660
587 #define ixDPM_TABLE_410 0x3f664
588 #define ixDPM_TABLE_411 0x3f668
589 #define ixDPM_TABLE_412 0x3f66c
590 #define ixDPM_TABLE_413 0x3f670
591 #define ixDPM_TABLE_414 0x3f674
592 #define ixDPM_TABLE_415 0x3f678
593 #define ixDPM_TABLE_416 0x3f67c
594 #define ixDPM_TABLE_417 0x3f680
595 #define ixDPM_TABLE_418 0x3f684
596 #define ixDPM_TABLE_419 0x3f688
597 #define ixDPM_TABLE_420 0x3f68c
598 #define ixDPM_TABLE_421 0x3f690
599 #define ixDPM_TABLE_422 0x3f694
600 #define ixDPM_TABLE_423 0x3f698
601 #define ixDPM_TABLE_424 0x3f69c
602 #define ixDPM_TABLE_425 0x3f6a0
603 #define ixDPM_TABLE_426 0x3f6a4
604 #define ixDPM_TABLE_427 0x3f6a8
605 #define ixDPM_TABLE_428 0x3f6ac
606 #define ixDPM_TABLE_429 0x3f6b0
607 #define ixDPM_TABLE_430 0x3f6b4
608 #define ixDPM_TABLE_431 0x3f6b8
609 #define ixDPM_TABLE_432 0x3f6bc
610 #define ixDPM_TABLE_433 0x3f6c0
611 #define ixDPM_TABLE_434 0x3f6c4
612 #define ixDPM_TABLE_435 0x3f6c8
613 #define ixDPM_TABLE_436 0x3f6cc
614 #define ixDPM_TABLE_437 0x3f6d0
615 #define ixDPM_TABLE_438 0x3f6d4
616 #define ixDPM_TABLE_439 0x3f6d8
617 #define ixDPM_TABLE_440 0x3f6dc
618 #define ixDPM_TABLE_441 0x3f6e0
619 #define ixDPM_TABLE_442 0x3f6e4
620 #define ixDPM_TABLE_443 0x3f6e8
621 #define ixDPM_TABLE_444 0x3f6ec
622 #define ixDPM_TABLE_445 0x3f6f0
623 #define ixDPM_TABLE_446 0x3f6f4
624 #define ixDPM_TABLE_447 0x3f6f8
625 #define ixDPM_TABLE_448 0x3f6fc
626 #define ixDPM_TABLE_449 0x3f700
627 #define ixDPM_TABLE_450 0x3f704
628 #define ixDPM_TABLE_451 0x3f708
629 #define ixDPM_TABLE_452 0x3f70c
630 #define ixDPM_TABLE_453 0x3f710
631 #define ixDPM_TABLE_454 0x3f714
632 #define ixDPM_TABLE_455 0x3f718
633 #define ixDPM_TABLE_456 0x3f71c
634 #define ixDPM_TABLE_457 0x3f720
635 #define ixDPM_TABLE_458 0x3f724
636 #define ixDPM_TABLE_459 0x3f728
637 #define ixDPM_TABLE_460 0x3f72c
638 #define ixDPM_TABLE_461 0x3f730
639 #define ixDPM_TABLE_462 0x3f734
640 #define ixDPM_TABLE_463 0x3f738
641 #define ixDPM_TABLE_464 0x3f73c
642 #define ixDPM_TABLE_465 0x3f740
643 #define ixDPM_TABLE_466 0x3f744
644 #define ixDPM_TABLE_467 0x3f748
645 #define ixDPM_TABLE_468 0x3f74c
646 #define ixDPM_TABLE_469 0x3f750
647 #define ixDPM_TABLE_470 0x3f754
648 #define ixDPM_TABLE_471 0x3f758
649 #define ixDPM_TABLE_472 0x3f75c
650 #define ixDPM_TABLE_473 0x3f760
651 #define ixDPM_TABLE_474 0x3f764
652 #define ixDPM_TABLE_475 0x3f768
653 #define ixDPM_TABLE_476 0x3f76c
654 #define ixDPM_TABLE_477 0x3f770
655 #define ixDPM_TABLE_478 0x3f774
656 #define ixDPM_TABLE_479 0x3f778
657 #define ixDPM_TABLE_480 0x3f77c
658 #define ixDPM_TABLE_481 0x3f780
659 #define ixDPM_TABLE_482 0x3f784
660 #define ixDPM_TABLE_483 0x3f788
661 #define ixDPM_TABLE_484 0x3f78c
662 #define ixDPM_TABLE_485 0x3f790
663 #define ixDPM_TABLE_486 0x3f794
664 #define ixDPM_TABLE_487 0x3f798
665 #define ixDPM_TABLE_488 0x3f79c
666 #define ixDPM_TABLE_489 0x3f7a0
667 #define ixDPM_TABLE_490 0x3f7a4
668 #define ixDPM_TABLE_491 0x3f7a8
669 #define ixDPM_TABLE_492 0x3f7ac
670 #define ixDPM_TABLE_493 0x3f7b0
671 #define ixDPM_TABLE_494 0x3f7b4
672 #define ixDPM_TABLE_495 0x3f7b8
673 #define ixDPM_TABLE_496 0x3f7bc
674 #define ixDPM_TABLE_497 0x3f7c0
675 #define ixDPM_TABLE_498 0x3f7c4
676 #define ixDPM_TABLE_499 0x3f7c8
677 #define ixDPM_TABLE_500 0x3f7cc
678 #define ixDPM_TABLE_501 0x3f7d0
679 #define ixDPM_TABLE_502 0x3f7d4
680 #define ixDPM_TABLE_503 0x3f7d8
681 #define ixDPM_TABLE_504 0x3f7dc
682 #define ixDPM_TABLE_505 0x3f7e0
683 #define ixDPM_TABLE_506 0x3f7e4
684 #define ixDPM_TABLE_507 0x3f7e8
685 #define ixDPM_TABLE_508 0x3f7ec
686 #define ixDPM_TABLE_509 0x3f7f0
687 #define ixDPM_TABLE_510 0x3f7f4
688 #define ixFIRMWARE_FLAGS 0x3f800
689 #define ixTDC_STATUS 0x3f808
690 #define ixTDC_MV_AVERAGE 0x3f80c
691 #define ixTDC_VRM_LIMIT 0x3f810
692 #define ixFEATURE_STATUS 0x3f818
693 #define ixENTITY_TEMPERATURES_1 0x3f81c
694 #define ixMCARB_DRAM_TIMING_TABLE_1 0x3f900
695 #define ixMCARB_DRAM_TIMING_TABLE_2 0x3f904
696 #define ixMCARB_DRAM_TIMING_TABLE_3 0x3f908
697 #define ixMCARB_DRAM_TIMING_TABLE_4 0x3f90c
698 #define ixMCARB_DRAM_TIMING_TABLE_5 0x3f910
699 #define ixMCARB_DRAM_TIMING_TABLE_6 0x3f914
700 #define ixMCARB_DRAM_TIMING_TABLE_7 0x3f918
701 #define ixMCARB_DRAM_TIMING_TABLE_8 0x3f91c
702 #define ixMCARB_DRAM_TIMING_TABLE_9 0x3f920
703 #define ixMCARB_DRAM_TIMING_TABLE_10 0x3f924
704 #define ixMCARB_DRAM_TIMING_TABLE_11 0x3f928
705 #define ixMCARB_DRAM_TIMING_TABLE_12 0x3f92c
706 #define ixMCARB_DRAM_TIMING_TABLE_13 0x3f930
707 #define ixMCARB_DRAM_TIMING_TABLE_14 0x3f934
708 #define ixMCARB_DRAM_TIMING_TABLE_15 0x3f938
709 #define ixMCARB_DRAM_TIMING_TABLE_16 0x3f93c
710 #define ixMCARB_DRAM_TIMING_TABLE_17 0x3f940
711 #define ixMCARB_DRAM_TIMING_TABLE_18 0x3f944
712 #define ixMCARB_DRAM_TIMING_TABLE_19 0x3f948
713 #define ixMCARB_DRAM_TIMING_TABLE_20 0x3f94c
714 #define ixMCARB_DRAM_TIMING_TABLE_21 0x3f950
715 #define ixMCARB_DRAM_TIMING_TABLE_22 0x3f954
716 #define ixMCARB_DRAM_TIMING_TABLE_23 0x3f958
717 #define ixMCARB_DRAM_TIMING_TABLE_24 0x3f95c
718 #define ixMCARB_DRAM_TIMING_TABLE_25 0x3f960
719 #define ixMCARB_DRAM_TIMING_TABLE_26 0x3f964
720 #define ixMCARB_DRAM_TIMING_TABLE_27 0x3f968
721 #define ixMCARB_DRAM_TIMING_TABLE_28 0x3f96c
722 #define ixMCARB_DRAM_TIMING_TABLE_29 0x3f970
723 #define ixMCARB_DRAM_TIMING_TABLE_30 0x3f974
724 #define ixMCARB_DRAM_TIMING_TABLE_31 0x3f978
725 #define ixMCARB_DRAM_TIMING_TABLE_32 0x3f97c
726 #define ixMCARB_DRAM_TIMING_TABLE_33 0x3f980
727 #define ixMCARB_DRAM_TIMING_TABLE_34 0x3f984
728 #define ixMCARB_DRAM_TIMING_TABLE_35 0x3f988
729 #define ixMCARB_DRAM_TIMING_TABLE_36 0x3f98c
730 #define ixMCARB_DRAM_TIMING_TABLE_37 0x3f990
731 #define ixMCARB_DRAM_TIMING_TABLE_38 0x3f994
732 #define ixMCARB_DRAM_TIMING_TABLE_39 0x3f998
733 #define ixMCARB_DRAM_TIMING_TABLE_40 0x3f99c
734 #define ixMCARB_DRAM_TIMING_TABLE_41 0x3f9a0
735 #define ixMCARB_DRAM_TIMING_TABLE_42 0x3f9a4
736 #define ixMCARB_DRAM_TIMING_TABLE_43 0x3f9a8
737 #define ixMCARB_DRAM_TIMING_TABLE_44 0x3f9ac
738 #define ixMCARB_DRAM_TIMING_TABLE_45 0x3f9b0
739 #define ixMCARB_DRAM_TIMING_TABLE_46 0x3f9b4
740 #define ixMCARB_DRAM_TIMING_TABLE_47 0x3f9b8
741 #define ixMCARB_DRAM_TIMING_TABLE_48 0x3f9bc
742 #define ixMCARB_DRAM_TIMING_TABLE_49 0x3f9c0
743 #define ixMCARB_DRAM_TIMING_TABLE_50 0x3f9c4
744 #define ixMCARB_DRAM_TIMING_TABLE_51 0x3f9c8
745 #define ixMCARB_DRAM_TIMING_TABLE_52 0x3f9cc
746 #define ixMCARB_DRAM_TIMING_TABLE_53 0x3f9d0
747 #define ixMCARB_DRAM_TIMING_TABLE_54 0x3f9d4
748 #define ixMCARB_DRAM_TIMING_TABLE_55 0x3f9d8
749 #define ixMCARB_DRAM_TIMING_TABLE_56 0x3f9dc
750 #define ixMCARB_DRAM_TIMING_TABLE_57 0x3f9e0
751 #define ixMCARB_DRAM_TIMING_TABLE_58 0x3f9e4
752 #define ixMCARB_DRAM_TIMING_TABLE_59 0x3f9e8
753 #define ixMCARB_DRAM_TIMING_TABLE_60 0x3f9ec
754 #define ixMCARB_DRAM_TIMING_TABLE_61 0x3f9f0
755 #define ixMCARB_DRAM_TIMING_TABLE_62 0x3f9f4
756 #define ixMCARB_DRAM_TIMING_TABLE_63 0x3f9f8
757 #define ixMCARB_DRAM_TIMING_TABLE_64 0x3f9fc
758 #define ixMCARB_DRAM_TIMING_TABLE_65 0x3fa00
759 #define ixMCARB_DRAM_TIMING_TABLE_66 0x3fa04
760 #define ixMCARB_DRAM_TIMING_TABLE_67 0x3fa08
761 #define ixMCARB_DRAM_TIMING_TABLE_68 0x3fa0c
762 #define ixMCARB_DRAM_TIMING_TABLE_69 0x3fa10
763 #define ixMCARB_DRAM_TIMING_TABLE_70 0x3fa14
764 #define ixMCARB_DRAM_TIMING_TABLE_71 0x3fa18
765 #define ixMCARB_DRAM_TIMING_TABLE_72 0x3fa1c
766 #define ixMCARB_DRAM_TIMING_TABLE_73 0x3fa20
767 #define ixMCARB_DRAM_TIMING_TABLE_74 0x3fa24
768 #define ixMCARB_DRAM_TIMING_TABLE_75 0x3fa28
769 #define ixMCARB_DRAM_TIMING_TABLE_76 0x3fa2c
770 #define ixMCARB_DRAM_TIMING_TABLE_77 0x3fa30
771 #define ixMCARB_DRAM_TIMING_TABLE_78 0x3fa34
772 #define ixMCARB_DRAM_TIMING_TABLE_79 0x3fa38
773 #define ixMCARB_DRAM_TIMING_TABLE_80 0x3fa3c
774 #define ixMCARB_DRAM_TIMING_TABLE_81 0x3fa40
775 #define ixMCARB_DRAM_TIMING_TABLE_82 0x3fa44
776 #define ixMCARB_DRAM_TIMING_TABLE_83 0x3fa48
777 #define ixMCARB_DRAM_TIMING_TABLE_84 0x3fa4c
778 #define ixMCARB_DRAM_TIMING_TABLE_85 0x3fa50
779 #define ixMCARB_DRAM_TIMING_TABLE_86 0x3fa54
780 #define ixMCARB_DRAM_TIMING_TABLE_87 0x3fa58
781 #define ixMCARB_DRAM_TIMING_TABLE_88 0x3fa5c
782 #define ixMCARB_DRAM_TIMING_TABLE_89 0x3fa60
783 #define ixMCARB_DRAM_TIMING_TABLE_90 0x3fa64
784 #define ixMCARB_DRAM_TIMING_TABLE_91 0x3fa68
785 #define ixMCARB_DRAM_TIMING_TABLE_92 0x3fa6c
786 #define ixMCARB_DRAM_TIMING_TABLE_93 0x3fa70
787 #define ixMCARB_DRAM_TIMING_TABLE_94 0x3fa74
788 #define ixMCARB_DRAM_TIMING_TABLE_95 0x3fa78
789 #define ixMCARB_DRAM_TIMING_TABLE_96 0x3fa7c
790 #define ixMCARB_DRAM_TIMING_TABLE_97 0x3fa80
791 #define ixMCARB_DRAM_TIMING_TABLE_98 0x3fa84
792 #define ixMCARB_DRAM_TIMING_TABLE_99 0x3fa88
793 #define ixMCARB_DRAM_TIMING_TABLE_100 0x3fa8c
794 #define ixMCARB_DRAM_TIMING_TABLE_101 0x3fa90
795 #define ixMCARB_DRAM_TIMING_TABLE_102 0x3fa94
796 #define ixMCARB_DRAM_TIMING_TABLE_103 0x3fa98
797 #define ixMCARB_DRAM_TIMING_TABLE_104 0x3fa9c
798 #define ixMCARB_DRAM_TIMING_TABLE_105 0x3faa0
799 #define ixMCARB_DRAM_TIMING_TABLE_106 0x3faa4
800 #define ixMCARB_DRAM_TIMING_TABLE_107 0x3faa8
801 #define ixMCARB_DRAM_TIMING_TABLE_108 0x3faac
802 #define ixMCARB_DRAM_TIMING_TABLE_109 0x3fab0
803 #define ixMCARB_DRAM_TIMING_TABLE_110 0x3fab4
804 #define ixMCARB_DRAM_TIMING_TABLE_111 0x3fab8
805 #define ixMCARB_DRAM_TIMING_TABLE_112 0x3fabc
806 #define ixMCARB_DRAM_TIMING_TABLE_113 0x3fac0
807 #define ixMCARB_DRAM_TIMING_TABLE_114 0x3fac4
808 #define ixMCARB_DRAM_TIMING_TABLE_115 0x3fac8
809 #define ixMCARB_DRAM_TIMING_TABLE_116 0x3facc
810 #define ixMCARB_DRAM_TIMING_TABLE_117 0x3fad0
811 #define ixMCARB_DRAM_TIMING_TABLE_118 0x3fad4
812 #define ixMCARB_DRAM_TIMING_TABLE_119 0x3fad8
813 #define ixMCARB_DRAM_TIMING_TABLE_120 0x3fadc
814 #define ixMCARB_DRAM_TIMING_TABLE_121 0x3fae0
815 #define ixMCARB_DRAM_TIMING_TABLE_122 0x3fae4
816 #define ixMCARB_DRAM_TIMING_TABLE_123 0x3fae8
817 #define ixMCARB_DRAM_TIMING_TABLE_124 0x3faec
818 #define ixMCARB_DRAM_TIMING_TABLE_125 0x3faf0
819 #define ixMCARB_DRAM_TIMING_TABLE_126 0x3faf4
820 #define ixMCARB_DRAM_TIMING_TABLE_127 0x3faf8
821 #define ixMCARB_DRAM_TIMING_TABLE_128 0x3fafc
822 #define ixMCARB_DRAM_TIMING_TABLE_129 0x3fb00
823 #define ixMCARB_DRAM_TIMING_TABLE_130 0x3fb04
824 #define ixMCARB_DRAM_TIMING_TABLE_131 0x3fb08
825 #define ixMCARB_DRAM_TIMING_TABLE_132 0x3fb0c
826 #define ixMCARB_DRAM_TIMING_TABLE_133 0x3fb10
827 #define ixMCARB_DRAM_TIMING_TABLE_134 0x3fb14
828 #define ixMCARB_DRAM_TIMING_TABLE_135 0x3fb18
829 #define ixMCARB_DRAM_TIMING_TABLE_136 0x3fb1c
830 #define ixMCARB_DRAM_TIMING_TABLE_137 0x3fb20
831 #define ixMCARB_DRAM_TIMING_TABLE_138 0x3fb24
832 #define ixMCARB_DRAM_TIMING_TABLE_139 0x3fb28
833 #define ixMCARB_DRAM_TIMING_TABLE_140 0x3fb2c
834 #define ixMCARB_DRAM_TIMING_TABLE_141 0x3fb30
835 #define ixMCARB_DRAM_TIMING_TABLE_142 0x3fb34
836 #define ixMCARB_DRAM_TIMING_TABLE_143 0x3fb38
837 #define ixMCARB_DRAM_TIMING_TABLE_144 0x3fb3c
838 #define ixMC_REGISTERS_TABLE_1 0x3fb40
839 #define ixMC_REGISTERS_TABLE_2 0x3fb44
840 #define ixMC_REGISTERS_TABLE_3 0x3fb48
841 #define ixMC_REGISTERS_TABLE_4 0x3fb4c
842 #define ixMC_REGISTERS_TABLE_5 0x3fb50
843 #define ixMC_REGISTERS_TABLE_6 0x3fb54
844 #define ixMC_REGISTERS_TABLE_7 0x3fb58
845 #define ixMC_REGISTERS_TABLE_8 0x3fb5c
846 #define ixMC_REGISTERS_TABLE_9 0x3fb60
847 #define ixMC_REGISTERS_TABLE_10 0x3fb64
848 #define ixMC_REGISTERS_TABLE_11 0x3fb68
849 #define ixMC_REGISTERS_TABLE_12 0x3fb6c
850 #define ixMC_REGISTERS_TABLE_13 0x3fb70
851 #define ixMC_REGISTERS_TABLE_14 0x3fb74
852 #define ixMC_REGISTERS_TABLE_15 0x3fb78
853 #define ixMC_REGISTERS_TABLE_16 0x3fb7c
854 #define ixMC_REGISTERS_TABLE_17 0x3fb80
855 #define ixMC_REGISTERS_TABLE_18 0x3fb84
856 #define ixMC_REGISTERS_TABLE_19 0x3fb88
857 #define ixMC_REGISTERS_TABLE_20 0x3fb8c
858 #define ixMC_REGISTERS_TABLE_21 0x3fb90
859 #define ixMC_REGISTERS_TABLE_22 0x3fb94
860 #define ixMC_REGISTERS_TABLE_23 0x3fb98
861 #define ixMC_REGISTERS_TABLE_24 0x3fb9c
862 #define ixMC_REGISTERS_TABLE_25 0x3fba0
863 #define ixMC_REGISTERS_TABLE_26 0x3fba4
864 #define ixMC_REGISTERS_TABLE_27 0x3fba8
865 #define ixMC_REGISTERS_TABLE_28 0x3fbac
866 #define ixMC_REGISTERS_TABLE_29 0x3fbb0
867 #define ixMC_REGISTERS_TABLE_30 0x3fbb4
868 #define ixMC_REGISTERS_TABLE_31 0x3fbb8
869 #define ixMC_REGISTERS_TABLE_32 0x3fbbc
870 #define ixMC_REGISTERS_TABLE_33 0x3fbc0
871 #define ixMC_REGISTERS_TABLE_34 0x3fbc4
872 #define ixMC_REGISTERS_TABLE_35 0x3fbc8
873 #define ixMC_REGISTERS_TABLE_36 0x3fbcc
874 #define ixMC_REGISTERS_TABLE_37 0x3fbd0
875 #define ixMC_REGISTERS_TABLE_38 0x3fbd4
876 #define ixMC_REGISTERS_TABLE_39 0x3fbd8
877 #define ixMC_REGISTERS_TABLE_40 0x3fbdc
878 #define ixMC_REGISTERS_TABLE_41 0x3fbe0
879 #define ixMC_REGISTERS_TABLE_42 0x3fbe4
880 #define ixMC_REGISTERS_TABLE_43 0x3fbe8
881 #define ixMC_REGISTERS_TABLE_44 0x3fbec
882 #define ixMC_REGISTERS_TABLE_45 0x3fbf0
883 #define ixMC_REGISTERS_TABLE_46 0x3fbf4
884 #define ixMC_REGISTERS_TABLE_47 0x3fbf8
885 #define ixMC_REGISTERS_TABLE_48 0x3fbfc
886 #define ixMC_REGISTERS_TABLE_49 0x3fc00
887 #define ixMC_REGISTERS_TABLE_50 0x3fc04
888 #define ixMC_REGISTERS_TABLE_51 0x3fc08
889 #define ixMC_REGISTERS_TABLE_52 0x3fc0c
890 #define ixMC_REGISTERS_TABLE_53 0x3fc10
891 #define ixMC_REGISTERS_TABLE_54 0x3fc14
892 #define ixMC_REGISTERS_TABLE_55 0x3fc18
893 #define ixMC_REGISTERS_TABLE_56 0x3fc1c
894 #define ixMC_REGISTERS_TABLE_57 0x3fc20
895 #define ixMC_REGISTERS_TABLE_58 0x3fc24
896 #define ixMC_REGISTERS_TABLE_59 0x3fc28
897 #define ixMC_REGISTERS_TABLE_60 0x3fc2c
898 #define ixMC_REGISTERS_TABLE_61 0x3fc30
899 #define ixMC_REGISTERS_TABLE_62 0x3fc34
900 #define ixMC_REGISTERS_TABLE_63 0x3fc38
901 #define ixMC_REGISTERS_TABLE_64 0x3fc3c
902 #define ixMC_REGISTERS_TABLE_65 0x3fc40
903 #define ixMC_REGISTERS_TABLE_66 0x3fc44
904 #define ixMC_REGISTERS_TABLE_67 0x3fc48
905 #define ixMC_REGISTERS_TABLE_68 0x3fc4c
906 #define ixMC_REGISTERS_TABLE_69 0x3fc50
907 #define ixMC_REGISTERS_TABLE_70 0x3fc54
908 #define ixMC_REGISTERS_TABLE_71 0x3fc58
909 #define ixMC_REGISTERS_TABLE_72 0x3fc5c
910 #define ixMC_REGISTERS_TABLE_73 0x3fc60
911 #define ixMC_REGISTERS_TABLE_74 0x3fc64
912 #define ixMC_REGISTERS_TABLE_75 0x3fc68
913 #define ixMC_REGISTERS_TABLE_76 0x3fc6c
914 #define ixMC_REGISTERS_TABLE_77 0x3fc70
915 #define ixMC_REGISTERS_TABLE_78 0x3fc74
916 #define ixMC_REGISTERS_TABLE_79 0x3fc78
917 #define ixMC_REGISTERS_TABLE_80 0x3fc7c
918 #define ixMC_REGISTERS_TABLE_81 0x3fc80
919 #define ixMC_REGISTERS_TABLE_82 0x3fc84
920 #define ixMC_REGISTERS_TABLE_83 0x3fc88
921 #define ixMC_REGISTERS_TABLE_84 0x3fc8c
922 #define ixMC_REGISTERS_TABLE_85 0x3fc90
923 #define ixMC_REGISTERS_TABLE_86 0x3fc94
924 #define ixMC_REGISTERS_TABLE_87 0x3fc98
925 #define ixMC_REGISTERS_TABLE_88 0x3fc9c
926 #define ixMC_REGISTERS_TABLE_89 0x3fca0
927 #define ixMC_REGISTERS_TABLE_90 0x3fca4
928 #define ixMC_REGISTERS_TABLE_91 0x3fca8
929 #define ixMC_REGISTERS_TABLE_92 0x3fcac
930 #define ixMC_REGISTERS_TABLE_93 0x3fcb0
931 #define ixMC_REGISTERS_TABLE_94 0x3fcb4
932 #define ixMC_REGISTERS_TABLE_95 0x3fcb8
933 #define ixMC_REGISTERS_TABLE_96 0x3fcbc
934 #define ixMC_REGISTERS_TABLE_97 0x3fcc0
935 #define ixMC_REGISTERS_TABLE_98 0x3fcc4
936 #define ixMC_REGISTERS_TABLE_99 0x3fcc8
937 #define ixMC_REGISTERS_TABLE_100 0x3fccc
938 #define ixMC_REGISTERS_TABLE_101 0x3fcd0
939 #define ixMC_REGISTERS_TABLE_102 0x3fcd4
940 #define ixMC_REGISTERS_TABLE_103 0x3fcd8
941 #define ixMC_REGISTERS_TABLE_104 0x3fcdc
942 #define ixMC_REGISTERS_TABLE_105 0x3fce0
943 #define ixMC_REGISTERS_TABLE_106 0x3fce4
944 #define ixMC_REGISTERS_TABLE_107 0x3fce8
945 #define ixMC_REGISTERS_TABLE_108 0x3fcec
946 #define ixMC_REGISTERS_TABLE_109 0x3fcf0
947 #define ixMC_REGISTERS_TABLE_110 0x3fcf4
948 #define ixMC_REGISTERS_TABLE_111 0x3fcf8
949 #define ixMC_REGISTERS_TABLE_112 0x3fcfc
950 #define ixMC_REGISTERS_TABLE_113 0x3fd00
951 #define ixFAN_TABLE_1 0x3fd04
952 #define ixFAN_TABLE_2 0x3fd08
953 #define ixFAN_TABLE_3 0x3fd0c
954 #define ixFAN_TABLE_4 0x3fd10
955 #define ixFAN_TABLE_5 0x3fd14
956 #define ixFAN_TABLE_6 0x3fd18
957 #define ixFAN_TABLE_7 0x3fd1c
958 #define ixFAN_TABLE_8 0x3fd20
959 #define ixFAN_TABLE_9 0x3fd24
960 #define ixSOFT_REGISTERS_TABLE_1 0x3fd28
961 #define ixSOFT_REGISTERS_TABLE_2 0x3fd2c
962 #define ixSOFT_REGISTERS_TABLE_3 0x3fd30
963 #define ixSOFT_REGISTERS_TABLE_4 0x3fd34
964 #define ixSOFT_REGISTERS_TABLE_5 0x3fd38
965 #define ixSOFT_REGISTERS_TABLE_6 0x3fd3c
966 #define ixSOFT_REGISTERS_TABLE_7 0x3fd40
967 #define ixSOFT_REGISTERS_TABLE_8 0x3fd44
968 #define ixSOFT_REGISTERS_TABLE_9 0x3fd48
969 #define ixSOFT_REGISTERS_TABLE_10 0x3fd4c
970 #define ixSOFT_REGISTERS_TABLE_11 0x3fd50
971 #define ixSOFT_REGISTERS_TABLE_12 0x3fd54
972 #define ixSOFT_REGISTERS_TABLE_13 0x3fd58
973 #define ixSOFT_REGISTERS_TABLE_14 0x3fd5c
974 #define ixSOFT_REGISTERS_TABLE_15 0x3fd60
975 #define ixSOFT_REGISTERS_TABLE_16 0x3fd64
976 #define ixSOFT_REGISTERS_TABLE_17 0x3fd68
977 #define ixSOFT_REGISTERS_TABLE_18 0x3fd6c
978 #define ixSOFT_REGISTERS_TABLE_19 0x3fd70
979 #define ixSOFT_REGISTERS_TABLE_20 0x3fd74
980 #define ixSOFT_REGISTERS_TABLE_21 0x3fd78
981 #define ixSOFT_REGISTERS_TABLE_22 0x3fd7c
982 #define ixSOFT_REGISTERS_TABLE_23 0x3fd80
983 #define ixSOFT_REGISTERS_TABLE_24 0x3fd84
984 #define ixSOFT_REGISTERS_TABLE_25 0x3fd88
985 #define ixSOFT_REGISTERS_TABLE_26 0x3fd8c
986 #define ixSOFT_REGISTERS_TABLE_27 0x3fd90
987 #define ixSOFT_REGISTERS_TABLE_28 0x3fd94
988 #define ixSOFT_REGISTERS_TABLE_29 0x3fd98
989 #define ixSOFT_REGISTERS_TABLE_30 0x3fd9c
990 #define ixPM_FUSES_1 0x3fda0
991 #define ixPM_FUSES_2 0x3fda4
992 #define ixPM_FUSES_3 0x3fda8
993 #define ixPM_FUSES_4 0x3fdac
994 #define ixPM_FUSES_5 0x3fdb0
995 #define ixPM_FUSES_6 0x3fdb4
996 #define ixPM_FUSES_7 0x3fdb8
997 #define ixPM_FUSES_8 0x3fdbc
998 #define ixPM_FUSES_9 0x3fdc0
999 #define ixPM_FUSES_10 0x3fdc4
1000 #define ixPM_FUSES_11 0x3fdc8
1001 #define ixPM_FUSES_12 0x3fdcc
1002 #define ixPM_FUSES_13 0x3fdd0
1003 #define ixPM_FUSES_14 0x3fdd4
1004 #define ixPM_FUSES_15 0x3fdd8
1005 #define ixPM_FUSES_16 0x3fddc
1006 #define ixPM_FUSES_17 0x3fde0
1007 #define ixPM_FUSES_18 0x3fde4
1008 #define ixPM_FUSES_19 0x3fde8
1009 #define ixSMU_PM_STATUS_0 0x3fe00
1010 #define ixSMU_PM_STATUS_1 0x3fe04
1011 #define ixSMU_PM_STATUS_2 0x3fe08
1012 #define ixSMU_PM_STATUS_3 0x3fe0c
1013 #define ixSMU_PM_STATUS_4 0x3fe10
1014 #define ixSMU_PM_STATUS_5 0x3fe14
1015 #define ixSMU_PM_STATUS_6 0x3fe18
1016 #define ixSMU_PM_STATUS_7 0x3fe1c
1017 #define ixSMU_PM_STATUS_8 0x3fe20
1018 #define ixSMU_PM_STATUS_9 0x3fe24
1019 #define ixSMU_PM_STATUS_10 0x3fe28
1020 #define ixSMU_PM_STATUS_11 0x3fe2c
1021 #define ixSMU_PM_STATUS_12 0x3fe30
1022 #define ixSMU_PM_STATUS_13 0x3fe34
1023 #define ixSMU_PM_STATUS_14 0x3fe38
1024 #define ixSMU_PM_STATUS_15 0x3fe3c
1025 #define ixSMU_PM_STATUS_16 0x3fe40
1026 #define ixSMU_PM_STATUS_17 0x3fe44
1027 #define ixSMU_PM_STATUS_18 0x3fe48
1028 #define ixSMU_PM_STATUS_19 0x3fe4c
1029 #define ixSMU_PM_STATUS_20 0x3fe50
1030 #define ixSMU_PM_STATUS_21 0x3fe54
1031 #define ixSMU_PM_STATUS_22 0x3fe58
1032 #define ixSMU_PM_STATUS_23 0x3fe5c
1033 #define ixSMU_PM_STATUS_24 0x3fe60
1034 #define ixSMU_PM_STATUS_25 0x3fe64
1035 #define ixSMU_PM_STATUS_26 0x3fe68
1036 #define ixSMU_PM_STATUS_27 0x3fe6c
1037 #define ixSMU_PM_STATUS_28 0x3fe70
1038 #define ixSMU_PM_STATUS_29 0x3fe74
1039 #define ixSMU_PM_STATUS_30 0x3fe78
1040 #define ixSMU_PM_STATUS_31 0x3fe7c
1041 #define ixSMU_PM_STATUS_32 0x3fe80
1042 #define ixSMU_PM_STATUS_33 0x3fe84
1043 #define ixSMU_PM_STATUS_34 0x3fe88
1044 #define ixSMU_PM_STATUS_35 0x3fe8c
1045 #define ixSMU_PM_STATUS_36 0x3fe90
1046 #define ixSMU_PM_STATUS_37 0x3fe94
1047 #define ixSMU_PM_STATUS_38 0x3fe98
1048 #define ixSMU_PM_STATUS_39 0x3fe9c
1049 #define ixSMU_PM_STATUS_40 0x3fea0
1050 #define ixSMU_PM_STATUS_41 0x3fea4
1051 #define ixSMU_PM_STATUS_42 0x3fea8
1052 #define ixSMU_PM_STATUS_43 0x3feac
1053 #define ixSMU_PM_STATUS_44 0x3feb0
1054 #define ixSMU_PM_STATUS_45 0x3feb4
1055 #define ixSMU_PM_STATUS_46 0x3feb8
1056 #define ixSMU_PM_STATUS_47 0x3febc
1057 #define ixSMU_PM_STATUS_48 0x3fec0
1058 #define ixSMU_PM_STATUS_49 0x3fec4
1059 #define ixSMU_PM_STATUS_50 0x3fec8
1060 #define ixSMU_PM_STATUS_51 0x3fecc
1061 #define ixSMU_PM_STATUS_52 0x3fed0
1062 #define ixSMU_PM_STATUS_53 0x3fed4
1063 #define ixSMU_PM_STATUS_54 0x3fed8
1064 #define ixSMU_PM_STATUS_55 0x3fedc
1065 #define ixSMU_PM_STATUS_56 0x3fee0
1066 #define ixSMU_PM_STATUS_57 0x3fee4
1067 #define ixSMU_PM_STATUS_58 0x3fee8
1068 #define ixSMU_PM_STATUS_59 0x3feec
1069 #define ixSMU_PM_STATUS_60 0x3fef0
1070 #define ixSMU_PM_STATUS_61 0x3fef4
1071 #define ixSMU_PM_STATUS_62 0x3fef8
1072 #define ixSMU_PM_STATUS_63 0x3fefc
1073 #define ixSMU_PM_STATUS_64 0x3ff00
1074 #define ixSMU_PM_STATUS_65 0x3ff04
1075 #define ixSMU_PM_STATUS_66 0x3ff08
1076 #define ixSMU_PM_STATUS_67 0x3ff0c
1077 #define ixSMU_PM_STATUS_68 0x3ff10
1078 #define ixSMU_PM_STATUS_69 0x3ff14
1079 #define ixSMU_PM_STATUS_70 0x3ff18
1080 #define ixSMU_PM_STATUS_71 0x3ff1c
1081 #define ixSMU_PM_STATUS_72 0x3ff20
1082 #define ixSMU_PM_STATUS_73 0x3ff24
1083 #define ixSMU_PM_STATUS_74 0x3ff28
1084 #define ixSMU_PM_STATUS_75 0x3ff2c
1085 #define ixSMU_PM_STATUS_76 0x3ff30
1086 #define ixSMU_PM_STATUS_77 0x3ff34
1087 #define ixSMU_PM_STATUS_78 0x3ff38
1088 #define ixSMU_PM_STATUS_79 0x3ff3c
1089 #define ixSMU_PM_STATUS_80 0x3ff40
1090 #define ixSMU_PM_STATUS_81 0x3ff44
1091 #define ixSMU_PM_STATUS_82 0x3ff48
1092 #define ixSMU_PM_STATUS_83 0x3ff4c
1093 #define ixSMU_PM_STATUS_84 0x3ff50
1094 #define ixSMU_PM_STATUS_85 0x3ff54
1095 #define ixSMU_PM_STATUS_86 0x3ff58
1096 #define ixSMU_PM_STATUS_87 0x3ff5c
1097 #define ixSMU_PM_STATUS_88 0x3ff60
1098 #define ixSMU_PM_STATUS_89 0x3ff64
1099 #define ixSMU_PM_STATUS_90 0x3ff68
1100 #define ixSMU_PM_STATUS_91 0x3ff6c
1101 #define ixSMU_PM_STATUS_92 0x3ff70
1102 #define ixSMU_PM_STATUS_93 0x3ff74
1103 #define ixSMU_PM_STATUS_94 0x3ff78
1104 #define ixSMU_PM_STATUS_95 0x3ff7c
1105 #define ixSMU_PM_STATUS_96 0x3ff80
1106 #define ixSMU_PM_STATUS_97 0x3ff84
1107 #define ixSMU_PM_STATUS_98 0x3ff88
1108 #define ixSMU_PM_STATUS_99 0x3ff8c
1109 #define ixSMU_PM_STATUS_100 0x3ff90
1110 #define ixSMU_PM_STATUS_101 0x3ff94
1111 #define ixSMU_PM_STATUS_102 0x3ff98
1112 #define ixSMU_PM_STATUS_103 0x3ff9c
1113 #define ixSMU_PM_STATUS_104 0x3ffa0
1114 #define ixSMU_PM_STATUS_105 0x3ffa4
1115 #define ixSMU_PM_STATUS_106 0x3ffa8
1116 #define ixSMU_PM_STATUS_107 0x3ffac
1117 #define ixSMU_PM_STATUS_108 0x3ffb0
1118 #define ixSMU_PM_STATUS_109 0x3ffb4
1119 #define ixSMU_PM_STATUS_110 0x3ffb8
1120 #define ixSMU_PM_STATUS_111 0x3ffbc
1121 #define ixSMU_PM_STATUS_112 0x3ffc0
1122 #define ixSMU_PM_STATUS_113 0x3ffc4
1123 #define ixSMU_PM_STATUS_114 0x3ffc8
1124 #define ixSMU_PM_STATUS_115 0x3ffcc
1125 #define ixSMU_PM_STATUS_116 0x3ffd0
1126 #define ixSMU_PM_STATUS_117 0x3ffd4
1127 #define ixSMU_PM_STATUS_118 0x3ffd8
1128 #define ixSMU_PM_STATUS_119 0x3ffdc
1129 #define ixSMU_PM_STATUS_120 0x3ffe0
1130 #define ixSMU_PM_STATUS_121 0x3ffe4
1131 #define ixSMU_PM_STATUS_122 0x3ffe8
1132 #define ixSMU_PM_STATUS_123 0x3ffec
1133 #define ixSMU_PM_STATUS_124 0x3fff0
1134 #define ixSMU_PM_STATUS_125 0x3fff4
1135 #define ixSMU_PM_STATUS_126 0x3fff8
1136 #define ixSMU_PM_STATUS_127 0x3fffc
1137 #define ixCG_THERMAL_INT_ENA 0xc2100024
1138 #define ixCG_THERMAL_INT_CTRL 0xc2100028
1139 #define ixCG_THERMAL_INT_STATUS 0xc210002c
1140 #define ixCG_THERMAL_CTRL 0xc0300004
1141 #define ixCG_THERMAL_STATUS 0xc0300008
1142 #define ixCG_THERMAL_INT 0xc030000c
1143 #define ixCG_MULT_THERMAL_CTRL 0xc0300010
1144 #define ixCG_MULT_THERMAL_STATUS 0xc0300014
1145 #define ixCG_FDO_CTRL0 0xc0300064
1146 #define ixCG_FDO_CTRL1 0xc0300068
1147 #define ixCG_FDO_CTRL2 0xc030006c
1148 #define ixCG_TACH_CTRL 0xc0300070
1149 #define ixCG_TACH_STATUS 0xc0300074
1150 #define ixCC_THM_STRAPS0 0xc0300080
1151 #define ixTHM_TMON0_RDIL0_DATA 0xc0300100
1152 #define ixTHM_TMON0_RDIL1_DATA 0xc0300104
1153 #define ixTHM_TMON0_RDIL2_DATA 0xc0300108
1154 #define ixTHM_TMON0_RDIL3_DATA 0xc030010c
1155 #define ixTHM_TMON0_RDIL4_DATA 0xc0300110
1156 #define ixTHM_TMON0_RDIL5_DATA 0xc0300114
1157 #define ixTHM_TMON0_RDIL6_DATA 0xc0300118
1158 #define ixTHM_TMON0_RDIL7_DATA 0xc030011c
1159 #define ixTHM_TMON0_RDIL8_DATA 0xc0300120
1160 #define ixTHM_TMON0_RDIL9_DATA 0xc0300124
1161 #define ixTHM_TMON0_RDIL10_DATA 0xc0300128
1162 #define ixTHM_TMON0_RDIL11_DATA 0xc030012c
1163 #define ixTHM_TMON0_RDIL12_DATA 0xc0300130
1164 #define ixTHM_TMON0_RDIL13_DATA 0xc0300134
1165 #define ixTHM_TMON0_RDIL14_DATA 0xc0300138
1166 #define ixTHM_TMON0_RDIL15_DATA 0xc030013c
1167 #define ixTHM_TMON0_RDIR0_DATA 0xc0300140
1168 #define ixTHM_TMON0_RDIR1_DATA 0xc0300144
1169 #define ixTHM_TMON0_RDIR2_DATA 0xc0300148
1170 #define ixTHM_TMON0_RDIR3_DATA 0xc030014c
1171 #define ixTHM_TMON0_RDIR4_DATA 0xc0300150
1172 #define ixTHM_TMON0_RDIR5_DATA 0xc0300154
1173 #define ixTHM_TMON0_RDIR6_DATA 0xc0300158
1174 #define ixTHM_TMON0_RDIR7_DATA 0xc030015c
1175 #define ixTHM_TMON0_RDIR8_DATA 0xc0300160
1176 #define ixTHM_TMON0_RDIR9_DATA 0xc0300164
1177 #define ixTHM_TMON0_RDIR10_DATA 0xc0300168
1178 #define ixTHM_TMON0_RDIR11_DATA 0xc030016c
1179 #define ixTHM_TMON0_RDIR12_DATA 0xc0300170
1180 #define ixTHM_TMON0_RDIR13_DATA 0xc0300174
1181 #define ixTHM_TMON0_RDIR14_DATA 0xc0300178
1182 #define ixTHM_TMON0_RDIR15_DATA 0xc030017c
1183 #define ixTHM_TMON0_INT_DATA 0xc0300300
1184 #define ixTHM_TMON0_DEBUG 0xc0300310
1185 #define ixGENERAL_PWRMGT 0xc0200000
1186 #define ixCNB_PWRMGT_CNTL 0xc0200004
1187 #define ixSCLK_PWRMGT_CNTL 0xc0200008
1188 #define ixTARGET_AND_CURRENT_PROFILE_INDEX 0xc0200014
1189 #define ixCG_FREQ_TRAN_VOTING_0 0xc02001a8
1190 #define ixCG_FREQ_TRAN_VOTING_1 0xc02001ac
1191 #define ixCG_FREQ_TRAN_VOTING_2 0xc02001b0
1192 #define ixCG_FREQ_TRAN_VOTING_3 0xc02001b4
1193 #define ixCG_FREQ_TRAN_VOTING_4 0xc02001b8
1194 #define ixCG_FREQ_TRAN_VOTING_5 0xc02001bc
1195 #define ixCG_FREQ_TRAN_VOTING_6 0xc02001c0
1196 #define ixCG_FREQ_TRAN_VOTING_7 0xc02001c4
1197 #define ixPLL_TEST_CNTL 0xc020003c
1198 #define ixCG_STATIC_SCREEN_PARAMETER 0xc0200044
1199 #define ixCG_DISPLAY_GAP_CNTL 0xc0200060
1200 #define ixCG_DISPLAY_GAP_CNTL2 0xc0200230
1201 #define ixCG_ACPI_CNTL 0xc0200064
1202 #define ixSCLK_DEEP_SLEEP_CNTL 0xc0200080
1203 #define ixSCLK_DEEP_SLEEP_CNTL2 0xc0200084
1204 #define ixSCLK_DEEP_SLEEP_CNTL3 0xc020009c
1205 #define ixSCLK_DEEP_SLEEP_MISC_CNTL 0xc0200088
1206 #define ixLCLK_DEEP_SLEEP_CNTL 0xc020008c
1207 #define ixLCLK_DEEP_SLEEP_CNTL2 0xc0200310
1208 #define ixTARGET_AND_CURRENT_PROFILE_INDEX_1 0xc02000f0
1209 #define ixCG_ULV_PARAMETER 0xc020015c
1210 #define ixSCLK_MIN_DIV 0xc0200308
1211 #define ixLCAC_SX0_CNTL 0xc0400d00
1212 #define ixLCAC_SX0_OVR_SEL 0xc0400d04
1213 #define ixLCAC_SX0_OVR_VAL 0xc0400d08
1214 #define ixLCAC_MC0_CNTL 0xc0400d30
1215 #define ixLCAC_MC0_OVR_SEL 0xc0400d34
1216 #define ixLCAC_MC0_OVR_VAL 0xc0400d38
1217 #define ixLCAC_MC1_CNTL 0xc0400d3c
1218 #define ixLCAC_MC1_OVR_SEL 0xc0400d40
1219 #define ixLCAC_MC1_OVR_VAL 0xc0400d44
1220 #define ixLCAC_MC2_CNTL 0xc0400d48
1221 #define ixLCAC_MC2_OVR_SEL 0xc0400d4c
1222 #define ixLCAC_MC2_OVR_VAL 0xc0400d50
1223 #define ixLCAC_MC3_CNTL 0xc0400d54
1224 #define ixLCAC_MC3_OVR_SEL 0xc0400d58
1225 #define ixLCAC_MC3_OVR_VAL 0xc0400d5c
1226 #define ixLCAC_CPL_CNTL 0xc0400d80
1227 #define ixLCAC_CPL_OVR_SEL 0xc0400d84
1228 #define ixLCAC_CPL_OVR_VAL 0xc0400d88
1229 #define mmROM_SMC_IND_INDEX 0x80
1230 #define mmROM0_ROM_SMC_IND_INDEX 0x80
1231 #define mmROM1_ROM_SMC_IND_INDEX 0x82
1232 #define mmROM2_ROM_SMC_IND_INDEX 0x84
1233 #define mmROM3_ROM_SMC_IND_INDEX 0x86
1234 #define mmROM_SMC_IND_DATA 0x81
1235 #define mmROM0_ROM_SMC_IND_DATA 0x81
1236 #define mmROM1_ROM_SMC_IND_DATA 0x83
1237 #define mmROM2_ROM_SMC_IND_DATA 0x85
1238 #define mmROM3_ROM_SMC_IND_DATA 0x87
1239 #define ixROM_CNTL 0xc0600000
1240 #define ixPAGE_MIRROR_CNTL 0xc0600004
1241 #define ixROM_STATUS 0xc0600008
1242 #define ixCGTT_ROM_CLK_CTRL0 0xc060000c
1243 #define ixROM_INDEX 0xc0600010
1244 #define ixROM_DATA 0xc0600014
1245 #define ixROM_START 0xc0600018
1246 #define ixROM_SW_CNTL 0xc060001c
1247 #define ixROM_SW_STATUS 0xc0600020
1248 #define ixROM_SW_COMMAND 0xc0600024
1249 #define ixROM_SW_DATA_1 0xc0600028
1250 #define ixROM_SW_DATA_2 0xc060002c
1251 #define ixROM_SW_DATA_3 0xc0600030
1252 #define ixROM_SW_DATA_4 0xc0600034
1253 #define ixROM_SW_DATA_5 0xc0600038
1254 #define ixROM_SW_DATA_6 0xc060003c
1255 #define ixROM_SW_DATA_7 0xc0600040
1256 #define ixROM_SW_DATA_8 0xc0600044
1257 #define ixROM_SW_DATA_9 0xc0600048
1258 #define ixROM_SW_DATA_10 0xc060004c
1259 #define ixROM_SW_DATA_11 0xc0600050
1260 #define ixROM_SW_DATA_12 0xc0600054
1261 #define ixROM_SW_DATA_13 0xc0600058
1262 #define ixROM_SW_DATA_14 0xc060005c
1263 #define ixROM_SW_DATA_15 0xc0600060
1264 #define ixROM_SW_DATA_16 0xc0600064
1265 #define ixROM_SW_DATA_17 0xc0600068
1266 #define ixROM_SW_DATA_18 0xc060006c
1267 #define ixROM_SW_DATA_19 0xc0600070
1268 #define ixROM_SW_DATA_20 0xc0600074
1269 #define ixROM_SW_DATA_21 0xc0600078
1270 #define ixROM_SW_DATA_22 0xc060007c
1271 #define ixROM_SW_DATA_23 0xc0600080
1272 #define ixROM_SW_DATA_24 0xc0600084
1273 #define ixROM_SW_DATA_25 0xc0600088
1274 #define ixROM_SW_DATA_26 0xc060008c
1275 #define ixROM_SW_DATA_27 0xc0600090
1276 #define ixROM_SW_DATA_28 0xc0600094
1277 #define ixROM_SW_DATA_29 0xc0600098
1278 #define ixROM_SW_DATA_30 0xc060009c
1279 #define ixROM_SW_DATA_31 0xc06000a0
1280 #define ixROM_SW_DATA_32 0xc06000a4
1281 #define ixROM_SW_DATA_33 0xc06000a8
1282 #define ixROM_SW_DATA_34 0xc06000ac
1283 #define ixROM_SW_DATA_35 0xc06000b0
1284 #define ixROM_SW_DATA_36 0xc06000b4
1285 #define ixROM_SW_DATA_37 0xc06000b8
1286 #define ixROM_SW_DATA_38 0xc06000bc
1287 #define ixROM_SW_DATA_39 0xc06000c0
1288 #define ixROM_SW_DATA_40 0xc06000c4
1289 #define ixROM_SW_DATA_41 0xc06000c8
1290 #define ixROM_SW_DATA_42 0xc06000cc
1291 #define ixROM_SW_DATA_43 0xc06000d0
1292 #define ixROM_SW_DATA_44 0xc06000d4
1293 #define ixROM_SW_DATA_45 0xc06000d8
1294 #define ixROM_SW_DATA_46 0xc06000dc
1295 #define ixROM_SW_DATA_47 0xc06000e0
1296 #define ixROM_SW_DATA_48 0xc06000e4
1297 #define ixROM_SW_DATA_49 0xc06000e8
1298 #define ixROM_SW_DATA_50 0xc06000ec
1299 #define ixROM_SW_DATA_51 0xc06000f0
1300 #define ixROM_SW_DATA_52 0xc06000f4
1301 #define ixROM_SW_DATA_53 0xc06000f8
1302 #define ixROM_SW_DATA_54 0xc06000fc
1303 #define ixROM_SW_DATA_55 0xc0600110
1304 #define ixROM_SW_DATA_56 0xc0600114
1305 #define ixROM_SW_DATA_57 0xc0600118
1306 #define ixROM_SW_DATA_58 0xc060011c
1307 #define ixROM_SW_DATA_59 0xc0600120
1308 #define ixROM_SW_DATA_60 0xc0600124
1309 #define ixROM_SW_DATA_61 0xc0600128
1310 #define ixROM_SW_DATA_62 0xc060012c
1311 #define ixROM_SW_DATA_63 0xc0600130
1312 #define ixROM_SW_DATA_64 0xc0600134
1313
1314 #endif /* SMU_7_0_1_D_H */
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