Orangefs: merge to v4.5
[deliverable/linux.git] / drivers / gpu / drm / amd / powerplay / amd_powerplay.c
1 /*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23 #include <linux/types.h>
24 #include <linux/kernel.h>
25 #include <linux/gfp.h>
26 #include <linux/slab.h>
27 #include "amd_shared.h"
28 #include "amd_powerplay.h"
29 #include "pp_instance.h"
30 #include "power_state.h"
31 #include "eventmanager.h"
32
33 #define PP_CHECK(handle) \
34 do { \
35 if ((handle) == NULL || (handle)->pp_valid != PP_VALID) \
36 return -EINVAL; \
37 } while (0)
38
39 static int pp_early_init(void *handle)
40 {
41 return 0;
42 }
43
44 static int pp_sw_init(void *handle)
45 {
46 struct pp_instance *pp_handle;
47 struct pp_hwmgr *hwmgr;
48 int ret = 0;
49
50 if (handle == NULL)
51 return -EINVAL;
52
53 pp_handle = (struct pp_instance *)handle;
54 hwmgr = pp_handle->hwmgr;
55
56 if (hwmgr == NULL || hwmgr->pptable_func == NULL ||
57 hwmgr->hwmgr_func == NULL ||
58 hwmgr->pptable_func->pptable_init == NULL ||
59 hwmgr->hwmgr_func->backend_init == NULL)
60 return -EINVAL;
61
62 ret = hwmgr->pptable_func->pptable_init(hwmgr);
63
64 if (ret == 0)
65 ret = hwmgr->hwmgr_func->backend_init(hwmgr);
66
67 if (ret)
68 printk("amdgpu: powerplay initialization failed\n");
69 else
70 printk("amdgpu: powerplay initialized\n");
71
72 return ret;
73 }
74
75 static int pp_sw_fini(void *handle)
76 {
77 struct pp_instance *pp_handle;
78 struct pp_hwmgr *hwmgr;
79 int ret = 0;
80
81 if (handle == NULL)
82 return -EINVAL;
83
84 pp_handle = (struct pp_instance *)handle;
85 hwmgr = pp_handle->hwmgr;
86
87 if (hwmgr != NULL || hwmgr->hwmgr_func != NULL ||
88 hwmgr->hwmgr_func->backend_fini != NULL)
89 ret = hwmgr->hwmgr_func->backend_fini(hwmgr);
90
91 return ret;
92 }
93
94 static int pp_hw_init(void *handle)
95 {
96 struct pp_instance *pp_handle;
97 struct pp_smumgr *smumgr;
98 struct pp_eventmgr *eventmgr;
99 int ret = 0;
100
101 if (handle == NULL)
102 return -EINVAL;
103
104 pp_handle = (struct pp_instance *)handle;
105 smumgr = pp_handle->smu_mgr;
106
107 if (smumgr == NULL || smumgr->smumgr_funcs == NULL ||
108 smumgr->smumgr_funcs->smu_init == NULL ||
109 smumgr->smumgr_funcs->start_smu == NULL)
110 return -EINVAL;
111
112 ret = smumgr->smumgr_funcs->smu_init(smumgr);
113 if (ret) {
114 printk(KERN_ERR "[ powerplay ] smc initialization failed\n");
115 return ret;
116 }
117
118 ret = smumgr->smumgr_funcs->start_smu(smumgr);
119 if (ret) {
120 printk(KERN_ERR "[ powerplay ] smc start failed\n");
121 smumgr->smumgr_funcs->smu_fini(smumgr);
122 return ret;
123 }
124
125 hw_init_power_state_table(pp_handle->hwmgr);
126 eventmgr = pp_handle->eventmgr;
127
128 if (eventmgr == NULL || eventmgr->pp_eventmgr_init == NULL)
129 return -EINVAL;
130
131 ret = eventmgr->pp_eventmgr_init(eventmgr);
132 return 0;
133 }
134
135 static int pp_hw_fini(void *handle)
136 {
137 struct pp_instance *pp_handle;
138 struct pp_smumgr *smumgr;
139 struct pp_eventmgr *eventmgr;
140
141 if (handle == NULL)
142 return -EINVAL;
143
144 pp_handle = (struct pp_instance *)handle;
145 eventmgr = pp_handle->eventmgr;
146
147 if (eventmgr != NULL || eventmgr->pp_eventmgr_fini != NULL)
148 eventmgr->pp_eventmgr_fini(eventmgr);
149
150 smumgr = pp_handle->smu_mgr;
151
152 if (smumgr != NULL || smumgr->smumgr_funcs != NULL ||
153 smumgr->smumgr_funcs->smu_fini != NULL)
154 smumgr->smumgr_funcs->smu_fini(smumgr);
155
156 return 0;
157 }
158
159 static bool pp_is_idle(void *handle)
160 {
161 return 0;
162 }
163
164 static int pp_wait_for_idle(void *handle)
165 {
166 return 0;
167 }
168
169 static int pp_sw_reset(void *handle)
170 {
171 return 0;
172 }
173
174 static void pp_print_status(void *handle)
175 {
176
177 }
178
179 static int pp_set_clockgating_state(void *handle,
180 enum amd_clockgating_state state)
181 {
182 return 0;
183 }
184
185 static int pp_set_powergating_state(void *handle,
186 enum amd_powergating_state state)
187 {
188 return 0;
189 }
190
191 static int pp_suspend(void *handle)
192 {
193 struct pp_instance *pp_handle;
194 struct pp_eventmgr *eventmgr;
195 struct pem_event_data event_data = { {0} };
196
197 if (handle == NULL)
198 return -EINVAL;
199
200 pp_handle = (struct pp_instance *)handle;
201 eventmgr = pp_handle->eventmgr;
202 pem_handle_event(eventmgr, AMD_PP_EVENT_SUSPEND, &event_data);
203 return 0;
204 }
205
206 static int pp_resume(void *handle)
207 {
208 struct pp_instance *pp_handle;
209 struct pp_eventmgr *eventmgr;
210 struct pem_event_data event_data = { {0} };
211 struct pp_smumgr *smumgr;
212 int ret;
213
214 if (handle == NULL)
215 return -EINVAL;
216
217 pp_handle = (struct pp_instance *)handle;
218 smumgr = pp_handle->smu_mgr;
219
220 if (smumgr == NULL || smumgr->smumgr_funcs == NULL ||
221 smumgr->smumgr_funcs->start_smu == NULL)
222 return -EINVAL;
223
224 ret = smumgr->smumgr_funcs->start_smu(smumgr);
225 if (ret) {
226 printk(KERN_ERR "[ powerplay ] smc start failed\n");
227 smumgr->smumgr_funcs->smu_fini(smumgr);
228 return ret;
229 }
230
231 eventmgr = pp_handle->eventmgr;
232 pem_handle_event(eventmgr, AMD_PP_EVENT_RESUME, &event_data);
233
234 return 0;
235 }
236
237 const struct amd_ip_funcs pp_ip_funcs = {
238 .early_init = pp_early_init,
239 .late_init = NULL,
240 .sw_init = pp_sw_init,
241 .sw_fini = pp_sw_fini,
242 .hw_init = pp_hw_init,
243 .hw_fini = pp_hw_fini,
244 .suspend = pp_suspend,
245 .resume = pp_resume,
246 .is_idle = pp_is_idle,
247 .wait_for_idle = pp_wait_for_idle,
248 .soft_reset = pp_sw_reset,
249 .print_status = pp_print_status,
250 .set_clockgating_state = pp_set_clockgating_state,
251 .set_powergating_state = pp_set_powergating_state,
252 };
253
254 static int pp_dpm_load_fw(void *handle)
255 {
256 return 0;
257 }
258
259 static int pp_dpm_fw_loading_complete(void *handle)
260 {
261 return 0;
262 }
263
264 static int pp_dpm_force_performance_level(void *handle,
265 enum amd_dpm_forced_level level)
266 {
267 struct pp_instance *pp_handle;
268 struct pp_hwmgr *hwmgr;
269
270 if (handle == NULL)
271 return -EINVAL;
272
273 pp_handle = (struct pp_instance *)handle;
274
275 hwmgr = pp_handle->hwmgr;
276
277 if (hwmgr == NULL || hwmgr->hwmgr_func == NULL ||
278 hwmgr->hwmgr_func->force_dpm_level == NULL)
279 return -EINVAL;
280
281 hwmgr->hwmgr_func->force_dpm_level(hwmgr, level);
282
283 return 0;
284 }
285
286 static enum amd_dpm_forced_level pp_dpm_get_performance_level(
287 void *handle)
288 {
289 struct pp_hwmgr *hwmgr;
290
291 if (handle == NULL)
292 return -EINVAL;
293
294 hwmgr = ((struct pp_instance *)handle)->hwmgr;
295
296 if (hwmgr == NULL)
297 return -EINVAL;
298
299 return (((struct pp_instance *)handle)->hwmgr->dpm_level);
300 }
301
302 static int pp_dpm_get_sclk(void *handle, bool low)
303 {
304 struct pp_hwmgr *hwmgr;
305
306 if (handle == NULL)
307 return -EINVAL;
308
309 hwmgr = ((struct pp_instance *)handle)->hwmgr;
310
311 if (hwmgr == NULL || hwmgr->hwmgr_func == NULL ||
312 hwmgr->hwmgr_func->get_sclk == NULL)
313 return -EINVAL;
314
315 return hwmgr->hwmgr_func->get_sclk(hwmgr, low);
316 }
317
318 static int pp_dpm_get_mclk(void *handle, bool low)
319 {
320 struct pp_hwmgr *hwmgr;
321
322 if (handle == NULL)
323 return -EINVAL;
324
325 hwmgr = ((struct pp_instance *)handle)->hwmgr;
326
327 if (hwmgr == NULL || hwmgr->hwmgr_func == NULL ||
328 hwmgr->hwmgr_func->get_mclk == NULL)
329 return -EINVAL;
330
331 return hwmgr->hwmgr_func->get_mclk(hwmgr, low);
332 }
333
334 static int pp_dpm_powergate_vce(void *handle, bool gate)
335 {
336 struct pp_hwmgr *hwmgr;
337
338 if (handle == NULL)
339 return -EINVAL;
340
341 hwmgr = ((struct pp_instance *)handle)->hwmgr;
342
343 if (hwmgr == NULL || hwmgr->hwmgr_func == NULL ||
344 hwmgr->hwmgr_func->powergate_vce == NULL)
345 return -EINVAL;
346
347 return hwmgr->hwmgr_func->powergate_vce(hwmgr, gate);
348 }
349
350 static int pp_dpm_powergate_uvd(void *handle, bool gate)
351 {
352 struct pp_hwmgr *hwmgr;
353
354 if (handle == NULL)
355 return -EINVAL;
356
357 hwmgr = ((struct pp_instance *)handle)->hwmgr;
358
359 if (hwmgr == NULL || hwmgr->hwmgr_func == NULL ||
360 hwmgr->hwmgr_func->powergate_uvd == NULL)
361 return -EINVAL;
362
363 return hwmgr->hwmgr_func->powergate_uvd(hwmgr, gate);
364 }
365
366 static enum PP_StateUILabel power_state_convert(enum amd_pm_state_type state)
367 {
368 switch (state) {
369 case POWER_STATE_TYPE_BATTERY:
370 return PP_StateUILabel_Battery;
371 case POWER_STATE_TYPE_BALANCED:
372 return PP_StateUILabel_Balanced;
373 case POWER_STATE_TYPE_PERFORMANCE:
374 return PP_StateUILabel_Performance;
375 default:
376 return PP_StateUILabel_None;
377 }
378 }
379
380 int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_event event_id, void *input, void *output)
381 {
382 int ret = 0;
383 struct pp_instance *pp_handle;
384 struct pem_event_data data = { {0} };
385
386 pp_handle = (struct pp_instance *)handle;
387
388 if (pp_handle == NULL)
389 return -EINVAL;
390
391 switch (event_id) {
392 case AMD_PP_EVENT_DISPLAY_CONFIG_CHANGE:
393 ret = pem_handle_event(pp_handle->eventmgr, event_id, &data);
394 break;
395 case AMD_PP_EVENT_ENABLE_USER_STATE:
396 {
397 enum amd_pm_state_type ps;
398
399 if (input == NULL)
400 return -EINVAL;
401 ps = *(unsigned long *)input;
402
403 data.requested_ui_label = power_state_convert(ps);
404 ret = pem_handle_event(pp_handle->eventmgr, event_id, &data);
405 break;
406 }
407 case AMD_PP_EVENT_COMPLETE_INIT:
408 ret = pem_handle_event(pp_handle->eventmgr, event_id, &data);
409 break;
410 default:
411 break;
412 }
413 return ret;
414 }
415
416 enum amd_pm_state_type pp_dpm_get_current_power_state(void *handle)
417 {
418 struct pp_hwmgr *hwmgr;
419 struct pp_power_state *state;
420
421 if (handle == NULL)
422 return -EINVAL;
423
424 hwmgr = ((struct pp_instance *)handle)->hwmgr;
425
426 if (hwmgr == NULL || hwmgr->current_ps == NULL)
427 return -EINVAL;
428
429 state = hwmgr->current_ps;
430
431 switch (state->classification.ui_label) {
432 case PP_StateUILabel_Battery:
433 return POWER_STATE_TYPE_BATTERY;
434 case PP_StateUILabel_Balanced:
435 return POWER_STATE_TYPE_BALANCED;
436 case PP_StateUILabel_Performance:
437 return POWER_STATE_TYPE_PERFORMANCE;
438 default:
439 return POWER_STATE_TYPE_DEFAULT;
440 }
441 }
442
443 static void
444 pp_debugfs_print_current_performance_level(void *handle,
445 struct seq_file *m)
446 {
447 struct pp_hwmgr *hwmgr;
448
449 if (handle == NULL)
450 return;
451
452 hwmgr = ((struct pp_instance *)handle)->hwmgr;
453
454 if (hwmgr == NULL || hwmgr->hwmgr_func == NULL ||
455 hwmgr->hwmgr_func->print_current_perforce_level == NULL)
456 return;
457
458 hwmgr->hwmgr_func->print_current_perforce_level(hwmgr, m);
459 }
460
461 static int pp_dpm_set_fan_control_mode(void *handle, uint32_t mode)
462 {
463 struct pp_hwmgr *hwmgr;
464
465 if (handle == NULL)
466 return -EINVAL;
467
468 hwmgr = ((struct pp_instance *)handle)->hwmgr;
469
470 if (hwmgr == NULL || hwmgr->hwmgr_func == NULL ||
471 hwmgr->hwmgr_func->set_fan_control_mode == NULL)
472 return -EINVAL;
473
474 return hwmgr->hwmgr_func->set_fan_control_mode(hwmgr, mode);
475 }
476
477 static int pp_dpm_get_fan_control_mode(void *handle)
478 {
479 struct pp_hwmgr *hwmgr;
480
481 if (handle == NULL)
482 return -EINVAL;
483
484 hwmgr = ((struct pp_instance *)handle)->hwmgr;
485
486 if (hwmgr == NULL || hwmgr->hwmgr_func == NULL ||
487 hwmgr->hwmgr_func->get_fan_control_mode == NULL)
488 return -EINVAL;
489
490 return hwmgr->hwmgr_func->get_fan_control_mode(hwmgr);
491 }
492
493 static int pp_dpm_set_fan_speed_percent(void *handle, uint32_t percent)
494 {
495 struct pp_hwmgr *hwmgr;
496
497 if (handle == NULL)
498 return -EINVAL;
499
500 hwmgr = ((struct pp_instance *)handle)->hwmgr;
501
502 if (hwmgr == NULL || hwmgr->hwmgr_func == NULL ||
503 hwmgr->hwmgr_func->set_fan_speed_percent == NULL)
504 return -EINVAL;
505
506 return hwmgr->hwmgr_func->set_fan_speed_percent(hwmgr, percent);
507 }
508
509 static int pp_dpm_get_fan_speed_percent(void *handle, uint32_t *speed)
510 {
511 struct pp_hwmgr *hwmgr;
512
513 if (handle == NULL)
514 return -EINVAL;
515
516 hwmgr = ((struct pp_instance *)handle)->hwmgr;
517
518 if (hwmgr == NULL || hwmgr->hwmgr_func == NULL ||
519 hwmgr->hwmgr_func->get_fan_speed_percent == NULL)
520 return -EINVAL;
521
522 return hwmgr->hwmgr_func->get_fan_speed_percent(hwmgr, speed);
523 }
524
525 static int pp_dpm_get_temperature(void *handle)
526 {
527 struct pp_hwmgr *hwmgr;
528
529 if (handle == NULL)
530 return -EINVAL;
531
532 hwmgr = ((struct pp_instance *)handle)->hwmgr;
533
534 if (hwmgr == NULL || hwmgr->hwmgr_func == NULL ||
535 hwmgr->hwmgr_func->get_temperature == NULL)
536 return -EINVAL;
537
538 return hwmgr->hwmgr_func->get_temperature(hwmgr);
539 }
540
541 const struct amd_powerplay_funcs pp_dpm_funcs = {
542 .get_temperature = pp_dpm_get_temperature,
543 .load_firmware = pp_dpm_load_fw,
544 .wait_for_fw_loading_complete = pp_dpm_fw_loading_complete,
545 .force_performance_level = pp_dpm_force_performance_level,
546 .get_performance_level = pp_dpm_get_performance_level,
547 .get_current_power_state = pp_dpm_get_current_power_state,
548 .get_sclk = pp_dpm_get_sclk,
549 .get_mclk = pp_dpm_get_mclk,
550 .powergate_vce = pp_dpm_powergate_vce,
551 .powergate_uvd = pp_dpm_powergate_uvd,
552 .dispatch_tasks = pp_dpm_dispatch_tasks,
553 .print_current_performance_level = pp_debugfs_print_current_performance_level,
554 .set_fan_control_mode = pp_dpm_set_fan_control_mode,
555 .get_fan_control_mode = pp_dpm_get_fan_control_mode,
556 .set_fan_speed_percent = pp_dpm_set_fan_speed_percent,
557 .get_fan_speed_percent = pp_dpm_get_fan_speed_percent,
558 };
559
560 static int amd_pp_instance_init(struct amd_pp_init *pp_init,
561 struct amd_powerplay *amd_pp)
562 {
563 int ret;
564 struct pp_instance *handle;
565
566 handle = kzalloc(sizeof(struct pp_instance), GFP_KERNEL);
567 if (handle == NULL)
568 return -ENOMEM;
569
570 handle->pp_valid = PP_VALID;
571
572 ret = smum_init(pp_init, handle);
573 if (ret)
574 goto fail_smum;
575
576 ret = hwmgr_init(pp_init, handle);
577 if (ret)
578 goto fail_hwmgr;
579
580 ret = eventmgr_init(handle);
581 if (ret)
582 goto fail_eventmgr;
583
584 amd_pp->pp_handle = handle;
585 return 0;
586
587 fail_eventmgr:
588 hwmgr_fini(handle->hwmgr);
589 fail_hwmgr:
590 smum_fini(handle->smu_mgr);
591 fail_smum:
592 kfree(handle);
593 return ret;
594 }
595
596 static int amd_pp_instance_fini(void *handle)
597 {
598 struct pp_instance *instance = (struct pp_instance *)handle;
599
600 if (instance == NULL)
601 return -EINVAL;
602
603 eventmgr_fini(instance->eventmgr);
604
605 hwmgr_fini(instance->hwmgr);
606
607 smum_fini(instance->smu_mgr);
608
609 kfree(handle);
610 return 0;
611 }
612
613 int amd_powerplay_init(struct amd_pp_init *pp_init,
614 struct amd_powerplay *amd_pp)
615 {
616 int ret;
617
618 if (pp_init == NULL || amd_pp == NULL)
619 return -EINVAL;
620
621 ret = amd_pp_instance_init(pp_init, amd_pp);
622
623 if (ret)
624 return ret;
625
626 amd_pp->ip_funcs = &pp_ip_funcs;
627 amd_pp->pp_funcs = &pp_dpm_funcs;
628
629 return 0;
630 }
631
632 int amd_powerplay_fini(void *handle)
633 {
634 amd_pp_instance_fini(handle);
635
636 return 0;
637 }
638
639 /* export this function to DAL */
640
641 int amd_powerplay_display_configuration_change(void *handle, const void *input)
642 {
643 struct pp_hwmgr *hwmgr;
644 const struct amd_pp_display_configuration *display_config = input;
645
646 PP_CHECK((struct pp_instance *)handle);
647
648 hwmgr = ((struct pp_instance *)handle)->hwmgr;
649
650 phm_store_dal_configuration_data(hwmgr, display_config);
651
652 return 0;
653 }
654
655 int amd_powerplay_get_display_power_level(void *handle,
656 struct amd_pp_dal_clock_info *output)
657 {
658 struct pp_hwmgr *hwmgr;
659
660 PP_CHECK((struct pp_instance *)handle);
661
662 if (output == NULL)
663 return -EINVAL;
664
665 hwmgr = ((struct pp_instance *)handle)->hwmgr;
666
667 return phm_get_dal_power_level(hwmgr, output);
668 }
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