regmap-i2c: Use i2c block command only if register value width is 8 bit
[deliverable/linux.git] / drivers / gpu / drm / amd / powerplay / hwmgr / polaris10_powertune.c
1 /*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24 #include "hwmgr.h"
25 #include "smumgr.h"
26 #include "polaris10_hwmgr.h"
27 #include "polaris10_powertune.h"
28 #include "polaris10_smumgr.h"
29 #include "smu74_discrete.h"
30 #include "pp_debug.h"
31
32 #define VOLTAGE_SCALE 4
33 #define POWERTUNE_DEFAULT_SET_MAX 1
34
35 static const struct polaris10_pt_defaults polaris10_power_tune_data_set_array[POWERTUNE_DEFAULT_SET_MAX] = {
36 /* sviLoadLIneEn, SviLoadLineVddC, TDC_VDDC_ThrottleReleaseLimitPerc, TDC_MAWt,
37 * TdcWaterfallCtl, DTEAmbientTempBase, DisplayCac, BAPM_TEMP_GRADIENT */
38 { 1, 0xF, 0xFD, 0x19, 5, 45, 0, 0xB0000,
39 { 0x79, 0x253, 0x25D, 0xAE, 0x72, 0x80, 0x83, 0x86, 0x6F, 0xC8, 0xC9, 0xC9, 0x2F, 0x4D, 0x61},
40 { 0x17C, 0x172, 0x180, 0x1BC, 0x1B3, 0x1BD, 0x206, 0x200, 0x203, 0x25D, 0x25A, 0x255, 0x2C3, 0x2C5, 0x2B4 } },
41 };
42
43 void polaris10_initialize_power_tune_defaults(struct pp_hwmgr *hwmgr)
44 {
45 struct polaris10_hwmgr *polaris10_hwmgr = (struct polaris10_hwmgr *)(hwmgr->backend);
46 struct phm_ppt_v1_information *table_info =
47 (struct phm_ppt_v1_information *)(hwmgr->pptable);
48
49 if (table_info &&
50 table_info->cac_dtp_table->usPowerTuneDataSetID <= POWERTUNE_DEFAULT_SET_MAX &&
51 table_info->cac_dtp_table->usPowerTuneDataSetID)
52 polaris10_hwmgr->power_tune_defaults =
53 &polaris10_power_tune_data_set_array
54 [table_info->cac_dtp_table->usPowerTuneDataSetID - 1];
55 else
56 polaris10_hwmgr->power_tune_defaults = &polaris10_power_tune_data_set_array[0];
57
58 }
59
60 static uint16_t scale_fan_gain_settings(uint16_t raw_setting)
61 {
62 uint32_t tmp;
63 tmp = raw_setting * 4096 / 100;
64 return (uint16_t)tmp;
65 }
66
67 int polaris10_populate_bapm_parameters_in_dpm_table(struct pp_hwmgr *hwmgr)
68 {
69 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend);
70 const struct polaris10_pt_defaults *defaults = data->power_tune_defaults;
71 SMU74_Discrete_DpmTable *dpm_table = &(data->smc_state_table);
72 struct phm_ppt_v1_information *table_info =
73 (struct phm_ppt_v1_information *)(hwmgr->pptable);
74 struct phm_cac_tdp_table *cac_dtp_table = table_info->cac_dtp_table;
75 struct pp_advance_fan_control_parameters *fan_table=
76 &hwmgr->thermal_controller.advanceFanControlParameters;
77 int i, j, k;
78 const uint16_t *pdef1;
79 const uint16_t *pdef2;
80
81 dpm_table->DefaultTdp = PP_HOST_TO_SMC_US((uint16_t)(cac_dtp_table->usTDP * 128));
82 dpm_table->TargetTdp = PP_HOST_TO_SMC_US((uint16_t)(cac_dtp_table->usTDP * 128));
83
84 PP_ASSERT_WITH_CODE(cac_dtp_table->usTargetOperatingTemp <= 255,
85 "Target Operating Temp is out of Range!",
86 );
87
88 dpm_table->TemperatureLimitEdge = PP_HOST_TO_SMC_US(
89 cac_dtp_table->usTargetOperatingTemp * 256);
90 dpm_table->TemperatureLimitHotspot = PP_HOST_TO_SMC_US(
91 cac_dtp_table->usTemperatureLimitHotspot * 256);
92 dpm_table->FanGainEdge = PP_HOST_TO_SMC_US(
93 scale_fan_gain_settings(fan_table->usFanGainEdge));
94 dpm_table->FanGainHotspot = PP_HOST_TO_SMC_US(
95 scale_fan_gain_settings(fan_table->usFanGainHotspot));
96
97 pdef1 = defaults->BAPMTI_R;
98 pdef2 = defaults->BAPMTI_RC;
99
100 for (i = 0; i < SMU74_DTE_ITERATIONS; i++) {
101 for (j = 0; j < SMU74_DTE_SOURCES; j++) {
102 for (k = 0; k < SMU74_DTE_SINKS; k++) {
103 dpm_table->BAPMTI_R[i][j][k] = PP_HOST_TO_SMC_US(*pdef1);
104 dpm_table->BAPMTI_RC[i][j][k] = PP_HOST_TO_SMC_US(*pdef2);
105 pdef1++;
106 pdef2++;
107 }
108 }
109 }
110
111 return 0;
112 }
113
114 static int polaris10_populate_svi_load_line(struct pp_hwmgr *hwmgr)
115 {
116 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend);
117 const struct polaris10_pt_defaults *defaults = data->power_tune_defaults;
118
119 data->power_tune_table.SviLoadLineEn = defaults->SviLoadLineEn;
120 data->power_tune_table.SviLoadLineVddC = defaults->SviLoadLineVddC;
121 data->power_tune_table.SviLoadLineTrimVddC = 3;
122 data->power_tune_table.SviLoadLineOffsetVddC = 0;
123
124 return 0;
125 }
126
127 static int polaris10_populate_tdc_limit(struct pp_hwmgr *hwmgr)
128 {
129 uint16_t tdc_limit;
130 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend);
131 struct phm_ppt_v1_information *table_info =
132 (struct phm_ppt_v1_information *)(hwmgr->pptable);
133 const struct polaris10_pt_defaults *defaults = data->power_tune_defaults;
134
135 tdc_limit = (uint16_t)(table_info->cac_dtp_table->usTDC * 128);
136 data->power_tune_table.TDC_VDDC_PkgLimit =
137 CONVERT_FROM_HOST_TO_SMC_US(tdc_limit);
138 data->power_tune_table.TDC_VDDC_ThrottleReleaseLimitPerc =
139 defaults->TDC_VDDC_ThrottleReleaseLimitPerc;
140 data->power_tune_table.TDC_MAWt = defaults->TDC_MAWt;
141
142 return 0;
143 }
144
145 static int polaris10_populate_dw8(struct pp_hwmgr *hwmgr, uint32_t fuse_table_offset)
146 {
147 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend);
148 const struct polaris10_pt_defaults *defaults = data->power_tune_defaults;
149 uint32_t temp;
150
151 if (polaris10_read_smc_sram_dword(hwmgr->smumgr,
152 fuse_table_offset +
153 offsetof(SMU74_Discrete_PmFuses, TdcWaterfallCtl),
154 (uint32_t *)&temp, data->sram_end))
155 PP_ASSERT_WITH_CODE(false,
156 "Attempt to read PmFuses.DW6 (SviLoadLineEn) from SMC Failed!",
157 return -EINVAL);
158 else {
159 data->power_tune_table.TdcWaterfallCtl = defaults->TdcWaterfallCtl;
160 data->power_tune_table.LPMLTemperatureMin =
161 (uint8_t)((temp >> 16) & 0xff);
162 data->power_tune_table.LPMLTemperatureMax =
163 (uint8_t)((temp >> 8) & 0xff);
164 data->power_tune_table.Reserved = (uint8_t)(temp & 0xff);
165 }
166 return 0;
167 }
168
169 static int polaris10_populate_temperature_scaler(struct pp_hwmgr *hwmgr)
170 {
171 int i;
172 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend);
173
174 /* Currently not used. Set all to zero. */
175 for (i = 0; i < 16; i++)
176 data->power_tune_table.LPMLTemperatureScaler[i] = 0;
177
178 return 0;
179 }
180
181 static int polaris10_populate_fuzzy_fan(struct pp_hwmgr *hwmgr)
182 {
183 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend);
184
185 if ((hwmgr->thermal_controller.advanceFanControlParameters.usFanOutputSensitivity & (1 << 15))
186 || 0 == hwmgr->thermal_controller.advanceFanControlParameters.usFanOutputSensitivity)
187 hwmgr->thermal_controller.advanceFanControlParameters.usFanOutputSensitivity =
188 hwmgr->thermal_controller.advanceFanControlParameters.usDefaultFanOutputSensitivity;
189
190 data->power_tune_table.FuzzyFan_PwmSetDelta = PP_HOST_TO_SMC_US(
191 hwmgr->thermal_controller.advanceFanControlParameters.usFanOutputSensitivity);
192 return 0;
193 }
194
195 static int polaris10_populate_gnb_lpml(struct pp_hwmgr *hwmgr)
196 {
197 int i;
198 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend);
199
200 /* Currently not used. Set all to zero. */
201 for (i = 0; i < 16; i++)
202 data->power_tune_table.GnbLPML[i] = 0;
203
204 return 0;
205 }
206
207 static int polaris10_min_max_vgnb_lpml_id_from_bapm_vddc(struct pp_hwmgr *hwmgr)
208 {
209 return 0;
210 }
211
212 static int polaris10_populate_bapm_vddc_base_leakage_sidd(struct pp_hwmgr *hwmgr)
213 {
214 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend);
215 struct phm_ppt_v1_information *table_info =
216 (struct phm_ppt_v1_information *)(hwmgr->pptable);
217 uint16_t hi_sidd = data->power_tune_table.BapmVddCBaseLeakageHiSidd;
218 uint16_t lo_sidd = data->power_tune_table.BapmVddCBaseLeakageLoSidd;
219 struct phm_cac_tdp_table *cac_table = table_info->cac_dtp_table;
220
221 hi_sidd = (uint16_t)(cac_table->usHighCACLeakage / 100 * 256);
222 lo_sidd = (uint16_t)(cac_table->usLowCACLeakage / 100 * 256);
223
224 data->power_tune_table.BapmVddCBaseLeakageHiSidd =
225 CONVERT_FROM_HOST_TO_SMC_US(hi_sidd);
226 data->power_tune_table.BapmVddCBaseLeakageLoSidd =
227 CONVERT_FROM_HOST_TO_SMC_US(lo_sidd);
228
229 return 0;
230 }
231
232 int polaris10_populate_pm_fuses(struct pp_hwmgr *hwmgr)
233 {
234 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend);
235 uint32_t pm_fuse_table_offset;
236
237 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
238 PHM_PlatformCaps_PowerContainment)) {
239 if (polaris10_read_smc_sram_dword(hwmgr->smumgr,
240 SMU7_FIRMWARE_HEADER_LOCATION +
241 offsetof(SMU74_Firmware_Header, PmFuseTable),
242 &pm_fuse_table_offset, data->sram_end))
243 PP_ASSERT_WITH_CODE(false,
244 "Attempt to get pm_fuse_table_offset Failed!",
245 return -EINVAL);
246
247 if (polaris10_populate_svi_load_line(hwmgr))
248 PP_ASSERT_WITH_CODE(false,
249 "Attempt to populate SviLoadLine Failed!",
250 return -EINVAL);
251
252 if (polaris10_populate_tdc_limit(hwmgr))
253 PP_ASSERT_WITH_CODE(false,
254 "Attempt to populate TDCLimit Failed!", return -EINVAL);
255
256 if (polaris10_populate_dw8(hwmgr, pm_fuse_table_offset))
257 PP_ASSERT_WITH_CODE(false,
258 "Attempt to populate TdcWaterfallCtl, "
259 "LPMLTemperature Min and Max Failed!",
260 return -EINVAL);
261
262 if (0 != polaris10_populate_temperature_scaler(hwmgr))
263 PP_ASSERT_WITH_CODE(false,
264 "Attempt to populate LPMLTemperatureScaler Failed!",
265 return -EINVAL);
266
267 if (polaris10_populate_fuzzy_fan(hwmgr))
268 PP_ASSERT_WITH_CODE(false,
269 "Attempt to populate Fuzzy Fan Control parameters Failed!",
270 return -EINVAL);
271
272 if (polaris10_populate_gnb_lpml(hwmgr))
273 PP_ASSERT_WITH_CODE(false,
274 "Attempt to populate GnbLPML Failed!",
275 return -EINVAL);
276
277 if (polaris10_min_max_vgnb_lpml_id_from_bapm_vddc(hwmgr))
278 PP_ASSERT_WITH_CODE(false,
279 "Attempt to populate GnbLPML Min and Max Vid Failed!",
280 return -EINVAL);
281
282 if (polaris10_populate_bapm_vddc_base_leakage_sidd(hwmgr))
283 PP_ASSERT_WITH_CODE(false,
284 "Attempt to populate BapmVddCBaseLeakage Hi and Lo "
285 "Sidd Failed!", return -EINVAL);
286
287 if (polaris10_copy_bytes_to_smc(hwmgr->smumgr, pm_fuse_table_offset,
288 (uint8_t *)&data->power_tune_table,
289 sizeof(struct SMU74_Discrete_PmFuses), data->sram_end))
290 PP_ASSERT_WITH_CODE(false,
291 "Attempt to download PmFuseTable Failed!",
292 return -EINVAL);
293 }
294 return 0;
295 }
296
297 int polaris10_enable_smc_cac(struct pp_hwmgr *hwmgr)
298 {
299 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend);
300 int result = 0;
301
302 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
303 PHM_PlatformCaps_CAC)) {
304 int smc_result;
305 smc_result = smum_send_msg_to_smc(hwmgr->smumgr,
306 (uint16_t)(PPSMC_MSG_EnableCac));
307 PP_ASSERT_WITH_CODE((0 == smc_result),
308 "Failed to enable CAC in SMC.", result = -1);
309
310 data->cac_enabled = (0 == smc_result) ? true : false;
311 }
312 return result;
313 }
314
315 int polaris10_set_power_limit(struct pp_hwmgr *hwmgr, uint32_t n)
316 {
317 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend);
318
319 if (data->power_containment_features &
320 POWERCONTAINMENT_FEATURE_PkgPwrLimit)
321 return smum_send_msg_to_smc_with_parameter(hwmgr->smumgr,
322 PPSMC_MSG_PkgPwrSetLimit, n);
323 return 0;
324 }
325
326 static int polaris10_set_overdriver_target_tdp(struct pp_hwmgr *pHwMgr, uint32_t target_tdp)
327 {
328 return smum_send_msg_to_smc_with_parameter(pHwMgr->smumgr,
329 PPSMC_MSG_OverDriveSetTargetTdp, target_tdp);
330 }
331
332 int polaris10_enable_power_containment(struct pp_hwmgr *hwmgr)
333 {
334 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend);
335 struct phm_ppt_v1_information *table_info =
336 (struct phm_ppt_v1_information *)(hwmgr->pptable);
337 int smc_result;
338 int result = 0;
339
340 data->power_containment_features = 0;
341 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
342 PHM_PlatformCaps_PowerContainment)) {
343
344 if (data->enable_tdc_limit_feature) {
345 smc_result = smum_send_msg_to_smc(hwmgr->smumgr,
346 (uint16_t)(PPSMC_MSG_TDCLimitEnable));
347 PP_ASSERT_WITH_CODE((0 == smc_result),
348 "Failed to enable TDCLimit in SMC.", result = -1;);
349 if (0 == smc_result)
350 data->power_containment_features |=
351 POWERCONTAINMENT_FEATURE_TDCLimit;
352 }
353
354 if (data->enable_pkg_pwr_tracking_feature) {
355 smc_result = smum_send_msg_to_smc(hwmgr->smumgr,
356 (uint16_t)(PPSMC_MSG_PkgPwrLimitEnable));
357 PP_ASSERT_WITH_CODE((0 == smc_result),
358 "Failed to enable PkgPwrTracking in SMC.", result = -1;);
359 if (0 == smc_result) {
360 struct phm_cac_tdp_table *cac_table =
361 table_info->cac_dtp_table;
362 uint32_t default_limit =
363 (uint32_t)(cac_table->usMaximumPowerDeliveryLimit * 256);
364
365 data->power_containment_features |=
366 POWERCONTAINMENT_FEATURE_PkgPwrLimit;
367
368 if (polaris10_set_power_limit(hwmgr, default_limit))
369 printk(KERN_ERR "Failed to set Default Power Limit in SMC!");
370 }
371 }
372 }
373 return result;
374 }
375
376 int polaris10_power_control_set_level(struct pp_hwmgr *hwmgr)
377 {
378 struct phm_ppt_v1_information *table_info =
379 (struct phm_ppt_v1_information *)(hwmgr->pptable);
380 struct phm_cac_tdp_table *cac_table = table_info->cac_dtp_table;
381 int adjust_percent, target_tdp;
382 int result = 0;
383
384 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
385 PHM_PlatformCaps_PowerContainment)) {
386 /* adjustment percentage has already been validated */
387 adjust_percent = hwmgr->platform_descriptor.TDPAdjustmentPolarity ?
388 hwmgr->platform_descriptor.TDPAdjustment :
389 (-1 * hwmgr->platform_descriptor.TDPAdjustment);
390 /* SMC requested that target_tdp to be 7 bit fraction in DPM table
391 * but message to be 8 bit fraction for messages
392 */
393 target_tdp = ((100 + adjust_percent) * (int)(cac_table->usTDP * 256)) / 100;
394 result = polaris10_set_overdriver_target_tdp(hwmgr, (uint32_t)target_tdp);
395 }
396
397 return result;
398 }
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