drivers/gpu/drm/amd/powerplay/hwmgr/tonga_dyn_defaults.h

   1 /*
   2  * Copyright 2015 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23 #ifndef TONGA_DYN_DEFAULTS_H
  24 #define TONGA_DYN_DEFAULTS_H
  25
  26
  27 /** \file
  28  * Volcanic Islands Dynamic default parameters.
  29  */
  30
  31 enum TONGAdpm_TrendDetection {
  32         TONGAdpm_TrendDetection_AUTO,
  33         TONGAdpm_TrendDetection_UP,
  34         TONGAdpm_TrendDetection_DOWN
  35 };
  36 typedef enum TONGAdpm_TrendDetection TONGAdpm_TrendDetection;
  37
  38 /* Bit vector representing same fields as hardware register. */
  39 #define PPTONGA_VOTINGRIGHTSCLIENTS_DFLT0              0x3FFFC102  /* CP_Gfx_busy */
  40 /* HDP_busy */
  41 /* IH_busy */
  42 /* DRM_busy */
  43 /* DRMDMA_busy */
  44 /* UVD_busy */
  45 /* VCE_busy */
  46 /* ACP_busy */
  47 /* SAMU_busy */
  48 /* AVP_busy  */
  49 /* SDMA enabled */
  50 #define PPTONGA_VOTINGRIGHTSCLIENTS_DFLT1              0x000400  /* FE_Gfx_busy  - Intended for primary usage.   Rest are for flexibility. */
  51 /* SH_Gfx_busy */
  52 /* RB_Gfx_busy */
  53 /* VCE_busy */
  54
  55 #define PPTONGA_VOTINGRIGHTSCLIENTS_DFLT2              0xC00080  /* SH_Gfx_busy - Intended for primary usage.   Rest are for flexibility. */
  56 /* FE_Gfx_busy */
  57 /* RB_Gfx_busy */
  58 /* ACP_busy */
  59
  60 #define PPTONGA_VOTINGRIGHTSCLIENTS_DFLT3              0xC00200  /* RB_Gfx_busy - Intended for primary usage.   Rest are for flexibility. */
  61 /* FE_Gfx_busy */
  62 /* SH_Gfx_busy */
  63 /* UVD_busy */
  64
  65 #define PPTONGA_VOTINGRIGHTSCLIENTS_DFLT4              0xC01680  /* UVD_busy */
  66 /* VCE_busy */
  67 /* ACP_busy */
  68 /* SAMU_busy */
  69
  70 #define PPTONGA_VOTINGRIGHTSCLIENTS_DFLT5              0xC00033  /* GFX, HDP, DRMDMA */
  71 #define PPTONGA_VOTINGRIGHTSCLIENTS_DFLT6              0xC00033  /* GFX, HDP, DRMDMA */
  72 #define PPTONGA_VOTINGRIGHTSCLIENTS_DFLT7              0x3FFFC000  /* GFX, HDP, DRMDMA */
  73
  74
  75 /* thermal protection counter (units).*/
  76 #define PPTONGA_THERMALPROTECTCOUNTER_DFLT            0x200 /* ~19us */
  77
  78 /* static screen threshold unit */
  79 #define PPTONGA_STATICSCREENTHRESHOLDUNIT_DFLT        0
  80
  81 /* static screen threshold */
  82 #define PPTONGA_STATICSCREENTHRESHOLD_DFLT            0x00C8
  83
  84 /* gfx idle clock stop threshold */
  85 #define PPTONGA_GFXIDLECLOCKSTOPTHRESHOLD_DFLT        0x200 /* ~19us with static screen threshold unit of 0 */
  86
  87 /* Fixed reference divider to use when building baby stepping tables. */
  88 #define PPTONGA_REFERENCEDIVIDER_DFLT                  4
  89
  90 /*
  91  * ULV voltage change delay time
  92  * Used to be delay_vreg in N.I. split for S.I.
  93  * Using N.I. delay_vreg value as default
  94  * ReferenceClock = 2700
  95  * VoltageResponseTime = 1000
  96  * VDDCDelayTime = (VoltageResponseTime * ReferenceClock) / 1600 = 1687
  97  */
  98
  99 #define PPTONGA_ULVVOLTAGECHANGEDELAY_DFLT             1687
 100
 101 #define PPTONGA_CGULVPARAMETER_DFLT                    0x00040035
 102 #define PPTONGA_CGULVCONTROL_DFLT                      0x00007450
 103 #define PPTONGA_TARGETACTIVITY_DFLT                     30  /*30%  */
 104 #define PPTONGA_MCLK_TARGETACTIVITY_DFLT                10  /*10%  */
 105
 106 #endif
 107