drivers/gpu/drm/drm_dp_helper.c

   1 /*
   2  * Copyright © 2009 Keith Packard
   3  *
   4  * Permission to use, copy, modify, distribute, and sell this software and its
   5  * documentation for any purpose is hereby granted without fee, provided that
   6  * the above copyright notice appear in all copies and that both that copyright
   7  * notice and this permission notice appear in supporting documentation, and
   8  * that the name of the copyright holders not be used in advertising or
   9  * publicity pertaining to distribution of the software without specific,
  10  * written prior permission.  The copyright holders make no representations
  11  * about the suitability of this software for any purpose.  It is provided "as
  12  * is" without express or implied warranty.
  13  *
  14  * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  15  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
  16  * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  17  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  18  * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  19  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
  20  * OF THIS SOFTWARE.
  21  */
  22
  23 #include <linux/kernel.h>
  24 #include <linux/module.h>
  25 #include <linux/delay.h>
  26 #include <linux/init.h>
  27 #include <linux/errno.h>
  28 #include <linux/sched.h>
  29 #include <linux/i2c.h>
  30 #include <drm/drm_dp_helper.h>
  31 #include <drm/drmP.h>
  32
  33 /**
  34  * DOC: dp helpers
  35  *
  36  * These functions contain some common logic and helpers at various abstraction
  37  * levels to deal with Display Port sink devices and related things like DP aux
  38  * channel transfers, EDID reading over DP aux channels, decoding certain DPCD
  39  * blocks, ...
  40  */
  41
  42 /* Helpers for DP link training */
  43 static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r)
  44 {
  45         return link_status[r - DP_LANE0_1_STATUS];
  46 }
  47
  48 static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE],
  49                              int lane)
  50 {
  51         int i = DP_LANE0_1_STATUS + (lane >> 1);
  52         int s = (lane & 1) * 4;
  53         u8 l = dp_link_status(link_status, i);
  54         return (l >> s) & 0xf;
  55 }
  56
  57 bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
  58                           int lane_count)
  59 {
  60         u8 lane_align;
  61         u8 lane_status;
  62         int lane;
  63
  64         lane_align = dp_link_status(link_status,
  65                                     DP_LANE_ALIGN_STATUS_UPDATED);
  66         if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0)
  67                 return false;
  68         for (lane = 0; lane < lane_count; lane++) {
  69                 lane_status = dp_get_lane_status(link_status, lane);
  70                 if ((lane_status & DP_CHANNEL_EQ_BITS) != DP_CHANNEL_EQ_BITS)
  71                         return false;
  72         }
  73         return true;
  74 }
  75 EXPORT_SYMBOL(drm_dp_channel_eq_ok);
  76
  77 bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
  78                               int lane_count)
  79 {
  80         int lane;
  81         u8 lane_status;
  82
  83         for (lane = 0; lane < lane_count; lane++) {
  84                 lane_status = dp_get_lane_status(link_status, lane);
  85                 if ((lane_status & DP_LANE_CR_DONE) == 0)
  86                         return false;
  87         }
  88         return true;
  89 }
  90 EXPORT_SYMBOL(drm_dp_clock_recovery_ok);
  91
  92 u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE],
  93                                      int lane)
  94 {
  95         int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
  96         int s = ((lane & 1) ?
  97                  DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT :
  98                  DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT);
  99         u8 l = dp_link_status(link_status, i);
 100
 101         return ((l >> s) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT;
 102 }
 103 EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage);
 104
 105 u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE],
 106                                           int lane)
 107 {
 108         int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
 109         int s = ((lane & 1) ?
 110                  DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT :
 111                  DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT);
 112         u8 l = dp_link_status(link_status, i);
 113
 114         return ((l >> s) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT;
 115 }
 116 EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis);
 117
 118 void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
 119         if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
 120                 udelay(100);
 121         else
 122                 mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
 123 }
 124 EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay);
 125
 126 void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
 127         if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
 128                 udelay(400);
 129         else
 130                 mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
 131 }
 132 EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay);
 133
 134 u8 drm_dp_link_rate_to_bw_code(int link_rate)
 135 {
 136         switch (link_rate) {
 137         case 162000:
 138         default:
 139                 return DP_LINK_BW_1_62;
 140         case 270000:
 141                 return DP_LINK_BW_2_7;
 142         case 540000:
 143                 return DP_LINK_BW_5_4;
 144         }
 145 }
 146 EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code);
 147
 148 int drm_dp_bw_code_to_link_rate(u8 link_bw)
 149 {
 150         switch (link_bw) {
 151         case DP_LINK_BW_1_62:
 152         default:
 153                 return 162000;
 154         case DP_LINK_BW_2_7:
 155                 return 270000;
 156         case DP_LINK_BW_5_4:
 157                 return 540000;
 158         }
 159 }
 160 EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate);
 161
 162 #define AUX_RETRY_INTERVAL 500 /* us */
 163
 164 /**
 165  * DOC: dp helpers
 166  *
 167  * The DisplayPort AUX channel is an abstraction to allow generic, driver-
 168  * independent access to AUX functionality. Drivers can take advantage of
 169  * this by filling in the fields of the drm_dp_aux structure.
 170  *
 171  * Transactions are described using a hardware-independent drm_dp_aux_msg
 172  * structure, which is passed into a driver's .transfer() implementation.
 173  * Both native and I2C-over-AUX transactions are supported.
 174  */
 175
 176 static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request,
 177                               unsigned int offset, void *buffer, size_t size)
 178 {
 179         struct drm_dp_aux_msg msg;
 180         unsigned int retry;
 181         int err;
 182
 183         memset(&msg, 0, sizeof(msg));
 184         msg.address = offset;
 185         msg.request = request;
 186         msg.buffer = buffer;
 187         msg.size = size;
 188
 189         /*
 190          * The specification doesn't give any recommendation on how often to
 191          * retry native transactions. We used to retry 7 times like for
 192          * aux i2c transactions but real world devices this wasn't
 193          * sufficient, bump to 32 which makes Dell 4k monitors happier.
 194          */
 195         for (retry = 0; retry < 32; retry++) {
 196
 197                 mutex_lock(&aux->hw_mutex);
 198                 err = aux->transfer(aux, &msg);
 199                 mutex_unlock(&aux->hw_mutex);
 200                 if (err < 0) {
 201                         if (err == -EBUSY)
 202                                 continue;
 203
 204                         return err;
 205                 }
 206
 207
 208                 switch (msg.reply & DP_AUX_NATIVE_REPLY_MASK) {
 209                 case DP_AUX_NATIVE_REPLY_ACK:
 210                         if (err < size)
 211                                 return -EPROTO;
 212                         return err;
 213
 214                 case DP_AUX_NATIVE_REPLY_NACK:
 215                         return -EIO;
 216
 217                 case DP_AUX_NATIVE_REPLY_DEFER:
 218                         usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100);
 219                         break;
 220                 }
 221         }
 222
 223         DRM_DEBUG_KMS("too many retries, giving up\n");
 224         return -EIO;
 225 }
 226
 227 /**
 228  * drm_dp_dpcd_read() - read a series of bytes from the DPCD
 229  * @aux: DisplayPort AUX channel
 230  * @offset: address of the (first) register to read
 231  * @buffer: buffer to store the register values
 232  * @size: number of bytes in @buffer
 233  *
 234  * Returns the number of bytes transferred on success, or a negative error
 235  * code on failure. -EIO is returned if the request was NAKed by the sink or
 236  * if the retry count was exceeded. If not all bytes were transferred, this
 237  * function returns -EPROTO. Errors from the underlying AUX channel transfer
 238  * function, with the exception of -EBUSY (which causes the transaction to
 239  * be retried), are propagated to the caller.
 240  */
 241 ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset,
 242                          void *buffer, size_t size)
 243 {
 244         return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset, buffer,
 245                                   size);
 246 }
 247 EXPORT_SYMBOL(drm_dp_dpcd_read);
 248
 249 /**
 250  * drm_dp_dpcd_write() - write a series of bytes to the DPCD
 251  * @aux: DisplayPort AUX channel
 252  * @offset: address of the (first) register to write
 253  * @buffer: buffer containing the values to write
 254  * @size: number of bytes in @buffer
 255  *
 256  * Returns the number of bytes transferred on success, or a negative error
 257  * code on failure. -EIO is returned if the request was NAKed by the sink or
 258  * if the retry count was exceeded. If not all bytes were transferred, this
 259  * function returns -EPROTO. Errors from the underlying AUX channel transfer
 260  * function, with the exception of -EBUSY (which causes the transaction to
 261  * be retried), are propagated to the caller.
 262  */
 263 ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset,
 264                           void *buffer, size_t size)
 265 {
 266         return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer,
 267                                   size);
 268 }
 269 EXPORT_SYMBOL(drm_dp_dpcd_write);
 270
 271 /**
 272  * drm_dp_dpcd_read_link_status() - read DPCD link status (bytes 0x202-0x207)
 273  * @aux: DisplayPort AUX channel
 274  * @status: buffer to store the link status in (must be at least 6 bytes)
 275  *
 276  * Returns the number of bytes transferred on success or a negative error
 277  * code on failure.
 278  */
 279 int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux,
 280                                  u8 status[DP_LINK_STATUS_SIZE])
 281 {
 282         return drm_dp_dpcd_read(aux, DP_LANE0_1_STATUS, status,
 283                                 DP_LINK_STATUS_SIZE);
 284 }
 285 EXPORT_SYMBOL(drm_dp_dpcd_read_link_status);
 286
 287 /**
 288  * drm_dp_link_probe() - probe a DisplayPort link for capabilities
 289  * @aux: DisplayPort AUX channel
 290  * @link: pointer to structure in which to return link capabilities
 291  *
 292  * The structure filled in by this function can usually be passed directly
 293  * into drm_dp_link_power_up() and drm_dp_link_configure() to power up and
 294  * configure the link based on the link's capabilities.
 295  *
 296  * Returns 0 on success or a negative error code on failure.
 297  */
 298 int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link)
 299 {
 300         u8 values[3];
 301         int err;
 302
 303         memset(link, 0, sizeof(*link));
 304
 305         err = drm_dp_dpcd_read(aux, DP_DPCD_REV, values, sizeof(values));
 306         if (err < 0)
 307                 return err;
 308
 309         link->revision = values[0];
 310         link->rate = drm_dp_bw_code_to_link_rate(values[1]);
 311         link->num_lanes = values[2] & DP_MAX_LANE_COUNT_MASK;
 312
 313         if (values[2] & DP_ENHANCED_FRAME_CAP)
 314                 link->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING;
 315
 316         return 0;
 317 }
 318 EXPORT_SYMBOL(drm_dp_link_probe);
 319
 320 /**
 321  * drm_dp_link_power_up() - power up a DisplayPort link
 322  * @aux: DisplayPort AUX channel
 323  * @link: pointer to a structure containing the link configuration
 324  *
 325  * Returns 0 on success or a negative error code on failure.
 326  */
 327 int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link)
 328 {
 329         u8 value;
 330         int err;
 331
 332         /* DP_SET_POWER register is only available on DPCD v1.1 and later */
 333         if (link->revision < 0x11)
 334                 return 0;
 335
 336         err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
 337         if (err < 0)
 338                 return err;
 339
 340         value &= ~DP_SET_POWER_MASK;
 341         value |= DP_SET_POWER_D0;
 342
 343         err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
 344         if (err < 0)
 345                 return err;
 346
 347         /*
 348          * According to the DP 1.1 specification, a "Sink Device must exit the
 349          * power saving state within 1 ms" (Section 2.5.3.1, Table 5-52, "Sink
 350          * Control Field" (register 0x600).
 351          */
 352         usleep_range(1000, 2000);
 353
 354         return 0;
 355 }
 356 EXPORT_SYMBOL(drm_dp_link_power_up);
 357
 358 /**
 359  * drm_dp_link_power_down() - power down a DisplayPort link
 360  * @aux: DisplayPort AUX channel
 361  * @link: pointer to a structure containing the link configuration
 362  *
 363  * Returns 0 on success or a negative error code on failure.
 364  */
 365 int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link)
 366 {
 367         u8 value;
 368         int err;
 369
 370         /* DP_SET_POWER register is only available on DPCD v1.1 and later */
 371         if (link->revision < 0x11)
 372                 return 0;
 373
 374         err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
 375         if (err < 0)
 376                 return err;
 377
 378         value &= ~DP_SET_POWER_MASK;
 379         value |= DP_SET_POWER_D3;
 380
 381         err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
 382         if (err < 0)
 383                 return err;
 384
 385         return 0;
 386 }
 387 EXPORT_SYMBOL(drm_dp_link_power_down);
 388
 389 /**
 390  * drm_dp_link_configure() - configure a DisplayPort link
 391  * @aux: DisplayPort AUX channel
 392  * @link: pointer to a structure containing the link configuration
 393  *
 394  * Returns 0 on success or a negative error code on failure.
 395  */
 396 int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link)
 397 {
 398         u8 values[2];
 399         int err;
 400
 401         values[0] = drm_dp_link_rate_to_bw_code(link->rate);
 402         values[1] = link->num_lanes;
 403
 404         if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING)
 405                 values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
 406
 407         err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values));
 408         if (err < 0)
 409                 return err;
 410
 411         return 0;
 412 }
 413 EXPORT_SYMBOL(drm_dp_link_configure);
 414
 415 /*
 416  * I2C-over-AUX implementation
 417  */
 418
 419 static u32 drm_dp_i2c_functionality(struct i2c_adapter *adapter)
 420 {
 421         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
 422                I2C_FUNC_SMBUS_READ_BLOCK_DATA |
 423                I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
 424                I2C_FUNC_10BIT_ADDR;
 425 }
 426
 427 static void drm_dp_i2c_msg_write_status_update(struct drm_dp_aux_msg *msg)
 428 {
 429         /*
 430          * In case of i2c defer or short i2c ack reply to a write,
 431          * we need to switch to WRITE_STATUS_UPDATE to drain the
 432          * rest of the message
 433          */
 434         if ((msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_I2C_WRITE) {
 435                 msg->request &= DP_AUX_I2C_MOT;
 436                 msg->request |= DP_AUX_I2C_WRITE_STATUS_UPDATE;
 437         }
 438 }
 439
 440 #define AUX_PRECHARGE_LEN 10 /* 10 to 16 */
 441 #define AUX_SYNC_LEN (16 + 4) /* preamble + AUX_SYNC_END */
 442 #define AUX_STOP_LEN 4
 443 #define AUX_CMD_LEN 4
 444 #define AUX_ADDRESS_LEN 20
 445 #define AUX_REPLY_PAD_LEN 4
 446 #define AUX_LENGTH_LEN 8
 447
 448 /*
 449  * Calculate the duration of the AUX request/reply in usec. Gives the
 450  * "best" case estimate, ie. successful while as short as possible.
 451  */
 452 static int drm_dp_aux_req_duration(const struct drm_dp_aux_msg *msg)
 453 {
 454         int len = AUX_PRECHARGE_LEN + AUX_SYNC_LEN + AUX_STOP_LEN +
 455                 AUX_CMD_LEN + AUX_ADDRESS_LEN + AUX_LENGTH_LEN;
 456
 457         if ((msg->request & DP_AUX_I2C_READ) == 0)
 458                 len += msg->size * 8;
 459
 460         return len;
 461 }
 462
 463 static int drm_dp_aux_reply_duration(const struct drm_dp_aux_msg *msg)
 464 {
 465         int len = AUX_PRECHARGE_LEN + AUX_SYNC_LEN + AUX_STOP_LEN +
 466                 AUX_CMD_LEN + AUX_REPLY_PAD_LEN;
 467
 468         /*
 469          * For read we expect what was asked. For writes there will
 470          * be 0 or 1 data bytes. Assume 0 for the "best" case.
 471          */
 472         if (msg->request & DP_AUX_I2C_READ)
 473                 len += msg->size * 8;
 474
 475         return len;
 476 }
 477
 478 #define I2C_START_LEN 1
 479 #define I2C_STOP_LEN 1
 480 #define I2C_ADDR_LEN 9 /* ADDRESS + R/W + ACK/NACK */
 481 #define I2C_DATA_LEN 9 /* DATA + ACK/NACK */
 482
 483 /*
 484  * Calculate the length of the i2c transfer in usec, assuming
 485  * the i2c bus speed is as specified. Gives the the "worst"
 486  * case estimate, ie. successful while as long as possible.
 487  * Doesn't account the the "MOT" bit, and instead assumes each
 488  * message includes a START, ADDRESS and STOP. Neither does it
 489  * account for additional random variables such as clock stretching.
 490  */
 491 static int drm_dp_i2c_msg_duration(const struct drm_dp_aux_msg *msg,
 492                                    int i2c_speed_khz)
 493 {
 494         /* AUX bitrate is 1MHz, i2c bitrate as specified */
 495         return DIV_ROUND_UP((I2C_START_LEN + I2C_ADDR_LEN +
 496                              msg->size * I2C_DATA_LEN +
 497                              I2C_STOP_LEN) * 1000, i2c_speed_khz);
 498 }
 499
 500 /*
 501  * Deterine how many retries should be attempted to successfully transfer
 502  * the specified message, based on the estimated durations of the
 503  * i2c and AUX transfers.
 504  */
 505 static int drm_dp_i2c_retry_count(const struct drm_dp_aux_msg *msg,
 506                               int i2c_speed_khz)
 507 {
 508         int aux_time_us = drm_dp_aux_req_duration(msg) +
 509                 drm_dp_aux_reply_duration(msg);
 510         int i2c_time_us = drm_dp_i2c_msg_duration(msg, i2c_speed_khz);
 511
 512         return DIV_ROUND_UP(i2c_time_us, aux_time_us + AUX_RETRY_INTERVAL);
 513 }
 514
 515 /*
 516  * FIXME currently assumes 10 kHz as some real world devices seem
 517  * to require it. We should query/set the speed via DPCD if supported.
 518  */
 519 static int dp_aux_i2c_speed_khz __read_mostly = 10;
 520 module_param_unsafe(dp_aux_i2c_speed_khz, int, 0644);
 521 MODULE_PARM_DESC(dp_aux_i2c_speed_khz,
 522                  "Assumed speed of the i2c bus in kHz, (1-400, default 10)");
 523
 524 /*
 525  * Transfer a single I2C-over-AUX message and handle various error conditions,
 526  * retrying the transaction as appropriate.  It is assumed that the
 527  * aux->transfer function does not modify anything in the msg other than the
 528  * reply field.
 529  *
 530  * Returns bytes transferred on success, or a negative error code on failure.
 531  */
 532 static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 533 {
 534         unsigned int retry, defer_i2c;
 535         int ret;
 536         /*
 537          * DP1.2 sections 2.7.7.1.5.6.1 and 2.7.7.1.6.6.1: A DP Source device
 538          * is required to retry at least seven times upon receiving AUX_DEFER
 539          * before giving up the AUX transaction.
 540          *
 541          * We also try to account for the i2c bus speed.
 542          */
 543         int max_retries = max(7, drm_dp_i2c_retry_count(msg, dp_aux_i2c_speed_khz));
 544
 545         for (retry = 0, defer_i2c = 0; retry < (max_retries + defer_i2c); retry++) {
 546                 mutex_lock(&aux->hw_mutex);
 547                 ret = aux->transfer(aux, msg);
 548                 mutex_unlock(&aux->hw_mutex);
 549                 if (ret < 0) {
 550                         if (ret == -EBUSY)
 551                                 continue;
 552
 553                         DRM_DEBUG_KMS("transaction failed: %d\n", ret);
 554                         return ret;
 555                 }
 556
 557
 558                 switch (msg->reply & DP_AUX_NATIVE_REPLY_MASK) {
 559                 case DP_AUX_NATIVE_REPLY_ACK:
 560                         /*
 561                          * For I2C-over-AUX transactions this isn't enough, we
 562                          * need to check for the I2C ACK reply.
 563                          */
 564                         break;
 565
 566                 case DP_AUX_NATIVE_REPLY_NACK:
 567                         DRM_DEBUG_KMS("native nack (result=%d, size=%zu)\n", ret, msg->size);
 568                         return -EREMOTEIO;
 569
 570                 case DP_AUX_NATIVE_REPLY_DEFER:
 571                         DRM_DEBUG_KMS("native defer\n");
 572                         /*
 573                          * We could check for I2C bit rate capabilities and if
 574                          * available adjust this interval. We could also be
 575                          * more careful with DP-to-legacy adapters where a
 576                          * long legacy cable may force very low I2C bit rates.
 577                          *
 578                          * For now just defer for long enough to hopefully be
 579                          * safe for all use-cases.
 580                          */
 581                         usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100);
 582                         continue;
 583
 584                 default:
 585                         DRM_ERROR("invalid native reply %#04x\n", msg->reply);
 586                         return -EREMOTEIO;
 587                 }
 588
 589                 switch (msg->reply & DP_AUX_I2C_REPLY_MASK) {
 590                 case DP_AUX_I2C_REPLY_ACK:
 591                         /*
 592                          * Both native ACK and I2C ACK replies received. We
 593                          * can assume the transfer was successful.
 594                          */
 595                         if (ret != msg->size)
 596                                 drm_dp_i2c_msg_write_status_update(msg);
 597                         return ret;
 598
 599                 case DP_AUX_I2C_REPLY_NACK:
 600                         DRM_DEBUG_KMS("I2C nack (result=%d, size=%zu\n", ret, msg->size);
 601                         aux->i2c_nack_count++;
 602                         return -EREMOTEIO;
 603
 604                 case DP_AUX_I2C_REPLY_DEFER:
 605                         DRM_DEBUG_KMS("I2C defer\n");
 606                         /* DP Compliance Test 4.2.2.5 Requirement:
 607                          * Must have at least 7 retries for I2C defers on the
 608                          * transaction to pass this test
 609                          */
 610                         aux->i2c_defer_count++;
 611                         if (defer_i2c < 7)
 612                                 defer_i2c++;
 613                         usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100);
 614                         drm_dp_i2c_msg_write_status_update(msg);
 615
 616                         continue;
 617
 618                 default:
 619                         DRM_ERROR("invalid I2C reply %#04x\n", msg->reply);
 620                         return -EREMOTEIO;
 621                 }
 622         }
 623
 624         DRM_DEBUG_KMS("too many retries, giving up\n");
 625         return -EREMOTEIO;
 626 }
 627
 628 static void drm_dp_i2c_msg_set_request(struct drm_dp_aux_msg *msg,
 629                                        const struct i2c_msg *i2c_msg)
 630 {
 631         msg->request = (i2c_msg->flags & I2C_M_RD) ?
 632                 DP_AUX_I2C_READ : DP_AUX_I2C_WRITE;
 633         msg->request |= DP_AUX_I2C_MOT;
 634 }
 635
 636 /*
 637  * Keep retrying drm_dp_i2c_do_msg until all data has been transferred.
 638  *
 639  * Returns an error code on failure, or a recommended transfer size on success.
 640  */
 641 static int drm_dp_i2c_drain_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *orig_msg)
 642 {
 643         int err, ret = orig_msg->size;
 644         struct drm_dp_aux_msg msg = *orig_msg;
 645
 646         while (msg.size > 0) {
 647                 err = drm_dp_i2c_do_msg(aux, &msg);
 648                 if (err <= 0)
 649                         return err == 0 ? -EPROTO : err;
 650
 651                 if (err < msg.size && err < ret) {
 652                         DRM_DEBUG_KMS("Partial I2C reply: requested %zu bytes got %d bytes\n",
 653                                       msg.size, err);
 654                         ret = err;
 655                 }
 656
 657                 msg.size -= err;
 658                 msg.buffer += err;
 659         }
 660
 661         return ret;
 662 }
 663
 664 /*
 665  * Bizlink designed DP->DVI-D Dual Link adapters require the I2C over AUX
 666  * packets to be as large as possible. If not, the I2C transactions never
 667  * succeed. Hence the default is maximum.
 668  */
 669 static int dp_aux_i2c_transfer_size __read_mostly = DP_AUX_MAX_PAYLOAD_BYTES;
 670 module_param_unsafe(dp_aux_i2c_transfer_size, int, 0644);
 671 MODULE_PARM_DESC(dp_aux_i2c_transfer_size,
 672                  "Number of bytes to transfer in a single I2C over DP AUX CH message, (1-16, default 16)");
 673
 674 static int drm_dp_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs,
 675                            int num)
 676 {
 677         struct drm_dp_aux *aux = adapter->algo_data;
 678         unsigned int i, j;
 679         unsigned transfer_size;
 680         struct drm_dp_aux_msg msg;
 681         int err = 0;
 682
 683         dp_aux_i2c_transfer_size = clamp(dp_aux_i2c_transfer_size, 1, DP_AUX_MAX_PAYLOAD_BYTES);
 684
 685         memset(&msg, 0, sizeof(msg));
 686
 687         for (i = 0; i < num; i++) {
 688                 msg.address = msgs[i].addr;
 689                 drm_dp_i2c_msg_set_request(&msg, &msgs[i]);
 690                 /* Send a bare address packet to start the transaction.
 691                  * Zero sized messages specify an address only (bare
 692                  * address) transaction.
 693                  */
 694                 msg.buffer = NULL;
 695                 msg.size = 0;
 696                 err = drm_dp_i2c_do_msg(aux, &msg);
 697
 698                 /*
 699                  * Reset msg.request in case in case it got
 700                  * changed into a WRITE_STATUS_UPDATE.
 701                  */
 702                 drm_dp_i2c_msg_set_request(&msg, &msgs[i]);
 703
 704                 if (err < 0)
 705                         break;
 706                 /* We want each transaction to be as large as possible, but
 707                  * we'll go to smaller sizes if the hardware gives us a
 708                  * short reply.
 709                  */
 710                 transfer_size = dp_aux_i2c_transfer_size;
 711                 for (j = 0; j < msgs[i].len; j += msg.size) {
 712                         msg.buffer = msgs[i].buf + j;
 713                         msg.size = min(transfer_size, msgs[i].len - j);
 714
 715                         err = drm_dp_i2c_drain_msg(aux, &msg);
 716
 717                         /*
 718                          * Reset msg.request in case in case it got
 719                          * changed into a WRITE_STATUS_UPDATE.
 720                          */
 721                         drm_dp_i2c_msg_set_request(&msg, &msgs[i]);
 722
 723                         if (err < 0)
 724                                 break;
 725                         transfer_size = err;
 726                 }
 727                 if (err < 0)
 728                         break;
 729         }
 730         if (err >= 0)
 731                 err = num;
 732         /* Send a bare address packet to close out the transaction.
 733          * Zero sized messages specify an address only (bare
 734          * address) transaction.
 735          */
 736         msg.request &= ~DP_AUX_I2C_MOT;
 737         msg.buffer = NULL;
 738         msg.size = 0;
 739         (void)drm_dp_i2c_do_msg(aux, &msg);
 740
 741         return err;
 742 }
 743
 744 static const struct i2c_algorithm drm_dp_i2c_algo = {
 745         .functionality = drm_dp_i2c_functionality,
 746         .master_xfer = drm_dp_i2c_xfer,
 747 };
 748
 749 /**
 750  * drm_dp_aux_register() - initialise and register aux channel
 751  * @aux: DisplayPort AUX channel
 752  *
 753  * Returns 0 on success or a negative error code on failure.
 754  */
 755 int drm_dp_aux_register(struct drm_dp_aux *aux)
 756 {
 757         mutex_init(&aux->hw_mutex);
 758
 759         aux->ddc.algo = &drm_dp_i2c_algo;
 760         aux->ddc.algo_data = aux;
 761         aux->ddc.retries = 3;
 762
 763         aux->ddc.class = I2C_CLASS_DDC;
 764         aux->ddc.owner = THIS_MODULE;
 765         aux->ddc.dev.parent = aux->dev;
 766         aux->ddc.dev.of_node = aux->dev->of_node;
 767
 768         strlcpy(aux->ddc.name, aux->name ? aux->name : dev_name(aux->dev),
 769                 sizeof(aux->ddc.name));
 770
 771         return i2c_add_adapter(&aux->ddc);
 772 }
 773 EXPORT_SYMBOL(drm_dp_aux_register);
 774
 775 /**
 776  * drm_dp_aux_unregister() - unregister an AUX adapter
 777  * @aux: DisplayPort AUX channel
 778  */
 779 void drm_dp_aux_unregister(struct drm_dp_aux *aux)
 780 {
 781         i2c_del_adapter(&aux->ddc);
 782 }
 783 EXPORT_SYMBOL(drm_dp_aux_unregister);