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gpu: host1x: Use relative include paths
[deliverable/linux.git] / drivers / gpu / drm / drm_edid.c
1 /*
2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
6 *
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8 * FB layer.
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10 *
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
17 *
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
20 * of the Software.
21 *
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
29 */
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/hdmi.h>
33 #include <linux/i2c.h>
34 #include <linux/module.h>
35 #include <drm/drmP.h>
36 #include <drm/drm_edid.h>
37
38 #define version_greater(edid, maj, min) \
39 (((edid)->version > (maj)) || \
40 ((edid)->version == (maj) && (edid)->revision > (min)))
41
42 #define EDID_EST_TIMINGS 16
43 #define EDID_STD_TIMINGS 8
44 #define EDID_DETAILED_TIMINGS 4
45
46 /*
47 * EDID blocks out in the wild have a variety of bugs, try to collect
48 * them here (note that userspace may work around broken monitors first,
49 * but fixes should make their way here so that the kernel "just works"
50 * on as many displays as possible).
51 */
52
53 /* First detailed mode wrong, use largest 60Hz mode */
54 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
55 /* Reported 135MHz pixel clock is too high, needs adjustment */
56 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
57 /* Prefer the largest mode at 75 Hz */
58 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
59 /* Detail timing is in cm not mm */
60 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
61 /* Detailed timing descriptors have bogus size values, so just take the
62 * maximum size and use that.
63 */
64 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
65 /* Monitor forgot to set the first detailed is preferred bit. */
66 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
67 /* use +hsync +vsync for detailed mode */
68 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
69 /* Force reduced-blanking timings for detailed modes */
70 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
71
72 struct detailed_mode_closure {
73 struct drm_connector *connector;
74 struct edid *edid;
75 bool preferred;
76 u32 quirks;
77 int modes;
78 };
79
80 #define LEVEL_DMT 0
81 #define LEVEL_GTF 1
82 #define LEVEL_GTF2 2
83 #define LEVEL_CVT 3
84
85 static struct edid_quirk {
86 char vendor[4];
87 int product_id;
88 u32 quirks;
89 } edid_quirk_list[] = {
90 /* Acer AL1706 */
91 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
92 /* Acer F51 */
93 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
94 /* Unknown Acer */
95 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
96
97 /* Belinea 10 15 55 */
98 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
99 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
100
101 /* Envision Peripherals, Inc. EN-7100e */
102 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
103 /* Envision EN2028 */
104 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
105
106 /* Funai Electronics PM36B */
107 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
108 EDID_QUIRK_DETAILED_IN_CM },
109
110 /* LG Philips LCD LP154W01-A5 */
111 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
112 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
113
114 /* Philips 107p5 CRT */
115 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
116
117 /* Proview AY765C */
118 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
119
120 /* Samsung SyncMaster 205BW. Note: irony */
121 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
122 /* Samsung SyncMaster 22[5-6]BW */
123 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
124 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
125
126 /* ViewSonic VA2026w */
127 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
128
129 /* Medion MD 30217 PG */
130 { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
131 };
132
133 /*
134 * Autogenerated from the DMT spec.
135 * This table is copied from xfree86/modes/xf86EdidModes.c.
136 */
137 static const struct drm_display_mode drm_dmt_modes[] = {
138 /* 640x350@85Hz */
139 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
140 736, 832, 0, 350, 382, 385, 445, 0,
141 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
142 /* 640x400@85Hz */
143 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
144 736, 832, 0, 400, 401, 404, 445, 0,
145 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
146 /* 720x400@85Hz */
147 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
148 828, 936, 0, 400, 401, 404, 446, 0,
149 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
150 /* 640x480@60Hz */
151 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
152 752, 800, 0, 480, 489, 492, 525, 0,
153 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
154 /* 640x480@72Hz */
155 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
156 704, 832, 0, 480, 489, 492, 520, 0,
157 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
158 /* 640x480@75Hz */
159 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
160 720, 840, 0, 480, 481, 484, 500, 0,
161 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
162 /* 640x480@85Hz */
163 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
164 752, 832, 0, 480, 481, 484, 509, 0,
165 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
166 /* 800x600@56Hz */
167 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
168 896, 1024, 0, 600, 601, 603, 625, 0,
169 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
170 /* 800x600@60Hz */
171 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
172 968, 1056, 0, 600, 601, 605, 628, 0,
173 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
174 /* 800x600@72Hz */
175 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
176 976, 1040, 0, 600, 637, 643, 666, 0,
177 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
178 /* 800x600@75Hz */
179 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
180 896, 1056, 0, 600, 601, 604, 625, 0,
181 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
182 /* 800x600@85Hz */
183 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
184 896, 1048, 0, 600, 601, 604, 631, 0,
185 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
186 /* 800x600@120Hz RB */
187 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
188 880, 960, 0, 600, 603, 607, 636, 0,
189 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
190 /* 848x480@60Hz */
191 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
192 976, 1088, 0, 480, 486, 494, 517, 0,
193 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
194 /* 1024x768@43Hz, interlace */
195 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
196 1208, 1264, 0, 768, 768, 772, 817, 0,
197 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
198 DRM_MODE_FLAG_INTERLACE) },
199 /* 1024x768@60Hz */
200 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
201 1184, 1344, 0, 768, 771, 777, 806, 0,
202 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
203 /* 1024x768@70Hz */
204 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
205 1184, 1328, 0, 768, 771, 777, 806, 0,
206 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
207 /* 1024x768@75Hz */
208 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
209 1136, 1312, 0, 768, 769, 772, 800, 0,
210 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
211 /* 1024x768@85Hz */
212 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
213 1168, 1376, 0, 768, 769, 772, 808, 0,
214 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
215 /* 1024x768@120Hz RB */
216 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
217 1104, 1184, 0, 768, 771, 775, 813, 0,
218 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
219 /* 1152x864@75Hz */
220 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
221 1344, 1600, 0, 864, 865, 868, 900, 0,
222 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
223 /* 1280x768@60Hz RB */
224 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
225 1360, 1440, 0, 768, 771, 778, 790, 0,
226 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
227 /* 1280x768@60Hz */
228 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
229 1472, 1664, 0, 768, 771, 778, 798, 0,
230 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
231 /* 1280x768@75Hz */
232 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
233 1488, 1696, 0, 768, 771, 778, 805, 0,
234 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
235 /* 1280x768@85Hz */
236 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
237 1496, 1712, 0, 768, 771, 778, 809, 0,
238 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
239 /* 1280x768@120Hz RB */
240 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
241 1360, 1440, 0, 768, 771, 778, 813, 0,
242 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
243 /* 1280x800@60Hz RB */
244 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
245 1360, 1440, 0, 800, 803, 809, 823, 0,
246 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
247 /* 1280x800@60Hz */
248 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
249 1480, 1680, 0, 800, 803, 809, 831, 0,
250 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
251 /* 1280x800@75Hz */
252 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
253 1488, 1696, 0, 800, 803, 809, 838, 0,
254 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
255 /* 1280x800@85Hz */
256 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
257 1496, 1712, 0, 800, 803, 809, 843, 0,
258 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
259 /* 1280x800@120Hz RB */
260 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
261 1360, 1440, 0, 800, 803, 809, 847, 0,
262 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
263 /* 1280x960@60Hz */
264 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
265 1488, 1800, 0, 960, 961, 964, 1000, 0,
266 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
267 /* 1280x960@85Hz */
268 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
269 1504, 1728, 0, 960, 961, 964, 1011, 0,
270 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
271 /* 1280x960@120Hz RB */
272 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
273 1360, 1440, 0, 960, 963, 967, 1017, 0,
274 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
275 /* 1280x1024@60Hz */
276 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
277 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
278 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
279 /* 1280x1024@75Hz */
280 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
281 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
282 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
283 /* 1280x1024@85Hz */
284 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
285 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
286 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
287 /* 1280x1024@120Hz RB */
288 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
289 1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
290 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
291 /* 1360x768@60Hz */
292 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
293 1536, 1792, 0, 768, 771, 777, 795, 0,
294 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
295 /* 1360x768@120Hz RB */
296 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
297 1440, 1520, 0, 768, 771, 776, 813, 0,
298 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
299 /* 1400x1050@60Hz RB */
300 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
301 1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
302 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
303 /* 1400x1050@60Hz */
304 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
305 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
306 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
307 /* 1400x1050@75Hz */
308 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
309 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
310 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
311 /* 1400x1050@85Hz */
312 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
313 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
314 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
315 /* 1400x1050@120Hz RB */
316 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
317 1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
318 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
319 /* 1440x900@60Hz RB */
320 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
321 1520, 1600, 0, 900, 903, 909, 926, 0,
322 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
323 /* 1440x900@60Hz */
324 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
325 1672, 1904, 0, 900, 903, 909, 934, 0,
326 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
327 /* 1440x900@75Hz */
328 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
329 1688, 1936, 0, 900, 903, 909, 942, 0,
330 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
331 /* 1440x900@85Hz */
332 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
333 1696, 1952, 0, 900, 903, 909, 948, 0,
334 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
335 /* 1440x900@120Hz RB */
336 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
337 1520, 1600, 0, 900, 903, 909, 953, 0,
338 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
339 /* 1600x1200@60Hz */
340 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
341 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
342 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
343 /* 1600x1200@65Hz */
344 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
345 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
346 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
347 /* 1600x1200@70Hz */
348 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
349 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
350 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
351 /* 1600x1200@75Hz */
352 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
353 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
354 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
355 /* 1600x1200@85Hz */
356 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
357 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
358 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
359 /* 1600x1200@120Hz RB */
360 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
361 1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
362 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
363 /* 1680x1050@60Hz RB */
364 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
365 1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
366 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
367 /* 1680x1050@60Hz */
368 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
369 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
370 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
371 /* 1680x1050@75Hz */
372 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
373 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
374 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
375 /* 1680x1050@85Hz */
376 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
377 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
378 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
379 /* 1680x1050@120Hz RB */
380 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
381 1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
382 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
383 /* 1792x1344@60Hz */
384 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
385 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
386 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
387 /* 1792x1344@75Hz */
388 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
389 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
390 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
391 /* 1792x1344@120Hz RB */
392 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
393 1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
394 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
395 /* 1856x1392@60Hz */
396 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
397 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
398 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
399 /* 1856x1392@75Hz */
400 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
401 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
402 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
403 /* 1856x1392@120Hz RB */
404 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
405 1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
406 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
407 /* 1920x1200@60Hz RB */
408 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
409 2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
410 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
411 /* 1920x1200@60Hz */
412 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
413 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
414 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
415 /* 1920x1200@75Hz */
416 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
417 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
418 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
419 /* 1920x1200@85Hz */
420 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
421 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
422 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
423 /* 1920x1200@120Hz RB */
424 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
425 2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
426 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
427 /* 1920x1440@60Hz */
428 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
429 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
430 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
431 /* 1920x1440@75Hz */
432 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
433 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
434 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
435 /* 1920x1440@120Hz RB */
436 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
437 2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
438 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
439 /* 2560x1600@60Hz RB */
440 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
441 2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
442 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
443 /* 2560x1600@60Hz */
444 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
445 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
446 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
447 /* 2560x1600@75HZ */
448 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
449 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
450 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
451 /* 2560x1600@85HZ */
452 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
453 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
454 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
455 /* 2560x1600@120Hz RB */
456 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
457 2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
458 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
459 };
460
461 static const struct drm_display_mode edid_est_modes[] = {
462 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
463 968, 1056, 0, 600, 601, 605, 628, 0,
464 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
465 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
466 896, 1024, 0, 600, 601, 603, 625, 0,
467 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
468 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
469 720, 840, 0, 480, 481, 484, 500, 0,
470 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
471 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
472 704, 832, 0, 480, 489, 491, 520, 0,
473 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
474 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
475 768, 864, 0, 480, 483, 486, 525, 0,
476 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
477 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
478 752, 800, 0, 480, 490, 492, 525, 0,
479 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
480 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
481 846, 900, 0, 400, 421, 423, 449, 0,
482 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
483 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
484 846, 900, 0, 400, 412, 414, 449, 0,
485 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
486 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
487 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
488 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
489 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
490 1136, 1312, 0, 768, 769, 772, 800, 0,
491 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
492 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
493 1184, 1328, 0, 768, 771, 777, 806, 0,
494 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
495 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
496 1184, 1344, 0, 768, 771, 777, 806, 0,
497 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
498 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
499 1208, 1264, 0, 768, 768, 776, 817, 0,
500 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
501 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
502 928, 1152, 0, 624, 625, 628, 667, 0,
503 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
504 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
505 896, 1056, 0, 600, 601, 604, 625, 0,
506 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
507 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
508 976, 1040, 0, 600, 637, 643, 666, 0,
509 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
510 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
511 1344, 1600, 0, 864, 865, 868, 900, 0,
512 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
513 };
514
515 struct minimode {
516 short w;
517 short h;
518 short r;
519 short rb;
520 };
521
522 static const struct minimode est3_modes[] = {
523 /* byte 6 */
524 { 640, 350, 85, 0 },
525 { 640, 400, 85, 0 },
526 { 720, 400, 85, 0 },
527 { 640, 480, 85, 0 },
528 { 848, 480, 60, 0 },
529 { 800, 600, 85, 0 },
530 { 1024, 768, 85, 0 },
531 { 1152, 864, 75, 0 },
532 /* byte 7 */
533 { 1280, 768, 60, 1 },
534 { 1280, 768, 60, 0 },
535 { 1280, 768, 75, 0 },
536 { 1280, 768, 85, 0 },
537 { 1280, 960, 60, 0 },
538 { 1280, 960, 85, 0 },
539 { 1280, 1024, 60, 0 },
540 { 1280, 1024, 85, 0 },
541 /* byte 8 */
542 { 1360, 768, 60, 0 },
543 { 1440, 900, 60, 1 },
544 { 1440, 900, 60, 0 },
545 { 1440, 900, 75, 0 },
546 { 1440, 900, 85, 0 },
547 { 1400, 1050, 60, 1 },
548 { 1400, 1050, 60, 0 },
549 { 1400, 1050, 75, 0 },
550 /* byte 9 */
551 { 1400, 1050, 85, 0 },
552 { 1680, 1050, 60, 1 },
553 { 1680, 1050, 60, 0 },
554 { 1680, 1050, 75, 0 },
555 { 1680, 1050, 85, 0 },
556 { 1600, 1200, 60, 0 },
557 { 1600, 1200, 65, 0 },
558 { 1600, 1200, 70, 0 },
559 /* byte 10 */
560 { 1600, 1200, 75, 0 },
561 { 1600, 1200, 85, 0 },
562 { 1792, 1344, 60, 0 },
563 { 1792, 1344, 85, 0 },
564 { 1856, 1392, 60, 0 },
565 { 1856, 1392, 75, 0 },
566 { 1920, 1200, 60, 1 },
567 { 1920, 1200, 60, 0 },
568 /* byte 11 */
569 { 1920, 1200, 75, 0 },
570 { 1920, 1200, 85, 0 },
571 { 1920, 1440, 60, 0 },
572 { 1920, 1440, 75, 0 },
573 };
574
575 static const struct minimode extra_modes[] = {
576 { 1024, 576, 60, 0 },
577 { 1366, 768, 60, 0 },
578 { 1600, 900, 60, 0 },
579 { 1680, 945, 60, 0 },
580 { 1920, 1080, 60, 0 },
581 { 2048, 1152, 60, 0 },
582 { 2048, 1536, 60, 0 },
583 };
584
585 /*
586 * Probably taken from CEA-861 spec.
587 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
588 */
589 static const struct drm_display_mode edid_cea_modes[] = {
590 /* 1 - 640x480@60Hz */
591 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
592 752, 800, 0, 480, 490, 492, 525, 0,
593 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
594 .vrefresh = 60, },
595 /* 2 - 720x480@60Hz */
596 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
597 798, 858, 0, 480, 489, 495, 525, 0,
598 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
599 .vrefresh = 60, },
600 /* 3 - 720x480@60Hz */
601 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
602 798, 858, 0, 480, 489, 495, 525, 0,
603 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
604 .vrefresh = 60, },
605 /* 4 - 1280x720@60Hz */
606 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
607 1430, 1650, 0, 720, 725, 730, 750, 0,
608 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
609 .vrefresh = 60, },
610 /* 5 - 1920x1080i@60Hz */
611 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
612 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
613 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
614 DRM_MODE_FLAG_INTERLACE),
615 .vrefresh = 60, },
616 /* 6 - 1440x480i@60Hz */
617 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
618 1602, 1716, 0, 480, 488, 494, 525, 0,
619 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
620 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
621 .vrefresh = 60, },
622 /* 7 - 1440x480i@60Hz */
623 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
624 1602, 1716, 0, 480, 488, 494, 525, 0,
625 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
626 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
627 .vrefresh = 60, },
628 /* 8 - 1440x240@60Hz */
629 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
630 1602, 1716, 0, 240, 244, 247, 262, 0,
631 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
632 DRM_MODE_FLAG_DBLCLK),
633 .vrefresh = 60, },
634 /* 9 - 1440x240@60Hz */
635 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
636 1602, 1716, 0, 240, 244, 247, 262, 0,
637 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
638 DRM_MODE_FLAG_DBLCLK),
639 .vrefresh = 60, },
640 /* 10 - 2880x480i@60Hz */
641 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
642 3204, 3432, 0, 480, 488, 494, 525, 0,
643 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
644 DRM_MODE_FLAG_INTERLACE),
645 .vrefresh = 60, },
646 /* 11 - 2880x480i@60Hz */
647 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
648 3204, 3432, 0, 480, 488, 494, 525, 0,
649 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
650 DRM_MODE_FLAG_INTERLACE),
651 .vrefresh = 60, },
652 /* 12 - 2880x240@60Hz */
653 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
654 3204, 3432, 0, 240, 244, 247, 262, 0,
655 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
656 .vrefresh = 60, },
657 /* 13 - 2880x240@60Hz */
658 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
659 3204, 3432, 0, 240, 244, 247, 262, 0,
660 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
661 .vrefresh = 60, },
662 /* 14 - 1440x480@60Hz */
663 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
664 1596, 1716, 0, 480, 489, 495, 525, 0,
665 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
666 .vrefresh = 60, },
667 /* 15 - 1440x480@60Hz */
668 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
669 1596, 1716, 0, 480, 489, 495, 525, 0,
670 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
671 .vrefresh = 60, },
672 /* 16 - 1920x1080@60Hz */
673 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
674 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
675 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
676 .vrefresh = 60, },
677 /* 17 - 720x576@50Hz */
678 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
679 796, 864, 0, 576, 581, 586, 625, 0,
680 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
681 .vrefresh = 50, },
682 /* 18 - 720x576@50Hz */
683 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
684 796, 864, 0, 576, 581, 586, 625, 0,
685 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
686 .vrefresh = 50, },
687 /* 19 - 1280x720@50Hz */
688 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
689 1760, 1980, 0, 720, 725, 730, 750, 0,
690 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
691 .vrefresh = 50, },
692 /* 20 - 1920x1080i@50Hz */
693 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
694 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
695 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
696 DRM_MODE_FLAG_INTERLACE),
697 .vrefresh = 50, },
698 /* 21 - 1440x576i@50Hz */
699 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
700 1590, 1728, 0, 576, 580, 586, 625, 0,
701 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
702 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
703 .vrefresh = 50, },
704 /* 22 - 1440x576i@50Hz */
705 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
706 1590, 1728, 0, 576, 580, 586, 625, 0,
707 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
708 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
709 .vrefresh = 50, },
710 /* 23 - 1440x288@50Hz */
711 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
712 1590, 1728, 0, 288, 290, 293, 312, 0,
713 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
714 DRM_MODE_FLAG_DBLCLK),
715 .vrefresh = 50, },
716 /* 24 - 1440x288@50Hz */
717 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
718 1590, 1728, 0, 288, 290, 293, 312, 0,
719 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
720 DRM_MODE_FLAG_DBLCLK),
721 .vrefresh = 50, },
722 /* 25 - 2880x576i@50Hz */
723 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
724 3180, 3456, 0, 576, 580, 586, 625, 0,
725 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
726 DRM_MODE_FLAG_INTERLACE),
727 .vrefresh = 50, },
728 /* 26 - 2880x576i@50Hz */
729 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
730 3180, 3456, 0, 576, 580, 586, 625, 0,
731 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
732 DRM_MODE_FLAG_INTERLACE),
733 .vrefresh = 50, },
734 /* 27 - 2880x288@50Hz */
735 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
736 3180, 3456, 0, 288, 290, 293, 312, 0,
737 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
738 .vrefresh = 50, },
739 /* 28 - 2880x288@50Hz */
740 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
741 3180, 3456, 0, 288, 290, 293, 312, 0,
742 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
743 .vrefresh = 50, },
744 /* 29 - 1440x576@50Hz */
745 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
746 1592, 1728, 0, 576, 581, 586, 625, 0,
747 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
748 .vrefresh = 50, },
749 /* 30 - 1440x576@50Hz */
750 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
751 1592, 1728, 0, 576, 581, 586, 625, 0,
752 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
753 .vrefresh = 50, },
754 /* 31 - 1920x1080@50Hz */
755 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
756 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
757 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
758 .vrefresh = 50, },
759 /* 32 - 1920x1080@24Hz */
760 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
761 2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
762 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
763 .vrefresh = 24, },
764 /* 33 - 1920x1080@25Hz */
765 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
766 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
767 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
768 .vrefresh = 25, },
769 /* 34 - 1920x1080@30Hz */
770 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
771 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
772 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
773 .vrefresh = 30, },
774 /* 35 - 2880x480@60Hz */
775 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
776 3192, 3432, 0, 480, 489, 495, 525, 0,
777 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
778 .vrefresh = 60, },
779 /* 36 - 2880x480@60Hz */
780 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
781 3192, 3432, 0, 480, 489, 495, 525, 0,
782 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
783 .vrefresh = 60, },
784 /* 37 - 2880x576@50Hz */
785 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
786 3184, 3456, 0, 576, 581, 586, 625, 0,
787 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
788 .vrefresh = 50, },
789 /* 38 - 2880x576@50Hz */
790 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
791 3184, 3456, 0, 576, 581, 586, 625, 0,
792 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
793 .vrefresh = 50, },
794 /* 39 - 1920x1080i@50Hz */
795 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
796 2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
797 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
798 DRM_MODE_FLAG_INTERLACE),
799 .vrefresh = 50, },
800 /* 40 - 1920x1080i@100Hz */
801 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
802 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
803 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
804 DRM_MODE_FLAG_INTERLACE),
805 .vrefresh = 100, },
806 /* 41 - 1280x720@100Hz */
807 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
808 1760, 1980, 0, 720, 725, 730, 750, 0,
809 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
810 .vrefresh = 100, },
811 /* 42 - 720x576@100Hz */
812 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
813 796, 864, 0, 576, 581, 586, 625, 0,
814 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
815 .vrefresh = 100, },
816 /* 43 - 720x576@100Hz */
817 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
818 796, 864, 0, 576, 581, 586, 625, 0,
819 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
820 .vrefresh = 100, },
821 /* 44 - 1440x576i@100Hz */
822 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
823 1590, 1728, 0, 576, 580, 586, 625, 0,
824 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
825 DRM_MODE_FLAG_DBLCLK),
826 .vrefresh = 100, },
827 /* 45 - 1440x576i@100Hz */
828 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
829 1590, 1728, 0, 576, 580, 586, 625, 0,
830 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
831 DRM_MODE_FLAG_DBLCLK),
832 .vrefresh = 100, },
833 /* 46 - 1920x1080i@120Hz */
834 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
835 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
836 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
837 DRM_MODE_FLAG_INTERLACE),
838 .vrefresh = 120, },
839 /* 47 - 1280x720@120Hz */
840 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
841 1430, 1650, 0, 720, 725, 730, 750, 0,
842 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
843 .vrefresh = 120, },
844 /* 48 - 720x480@120Hz */
845 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
846 798, 858, 0, 480, 489, 495, 525, 0,
847 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
848 .vrefresh = 120, },
849 /* 49 - 720x480@120Hz */
850 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
851 798, 858, 0, 480, 489, 495, 525, 0,
852 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
853 .vrefresh = 120, },
854 /* 50 - 1440x480i@120Hz */
855 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478,
856 1602, 1716, 0, 480, 488, 494, 525, 0,
857 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
858 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
859 .vrefresh = 120, },
860 /* 51 - 1440x480i@120Hz */
861 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478,
862 1602, 1716, 0, 480, 488, 494, 525, 0,
863 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
864 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
865 .vrefresh = 120, },
866 /* 52 - 720x576@200Hz */
867 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
868 796, 864, 0, 576, 581, 586, 625, 0,
869 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
870 .vrefresh = 200, },
871 /* 53 - 720x576@200Hz */
872 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
873 796, 864, 0, 576, 581, 586, 625, 0,
874 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
875 .vrefresh = 200, },
876 /* 54 - 1440x576i@200Hz */
877 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464,
878 1590, 1728, 0, 576, 580, 586, 625, 0,
879 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
880 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
881 .vrefresh = 200, },
882 /* 55 - 1440x576i@200Hz */
883 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464,
884 1590, 1728, 0, 576, 580, 586, 625, 0,
885 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
886 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
887 .vrefresh = 200, },
888 /* 56 - 720x480@240Hz */
889 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
890 798, 858, 0, 480, 489, 495, 525, 0,
891 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
892 .vrefresh = 240, },
893 /* 57 - 720x480@240Hz */
894 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
895 798, 858, 0, 480, 489, 495, 525, 0,
896 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
897 .vrefresh = 240, },
898 /* 58 - 1440x480i@240 */
899 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478,
900 1602, 1716, 0, 480, 488, 494, 525, 0,
901 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
902 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
903 .vrefresh = 240, },
904 /* 59 - 1440x480i@240 */
905 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478,
906 1602, 1716, 0, 480, 488, 494, 525, 0,
907 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
908 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
909 .vrefresh = 240, },
910 /* 60 - 1280x720@24Hz */
911 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
912 3080, 3300, 0, 720, 725, 730, 750, 0,
913 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
914 .vrefresh = 24, },
915 /* 61 - 1280x720@25Hz */
916 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
917 3740, 3960, 0, 720, 725, 730, 750, 0,
918 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
919 .vrefresh = 25, },
920 /* 62 - 1280x720@30Hz */
921 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
922 3080, 3300, 0, 720, 725, 730, 750, 0,
923 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
924 .vrefresh = 30, },
925 /* 63 - 1920x1080@120Hz */
926 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
927 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
928 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
929 .vrefresh = 120, },
930 /* 64 - 1920x1080@100Hz */
931 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
932 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
933 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
934 .vrefresh = 100, },
935 };
936
937 /*
938 * HDMI 1.4 4k modes.
939 */
940 static const struct drm_display_mode edid_4k_modes[] = {
941 /* 1 - 3840x2160@30Hz */
942 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
943 3840, 4016, 4104, 4400, 0,
944 2160, 2168, 2178, 2250, 0,
945 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
946 .vrefresh = 30, },
947 /* 2 - 3840x2160@25Hz */
948 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
949 3840, 4896, 4984, 5280, 0,
950 2160, 2168, 2178, 2250, 0,
951 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
952 .vrefresh = 25, },
953 /* 3 - 3840x2160@24Hz */
954 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
955 3840, 5116, 5204, 5500, 0,
956 2160, 2168, 2178, 2250, 0,
957 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
958 .vrefresh = 24, },
959 /* 4 - 4096x2160@24Hz (SMPTE) */
960 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
961 4096, 5116, 5204, 5500, 0,
962 2160, 2168, 2178, 2250, 0,
963 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
964 .vrefresh = 24, },
965 };
966
967 /*** DDC fetch and block validation ***/
968
969 static const u8 edid_header[] = {
970 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
971 };
972
973 /*
974 * Sanity check the header of the base EDID block. Return 8 if the header
975 * is perfect, down to 0 if it's totally wrong.
976 */
977 int drm_edid_header_is_valid(const u8 *raw_edid)
978 {
979 int i, score = 0;
980
981 for (i = 0; i < sizeof(edid_header); i++)
982 if (raw_edid[i] == edid_header[i])
983 score++;
984
985 return score;
986 }
987 EXPORT_SYMBOL(drm_edid_header_is_valid);
988
989 static int edid_fixup __read_mostly = 6;
990 module_param_named(edid_fixup, edid_fixup, int, 0400);
991 MODULE_PARM_DESC(edid_fixup,
992 "Minimum number of valid EDID header bytes (0-8, default 6)");
993
994 /*
995 * Sanity check the EDID block (base or extension). Return 0 if the block
996 * doesn't check out, or 1 if it's valid.
997 */
998 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid)
999 {
1000 int i;
1001 u8 csum = 0;
1002 struct edid *edid = (struct edid *)raw_edid;
1003
1004 if (WARN_ON(!raw_edid))
1005 return false;
1006
1007 if (edid_fixup > 8 || edid_fixup < 0)
1008 edid_fixup = 6;
1009
1010 if (block == 0) {
1011 int score = drm_edid_header_is_valid(raw_edid);
1012 if (score == 8) ;
1013 else if (score >= edid_fixup) {
1014 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1015 memcpy(raw_edid, edid_header, sizeof(edid_header));
1016 } else {
1017 goto bad;
1018 }
1019 }
1020
1021 for (i = 0; i < EDID_LENGTH; i++)
1022 csum += raw_edid[i];
1023 if (csum) {
1024 if (print_bad_edid) {
1025 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
1026 }
1027
1028 /* allow CEA to slide through, switches mangle this */
1029 if (raw_edid[0] != 0x02)
1030 goto bad;
1031 }
1032
1033 /* per-block-type checks */
1034 switch (raw_edid[0]) {
1035 case 0: /* base */
1036 if (edid->version != 1) {
1037 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
1038 goto bad;
1039 }
1040
1041 if (edid->revision > 4)
1042 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1043 break;
1044
1045 default:
1046 break;
1047 }
1048
1049 return true;
1050
1051 bad:
1052 if (print_bad_edid) {
1053 printk(KERN_ERR "Raw EDID:\n");
1054 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
1055 raw_edid, EDID_LENGTH, false);
1056 }
1057 return false;
1058 }
1059 EXPORT_SYMBOL(drm_edid_block_valid);
1060
1061 /**
1062 * drm_edid_is_valid - sanity check EDID data
1063 * @edid: EDID data
1064 *
1065 * Sanity-check an entire EDID record (including extensions)
1066 */
1067 bool drm_edid_is_valid(struct edid *edid)
1068 {
1069 int i;
1070 u8 *raw = (u8 *)edid;
1071
1072 if (!edid)
1073 return false;
1074
1075 for (i = 0; i <= edid->extensions; i++)
1076 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true))
1077 return false;
1078
1079 return true;
1080 }
1081 EXPORT_SYMBOL(drm_edid_is_valid);
1082
1083 #define DDC_SEGMENT_ADDR 0x30
1084 /**
1085 * Get EDID information via I2C.
1086 *
1087 * \param adapter : i2c device adaptor
1088 * \param buf : EDID data buffer to be filled
1089 * \param len : EDID data buffer length
1090 * \return 0 on success or -1 on failure.
1091 *
1092 * Try to fetch EDID information by calling i2c driver function.
1093 */
1094 static int
1095 drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
1096 int block, int len)
1097 {
1098 unsigned char start = block * EDID_LENGTH;
1099 unsigned char segment = block >> 1;
1100 unsigned char xfers = segment ? 3 : 2;
1101 int ret, retries = 5;
1102
1103 /* The core i2c driver will automatically retry the transfer if the
1104 * adapter reports EAGAIN. However, we find that bit-banging transfers
1105 * are susceptible to errors under a heavily loaded machine and
1106 * generate spurious NAKs and timeouts. Retrying the transfer
1107 * of the individual block a few times seems to overcome this.
1108 */
1109 do {
1110 struct i2c_msg msgs[] = {
1111 {
1112 .addr = DDC_SEGMENT_ADDR,
1113 .flags = 0,
1114 .len = 1,
1115 .buf = &segment,
1116 }, {
1117 .addr = DDC_ADDR,
1118 .flags = 0,
1119 .len = 1,
1120 .buf = &start,
1121 }, {
1122 .addr = DDC_ADDR,
1123 .flags = I2C_M_RD,
1124 .len = len,
1125 .buf = buf,
1126 }
1127 };
1128
1129 /*
1130 * Avoid sending the segment addr to not upset non-compliant ddc
1131 * monitors.
1132 */
1133 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
1134
1135 if (ret == -ENXIO) {
1136 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1137 adapter->name);
1138 break;
1139 }
1140 } while (ret != xfers && --retries);
1141
1142 return ret == xfers ? 0 : -1;
1143 }
1144
1145 static bool drm_edid_is_zero(u8 *in_edid, int length)
1146 {
1147 if (memchr_inv(in_edid, 0, length))
1148 return false;
1149
1150 return true;
1151 }
1152
1153 static u8 *
1154 drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
1155 {
1156 int i, j = 0, valid_extensions = 0;
1157 u8 *block, *new;
1158 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS);
1159
1160 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
1161 return NULL;
1162
1163 /* base block fetch */
1164 for (i = 0; i < 4; i++) {
1165 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
1166 goto out;
1167 if (drm_edid_block_valid(block, 0, print_bad_edid))
1168 break;
1169 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
1170 connector->null_edid_counter++;
1171 goto carp;
1172 }
1173 }
1174 if (i == 4)
1175 goto carp;
1176
1177 /* if there's no extensions, we're done */
1178 if (block[0x7e] == 0)
1179 return block;
1180
1181 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
1182 if (!new)
1183 goto out;
1184 block = new;
1185
1186 for (j = 1; j <= block[0x7e]; j++) {
1187 for (i = 0; i < 4; i++) {
1188 if (drm_do_probe_ddc_edid(adapter,
1189 block + (valid_extensions + 1) * EDID_LENGTH,
1190 j, EDID_LENGTH))
1191 goto out;
1192 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) {
1193 valid_extensions++;
1194 break;
1195 }
1196 }
1197
1198 if (i == 4 && print_bad_edid) {
1199 dev_warn(connector->dev->dev,
1200 "%s: Ignoring invalid EDID block %d.\n",
1201 drm_get_connector_name(connector), j);
1202
1203 connector->bad_edid_counter++;
1204 }
1205 }
1206
1207 if (valid_extensions != block[0x7e]) {
1208 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
1209 block[0x7e] = valid_extensions;
1210 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1211 if (!new)
1212 goto out;
1213 block = new;
1214 }
1215
1216 return block;
1217
1218 carp:
1219 if (print_bad_edid) {
1220 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
1221 drm_get_connector_name(connector), j);
1222 }
1223 connector->bad_edid_counter++;
1224
1225 out:
1226 kfree(block);
1227 return NULL;
1228 }
1229
1230 /**
1231 * Probe DDC presence.
1232 *
1233 * \param adapter : i2c device adaptor
1234 * \return 1 on success
1235 */
1236 bool
1237 drm_probe_ddc(struct i2c_adapter *adapter)
1238 {
1239 unsigned char out;
1240
1241 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1242 }
1243 EXPORT_SYMBOL(drm_probe_ddc);
1244
1245 /**
1246 * drm_get_edid - get EDID data, if available
1247 * @connector: connector we're probing
1248 * @adapter: i2c adapter to use for DDC
1249 *
1250 * Poke the given i2c channel to grab EDID data if possible. If found,
1251 * attach it to the connector.
1252 *
1253 * Return edid data or NULL if we couldn't find any.
1254 */
1255 struct edid *drm_get_edid(struct drm_connector *connector,
1256 struct i2c_adapter *adapter)
1257 {
1258 struct edid *edid = NULL;
1259
1260 if (drm_probe_ddc(adapter))
1261 edid = (struct edid *)drm_do_get_edid(connector, adapter);
1262
1263 return edid;
1264 }
1265 EXPORT_SYMBOL(drm_get_edid);
1266
1267 /**
1268 * drm_edid_duplicate - duplicate an EDID and the extensions
1269 * @edid: EDID to duplicate
1270 *
1271 * Return duplicate edid or NULL on allocation failure.
1272 */
1273 struct edid *drm_edid_duplicate(const struct edid *edid)
1274 {
1275 return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1276 }
1277 EXPORT_SYMBOL(drm_edid_duplicate);
1278
1279 /*** EDID parsing ***/
1280
1281 /**
1282 * edid_vendor - match a string against EDID's obfuscated vendor field
1283 * @edid: EDID to match
1284 * @vendor: vendor string
1285 *
1286 * Returns true if @vendor is in @edid, false otherwise
1287 */
1288 static bool edid_vendor(struct edid *edid, char *vendor)
1289 {
1290 char edid_vendor[3];
1291
1292 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1293 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1294 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1295 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1296
1297 return !strncmp(edid_vendor, vendor, 3);
1298 }
1299
1300 /**
1301 * edid_get_quirks - return quirk flags for a given EDID
1302 * @edid: EDID to process
1303 *
1304 * This tells subsequent routines what fixes they need to apply.
1305 */
1306 static u32 edid_get_quirks(struct edid *edid)
1307 {
1308 struct edid_quirk *quirk;
1309 int i;
1310
1311 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1312 quirk = &edid_quirk_list[i];
1313
1314 if (edid_vendor(edid, quirk->vendor) &&
1315 (EDID_PRODUCT_ID(edid) == quirk->product_id))
1316 return quirk->quirks;
1317 }
1318
1319 return 0;
1320 }
1321
1322 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1323 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
1324
1325 /**
1326 * edid_fixup_preferred - set preferred modes based on quirk list
1327 * @connector: has mode list to fix up
1328 * @quirks: quirks list
1329 *
1330 * Walk the mode list for @connector, clearing the preferred status
1331 * on existing modes and setting it anew for the right mode ala @quirks.
1332 */
1333 static void edid_fixup_preferred(struct drm_connector *connector,
1334 u32 quirks)
1335 {
1336 struct drm_display_mode *t, *cur_mode, *preferred_mode;
1337 int target_refresh = 0;
1338
1339 if (list_empty(&connector->probed_modes))
1340 return;
1341
1342 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1343 target_refresh = 60;
1344 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1345 target_refresh = 75;
1346
1347 preferred_mode = list_first_entry(&connector->probed_modes,
1348 struct drm_display_mode, head);
1349
1350 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1351 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1352
1353 if (cur_mode == preferred_mode)
1354 continue;
1355
1356 /* Largest mode is preferred */
1357 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1358 preferred_mode = cur_mode;
1359
1360 /* At a given size, try to get closest to target refresh */
1361 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1362 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
1363 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
1364 preferred_mode = cur_mode;
1365 }
1366 }
1367
1368 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1369 }
1370
1371 static bool
1372 mode_is_rb(const struct drm_display_mode *mode)
1373 {
1374 return (mode->htotal - mode->hdisplay == 160) &&
1375 (mode->hsync_end - mode->hdisplay == 80) &&
1376 (mode->hsync_end - mode->hsync_start == 32) &&
1377 (mode->vsync_start - mode->vdisplay == 3);
1378 }
1379
1380 /*
1381 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1382 * @dev: Device to duplicate against
1383 * @hsize: Mode width
1384 * @vsize: Mode height
1385 * @fresh: Mode refresh rate
1386 * @rb: Mode reduced-blanking-ness
1387 *
1388 * Walk the DMT mode list looking for a match for the given parameters.
1389 * Return a newly allocated copy of the mode, or NULL if not found.
1390 */
1391 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1392 int hsize, int vsize, int fresh,
1393 bool rb)
1394 {
1395 int i;
1396
1397 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1398 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1399 if (hsize != ptr->hdisplay)
1400 continue;
1401 if (vsize != ptr->vdisplay)
1402 continue;
1403 if (fresh != drm_mode_vrefresh(ptr))
1404 continue;
1405 if (rb != mode_is_rb(ptr))
1406 continue;
1407
1408 return drm_mode_duplicate(dev, ptr);
1409 }
1410
1411 return NULL;
1412 }
1413 EXPORT_SYMBOL(drm_mode_find_dmt);
1414
1415 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1416
1417 static void
1418 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1419 {
1420 int i, n = 0;
1421 u8 d = ext[0x02];
1422 u8 *det_base = ext + d;
1423
1424 n = (127 - d) / 18;
1425 for (i = 0; i < n; i++)
1426 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1427 }
1428
1429 static void
1430 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1431 {
1432 unsigned int i, n = min((int)ext[0x02], 6);
1433 u8 *det_base = ext + 5;
1434
1435 if (ext[0x01] != 1)
1436 return; /* unknown version */
1437
1438 for (i = 0; i < n; i++)
1439 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1440 }
1441
1442 static void
1443 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1444 {
1445 int i;
1446 struct edid *edid = (struct edid *)raw_edid;
1447
1448 if (edid == NULL)
1449 return;
1450
1451 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1452 cb(&(edid->detailed_timings[i]), closure);
1453
1454 for (i = 1; i <= raw_edid[0x7e]; i++) {
1455 u8 *ext = raw_edid + (i * EDID_LENGTH);
1456 switch (*ext) {
1457 case CEA_EXT:
1458 cea_for_each_detailed_block(ext, cb, closure);
1459 break;
1460 case VTB_EXT:
1461 vtb_for_each_detailed_block(ext, cb, closure);
1462 break;
1463 default:
1464 break;
1465 }
1466 }
1467 }
1468
1469 static void
1470 is_rb(struct detailed_timing *t, void *data)
1471 {
1472 u8 *r = (u8 *)t;
1473 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1474 if (r[15] & 0x10)
1475 *(bool *)data = true;
1476 }
1477
1478 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
1479 static bool
1480 drm_monitor_supports_rb(struct edid *edid)
1481 {
1482 if (edid->revision >= 4) {
1483 bool ret = false;
1484 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1485 return ret;
1486 }
1487
1488 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1489 }
1490
1491 static void
1492 find_gtf2(struct detailed_timing *t, void *data)
1493 {
1494 u8 *r = (u8 *)t;
1495 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1496 *(u8 **)data = r;
1497 }
1498
1499 /* Secondary GTF curve kicks in above some break frequency */
1500 static int
1501 drm_gtf2_hbreak(struct edid *edid)
1502 {
1503 u8 *r = NULL;
1504 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1505 return r ? (r[12] * 2) : 0;
1506 }
1507
1508 static int
1509 drm_gtf2_2c(struct edid *edid)
1510 {
1511 u8 *r = NULL;
1512 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1513 return r ? r[13] : 0;
1514 }
1515
1516 static int
1517 drm_gtf2_m(struct edid *edid)
1518 {
1519 u8 *r = NULL;
1520 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1521 return r ? (r[15] << 8) + r[14] : 0;
1522 }
1523
1524 static int
1525 drm_gtf2_k(struct edid *edid)
1526 {
1527 u8 *r = NULL;
1528 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1529 return r ? r[16] : 0;
1530 }
1531
1532 static int
1533 drm_gtf2_2j(struct edid *edid)
1534 {
1535 u8 *r = NULL;
1536 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1537 return r ? r[17] : 0;
1538 }
1539
1540 /**
1541 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1542 * @edid: EDID block to scan
1543 */
1544 static int standard_timing_level(struct edid *edid)
1545 {
1546 if (edid->revision >= 2) {
1547 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1548 return LEVEL_CVT;
1549 if (drm_gtf2_hbreak(edid))
1550 return LEVEL_GTF2;
1551 return LEVEL_GTF;
1552 }
1553 return LEVEL_DMT;
1554 }
1555
1556 /*
1557 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
1558 * monitors fill with ascii space (0x20) instead.
1559 */
1560 static int
1561 bad_std_timing(u8 a, u8 b)
1562 {
1563 return (a == 0x00 && b == 0x00) ||
1564 (a == 0x01 && b == 0x01) ||
1565 (a == 0x20 && b == 0x20);
1566 }
1567
1568 /**
1569 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1570 * @t: standard timing params
1571 * @timing_level: standard timing level
1572 *
1573 * Take the standard timing params (in this case width, aspect, and refresh)
1574 * and convert them into a real mode using CVT/GTF/DMT.
1575 */
1576 static struct drm_display_mode *
1577 drm_mode_std(struct drm_connector *connector, struct edid *edid,
1578 struct std_timing *t, int revision)
1579 {
1580 struct drm_device *dev = connector->dev;
1581 struct drm_display_mode *m, *mode = NULL;
1582 int hsize, vsize;
1583 int vrefresh_rate;
1584 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
1585 >> EDID_TIMING_ASPECT_SHIFT;
1586 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
1587 >> EDID_TIMING_VFREQ_SHIFT;
1588 int timing_level = standard_timing_level(edid);
1589
1590 if (bad_std_timing(t->hsize, t->vfreq_aspect))
1591 return NULL;
1592
1593 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1594 hsize = t->hsize * 8 + 248;
1595 /* vrefresh_rate = vfreq + 60 */
1596 vrefresh_rate = vfreq + 60;
1597 /* the vdisplay is calculated based on the aspect ratio */
1598 if (aspect_ratio == 0) {
1599 if (revision < 3)
1600 vsize = hsize;
1601 else
1602 vsize = (hsize * 10) / 16;
1603 } else if (aspect_ratio == 1)
1604 vsize = (hsize * 3) / 4;
1605 else if (aspect_ratio == 2)
1606 vsize = (hsize * 4) / 5;
1607 else
1608 vsize = (hsize * 9) / 16;
1609
1610 /* HDTV hack, part 1 */
1611 if (vrefresh_rate == 60 &&
1612 ((hsize == 1360 && vsize == 765) ||
1613 (hsize == 1368 && vsize == 769))) {
1614 hsize = 1366;
1615 vsize = 768;
1616 }
1617
1618 /*
1619 * If this connector already has a mode for this size and refresh
1620 * rate (because it came from detailed or CVT info), use that
1621 * instead. This way we don't have to guess at interlace or
1622 * reduced blanking.
1623 */
1624 list_for_each_entry(m, &connector->probed_modes, head)
1625 if (m->hdisplay == hsize && m->vdisplay == vsize &&
1626 drm_mode_vrefresh(m) == vrefresh_rate)
1627 return NULL;
1628
1629 /* HDTV hack, part 2 */
1630 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
1631 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
1632 false);
1633 mode->hdisplay = 1366;
1634 mode->hsync_start = mode->hsync_start - 1;
1635 mode->hsync_end = mode->hsync_end - 1;
1636 return mode;
1637 }
1638
1639 /* check whether it can be found in default mode table */
1640 if (drm_monitor_supports_rb(edid)) {
1641 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
1642 true);
1643 if (mode)
1644 return mode;
1645 }
1646 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
1647 if (mode)
1648 return mode;
1649
1650 /* okay, generate it */
1651 switch (timing_level) {
1652 case LEVEL_DMT:
1653 break;
1654 case LEVEL_GTF:
1655 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1656 break;
1657 case LEVEL_GTF2:
1658 /*
1659 * This is potentially wrong if there's ever a monitor with
1660 * more than one ranges section, each claiming a different
1661 * secondary GTF curve. Please don't do that.
1662 */
1663 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1664 if (!mode)
1665 return NULL;
1666 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
1667 drm_mode_destroy(dev, mode);
1668 mode = drm_gtf_mode_complex(dev, hsize, vsize,
1669 vrefresh_rate, 0, 0,
1670 drm_gtf2_m(edid),
1671 drm_gtf2_2c(edid),
1672 drm_gtf2_k(edid),
1673 drm_gtf2_2j(edid));
1674 }
1675 break;
1676 case LEVEL_CVT:
1677 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
1678 false);
1679 break;
1680 }
1681 return mode;
1682 }
1683
1684 /*
1685 * EDID is delightfully ambiguous about how interlaced modes are to be
1686 * encoded. Our internal representation is of frame height, but some
1687 * HDTV detailed timings are encoded as field height.
1688 *
1689 * The format list here is from CEA, in frame size. Technically we
1690 * should be checking refresh rate too. Whatever.
1691 */
1692 static void
1693 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
1694 struct detailed_pixel_timing *pt)
1695 {
1696 int i;
1697 static const struct {
1698 int w, h;
1699 } cea_interlaced[] = {
1700 { 1920, 1080 },
1701 { 720, 480 },
1702 { 1440, 480 },
1703 { 2880, 480 },
1704 { 720, 576 },
1705 { 1440, 576 },
1706 { 2880, 576 },
1707 };
1708
1709 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
1710 return;
1711
1712 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
1713 if ((mode->hdisplay == cea_interlaced[i].w) &&
1714 (mode->vdisplay == cea_interlaced[i].h / 2)) {
1715 mode->vdisplay *= 2;
1716 mode->vsync_start *= 2;
1717 mode->vsync_end *= 2;
1718 mode->vtotal *= 2;
1719 mode->vtotal |= 1;
1720 }
1721 }
1722
1723 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1724 }
1725
1726 /**
1727 * drm_mode_detailed - create a new mode from an EDID detailed timing section
1728 * @dev: DRM device (needed to create new mode)
1729 * @edid: EDID block
1730 * @timing: EDID detailed timing info
1731 * @quirks: quirks to apply
1732 *
1733 * An EDID detailed timing block contains enough info for us to create and
1734 * return a new struct drm_display_mode.
1735 */
1736 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
1737 struct edid *edid,
1738 struct detailed_timing *timing,
1739 u32 quirks)
1740 {
1741 struct drm_display_mode *mode;
1742 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
1743 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
1744 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
1745 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
1746 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
1747 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
1748 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
1749 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
1750 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
1751
1752 /* ignore tiny modes */
1753 if (hactive < 64 || vactive < 64)
1754 return NULL;
1755
1756 if (pt->misc & DRM_EDID_PT_STEREO) {
1757 DRM_DEBUG_KMS("stereo mode not supported\n");
1758 return NULL;
1759 }
1760 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
1761 DRM_DEBUG_KMS("composite sync not supported\n");
1762 }
1763
1764 /* it is incorrect if hsync/vsync width is zero */
1765 if (!hsync_pulse_width || !vsync_pulse_width) {
1766 DRM_DEBUG_KMS("Incorrect Detailed timing. "
1767 "Wrong Hsync/Vsync pulse width\n");
1768 return NULL;
1769 }
1770
1771 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
1772 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
1773 if (!mode)
1774 return NULL;
1775
1776 goto set_size;
1777 }
1778
1779 mode = drm_mode_create(dev);
1780 if (!mode)
1781 return NULL;
1782
1783 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
1784 timing->pixel_clock = cpu_to_le16(1088);
1785
1786 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
1787
1788 mode->hdisplay = hactive;
1789 mode->hsync_start = mode->hdisplay + hsync_offset;
1790 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1791 mode->htotal = mode->hdisplay + hblank;
1792
1793 mode->vdisplay = vactive;
1794 mode->vsync_start = mode->vdisplay + vsync_offset;
1795 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1796 mode->vtotal = mode->vdisplay + vblank;
1797
1798 /* Some EDIDs have bogus h/vtotal values */
1799 if (mode->hsync_end > mode->htotal)
1800 mode->htotal = mode->hsync_end + 1;
1801 if (mode->vsync_end > mode->vtotal)
1802 mode->vtotal = mode->vsync_end + 1;
1803
1804 drm_mode_do_interlace_quirk(mode, pt);
1805
1806 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
1807 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
1808 }
1809
1810 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
1811 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
1812 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
1813 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
1814
1815 set_size:
1816 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
1817 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
1818
1819 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
1820 mode->width_mm *= 10;
1821 mode->height_mm *= 10;
1822 }
1823
1824 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
1825 mode->width_mm = edid->width_cm * 10;
1826 mode->height_mm = edid->height_cm * 10;
1827 }
1828
1829 mode->type = DRM_MODE_TYPE_DRIVER;
1830 mode->vrefresh = drm_mode_vrefresh(mode);
1831 drm_mode_set_name(mode);
1832
1833 return mode;
1834 }
1835
1836 static bool
1837 mode_in_hsync_range(const struct drm_display_mode *mode,
1838 struct edid *edid, u8 *t)
1839 {
1840 int hsync, hmin, hmax;
1841
1842 hmin = t[7];
1843 if (edid->revision >= 4)
1844 hmin += ((t[4] & 0x04) ? 255 : 0);
1845 hmax = t[8];
1846 if (edid->revision >= 4)
1847 hmax += ((t[4] & 0x08) ? 255 : 0);
1848 hsync = drm_mode_hsync(mode);
1849
1850 return (hsync <= hmax && hsync >= hmin);
1851 }
1852
1853 static bool
1854 mode_in_vsync_range(const struct drm_display_mode *mode,
1855 struct edid *edid, u8 *t)
1856 {
1857 int vsync, vmin, vmax;
1858
1859 vmin = t[5];
1860 if (edid->revision >= 4)
1861 vmin += ((t[4] & 0x01) ? 255 : 0);
1862 vmax = t[6];
1863 if (edid->revision >= 4)
1864 vmax += ((t[4] & 0x02) ? 255 : 0);
1865 vsync = drm_mode_vrefresh(mode);
1866
1867 return (vsync <= vmax && vsync >= vmin);
1868 }
1869
1870 static u32
1871 range_pixel_clock(struct edid *edid, u8 *t)
1872 {
1873 /* unspecified */
1874 if (t[9] == 0 || t[9] == 255)
1875 return 0;
1876
1877 /* 1.4 with CVT support gives us real precision, yay */
1878 if (edid->revision >= 4 && t[10] == 0x04)
1879 return (t[9] * 10000) - ((t[12] >> 2) * 250);
1880
1881 /* 1.3 is pathetic, so fuzz up a bit */
1882 return t[9] * 10000 + 5001;
1883 }
1884
1885 static bool
1886 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
1887 struct detailed_timing *timing)
1888 {
1889 u32 max_clock;
1890 u8 *t = (u8 *)timing;
1891
1892 if (!mode_in_hsync_range(mode, edid, t))
1893 return false;
1894
1895 if (!mode_in_vsync_range(mode, edid, t))
1896 return false;
1897
1898 if ((max_clock = range_pixel_clock(edid, t)))
1899 if (mode->clock > max_clock)
1900 return false;
1901
1902 /* 1.4 max horizontal check */
1903 if (edid->revision >= 4 && t[10] == 0x04)
1904 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1905 return false;
1906
1907 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1908 return false;
1909
1910 return true;
1911 }
1912
1913 static bool valid_inferred_mode(const struct drm_connector *connector,
1914 const struct drm_display_mode *mode)
1915 {
1916 struct drm_display_mode *m;
1917 bool ok = false;
1918
1919 list_for_each_entry(m, &connector->probed_modes, head) {
1920 if (mode->hdisplay == m->hdisplay &&
1921 mode->vdisplay == m->vdisplay &&
1922 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
1923 return false; /* duplicated */
1924 if (mode->hdisplay <= m->hdisplay &&
1925 mode->vdisplay <= m->vdisplay)
1926 ok = true;
1927 }
1928 return ok;
1929 }
1930
1931 static int
1932 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1933 struct detailed_timing *timing)
1934 {
1935 int i, modes = 0;
1936 struct drm_display_mode *newmode;
1937 struct drm_device *dev = connector->dev;
1938
1939 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1940 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
1941 valid_inferred_mode(connector, drm_dmt_modes + i)) {
1942 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1943 if (newmode) {
1944 drm_mode_probed_add(connector, newmode);
1945 modes++;
1946 }
1947 }
1948 }
1949
1950 return modes;
1951 }
1952
1953 /* fix up 1366x768 mode from 1368x768;
1954 * GFT/CVT can't express 1366 width which isn't dividable by 8
1955 */
1956 static void fixup_mode_1366x768(struct drm_display_mode *mode)
1957 {
1958 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
1959 mode->hdisplay = 1366;
1960 mode->hsync_start--;
1961 mode->hsync_end--;
1962 drm_mode_set_name(mode);
1963 }
1964 }
1965
1966 static int
1967 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1968 struct detailed_timing *timing)
1969 {
1970 int i, modes = 0;
1971 struct drm_display_mode *newmode;
1972 struct drm_device *dev = connector->dev;
1973
1974 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
1975 const struct minimode *m = &extra_modes[i];
1976 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
1977 if (!newmode)
1978 return modes;
1979
1980 fixup_mode_1366x768(newmode);
1981 if (!mode_in_range(newmode, edid, timing) ||
1982 !valid_inferred_mode(connector, newmode)) {
1983 drm_mode_destroy(dev, newmode);
1984 continue;
1985 }
1986
1987 drm_mode_probed_add(connector, newmode);
1988 modes++;
1989 }
1990
1991 return modes;
1992 }
1993
1994 static int
1995 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1996 struct detailed_timing *timing)
1997 {
1998 int i, modes = 0;
1999 struct drm_display_mode *newmode;
2000 struct drm_device *dev = connector->dev;
2001 bool rb = drm_monitor_supports_rb(edid);
2002
2003 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2004 const struct minimode *m = &extra_modes[i];
2005 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
2006 if (!newmode)
2007 return modes;
2008
2009 fixup_mode_1366x768(newmode);
2010 if (!mode_in_range(newmode, edid, timing) ||
2011 !valid_inferred_mode(connector, newmode)) {
2012 drm_mode_destroy(dev, newmode);
2013 continue;
2014 }
2015
2016 drm_mode_probed_add(connector, newmode);
2017 modes++;
2018 }
2019
2020 return modes;
2021 }
2022
2023 static void
2024 do_inferred_modes(struct detailed_timing *timing, void *c)
2025 {
2026 struct detailed_mode_closure *closure = c;
2027 struct detailed_non_pixel *data = &timing->data.other_data;
2028 struct detailed_data_monitor_range *range = &data->data.range;
2029
2030 if (data->type != EDID_DETAIL_MONITOR_RANGE)
2031 return;
2032
2033 closure->modes += drm_dmt_modes_for_range(closure->connector,
2034 closure->edid,
2035 timing);
2036
2037 if (!version_greater(closure->edid, 1, 1))
2038 return; /* GTF not defined yet */
2039
2040 switch (range->flags) {
2041 case 0x02: /* secondary gtf, XXX could do more */
2042 case 0x00: /* default gtf */
2043 closure->modes += drm_gtf_modes_for_range(closure->connector,
2044 closure->edid,
2045 timing);
2046 break;
2047 case 0x04: /* cvt, only in 1.4+ */
2048 if (!version_greater(closure->edid, 1, 3))
2049 break;
2050
2051 closure->modes += drm_cvt_modes_for_range(closure->connector,
2052 closure->edid,
2053 timing);
2054 break;
2055 case 0x01: /* just the ranges, no formula */
2056 default:
2057 break;
2058 }
2059 }
2060
2061 static int
2062 add_inferred_modes(struct drm_connector *connector, struct edid *edid)
2063 {
2064 struct detailed_mode_closure closure = {
2065 connector, edid, 0, 0, 0
2066 };
2067
2068 if (version_greater(edid, 1, 0))
2069 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
2070 &closure);
2071
2072 return closure.modes;
2073 }
2074
2075 static int
2076 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
2077 {
2078 int i, j, m, modes = 0;
2079 struct drm_display_mode *mode;
2080 u8 *est = ((u8 *)timing) + 5;
2081
2082 for (i = 0; i < 6; i++) {
2083 for (j = 7; j > 0; j--) {
2084 m = (i * 8) + (7 - j);
2085 if (m >= ARRAY_SIZE(est3_modes))
2086 break;
2087 if (est[i] & (1 << j)) {
2088 mode = drm_mode_find_dmt(connector->dev,
2089 est3_modes[m].w,
2090 est3_modes[m].h,
2091 est3_modes[m].r,
2092 est3_modes[m].rb);
2093 if (mode) {
2094 drm_mode_probed_add(connector, mode);
2095 modes++;
2096 }
2097 }
2098 }
2099 }
2100
2101 return modes;
2102 }
2103
2104 static void
2105 do_established_modes(struct detailed_timing *timing, void *c)
2106 {
2107 struct detailed_mode_closure *closure = c;
2108 struct detailed_non_pixel *data = &timing->data.other_data;
2109
2110 if (data->type == EDID_DETAIL_EST_TIMINGS)
2111 closure->modes += drm_est3_modes(closure->connector, timing);
2112 }
2113
2114 /**
2115 * add_established_modes - get est. modes from EDID and add them
2116 * @edid: EDID block to scan
2117 *
2118 * Each EDID block contains a bitmap of the supported "established modes" list
2119 * (defined above). Tease them out and add them to the global modes list.
2120 */
2121 static int
2122 add_established_modes(struct drm_connector *connector, struct edid *edid)
2123 {
2124 struct drm_device *dev = connector->dev;
2125 unsigned long est_bits = edid->established_timings.t1 |
2126 (edid->established_timings.t2 << 8) |
2127 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
2128 int i, modes = 0;
2129 struct detailed_mode_closure closure = {
2130 connector, edid, 0, 0, 0
2131 };
2132
2133 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2134 if (est_bits & (1<<i)) {
2135 struct drm_display_mode *newmode;
2136 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2137 if (newmode) {
2138 drm_mode_probed_add(connector, newmode);
2139 modes++;
2140 }
2141 }
2142 }
2143
2144 if (version_greater(edid, 1, 0))
2145 drm_for_each_detailed_block((u8 *)edid,
2146 do_established_modes, &closure);
2147
2148 return modes + closure.modes;
2149 }
2150
2151 static void
2152 do_standard_modes(struct detailed_timing *timing, void *c)
2153 {
2154 struct detailed_mode_closure *closure = c;
2155 struct detailed_non_pixel *data = &timing->data.other_data;
2156 struct drm_connector *connector = closure->connector;
2157 struct edid *edid = closure->edid;
2158
2159 if (data->type == EDID_DETAIL_STD_MODES) {
2160 int i;
2161 for (i = 0; i < 6; i++) {
2162 struct std_timing *std;
2163 struct drm_display_mode *newmode;
2164
2165 std = &data->data.timings[i];
2166 newmode = drm_mode_std(connector, edid, std,
2167 edid->revision);
2168 if (newmode) {
2169 drm_mode_probed_add(connector, newmode);
2170 closure->modes++;
2171 }
2172 }
2173 }
2174 }
2175
2176 /**
2177 * add_standard_modes - get std. modes from EDID and add them
2178 * @edid: EDID block to scan
2179 *
2180 * Standard modes can be calculated using the appropriate standard (DMT,
2181 * GTF or CVT. Grab them from @edid and add them to the list.
2182 */
2183 static int
2184 add_standard_modes(struct drm_connector *connector, struct edid *edid)
2185 {
2186 int i, modes = 0;
2187 struct detailed_mode_closure closure = {
2188 connector, edid, 0, 0, 0
2189 };
2190
2191 for (i = 0; i < EDID_STD_TIMINGS; i++) {
2192 struct drm_display_mode *newmode;
2193
2194 newmode = drm_mode_std(connector, edid,
2195 &edid->standard_timings[i],
2196 edid->revision);
2197 if (newmode) {
2198 drm_mode_probed_add(connector, newmode);
2199 modes++;
2200 }
2201 }
2202
2203 if (version_greater(edid, 1, 0))
2204 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2205 &closure);
2206
2207 /* XXX should also look for standard codes in VTB blocks */
2208
2209 return modes + closure.modes;
2210 }
2211
2212 static int drm_cvt_modes(struct drm_connector *connector,
2213 struct detailed_timing *timing)
2214 {
2215 int i, j, modes = 0;
2216 struct drm_display_mode *newmode;
2217 struct drm_device *dev = connector->dev;
2218 struct cvt_timing *cvt;
2219 const int rates[] = { 60, 85, 75, 60, 50 };
2220 const u8 empty[3] = { 0, 0, 0 };
2221
2222 for (i = 0; i < 4; i++) {
2223 int uninitialized_var(width), height;
2224 cvt = &(timing->data.other_data.data.cvt[i]);
2225
2226 if (!memcmp(cvt->code, empty, 3))
2227 continue;
2228
2229 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
2230 switch (cvt->code[1] & 0x0c) {
2231 case 0x00:
2232 width = height * 4 / 3;
2233 break;
2234 case 0x04:
2235 width = height * 16 / 9;
2236 break;
2237 case 0x08:
2238 width = height * 16 / 10;
2239 break;
2240 case 0x0c:
2241 width = height * 15 / 9;
2242 break;
2243 }
2244
2245 for (j = 1; j < 5; j++) {
2246 if (cvt->code[2] & (1 << j)) {
2247 newmode = drm_cvt_mode(dev, width, height,
2248 rates[j], j == 0,
2249 false, false);
2250 if (newmode) {
2251 drm_mode_probed_add(connector, newmode);
2252 modes++;
2253 }
2254 }
2255 }
2256 }
2257
2258 return modes;
2259 }
2260
2261 static void
2262 do_cvt_mode(struct detailed_timing *timing, void *c)
2263 {
2264 struct detailed_mode_closure *closure = c;
2265 struct detailed_non_pixel *data = &timing->data.other_data;
2266
2267 if (data->type == EDID_DETAIL_CVT_3BYTE)
2268 closure->modes += drm_cvt_modes(closure->connector, timing);
2269 }
2270
2271 static int
2272 add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2273 {
2274 struct detailed_mode_closure closure = {
2275 connector, edid, 0, 0, 0
2276 };
2277
2278 if (version_greater(edid, 1, 2))
2279 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
2280
2281 /* XXX should also look for CVT codes in VTB blocks */
2282
2283 return closure.modes;
2284 }
2285
2286 static void
2287 do_detailed_mode(struct detailed_timing *timing, void *c)
2288 {
2289 struct detailed_mode_closure *closure = c;
2290 struct drm_display_mode *newmode;
2291
2292 if (timing->pixel_clock) {
2293 newmode = drm_mode_detailed(closure->connector->dev,
2294 closure->edid, timing,
2295 closure->quirks);
2296 if (!newmode)
2297 return;
2298
2299 if (closure->preferred)
2300 newmode->type |= DRM_MODE_TYPE_PREFERRED;
2301
2302 drm_mode_probed_add(closure->connector, newmode);
2303 closure->modes++;
2304 closure->preferred = 0;
2305 }
2306 }
2307
2308 /*
2309 * add_detailed_modes - Add modes from detailed timings
2310 * @connector: attached connector
2311 * @edid: EDID block to scan
2312 * @quirks: quirks to apply
2313 */
2314 static int
2315 add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2316 u32 quirks)
2317 {
2318 struct detailed_mode_closure closure = {
2319 connector,
2320 edid,
2321 1,
2322 quirks,
2323 0
2324 };
2325
2326 if (closure.preferred && !version_greater(edid, 1, 3))
2327 closure.preferred =
2328 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
2329
2330 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
2331
2332 return closure.modes;
2333 }
2334
2335 #define AUDIO_BLOCK 0x01
2336 #define VIDEO_BLOCK 0x02
2337 #define VENDOR_BLOCK 0x03
2338 #define SPEAKER_BLOCK 0x04
2339 #define VIDEO_CAPABILITY_BLOCK 0x07
2340 #define EDID_BASIC_AUDIO (1 << 6)
2341 #define EDID_CEA_YCRCB444 (1 << 5)
2342 #define EDID_CEA_YCRCB422 (1 << 4)
2343 #define EDID_CEA_VCDB_QS (1 << 6)
2344
2345 /*
2346 * Search EDID for CEA extension block.
2347 */
2348 static u8 *drm_find_cea_extension(struct edid *edid)
2349 {
2350 u8 *edid_ext = NULL;
2351 int i;
2352
2353 /* No EDID or EDID extensions */
2354 if (edid == NULL || edid->extensions == 0)
2355 return NULL;
2356
2357 /* Find CEA extension */
2358 for (i = 0; i < edid->extensions; i++) {
2359 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
2360 if (edid_ext[0] == CEA_EXT)
2361 break;
2362 }
2363
2364 if (i == edid->extensions)
2365 return NULL;
2366
2367 return edid_ext;
2368 }
2369
2370 /*
2371 * Calculate the alternate clock for the CEA mode
2372 * (60Hz vs. 59.94Hz etc.)
2373 */
2374 static unsigned int
2375 cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
2376 {
2377 unsigned int clock = cea_mode->clock;
2378
2379 if (cea_mode->vrefresh % 6 != 0)
2380 return clock;
2381
2382 /*
2383 * edid_cea_modes contains the 59.94Hz
2384 * variant for 240 and 480 line modes,
2385 * and the 60Hz variant otherwise.
2386 */
2387 if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
2388 clock = clock * 1001 / 1000;
2389 else
2390 clock = DIV_ROUND_UP(clock * 1000, 1001);
2391
2392 return clock;
2393 }
2394
2395 /**
2396 * drm_match_cea_mode - look for a CEA mode matching given mode
2397 * @to_match: display mode
2398 *
2399 * Returns the CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2400 * mode.
2401 */
2402 u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
2403 {
2404 u8 mode;
2405
2406 if (!to_match->clock)
2407 return 0;
2408
2409 for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) {
2410 const struct drm_display_mode *cea_mode = &edid_cea_modes[mode];
2411 unsigned int clock1, clock2;
2412
2413 /* Check both 60Hz and 59.94Hz */
2414 clock1 = cea_mode->clock;
2415 clock2 = cea_mode_alternate_clock(cea_mode);
2416
2417 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2418 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2419 drm_mode_equal_no_clocks_no_stereo(to_match, cea_mode))
2420 return mode + 1;
2421 }
2422 return 0;
2423 }
2424 EXPORT_SYMBOL(drm_match_cea_mode);
2425
2426 /*
2427 * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
2428 * specific block).
2429 *
2430 * It's almost like cea_mode_alternate_clock(), we just need to add an
2431 * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
2432 * one.
2433 */
2434 static unsigned int
2435 hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
2436 {
2437 if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
2438 return hdmi_mode->clock;
2439
2440 return cea_mode_alternate_clock(hdmi_mode);
2441 }
2442
2443 /*
2444 * drm_match_hdmi_mode - look for a HDMI mode matching given mode
2445 * @to_match: display mode
2446 *
2447 * An HDMI mode is one defined in the HDMI vendor specific block.
2448 *
2449 * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
2450 */
2451 static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
2452 {
2453 u8 mode;
2454
2455 if (!to_match->clock)
2456 return 0;
2457
2458 for (mode = 0; mode < ARRAY_SIZE(edid_4k_modes); mode++) {
2459 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[mode];
2460 unsigned int clock1, clock2;
2461
2462 /* Make sure to also match alternate clocks */
2463 clock1 = hdmi_mode->clock;
2464 clock2 = hdmi_mode_alternate_clock(hdmi_mode);
2465
2466 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2467 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2468 drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode))
2469 return mode + 1;
2470 }
2471 return 0;
2472 }
2473
2474 static int
2475 add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
2476 {
2477 struct drm_device *dev = connector->dev;
2478 struct drm_display_mode *mode, *tmp;
2479 LIST_HEAD(list);
2480 int modes = 0;
2481
2482 /* Don't add CEA modes if the CEA extension block is missing */
2483 if (!drm_find_cea_extension(edid))
2484 return 0;
2485
2486 /*
2487 * Go through all probed modes and create a new mode
2488 * with the alternate clock for certain CEA modes.
2489 */
2490 list_for_each_entry(mode, &connector->probed_modes, head) {
2491 const struct drm_display_mode *cea_mode = NULL;
2492 struct drm_display_mode *newmode;
2493 u8 mode_idx = drm_match_cea_mode(mode) - 1;
2494 unsigned int clock1, clock2;
2495
2496 if (mode_idx < ARRAY_SIZE(edid_cea_modes)) {
2497 cea_mode = &edid_cea_modes[mode_idx];
2498 clock2 = cea_mode_alternate_clock(cea_mode);
2499 } else {
2500 mode_idx = drm_match_hdmi_mode(mode) - 1;
2501 if (mode_idx < ARRAY_SIZE(edid_4k_modes)) {
2502 cea_mode = &edid_4k_modes[mode_idx];
2503 clock2 = hdmi_mode_alternate_clock(cea_mode);
2504 }
2505 }
2506
2507 if (!cea_mode)
2508 continue;
2509
2510 clock1 = cea_mode->clock;
2511
2512 if (clock1 == clock2)
2513 continue;
2514
2515 if (mode->clock != clock1 && mode->clock != clock2)
2516 continue;
2517
2518 newmode = drm_mode_duplicate(dev, cea_mode);
2519 if (!newmode)
2520 continue;
2521
2522 /* Carry over the stereo flags */
2523 newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK;
2524
2525 /*
2526 * The current mode could be either variant. Make
2527 * sure to pick the "other" clock for the new mode.
2528 */
2529 if (mode->clock != clock1)
2530 newmode->clock = clock1;
2531 else
2532 newmode->clock = clock2;
2533
2534 list_add_tail(&newmode->head, &list);
2535 }
2536
2537 list_for_each_entry_safe(mode, tmp, &list, head) {
2538 list_del(&mode->head);
2539 drm_mode_probed_add(connector, mode);
2540 modes++;
2541 }
2542
2543 return modes;
2544 }
2545
2546 static int
2547 do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len)
2548 {
2549 struct drm_device *dev = connector->dev;
2550 const u8 *mode;
2551 u8 cea_mode;
2552 int modes = 0;
2553
2554 for (mode = db; mode < db + len; mode++) {
2555 cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */
2556 if (cea_mode < ARRAY_SIZE(edid_cea_modes)) {
2557 struct drm_display_mode *newmode;
2558 newmode = drm_mode_duplicate(dev,
2559 &edid_cea_modes[cea_mode]);
2560 if (newmode) {
2561 newmode->vrefresh = 0;
2562 drm_mode_probed_add(connector, newmode);
2563 modes++;
2564 }
2565 }
2566 }
2567
2568 return modes;
2569 }
2570
2571 struct stereo_mandatory_mode {
2572 int width, height, vrefresh;
2573 unsigned int flags;
2574 };
2575
2576 static const struct stereo_mandatory_mode stereo_mandatory_modes[] = {
2577 { 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2578 { 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING },
2579 { 1920, 1080, 50,
2580 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2581 { 1920, 1080, 60,
2582 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2583 { 1280, 720, 50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2584 { 1280, 720, 50, DRM_MODE_FLAG_3D_FRAME_PACKING },
2585 { 1280, 720, 60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2586 { 1280, 720, 60, DRM_MODE_FLAG_3D_FRAME_PACKING }
2587 };
2588
2589 static bool
2590 stereo_match_mandatory(const struct drm_display_mode *mode,
2591 const struct stereo_mandatory_mode *stereo_mode)
2592 {
2593 unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
2594
2595 return mode->hdisplay == stereo_mode->width &&
2596 mode->vdisplay == stereo_mode->height &&
2597 interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) &&
2598 drm_mode_vrefresh(mode) == stereo_mode->vrefresh;
2599 }
2600
2601 static int add_hdmi_mandatory_stereo_modes(struct drm_connector *connector)
2602 {
2603 struct drm_device *dev = connector->dev;
2604 const struct drm_display_mode *mode;
2605 struct list_head stereo_modes;
2606 int modes = 0, i;
2607
2608 INIT_LIST_HEAD(&stereo_modes);
2609
2610 list_for_each_entry(mode, &connector->probed_modes, head) {
2611 for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++) {
2612 const struct stereo_mandatory_mode *mandatory;
2613 struct drm_display_mode *new_mode;
2614
2615 if (!stereo_match_mandatory(mode,
2616 &stereo_mandatory_modes[i]))
2617 continue;
2618
2619 mandatory = &stereo_mandatory_modes[i];
2620 new_mode = drm_mode_duplicate(dev, mode);
2621 if (!new_mode)
2622 continue;
2623
2624 new_mode->flags |= mandatory->flags;
2625 list_add_tail(&new_mode->head, &stereo_modes);
2626 modes++;
2627 }
2628 }
2629
2630 list_splice_tail(&stereo_modes, &connector->probed_modes);
2631
2632 return modes;
2633 }
2634
2635 static int add_hdmi_mode(struct drm_connector *connector, u8 vic)
2636 {
2637 struct drm_device *dev = connector->dev;
2638 struct drm_display_mode *newmode;
2639
2640 vic--; /* VICs start at 1 */
2641 if (vic >= ARRAY_SIZE(edid_4k_modes)) {
2642 DRM_ERROR("Unknown HDMI VIC: %d\n", vic);
2643 return 0;
2644 }
2645
2646 newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]);
2647 if (!newmode)
2648 return 0;
2649
2650 drm_mode_probed_add(connector, newmode);
2651
2652 return 1;
2653 }
2654
2655 /*
2656 * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
2657 * @connector: connector corresponding to the HDMI sink
2658 * @db: start of the CEA vendor specific block
2659 * @len: length of the CEA block payload, ie. one can access up to db[len]
2660 *
2661 * Parses the HDMI VSDB looking for modes to add to @connector. This function
2662 * also adds the stereo 3d modes when applicable.
2663 */
2664 static int
2665 do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len)
2666 {
2667 int modes = 0, offset = 0, i;
2668 u8 vic_len;
2669
2670 if (len < 8)
2671 goto out;
2672
2673 /* no HDMI_Video_Present */
2674 if (!(db[8] & (1 << 5)))
2675 goto out;
2676
2677 /* Latency_Fields_Present */
2678 if (db[8] & (1 << 7))
2679 offset += 2;
2680
2681 /* I_Latency_Fields_Present */
2682 if (db[8] & (1 << 6))
2683 offset += 2;
2684
2685 /* the declared length is not long enough for the 2 first bytes
2686 * of additional video format capabilities */
2687 if (len < (8 + offset + 2))
2688 goto out;
2689
2690 /* 3D_Present */
2691 offset++;
2692 if (db[8 + offset] & (1 << 7))
2693 modes += add_hdmi_mandatory_stereo_modes(connector);
2694
2695 offset++;
2696 vic_len = db[8 + offset] >> 5;
2697
2698 for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {
2699 u8 vic;
2700
2701 vic = db[9 + offset + i];
2702 modes += add_hdmi_mode(connector, vic);
2703 }
2704
2705 out:
2706 return modes;
2707 }
2708
2709 static int
2710 cea_db_payload_len(const u8 *db)
2711 {
2712 return db[0] & 0x1f;
2713 }
2714
2715 static int
2716 cea_db_tag(const u8 *db)
2717 {
2718 return db[0] >> 5;
2719 }
2720
2721 static int
2722 cea_revision(const u8 *cea)
2723 {
2724 return cea[1];
2725 }
2726
2727 static int
2728 cea_db_offsets(const u8 *cea, int *start, int *end)
2729 {
2730 /* Data block offset in CEA extension block */
2731 *start = 4;
2732 *end = cea[2];
2733 if (*end == 0)
2734 *end = 127;
2735 if (*end < 4 || *end > 127)
2736 return -ERANGE;
2737 return 0;
2738 }
2739
2740 static bool cea_db_is_hdmi_vsdb(const u8 *db)
2741 {
2742 int hdmi_id;
2743
2744 if (cea_db_tag(db) != VENDOR_BLOCK)
2745 return false;
2746
2747 if (cea_db_payload_len(db) < 5)
2748 return false;
2749
2750 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
2751
2752 return hdmi_id == HDMI_IEEE_OUI;
2753 }
2754
2755 #define for_each_cea_db(cea, i, start, end) \
2756 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
2757
2758 static int
2759 add_cea_modes(struct drm_connector *connector, struct edid *edid)
2760 {
2761 const u8 *cea = drm_find_cea_extension(edid);
2762 const u8 *db, *hdmi = NULL;
2763 u8 dbl, hdmi_len;
2764 int modes = 0;
2765
2766 if (cea && cea_revision(cea) >= 3) {
2767 int i, start, end;
2768
2769 if (cea_db_offsets(cea, &start, &end))
2770 return 0;
2771
2772 for_each_cea_db(cea, i, start, end) {
2773 db = &cea[i];
2774 dbl = cea_db_payload_len(db);
2775
2776 if (cea_db_tag(db) == VIDEO_BLOCK)
2777 modes += do_cea_modes(connector, db + 1, dbl);
2778 else if (cea_db_is_hdmi_vsdb(db)) {
2779 hdmi = db;
2780 hdmi_len = dbl;
2781 }
2782 }
2783 }
2784
2785 /*
2786 * We parse the HDMI VSDB after having added the cea modes as we will
2787 * be patching their flags when the sink supports stereo 3D.
2788 */
2789 if (hdmi)
2790 modes += do_hdmi_vsdb_modes(connector, hdmi, hdmi_len);
2791
2792 return modes;
2793 }
2794
2795 static void
2796 parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
2797 {
2798 u8 len = cea_db_payload_len(db);
2799
2800 if (len >= 6) {
2801 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
2802 connector->dvi_dual = db[6] & 1;
2803 }
2804 if (len >= 7)
2805 connector->max_tmds_clock = db[7] * 5;
2806 if (len >= 8) {
2807 connector->latency_present[0] = db[8] >> 7;
2808 connector->latency_present[1] = (db[8] >> 6) & 1;
2809 }
2810 if (len >= 9)
2811 connector->video_latency[0] = db[9];
2812 if (len >= 10)
2813 connector->audio_latency[0] = db[10];
2814 if (len >= 11)
2815 connector->video_latency[1] = db[11];
2816 if (len >= 12)
2817 connector->audio_latency[1] = db[12];
2818
2819 DRM_DEBUG_KMS("HDMI: DVI dual %d, "
2820 "max TMDS clock %d, "
2821 "latency present %d %d, "
2822 "video latency %d %d, "
2823 "audio latency %d %d\n",
2824 connector->dvi_dual,
2825 connector->max_tmds_clock,
2826 (int) connector->latency_present[0],
2827 (int) connector->latency_present[1],
2828 connector->video_latency[0],
2829 connector->video_latency[1],
2830 connector->audio_latency[0],
2831 connector->audio_latency[1]);
2832 }
2833
2834 static void
2835 monitor_name(struct detailed_timing *t, void *data)
2836 {
2837 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
2838 *(u8 **)data = t->data.other_data.data.str.str;
2839 }
2840
2841 /**
2842 * drm_edid_to_eld - build ELD from EDID
2843 * @connector: connector corresponding to the HDMI/DP sink
2844 * @edid: EDID to parse
2845 *
2846 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver.
2847 * Some ELD fields are left to the graphics driver caller:
2848 * - Conn_Type
2849 * - HDCP
2850 * - Port_ID
2851 */
2852 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
2853 {
2854 uint8_t *eld = connector->eld;
2855 u8 *cea;
2856 u8 *name;
2857 u8 *db;
2858 int sad_count = 0;
2859 int mnl;
2860 int dbl;
2861
2862 memset(eld, 0, sizeof(connector->eld));
2863
2864 cea = drm_find_cea_extension(edid);
2865 if (!cea) {
2866 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
2867 return;
2868 }
2869
2870 name = NULL;
2871 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
2872 for (mnl = 0; name && mnl < 13; mnl++) {
2873 if (name[mnl] == 0x0a)
2874 break;
2875 eld[20 + mnl] = name[mnl];
2876 }
2877 eld[4] = (cea[1] << 5) | mnl;
2878 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
2879
2880 eld[0] = 2 << 3; /* ELD version: 2 */
2881
2882 eld[16] = edid->mfg_id[0];
2883 eld[17] = edid->mfg_id[1];
2884 eld[18] = edid->prod_code[0];
2885 eld[19] = edid->prod_code[1];
2886
2887 if (cea_revision(cea) >= 3) {
2888 int i, start, end;
2889
2890 if (cea_db_offsets(cea, &start, &end)) {
2891 start = 0;
2892 end = 0;
2893 }
2894
2895 for_each_cea_db(cea, i, start, end) {
2896 db = &cea[i];
2897 dbl = cea_db_payload_len(db);
2898
2899 switch (cea_db_tag(db)) {
2900 case AUDIO_BLOCK:
2901 /* Audio Data Block, contains SADs */
2902 sad_count = dbl / 3;
2903 if (dbl >= 1)
2904 memcpy(eld + 20 + mnl, &db[1], dbl);
2905 break;
2906 case SPEAKER_BLOCK:
2907 /* Speaker Allocation Data Block */
2908 if (dbl >= 1)
2909 eld[7] = db[1];
2910 break;
2911 case VENDOR_BLOCK:
2912 /* HDMI Vendor-Specific Data Block */
2913 if (cea_db_is_hdmi_vsdb(db))
2914 parse_hdmi_vsdb(connector, db);
2915 break;
2916 default:
2917 break;
2918 }
2919 }
2920 }
2921 eld[5] |= sad_count << 4;
2922 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
2923
2924 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count);
2925 }
2926 EXPORT_SYMBOL(drm_edid_to_eld);
2927
2928 /**
2929 * drm_edid_to_sad - extracts SADs from EDID
2930 * @edid: EDID to parse
2931 * @sads: pointer that will be set to the extracted SADs
2932 *
2933 * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
2934 * Note: returned pointer needs to be kfreed
2935 *
2936 * Return number of found SADs or negative number on error.
2937 */
2938 int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
2939 {
2940 int count = 0;
2941 int i, start, end, dbl;
2942 u8 *cea;
2943
2944 cea = drm_find_cea_extension(edid);
2945 if (!cea) {
2946 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
2947 return -ENOENT;
2948 }
2949
2950 if (cea_revision(cea) < 3) {
2951 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
2952 return -ENOTSUPP;
2953 }
2954
2955 if (cea_db_offsets(cea, &start, &end)) {
2956 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
2957 return -EPROTO;
2958 }
2959
2960 for_each_cea_db(cea, i, start, end) {
2961 u8 *db = &cea[i];
2962
2963 if (cea_db_tag(db) == AUDIO_BLOCK) {
2964 int j;
2965 dbl = cea_db_payload_len(db);
2966
2967 count = dbl / 3; /* SAD is 3B */
2968 *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL);
2969 if (!*sads)
2970 return -ENOMEM;
2971 for (j = 0; j < count; j++) {
2972 u8 *sad = &db[1 + j * 3];
2973
2974 (*sads)[j].format = (sad[0] & 0x78) >> 3;
2975 (*sads)[j].channels = sad[0] & 0x7;
2976 (*sads)[j].freq = sad[1] & 0x7F;
2977 (*sads)[j].byte2 = sad[2];
2978 }
2979 break;
2980 }
2981 }
2982
2983 return count;
2984 }
2985 EXPORT_SYMBOL(drm_edid_to_sad);
2986
2987 /**
2988 * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
2989 * @edid: EDID to parse
2990 * @sadb: pointer to the speaker block
2991 *
2992 * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it.
2993 * Note: returned pointer needs to be kfreed
2994 *
2995 * Return number of found Speaker Allocation Blocks or negative number on error.
2996 */
2997 int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb)
2998 {
2999 int count = 0;
3000 int i, start, end, dbl;
3001 const u8 *cea;
3002
3003 cea = drm_find_cea_extension(edid);
3004 if (!cea) {
3005 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3006 return -ENOENT;
3007 }
3008
3009 if (cea_revision(cea) < 3) {
3010 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3011 return -ENOTSUPP;
3012 }
3013
3014 if (cea_db_offsets(cea, &start, &end)) {
3015 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3016 return -EPROTO;
3017 }
3018
3019 for_each_cea_db(cea, i, start, end) {
3020 const u8 *db = &cea[i];
3021
3022 if (cea_db_tag(db) == SPEAKER_BLOCK) {
3023 dbl = cea_db_payload_len(db);
3024
3025 /* Speaker Allocation Data Block */
3026 if (dbl == 3) {
3027 *sadb = kmalloc(dbl, GFP_KERNEL);
3028 if (!*sadb)
3029 return -ENOMEM;
3030 memcpy(*sadb, &db[1], dbl);
3031 count = dbl;
3032 break;
3033 }
3034 }
3035 }
3036
3037 return count;
3038 }
3039 EXPORT_SYMBOL(drm_edid_to_speaker_allocation);
3040
3041 /**
3042 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond
3043 * @connector: connector associated with the HDMI/DP sink
3044 * @mode: the display mode
3045 */
3046 int drm_av_sync_delay(struct drm_connector *connector,
3047 struct drm_display_mode *mode)
3048 {
3049 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
3050 int a, v;
3051
3052 if (!connector->latency_present[0])
3053 return 0;
3054 if (!connector->latency_present[1])
3055 i = 0;
3056
3057 a = connector->audio_latency[i];
3058 v = connector->video_latency[i];
3059
3060 /*
3061 * HDMI/DP sink doesn't support audio or video?
3062 */
3063 if (a == 255 || v == 255)
3064 return 0;
3065
3066 /*
3067 * Convert raw EDID values to millisecond.
3068 * Treat unknown latency as 0ms.
3069 */
3070 if (a)
3071 a = min(2 * (a - 1), 500);
3072 if (v)
3073 v = min(2 * (v - 1), 500);
3074
3075 return max(v - a, 0);
3076 }
3077 EXPORT_SYMBOL(drm_av_sync_delay);
3078
3079 /**
3080 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
3081 * @encoder: the encoder just changed display mode
3082 * @mode: the adjusted display mode
3083 *
3084 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
3085 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
3086 */
3087 struct drm_connector *drm_select_eld(struct drm_encoder *encoder,
3088 struct drm_display_mode *mode)
3089 {
3090 struct drm_connector *connector;
3091 struct drm_device *dev = encoder->dev;
3092
3093 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
3094 if (connector->encoder == encoder && connector->eld[0])
3095 return connector;
3096
3097 return NULL;
3098 }
3099 EXPORT_SYMBOL(drm_select_eld);
3100
3101 /**
3102 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
3103 * @edid: monitor EDID information
3104 *
3105 * Parse the CEA extension according to CEA-861-B.
3106 * Return true if HDMI, false if not or unknown.
3107 */
3108 bool drm_detect_hdmi_monitor(struct edid *edid)
3109 {
3110 u8 *edid_ext;
3111 int i;
3112 int start_offset, end_offset;
3113
3114 edid_ext = drm_find_cea_extension(edid);
3115 if (!edid_ext)
3116 return false;
3117
3118 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3119 return false;
3120
3121 /*
3122 * Because HDMI identifier is in Vendor Specific Block,
3123 * search it from all data blocks of CEA extension.
3124 */
3125 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3126 if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
3127 return true;
3128 }
3129
3130 return false;
3131 }
3132 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
3133
3134 /**
3135 * drm_detect_monitor_audio - check monitor audio capability
3136 *
3137 * Monitor should have CEA extension block.
3138 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
3139 * audio' only. If there is any audio extension block and supported
3140 * audio format, assume at least 'basic audio' support, even if 'basic
3141 * audio' is not defined in EDID.
3142 *
3143 */
3144 bool drm_detect_monitor_audio(struct edid *edid)
3145 {
3146 u8 *edid_ext;
3147 int i, j;
3148 bool has_audio = false;
3149 int start_offset, end_offset;
3150
3151 edid_ext = drm_find_cea_extension(edid);
3152 if (!edid_ext)
3153 goto end;
3154
3155 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
3156
3157 if (has_audio) {
3158 DRM_DEBUG_KMS("Monitor has basic audio support\n");
3159 goto end;
3160 }
3161
3162 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3163 goto end;
3164
3165 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3166 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
3167 has_audio = true;
3168 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
3169 DRM_DEBUG_KMS("CEA audio format %d\n",
3170 (edid_ext[i + j] >> 3) & 0xf);
3171 goto end;
3172 }
3173 }
3174 end:
3175 return has_audio;
3176 }
3177 EXPORT_SYMBOL(drm_detect_monitor_audio);
3178
3179 /**
3180 * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
3181 *
3182 * Check whether the monitor reports the RGB quantization range selection
3183 * as supported. The AVI infoframe can then be used to inform the monitor
3184 * which quantization range (full or limited) is used.
3185 */
3186 bool drm_rgb_quant_range_selectable(struct edid *edid)
3187 {
3188 u8 *edid_ext;
3189 int i, start, end;
3190
3191 edid_ext = drm_find_cea_extension(edid);
3192 if (!edid_ext)
3193 return false;
3194
3195 if (cea_db_offsets(edid_ext, &start, &end))
3196 return false;
3197
3198 for_each_cea_db(edid_ext, i, start, end) {
3199 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
3200 cea_db_payload_len(&edid_ext[i]) == 2) {
3201 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
3202 return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
3203 }
3204 }
3205
3206 return false;
3207 }
3208 EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
3209
3210 /**
3211 * drm_add_display_info - pull display info out if present
3212 * @edid: EDID data
3213 * @info: display info (attached to connector)
3214 *
3215 * Grab any available display info and stuff it into the drm_display_info
3216 * structure that's part of the connector. Useful for tracking bpp and
3217 * color spaces.
3218 */
3219 static void drm_add_display_info(struct edid *edid,
3220 struct drm_display_info *info)
3221 {
3222 u8 *edid_ext;
3223
3224 info->width_mm = edid->width_cm * 10;
3225 info->height_mm = edid->height_cm * 10;
3226
3227 /* driver figures it out in this case */
3228 info->bpc = 0;
3229 info->color_formats = 0;
3230
3231 if (edid->revision < 3)
3232 return;
3233
3234 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
3235 return;
3236
3237 /* Get data from CEA blocks if present */
3238 edid_ext = drm_find_cea_extension(edid);
3239 if (edid_ext) {
3240 info->cea_rev = edid_ext[1];
3241
3242 /* The existence of a CEA block should imply RGB support */
3243 info->color_formats = DRM_COLOR_FORMAT_RGB444;
3244 if (edid_ext[3] & EDID_CEA_YCRCB444)
3245 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3246 if (edid_ext[3] & EDID_CEA_YCRCB422)
3247 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3248 }
3249
3250 /* Only defined for 1.4 with digital displays */
3251 if (edid->revision < 4)
3252 return;
3253
3254 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
3255 case DRM_EDID_DIGITAL_DEPTH_6:
3256 info->bpc = 6;
3257 break;
3258 case DRM_EDID_DIGITAL_DEPTH_8:
3259 info->bpc = 8;
3260 break;
3261 case DRM_EDID_DIGITAL_DEPTH_10:
3262 info->bpc = 10;
3263 break;
3264 case DRM_EDID_DIGITAL_DEPTH_12:
3265 info->bpc = 12;
3266 break;
3267 case DRM_EDID_DIGITAL_DEPTH_14:
3268 info->bpc = 14;
3269 break;
3270 case DRM_EDID_DIGITAL_DEPTH_16:
3271 info->bpc = 16;
3272 break;
3273 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
3274 default:
3275 info->bpc = 0;
3276 break;
3277 }
3278
3279 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
3280 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
3281 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3282 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
3283 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3284 }
3285
3286 /**
3287 * drm_add_edid_modes - add modes from EDID data, if available
3288 * @connector: connector we're probing
3289 * @edid: edid data
3290 *
3291 * Add the specified modes to the connector's mode list.
3292 *
3293 * Return number of modes added or 0 if we couldn't find any.
3294 */
3295 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
3296 {
3297 int num_modes = 0;
3298 u32 quirks;
3299
3300 if (edid == NULL) {
3301 return 0;
3302 }
3303 if (!drm_edid_is_valid(edid)) {
3304 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
3305 drm_get_connector_name(connector));
3306 return 0;
3307 }
3308
3309 quirks = edid_get_quirks(edid);
3310
3311 /*
3312 * EDID spec says modes should be preferred in this order:
3313 * - preferred detailed mode
3314 * - other detailed modes from base block
3315 * - detailed modes from extension blocks
3316 * - CVT 3-byte code modes
3317 * - standard timing codes
3318 * - established timing codes
3319 * - modes inferred from GTF or CVT range information
3320 *
3321 * We get this pretty much right.
3322 *
3323 * XXX order for additional mode types in extension blocks?
3324 */
3325 num_modes += add_detailed_modes(connector, edid, quirks);
3326 num_modes += add_cvt_modes(connector, edid);
3327 num_modes += add_standard_modes(connector, edid);
3328 num_modes += add_established_modes(connector, edid);
3329 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
3330 num_modes += add_inferred_modes(connector, edid);
3331 num_modes += add_cea_modes(connector, edid);
3332 num_modes += add_alternate_cea_modes(connector, edid);
3333
3334 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
3335 edid_fixup_preferred(connector, quirks);
3336
3337 drm_add_display_info(edid, &connector->display_info);
3338
3339 return num_modes;
3340 }
3341 EXPORT_SYMBOL(drm_add_edid_modes);
3342
3343 /**
3344 * drm_add_modes_noedid - add modes for the connectors without EDID
3345 * @connector: connector we're probing
3346 * @hdisplay: the horizontal display limit
3347 * @vdisplay: the vertical display limit
3348 *
3349 * Add the specified modes to the connector's mode list. Only when the
3350 * hdisplay/vdisplay is not beyond the given limit, it will be added.
3351 *
3352 * Return number of modes added or 0 if we couldn't find any.
3353 */
3354 int drm_add_modes_noedid(struct drm_connector *connector,
3355 int hdisplay, int vdisplay)
3356 {
3357 int i, count, num_modes = 0;
3358 struct drm_display_mode *mode;
3359 struct drm_device *dev = connector->dev;
3360
3361 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
3362 if (hdisplay < 0)
3363 hdisplay = 0;
3364 if (vdisplay < 0)
3365 vdisplay = 0;
3366
3367 for (i = 0; i < count; i++) {
3368 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
3369 if (hdisplay && vdisplay) {
3370 /*
3371 * Only when two are valid, they will be used to check
3372 * whether the mode should be added to the mode list of
3373 * the connector.
3374 */
3375 if (ptr->hdisplay > hdisplay ||
3376 ptr->vdisplay > vdisplay)
3377 continue;
3378 }
3379 if (drm_mode_vrefresh(ptr) > 61)
3380 continue;
3381 mode = drm_mode_duplicate(dev, ptr);
3382 if (mode) {
3383 drm_mode_probed_add(connector, mode);
3384 num_modes++;
3385 }
3386 }
3387 return num_modes;
3388 }
3389 EXPORT_SYMBOL(drm_add_modes_noedid);
3390
3391 /**
3392 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
3393 * data from a DRM display mode
3394 * @frame: HDMI AVI infoframe
3395 * @mode: DRM display mode
3396 *
3397 * Returns 0 on success or a negative error code on failure.
3398 */
3399 int
3400 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
3401 const struct drm_display_mode *mode)
3402 {
3403 int err;
3404
3405 if (!frame || !mode)
3406 return -EINVAL;
3407
3408 err = hdmi_avi_infoframe_init(frame);
3409 if (err < 0)
3410 return err;
3411
3412 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
3413 frame->pixel_repeat = 1;
3414
3415 frame->video_code = drm_match_cea_mode(mode);
3416
3417 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
3418 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
3419
3420 return 0;
3421 }
3422 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
3423
3424 static enum hdmi_3d_structure
3425 s3d_structure_from_display_mode(const struct drm_display_mode *mode)
3426 {
3427 u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK;
3428
3429 switch (layout) {
3430 case DRM_MODE_FLAG_3D_FRAME_PACKING:
3431 return HDMI_3D_STRUCTURE_FRAME_PACKING;
3432 case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE:
3433 return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE;
3434 case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE:
3435 return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE;
3436 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL:
3437 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL;
3438 case DRM_MODE_FLAG_3D_L_DEPTH:
3439 return HDMI_3D_STRUCTURE_L_DEPTH;
3440 case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH:
3441 return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH;
3442 case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM:
3443 return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM;
3444 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF:
3445 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF;
3446 default:
3447 return HDMI_3D_STRUCTURE_INVALID;
3448 }
3449 }
3450
3451 /**
3452 * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
3453 * data from a DRM display mode
3454 * @frame: HDMI vendor infoframe
3455 * @mode: DRM display mode
3456 *
3457 * Note that there's is a need to send HDMI vendor infoframes only when using a
3458 * 4k or stereoscopic 3D mode. So when giving any other mode as input this
3459 * function will return -EINVAL, error that can be safely ignored.
3460 *
3461 * Returns 0 on success or a negative error code on failure.
3462 */
3463 int
3464 drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
3465 const struct drm_display_mode *mode)
3466 {
3467 int err;
3468 u32 s3d_flags;
3469 u8 vic;
3470
3471 if (!frame || !mode)
3472 return -EINVAL;
3473
3474 vic = drm_match_hdmi_mode(mode);
3475 s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK;
3476
3477 if (!vic && !s3d_flags)
3478 return -EINVAL;
3479
3480 if (vic && s3d_flags)
3481 return -EINVAL;
3482
3483 err = hdmi_vendor_infoframe_init(frame);
3484 if (err < 0)
3485 return err;
3486
3487 if (vic)
3488 frame->vic = vic;
3489 else
3490 frame->s3d_struct = s3d_structure_from_display_mode(mode);
3491
3492 return 0;
3493 }
3494 EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode);
Linux kernel - Deliverables
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