2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
30 #include <linux/kernel.h>
31 #include <linux/i2c.h>
32 #include <linux/i2c-algo-bit.h>
37 * EDID blocks out in the wild have a variety of bugs, try to collect
38 * them here (note that userspace may work around broken monitors first,
39 * but fixes should make their way here so that the kernel "just works"
40 * on as many displays as possible).
43 /* First detailed mode wrong, use largest 60Hz mode */
44 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
45 /* Reported 135MHz pixel clock is too high, needs adjustment */
46 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
47 /* Prefer the largest mode at 75 Hz */
48 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
49 /* Detail timing is in cm not mm */
50 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
51 /* Detailed timing descriptors have bogus size values, so just take the
52 * maximum size and use that.
54 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
55 /* Monitor forgot to set the first detailed is preferred bit. */
56 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
57 /* use +hsync +vsync for detailed mode */
58 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
65 static struct edid_quirk
{
69 } edid_quirk_list
[] = {
71 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60
},
73 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60
},
75 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED
},
77 /* Belinea 10 15 55 */
78 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60
},
79 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60
},
81 /* Envision Peripherals, Inc. EN-7100e */
82 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH
},
84 /* Funai Electronics PM36B */
85 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75
|
86 EDID_QUIRK_DETAILED_IN_CM
},
88 /* LG Philips LCD LP154W01-A5 */
89 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE
},
90 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE
},
92 /* Philips 107p5 CRT */
93 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED
},
96 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED
},
98 /* Samsung SyncMaster 205BW. Note: irony */
99 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP
},
100 /* Samsung SyncMaster 22[5-6]BW */
101 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60
},
102 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60
},
105 /*** DDC fetch and block validation ***/
107 static const u8 edid_header
[] = {
108 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
112 * Sanity check the EDID block (base or extension). Return 0 if the block
113 * doesn't check out, or 1 if it's valid.
116 drm_edid_block_valid(u8
*raw_edid
)
120 struct edid
*edid
= (struct edid
*)raw_edid
;
122 if (raw_edid
[0] == 0x00) {
125 for (i
= 0; i
< sizeof(edid_header
); i
++)
126 if (raw_edid
[i
] == edid_header
[i
])
130 else if (score
>= 6) {
131 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
132 memcpy(raw_edid
, edid_header
, sizeof(edid_header
));
138 for (i
= 0; i
< EDID_LENGTH
; i
++)
141 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum
);
145 /* per-block-type checks */
146 switch (raw_edid
[0]) {
148 if (edid
->version
!= 1) {
149 DRM_ERROR("EDID has major version %d, instead of 1\n", edid
->version
);
153 if (edid
->revision
> 4)
154 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
165 DRM_ERROR("Raw EDID:\n");
166 print_hex_dump_bytes(KERN_ERR
, DUMP_PREFIX_NONE
, raw_edid
, EDID_LENGTH
);
173 * drm_edid_is_valid - sanity check EDID data
176 * Sanity-check an entire EDID record (including extensions)
178 bool drm_edid_is_valid(struct edid
*edid
)
181 u8
*raw
= (u8
*)edid
;
186 for (i
= 0; i
<= edid
->extensions
; i
++)
187 if (!drm_edid_block_valid(raw
+ i
* EDID_LENGTH
))
192 EXPORT_SYMBOL(drm_edid_is_valid
);
194 #define DDC_ADDR 0x50
195 #define DDC_SEGMENT_ADDR 0x30
197 * Get EDID information via I2C.
199 * \param adapter : i2c device adaptor
200 * \param buf : EDID data buffer to be filled
201 * \param len : EDID data buffer length
202 * \return 0 on success or -1 on failure.
204 * Try to fetch EDID information by calling i2c driver function.
207 drm_do_probe_ddc_edid(struct i2c_adapter
*adapter
, unsigned char *buf
,
210 unsigned char start
= block
* EDID_LENGTH
;
211 struct i2c_msg msgs
[] = {
225 if (i2c_transfer(adapter
, msgs
, 2) == 2)
232 drm_do_get_edid(struct drm_connector
*connector
, struct i2c_adapter
*adapter
)
237 if ((block
= kmalloc(EDID_LENGTH
, GFP_KERNEL
)) == NULL
)
240 /* base block fetch */
241 for (i
= 0; i
< 4; i
++) {
242 if (drm_do_probe_ddc_edid(adapter
, block
, 0, EDID_LENGTH
))
244 if (drm_edid_block_valid(block
))
250 /* if there's no extensions, we're done */
251 if (block
[0x7e] == 0)
254 new = krealloc(block
, (block
[0x7e] + 1) * EDID_LENGTH
, GFP_KERNEL
);
259 for (j
= 1; j
<= block
[0x7e]; j
++) {
260 for (i
= 0; i
< 4; i
++) {
261 if (drm_do_probe_ddc_edid(adapter
, block
, j
,
264 if (drm_edid_block_valid(block
+ j
* EDID_LENGTH
))
274 dev_warn(&connector
->dev
->pdev
->dev
, "%s: EDID block %d invalid.\n",
275 drm_get_connector_name(connector
), j
);
283 * Probe DDC presence.
285 * \param adapter : i2c device adaptor
286 * \return 1 on success
289 drm_probe_ddc(struct i2c_adapter
*adapter
)
293 return (drm_do_probe_ddc_edid(adapter
, &out
, 0, 1) == 0);
297 * drm_get_edid - get EDID data, if available
298 * @connector: connector we're probing
299 * @adapter: i2c adapter to use for DDC
301 * Poke the given i2c channel to grab EDID data if possible. If found,
302 * attach it to the connector.
304 * Return edid data or NULL if we couldn't find any.
306 struct edid
*drm_get_edid(struct drm_connector
*connector
,
307 struct i2c_adapter
*adapter
)
309 struct edid
*edid
= NULL
;
311 if (drm_probe_ddc(adapter
))
312 edid
= (struct edid
*)drm_do_get_edid(connector
, adapter
);
314 connector
->display_info
.raw_edid
= (char *)edid
;
319 EXPORT_SYMBOL(drm_get_edid
);
321 /*** EDID parsing ***/
324 * edid_vendor - match a string against EDID's obfuscated vendor field
325 * @edid: EDID to match
326 * @vendor: vendor string
328 * Returns true if @vendor is in @edid, false otherwise
330 static bool edid_vendor(struct edid
*edid
, char *vendor
)
334 edid_vendor
[0] = ((edid
->mfg_id
[0] & 0x7c) >> 2) + '@';
335 edid_vendor
[1] = (((edid
->mfg_id
[0] & 0x3) << 3) |
336 ((edid
->mfg_id
[1] & 0xe0) >> 5)) + '@';
337 edid_vendor
[2] = (edid
->mfg_id
[1] & 0x1f) + '@';
339 return !strncmp(edid_vendor
, vendor
, 3);
343 * edid_get_quirks - return quirk flags for a given EDID
344 * @edid: EDID to process
346 * This tells subsequent routines what fixes they need to apply.
348 static u32
edid_get_quirks(struct edid
*edid
)
350 struct edid_quirk
*quirk
;
353 for (i
= 0; i
< ARRAY_SIZE(edid_quirk_list
); i
++) {
354 quirk
= &edid_quirk_list
[i
];
356 if (edid_vendor(edid
, quirk
->vendor
) &&
357 (EDID_PRODUCT_ID(edid
) == quirk
->product_id
))
358 return quirk
->quirks
;
364 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
365 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
369 * edid_fixup_preferred - set preferred modes based on quirk list
370 * @connector: has mode list to fix up
371 * @quirks: quirks list
373 * Walk the mode list for @connector, clearing the preferred status
374 * on existing modes and setting it anew for the right mode ala @quirks.
376 static void edid_fixup_preferred(struct drm_connector
*connector
,
379 struct drm_display_mode
*t
, *cur_mode
, *preferred_mode
;
380 int target_refresh
= 0;
382 if (list_empty(&connector
->probed_modes
))
385 if (quirks
& EDID_QUIRK_PREFER_LARGE_60
)
387 if (quirks
& EDID_QUIRK_PREFER_LARGE_75
)
390 preferred_mode
= list_first_entry(&connector
->probed_modes
,
391 struct drm_display_mode
, head
);
393 list_for_each_entry_safe(cur_mode
, t
, &connector
->probed_modes
, head
) {
394 cur_mode
->type
&= ~DRM_MODE_TYPE_PREFERRED
;
396 if (cur_mode
== preferred_mode
)
399 /* Largest mode is preferred */
400 if (MODE_SIZE(cur_mode
) > MODE_SIZE(preferred_mode
))
401 preferred_mode
= cur_mode
;
403 /* At a given size, try to get closest to target refresh */
404 if ((MODE_SIZE(cur_mode
) == MODE_SIZE(preferred_mode
)) &&
405 MODE_REFRESH_DIFF(cur_mode
, target_refresh
) <
406 MODE_REFRESH_DIFF(preferred_mode
, target_refresh
)) {
407 preferred_mode
= cur_mode
;
411 preferred_mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
415 * Add the Autogenerated from the DMT spec.
416 * This table is copied from xfree86/modes/xf86EdidModes.c.
417 * But the mode with Reduced blank feature is deleted.
419 static struct drm_display_mode drm_dmt_modes
[] = {
421 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER
, 31500, 640, 672,
422 736, 832, 0, 350, 382, 385, 445, 0,
423 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
425 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER
, 31500, 640, 672,
426 736, 832, 0, 400, 401, 404, 445, 0,
427 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
429 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 35500, 720, 756,
430 828, 936, 0, 400, 401, 404, 446, 0,
431 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
433 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 25175, 640, 656,
434 752, 800, 0, 480, 489, 492, 525, 0,
435 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
437 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 31500, 640, 664,
438 704, 832, 0, 480, 489, 492, 520, 0,
439 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
441 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 31500, 640, 656,
442 720, 840, 0, 480, 481, 484, 500, 0,
443 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
445 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 36000, 640, 696,
446 752, 832, 0, 480, 481, 484, 509, 0,
447 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
449 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 36000, 800, 824,
450 896, 1024, 0, 600, 601, 603, 625, 0,
451 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
453 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 40000, 800, 840,
454 968, 1056, 0, 600, 601, 605, 628, 0,
455 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
457 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 50000, 800, 856,
458 976, 1040, 0, 600, 637, 643, 666, 0,
459 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
461 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 49500, 800, 816,
462 896, 1056, 0, 600, 601, 604, 625, 0,
463 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
465 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 56250, 800, 832,
466 896, 1048, 0, 600, 601, 604, 631, 0,
467 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
469 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER
, 33750, 848, 864,
470 976, 1088, 0, 480, 486, 494, 517, 0,
471 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
472 /* 1024x768@43Hz, interlace */
473 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 44900, 1024, 1032,
474 1208, 1264, 0, 768, 768, 772, 817, 0,
475 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
|
476 DRM_MODE_FLAG_INTERLACE
) },
478 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 65000, 1024, 1048,
479 1184, 1344, 0, 768, 771, 777, 806, 0,
480 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
482 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 75000, 1024, 1048,
483 1184, 1328, 0, 768, 771, 777, 806, 0,
484 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
486 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 78750, 1024, 1040,
487 1136, 1312, 0, 768, 769, 772, 800, 0,
488 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
490 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 94500, 1024, 1072,
491 1072, 1376, 0, 768, 769, 772, 808, 0,
492 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
494 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER
, 108000, 1152, 1216,
495 1344, 1600, 0, 864, 865, 868, 900, 0,
496 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
498 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 79500, 1280, 1344,
499 1472, 1664, 0, 768, 771, 778, 798, 0,
500 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
502 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 102250, 1280, 1360,
503 1488, 1696, 0, 768, 771, 778, 805, 0,
504 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
506 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 117500, 1280, 1360,
507 1496, 1712, 0, 768, 771, 778, 809, 0,
508 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
510 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 83500, 1280, 1352,
511 1480, 1680, 0, 800, 803, 809, 831, 0,
512 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
514 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 106500, 1280, 1360,
515 1488, 1696, 0, 800, 803, 809, 838, 0,
516 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
518 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 122500, 1280, 1360,
519 1496, 1712, 0, 800, 803, 809, 843, 0,
520 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
522 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER
, 108000, 1280, 1376,
523 1488, 1800, 0, 960, 961, 964, 1000, 0,
524 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
526 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER
, 148500, 1280, 1344,
527 1504, 1728, 0, 960, 961, 964, 1011, 0,
528 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
530 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 108000, 1280, 1328,
531 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
532 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
534 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 135000, 1280, 1296,
535 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
536 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
538 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 157500, 1280, 1344,
539 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
540 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
542 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER
, 85500, 1360, 1424,
543 1536, 1792, 0, 768, 771, 777, 795, 0,
544 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
546 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 121750, 1400, 1488,
547 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
548 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
550 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 156000, 1400, 1504,
551 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
552 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
554 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 179500, 1400, 1504,
555 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
556 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
558 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 106500, 1440, 1520,
559 1672, 1904, 0, 900, 903, 909, 934, 0,
560 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
562 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 136750, 1440, 1536,
563 1688, 1936, 0, 900, 903, 909, 942, 0,
564 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
566 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 157000, 1440, 1544,
567 1696, 1952, 0, 900, 903, 909, 948, 0,
568 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
570 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 162000, 1600, 1664,
571 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
572 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
574 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 175500, 1600, 1664,
575 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
576 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
578 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 189000, 1600, 1664,
579 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
580 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
582 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 2025000, 1600, 1664,
583 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
584 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
586 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 229500, 1600, 1664,
587 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
588 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
590 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 146250, 1680, 1784,
591 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
592 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
594 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 187000, 1680, 1800,
595 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
596 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
598 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 214750, 1680, 1808,
599 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
600 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
602 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER
, 204750, 1792, 1920,
603 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
604 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
606 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER
, 261000, 1792, 1888,
607 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
608 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
610 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER
, 218250, 1856, 1952,
611 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
612 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
614 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER
, 288000, 1856, 1984,
615 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
616 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
618 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 193250, 1920, 2056,
619 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
620 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
622 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 245250, 1920, 2056,
623 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
624 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
626 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 281250, 1920, 2064,
627 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
628 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
630 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER
, 234000, 1920, 2048,
631 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
632 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
634 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER
, 297000, 1920, 2064,
635 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
636 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
638 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 348500, 2560, 2752,
639 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
640 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
642 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 443250, 2560, 2768,
643 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
644 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
646 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 505250, 2560, 2768,
647 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
648 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
650 static const int drm_num_dmt_modes
=
651 sizeof(drm_dmt_modes
) / sizeof(struct drm_display_mode
);
653 static struct drm_display_mode
*drm_find_dmt(struct drm_device
*dev
,
654 int hsize
, int vsize
, int fresh
)
657 struct drm_display_mode
*ptr
, *mode
;
660 for (i
= 0; i
< drm_num_dmt_modes
; i
++) {
661 ptr
= &drm_dmt_modes
[i
];
662 if (hsize
== ptr
->hdisplay
&&
663 vsize
== ptr
->vdisplay
&&
664 fresh
== drm_mode_vrefresh(ptr
)) {
665 /* get the expected default mode */
666 mode
= drm_mode_duplicate(dev
, ptr
);
674 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
675 * monitors fill with ascii space (0x20) instead.
678 bad_std_timing(u8 a
, u8 b
)
680 return (a
== 0x00 && b
== 0x00) ||
681 (a
== 0x01 && b
== 0x01) ||
682 (a
== 0x20 && b
== 0x20);
686 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
687 * @t: standard timing params
688 * @timing_level: standard timing level
690 * Take the standard timing params (in this case width, aspect, and refresh)
691 * and convert them into a real mode using CVT/GTF/DMT.
693 struct drm_display_mode
*drm_mode_std(struct drm_device
*dev
,
694 struct std_timing
*t
,
698 struct drm_display_mode
*mode
;
701 unsigned aspect_ratio
= (t
->vfreq_aspect
& EDID_TIMING_ASPECT_MASK
)
702 >> EDID_TIMING_ASPECT_SHIFT
;
703 unsigned vfreq
= (t
->vfreq_aspect
& EDID_TIMING_VFREQ_MASK
)
704 >> EDID_TIMING_VFREQ_SHIFT
;
706 if (bad_std_timing(t
->hsize
, t
->vfreq_aspect
))
709 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
710 hsize
= t
->hsize
* 8 + 248;
711 /* vrefresh_rate = vfreq + 60 */
712 vrefresh_rate
= vfreq
+ 60;
713 /* the vdisplay is calculated based on the aspect ratio */
714 if (aspect_ratio
== 0) {
718 vsize
= (hsize
* 10) / 16;
719 } else if (aspect_ratio
== 1)
720 vsize
= (hsize
* 3) / 4;
721 else if (aspect_ratio
== 2)
722 vsize
= (hsize
* 4) / 5;
724 vsize
= (hsize
* 9) / 16;
726 if (hsize
== 1360 && vsize
== 765 && vrefresh_rate
== 60) {
727 mode
= drm_cvt_mode(dev
, hsize
, vsize
, vrefresh_rate
, 0, 0,
729 mode
->hdisplay
= 1366;
730 mode
->vsync_start
= mode
->vsync_start
- 1;
731 mode
->vsync_end
= mode
->vsync_end
- 1;
735 /* check whether it can be found in default mode table */
736 mode
= drm_find_dmt(dev
, hsize
, vsize
, vrefresh_rate
);
740 switch (timing_level
) {
744 mode
= drm_gtf_mode(dev
, hsize
, vsize
, vrefresh_rate
, 0, 0);
747 mode
= drm_cvt_mode(dev
, hsize
, vsize
, vrefresh_rate
, 0, 0,
755 * EDID is delightfully ambiguous about how interlaced modes are to be
756 * encoded. Our internal representation is of frame height, but some
757 * HDTV detailed timings are encoded as field height.
759 * The format list here is from CEA, in frame size. Technically we
760 * should be checking refresh rate too. Whatever.
763 drm_mode_do_interlace_quirk(struct drm_display_mode
*mode
,
764 struct detailed_pixel_timing
*pt
)
767 static const struct {
769 } cea_interlaced
[] = {
778 static const int n_sizes
=
779 sizeof(cea_interlaced
)/sizeof(cea_interlaced
[0]);
781 if (!(pt
->misc
& DRM_EDID_PT_INTERLACED
))
784 for (i
= 0; i
< n_sizes
; i
++) {
785 if ((mode
->hdisplay
== cea_interlaced
[i
].w
) &&
786 (mode
->vdisplay
== cea_interlaced
[i
].h
/ 2)) {
788 mode
->vsync_start
*= 2;
789 mode
->vsync_end
*= 2;
795 mode
->flags
|= DRM_MODE_FLAG_INTERLACE
;
799 * drm_mode_detailed - create a new mode from an EDID detailed timing section
800 * @dev: DRM device (needed to create new mode)
802 * @timing: EDID detailed timing info
803 * @quirks: quirks to apply
805 * An EDID detailed timing block contains enough info for us to create and
806 * return a new struct drm_display_mode.
808 static struct drm_display_mode
*drm_mode_detailed(struct drm_device
*dev
,
810 struct detailed_timing
*timing
,
813 struct drm_display_mode
*mode
;
814 struct detailed_pixel_timing
*pt
= &timing
->data
.pixel_data
;
815 unsigned hactive
= (pt
->hactive_hblank_hi
& 0xf0) << 4 | pt
->hactive_lo
;
816 unsigned vactive
= (pt
->vactive_vblank_hi
& 0xf0) << 4 | pt
->vactive_lo
;
817 unsigned hblank
= (pt
->hactive_hblank_hi
& 0xf) << 8 | pt
->hblank_lo
;
818 unsigned vblank
= (pt
->vactive_vblank_hi
& 0xf) << 8 | pt
->vblank_lo
;
819 unsigned hsync_offset
= (pt
->hsync_vsync_offset_pulse_width_hi
& 0xc0) << 2 | pt
->hsync_offset_lo
;
820 unsigned hsync_pulse_width
= (pt
->hsync_vsync_offset_pulse_width_hi
& 0x30) << 4 | pt
->hsync_pulse_width_lo
;
821 unsigned vsync_offset
= (pt
->hsync_vsync_offset_pulse_width_hi
& 0xc) >> 2 | pt
->vsync_offset_pulse_width_lo
>> 4;
822 unsigned vsync_pulse_width
= (pt
->hsync_vsync_offset_pulse_width_hi
& 0x3) << 4 | (pt
->vsync_offset_pulse_width_lo
& 0xf);
824 /* ignore tiny modes */
825 if (hactive
< 64 || vactive
< 64)
828 if (pt
->misc
& DRM_EDID_PT_STEREO
) {
829 printk(KERN_WARNING
"stereo mode not supported\n");
832 if (!(pt
->misc
& DRM_EDID_PT_SEPARATE_SYNC
)) {
833 printk(KERN_WARNING
"composite sync not supported\n");
836 /* it is incorrect if hsync/vsync width is zero */
837 if (!hsync_pulse_width
|| !vsync_pulse_width
) {
838 DRM_DEBUG_KMS("Incorrect Detailed timing. "
839 "Wrong Hsync/Vsync pulse width\n");
842 mode
= drm_mode_create(dev
);
846 mode
->type
= DRM_MODE_TYPE_DRIVER
;
848 if (quirks
& EDID_QUIRK_135_CLOCK_TOO_HIGH
)
849 timing
->pixel_clock
= cpu_to_le16(1088);
851 mode
->clock
= le16_to_cpu(timing
->pixel_clock
) * 10;
853 mode
->hdisplay
= hactive
;
854 mode
->hsync_start
= mode
->hdisplay
+ hsync_offset
;
855 mode
->hsync_end
= mode
->hsync_start
+ hsync_pulse_width
;
856 mode
->htotal
= mode
->hdisplay
+ hblank
;
858 mode
->vdisplay
= vactive
;
859 mode
->vsync_start
= mode
->vdisplay
+ vsync_offset
;
860 mode
->vsync_end
= mode
->vsync_start
+ vsync_pulse_width
;
861 mode
->vtotal
= mode
->vdisplay
+ vblank
;
863 /* Some EDIDs have bogus h/vtotal values */
864 if (mode
->hsync_end
> mode
->htotal
)
865 mode
->htotal
= mode
->hsync_end
+ 1;
866 if (mode
->vsync_end
> mode
->vtotal
)
867 mode
->vtotal
= mode
->vsync_end
+ 1;
869 drm_mode_set_name(mode
);
871 drm_mode_do_interlace_quirk(mode
, pt
);
873 if (quirks
& EDID_QUIRK_DETAILED_SYNC_PP
) {
874 pt
->misc
|= DRM_EDID_PT_HSYNC_POSITIVE
| DRM_EDID_PT_VSYNC_POSITIVE
;
877 mode
->flags
|= (pt
->misc
& DRM_EDID_PT_HSYNC_POSITIVE
) ?
878 DRM_MODE_FLAG_PHSYNC
: DRM_MODE_FLAG_NHSYNC
;
879 mode
->flags
|= (pt
->misc
& DRM_EDID_PT_VSYNC_POSITIVE
) ?
880 DRM_MODE_FLAG_PVSYNC
: DRM_MODE_FLAG_NVSYNC
;
882 mode
->width_mm
= pt
->width_mm_lo
| (pt
->width_height_mm_hi
& 0xf0) << 4;
883 mode
->height_mm
= pt
->height_mm_lo
| (pt
->width_height_mm_hi
& 0xf) << 8;
885 if (quirks
& EDID_QUIRK_DETAILED_IN_CM
) {
886 mode
->width_mm
*= 10;
887 mode
->height_mm
*= 10;
890 if (quirks
& EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE
) {
891 mode
->width_mm
= edid
->width_cm
* 10;
892 mode
->height_mm
= edid
->height_cm
* 10;
899 * Detailed mode info for the EDID "established modes" data to use.
901 static struct drm_display_mode edid_est_modes
[] = {
902 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 40000, 800, 840,
903 968, 1056, 0, 600, 601, 605, 628, 0,
904 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 800x600@60Hz */
905 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 36000, 800, 824,
906 896, 1024, 0, 600, 601, 603, 625, 0,
907 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 800x600@56Hz */
908 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 31500, 640, 656,
909 720, 840, 0, 480, 481, 484, 500, 0,
910 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 640x480@75Hz */
911 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 31500, 640, 664,
912 704, 832, 0, 480, 489, 491, 520, 0,
913 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 640x480@72Hz */
914 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 30240, 640, 704,
915 768, 864, 0, 480, 483, 486, 525, 0,
916 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 640x480@67Hz */
917 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 25200, 640, 656,
918 752, 800, 0, 480, 490, 492, 525, 0,
919 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 640x480@60Hz */
920 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 35500, 720, 738,
921 846, 900, 0, 400, 421, 423, 449, 0,
922 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 720x400@88Hz */
923 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 28320, 720, 738,
924 846, 900, 0, 400, 412, 414, 449, 0,
925 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 720x400@70Hz */
926 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 135000, 1280, 1296,
927 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
928 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 1280x1024@75Hz */
929 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 78800, 1024, 1040,
930 1136, 1312, 0, 768, 769, 772, 800, 0,
931 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 1024x768@75Hz */
932 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 75000, 1024, 1048,
933 1184, 1328, 0, 768, 771, 777, 806, 0,
934 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 1024x768@70Hz */
935 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 65000, 1024, 1048,
936 1184, 1344, 0, 768, 771, 777, 806, 0,
937 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 1024x768@60Hz */
938 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
,44900, 1024, 1032,
939 1208, 1264, 0, 768, 768, 776, 817, 0,
940 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
| DRM_MODE_FLAG_INTERLACE
) }, /* 1024x768@43Hz */
941 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER
, 57284, 832, 864,
942 928, 1152, 0, 624, 625, 628, 667, 0,
943 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 832x624@75Hz */
944 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 49500, 800, 816,
945 896, 1056, 0, 600, 601, 604, 625, 0,
946 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 800x600@75Hz */
947 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 50000, 800, 856,
948 976, 1040, 0, 600, 637, 643, 666, 0,
949 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 800x600@72Hz */
950 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER
, 108000, 1152, 1216,
951 1344, 1600, 0, 864, 865, 868, 900, 0,
952 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 1152x864@75Hz */
955 #define EDID_EST_TIMINGS 16
956 #define EDID_STD_TIMINGS 8
957 #define EDID_DETAILED_TIMINGS 4
960 * add_established_modes - get est. modes from EDID and add them
961 * @edid: EDID block to scan
963 * Each EDID block contains a bitmap of the supported "established modes" list
964 * (defined above). Tease them out and add them to the global modes list.
966 static int add_established_modes(struct drm_connector
*connector
, struct edid
*edid
)
968 struct drm_device
*dev
= connector
->dev
;
969 unsigned long est_bits
= edid
->established_timings
.t1
|
970 (edid
->established_timings
.t2
<< 8) |
971 ((edid
->established_timings
.mfg_rsvd
& 0x80) << 9);
974 for (i
= 0; i
<= EDID_EST_TIMINGS
; i
++)
975 if (est_bits
& (1<<i
)) {
976 struct drm_display_mode
*newmode
;
977 newmode
= drm_mode_duplicate(dev
, &edid_est_modes
[i
]);
979 drm_mode_probed_add(connector
, newmode
);
987 * stanard_timing_level - get std. timing level(CVT/GTF/DMT)
988 * @edid: EDID block to scan
990 static int standard_timing_level(struct edid
*edid
)
992 if (edid
->revision
>= 2) {
993 if (edid
->revision
>= 4 && (edid
->features
& DRM_EDID_FEATURE_DEFAULT_GTF
))
1001 * add_standard_modes - get std. modes from EDID and add them
1002 * @edid: EDID block to scan
1004 * Standard modes can be calculated using the CVT standard. Grab them from
1005 * @edid, calculate them, and add them to the list.
1007 static int add_standard_modes(struct drm_connector
*connector
, struct edid
*edid
)
1009 struct drm_device
*dev
= connector
->dev
;
1013 timing_level
= standard_timing_level(edid
);
1015 for (i
= 0; i
< EDID_STD_TIMINGS
; i
++) {
1016 struct std_timing
*t
= &edid
->standard_timings
[i
];
1017 struct drm_display_mode
*newmode
;
1019 newmode
= drm_mode_std(dev
, &edid
->standard_timings
[i
],
1020 edid
->revision
, timing_level
);
1022 drm_mode_probed_add(connector
, newmode
);
1032 * - GTF secondary curve formula
1033 * - EDID 1.4 range offsets
1034 * - CVT extended bits
1037 mode_in_range(struct drm_display_mode
*mode
, struct detailed_timing
*timing
)
1039 struct detailed_data_monitor_range
*range
;
1040 int hsync
, vrefresh
;
1042 range
= &timing
->data
.other_data
.data
.range
;
1044 hsync
= drm_mode_hsync(mode
);
1045 vrefresh
= drm_mode_vrefresh(mode
);
1047 if (hsync
< range
->min_hfreq_khz
|| hsync
> range
->max_hfreq_khz
)
1050 if (vrefresh
< range
->min_vfreq
|| vrefresh
> range
->max_vfreq
)
1053 if (range
->pixel_clock_mhz
&& range
->pixel_clock_mhz
!= 0xff) {
1054 /* be forgiving since it's in units of 10MHz */
1055 int max_clock
= range
->pixel_clock_mhz
* 10 + 9;
1057 if (mode
->clock
> max_clock
)
1065 * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
1066 * need to account for them.
1068 static int drm_gtf_modes_for_range(struct drm_connector
*connector
,
1069 struct detailed_timing
*timing
)
1072 struct drm_display_mode
*newmode
;
1073 struct drm_device
*dev
= connector
->dev
;
1075 for (i
= 0; i
< drm_num_dmt_modes
; i
++) {
1076 if (mode_in_range(drm_dmt_modes
+ i
, timing
)) {
1077 newmode
= drm_mode_duplicate(dev
, &drm_dmt_modes
[i
]);
1079 drm_mode_probed_add(connector
, newmode
);
1088 static int drm_cvt_modes(struct drm_connector
*connector
,
1089 struct detailed_timing
*timing
)
1091 int i
, j
, modes
= 0;
1092 struct drm_display_mode
*newmode
;
1093 struct drm_device
*dev
= connector
->dev
;
1094 struct cvt_timing
*cvt
;
1095 const int rates
[] = { 60, 85, 75, 60, 50 };
1096 const u8 empty
[3] = { 0, 0, 0 };
1098 for (i
= 0; i
< 4; i
++) {
1099 int uninitialized_var(width
), height
;
1100 cvt
= &(timing
->data
.other_data
.data
.cvt
[i
]);
1102 if (!memcmp(cvt
->code
, empty
, 3))
1105 height
= (cvt
->code
[0] + ((cvt
->code
[1] & 0xf0) << 4) + 1) * 2;
1106 switch (cvt
->code
[1] & 0x0c) {
1108 width
= height
* 4 / 3;
1111 width
= height
* 16 / 9;
1114 width
= height
* 16 / 10;
1117 width
= height
* 15 / 9;
1121 for (j
= 1; j
< 5; j
++) {
1122 if (cvt
->code
[2] & (1 << j
)) {
1123 newmode
= drm_cvt_mode(dev
, width
, height
,
1127 drm_mode_probed_add(connector
, newmode
);
1137 static const struct {
1144 { 640, 350, 85, 0 },
1145 { 640, 400, 85, 0 },
1146 { 720, 400, 85, 0 },
1147 { 640, 480, 85, 0 },
1148 { 848, 480, 60, 0 },
1149 { 800, 600, 85, 0 },
1150 { 1024, 768, 85, 0 },
1151 { 1152, 864, 75, 0 },
1153 { 1280, 768, 60, 1 },
1154 { 1280, 768, 60, 0 },
1155 { 1280, 768, 75, 0 },
1156 { 1280, 768, 85, 0 },
1157 { 1280, 960, 60, 0 },
1158 { 1280, 960, 85, 0 },
1159 { 1280, 1024, 60, 0 },
1160 { 1280, 1024, 85, 0 },
1162 { 1360, 768, 60, 0 },
1163 { 1440, 900, 60, 1 },
1164 { 1440, 900, 60, 0 },
1165 { 1440, 900, 75, 0 },
1166 { 1440, 900, 85, 0 },
1167 { 1400, 1050, 60, 1 },
1168 { 1400, 1050, 60, 0 },
1169 { 1400, 1050, 75, 0 },
1171 { 1400, 1050, 85, 0 },
1172 { 1680, 1050, 60, 1 },
1173 { 1680, 1050, 60, 0 },
1174 { 1680, 1050, 75, 0 },
1175 { 1680, 1050, 85, 0 },
1176 { 1600, 1200, 60, 0 },
1177 { 1600, 1200, 65, 0 },
1178 { 1600, 1200, 70, 0 },
1180 { 1600, 1200, 75, 0 },
1181 { 1600, 1200, 85, 0 },
1182 { 1792, 1344, 60, 0 },
1183 { 1792, 1344, 85, 0 },
1184 { 1856, 1392, 60, 0 },
1185 { 1856, 1392, 75, 0 },
1186 { 1920, 1200, 60, 1 },
1187 { 1920, 1200, 60, 0 },
1189 { 1920, 1200, 75, 0 },
1190 { 1920, 1200, 85, 0 },
1191 { 1920, 1440, 60, 0 },
1192 { 1920, 1440, 75, 0 },
1194 static const int num_est3_modes
= sizeof(est3_modes
) / sizeof(est3_modes
[0]);
1197 drm_est3_modes(struct drm_connector
*connector
, struct detailed_timing
*timing
)
1199 int i
, j
, m
, modes
= 0;
1200 struct drm_display_mode
*mode
;
1201 u8
*est
= ((u8
*)timing
) + 5;
1203 for (i
= 0; i
< 6; i
++) {
1204 for (j
= 7; j
> 0; j
--) {
1205 m
= (i
* 8) + (7 - j
);
1206 if (m
> num_est3_modes
)
1208 if (est
[i
] & (1 << j
)) {
1209 mode
= drm_find_dmt(connector
->dev
,
1213 /*, est3_modes[m].rb */);
1215 drm_mode_probed_add(connector
, mode
);
1225 static int add_detailed_modes(struct drm_connector
*connector
,
1226 struct detailed_timing
*timing
,
1227 struct edid
*edid
, u32 quirks
, int preferred
)
1230 struct detailed_non_pixel
*data
= &timing
->data
.other_data
;
1231 int timing_level
= standard_timing_level(edid
);
1232 int gtf
= (edid
->features
& DRM_EDID_FEATURE_DEFAULT_GTF
);
1233 struct drm_display_mode
*newmode
;
1234 struct drm_device
*dev
= connector
->dev
;
1236 if (timing
->pixel_clock
) {
1237 newmode
= drm_mode_detailed(dev
, edid
, timing
, quirks
);
1242 newmode
->type
|= DRM_MODE_TYPE_PREFERRED
;
1244 drm_mode_probed_add(connector
, newmode
);
1248 /* other timing types */
1249 switch (data
->type
) {
1250 case EDID_DETAIL_MONITOR_RANGE
:
1252 modes
+= drm_gtf_modes_for_range(connector
, timing
);
1254 case EDID_DETAIL_STD_MODES
:
1255 /* Six modes per detailed section */
1256 for (i
= 0; i
< 6; i
++) {
1257 struct std_timing
*std
;
1258 struct drm_display_mode
*newmode
;
1260 std
= &data
->data
.timings
[i
];
1261 newmode
= drm_mode_std(dev
, std
, edid
->revision
,
1264 drm_mode_probed_add(connector
, newmode
);
1269 case EDID_DETAIL_CVT_3BYTE
:
1270 modes
+= drm_cvt_modes(connector
, timing
);
1272 case EDID_DETAIL_EST_TIMINGS
:
1273 modes
+= drm_est3_modes(connector
, timing
);
1283 * add_detailed_info - get detailed mode info from EDID data
1284 * @connector: attached connector
1285 * @edid: EDID block to scan
1286 * @quirks: quirks to apply
1288 * Some of the detailed timing sections may contain mode information. Grab
1289 * it and add it to the list.
1291 static int add_detailed_info(struct drm_connector
*connector
,
1292 struct edid
*edid
, u32 quirks
)
1296 for (i
= 0; i
< EDID_DETAILED_TIMINGS
; i
++) {
1297 struct detailed_timing
*timing
= &edid
->detailed_timings
[i
];
1298 int preferred
= (i
== 0) && (edid
->features
& DRM_EDID_FEATURE_PREFERRED_TIMING
);
1300 /* In 1.0, only timings are allowed */
1301 if (!timing
->pixel_clock
&& edid
->version
== 1 &&
1302 edid
->revision
== 0)
1305 modes
+= add_detailed_modes(connector
, timing
, edid
, quirks
,
1313 * add_detailed_mode_eedid - get detailed mode info from addtional timing
1315 * @connector: attached connector
1316 * @edid: EDID block to scan(It is only to get addtional timing EDID block)
1317 * @quirks: quirks to apply
1319 * Some of the detailed timing sections may contain mode information. Grab
1320 * it and add it to the list.
1322 static int add_detailed_info_eedid(struct drm_connector
*connector
,
1323 struct edid
*edid
, u32 quirks
)
1326 char *edid_ext
= NULL
;
1327 struct detailed_timing
*timing
;
1328 int start_offset
, end_offset
;
1331 if (edid
->version
== 1 && edid
->revision
< 3) {
1332 /* If the EDID version is less than 1.3, there is no
1337 if (!edid
->extensions
) {
1338 /* if there is no extension EDID, it is unnecessary to
1339 * parse the E-EDID to get detailed info
1344 /* Find CEA extension */
1345 for (i
= 0; i
< edid
->extensions
; i
++) {
1346 edid_ext
= (char *)edid
+ EDID_LENGTH
* (i
+ 1);
1347 /* This block is CEA extension */
1348 if (edid_ext
[0] == 0x02)
1352 if (i
== edid
->extensions
) {
1353 /* if there is no additional timing EDID block, return */
1357 /* Get the start offset of detailed timing block */
1358 start_offset
= edid_ext
[2];
1359 if (start_offset
== 0) {
1360 /* If the start_offset is zero, it means that neither detailed
1361 * info nor data block exist. In such case it is also
1362 * unnecessary to parse the detailed timing info.
1367 timing_level
= standard_timing_level(edid
);
1368 end_offset
= EDID_LENGTH
;
1369 end_offset
-= sizeof(struct detailed_timing
);
1370 for (i
= start_offset
; i
< end_offset
;
1371 i
+= sizeof(struct detailed_timing
)) {
1372 timing
= (struct detailed_timing
*)(edid_ext
+ i
);
1373 modes
+= add_detailed_modes(connector
, timing
, edid
, quirks
, 0);
1379 #define HDMI_IDENTIFIER 0x000C03
1380 #define VENDOR_BLOCK 0x03
1382 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1383 * @edid: monitor EDID information
1385 * Parse the CEA extension according to CEA-861-B.
1386 * Return true if HDMI, false if not or unknown.
1388 bool drm_detect_hdmi_monitor(struct edid
*edid
)
1390 char *edid_ext
= NULL
;
1392 int start_offset
, end_offset
;
1393 bool is_hdmi
= false;
1395 /* No EDID or EDID extensions */
1396 if (edid
== NULL
|| edid
->extensions
== 0)
1399 /* Find CEA extension */
1400 for (i
= 0; i
< edid
->extensions
; i
++) {
1401 edid_ext
= (char *)edid
+ EDID_LENGTH
* (i
+ 1);
1402 /* This block is CEA extension */
1403 if (edid_ext
[0] == 0x02)
1407 if (i
== edid
->extensions
)
1410 /* Data block offset in CEA extension block */
1412 end_offset
= edid_ext
[2];
1415 * Because HDMI identifier is in Vendor Specific Block,
1416 * search it from all data blocks of CEA extension.
1418 for (i
= start_offset
; i
< end_offset
;
1419 /* Increased by data block len */
1420 i
+= ((edid_ext
[i
] & 0x1f) + 1)) {
1421 /* Find vendor specific block */
1422 if ((edid_ext
[i
] >> 5) == VENDOR_BLOCK
) {
1423 hdmi_id
= edid_ext
[i
+ 1] | (edid_ext
[i
+ 2] << 8) |
1424 edid_ext
[i
+ 3] << 16;
1425 /* Find HDMI identifier */
1426 if (hdmi_id
== HDMI_IDENTIFIER
)
1435 EXPORT_SYMBOL(drm_detect_hdmi_monitor
);
1438 * drm_add_edid_modes - add modes from EDID data, if available
1439 * @connector: connector we're probing
1442 * Add the specified modes to the connector's mode list.
1444 * Return number of modes added or 0 if we couldn't find any.
1446 int drm_add_edid_modes(struct drm_connector
*connector
, struct edid
*edid
)
1454 if (!drm_edid_is_valid(edid
)) {
1455 dev_warn(&connector
->dev
->pdev
->dev
, "%s: EDID invalid.\n",
1456 drm_get_connector_name(connector
));
1460 quirks
= edid_get_quirks(edid
);
1463 * EDID spec says modes should be preferred in this order:
1464 * - preferred detailed mode
1465 * - other detailed modes from base block
1466 * - detailed modes from extension blocks
1467 * - CVT 3-byte code modes
1468 * - standard timing codes
1469 * - established timing codes
1470 * - modes inferred from GTF or CVT range information
1472 * We don't quite implement this yet, but we're close.
1474 * XXX order for additional mode types in extension blocks?
1476 num_modes
+= add_detailed_info(connector
, edid
, quirks
);
1477 num_modes
+= add_detailed_info_eedid(connector
, edid
, quirks
);
1478 num_modes
+= add_standard_modes(connector
, edid
);
1479 num_modes
+= add_established_modes(connector
, edid
);
1481 if (quirks
& (EDID_QUIRK_PREFER_LARGE_60
| EDID_QUIRK_PREFER_LARGE_75
))
1482 edid_fixup_preferred(connector
, quirks
);
1484 connector
->display_info
.serration_vsync
= (edid
->input
& DRM_EDID_INPUT_SERRATION_VSYNC
) ? 1 : 0;
1485 connector
->display_info
.sync_on_green
= (edid
->input
& DRM_EDID_INPUT_SYNC_ON_GREEN
) ? 1 : 0;
1486 connector
->display_info
.composite_sync
= (edid
->input
& DRM_EDID_INPUT_COMPOSITE_SYNC
) ? 1 : 0;
1487 connector
->display_info
.separate_syncs
= (edid
->input
& DRM_EDID_INPUT_SEPARATE_SYNCS
) ? 1 : 0;
1488 connector
->display_info
.blank_to_black
= (edid
->input
& DRM_EDID_INPUT_BLANK_TO_BLACK
) ? 1 : 0;
1489 connector
->display_info
.video_level
= (edid
->input
& DRM_EDID_INPUT_VIDEO_LEVEL
) >> 5;
1490 connector
->display_info
.digital
= (edid
->input
& DRM_EDID_INPUT_DIGITAL
) ? 1 : 0;
1491 connector
->display_info
.width_mm
= edid
->width_cm
* 10;
1492 connector
->display_info
.height_mm
= edid
->height_cm
* 10;
1493 connector
->display_info
.gamma
= edid
->gamma
;
1494 connector
->display_info
.gtf_supported
= (edid
->features
& DRM_EDID_FEATURE_DEFAULT_GTF
) ? 1 : 0;
1495 connector
->display_info
.standard_color
= (edid
->features
& DRM_EDID_FEATURE_STANDARD_COLOR
) ? 1 : 0;
1496 connector
->display_info
.display_type
= (edid
->features
& DRM_EDID_FEATURE_DISPLAY_TYPE
) >> 3;
1497 connector
->display_info
.active_off_supported
= (edid
->features
& DRM_EDID_FEATURE_PM_ACTIVE_OFF
) ? 1 : 0;
1498 connector
->display_info
.suspend_supported
= (edid
->features
& DRM_EDID_FEATURE_PM_SUSPEND
) ? 1 : 0;
1499 connector
->display_info
.standby_supported
= (edid
->features
& DRM_EDID_FEATURE_PM_STANDBY
) ? 1 : 0;
1500 connector
->display_info
.gamma
= edid
->gamma
;
1504 EXPORT_SYMBOL(drm_add_edid_modes
);
1507 * drm_add_modes_noedid - add modes for the connectors without EDID
1508 * @connector: connector we're probing
1509 * @hdisplay: the horizontal display limit
1510 * @vdisplay: the vertical display limit
1512 * Add the specified modes to the connector's mode list. Only when the
1513 * hdisplay/vdisplay is not beyond the given limit, it will be added.
1515 * Return number of modes added or 0 if we couldn't find any.
1517 int drm_add_modes_noedid(struct drm_connector
*connector
,
1518 int hdisplay
, int vdisplay
)
1520 int i
, count
, num_modes
= 0;
1521 struct drm_display_mode
*mode
, *ptr
;
1522 struct drm_device
*dev
= connector
->dev
;
1524 count
= sizeof(drm_dmt_modes
) / sizeof(struct drm_display_mode
);
1530 for (i
= 0; i
< count
; i
++) {
1531 ptr
= &drm_dmt_modes
[i
];
1532 if (hdisplay
&& vdisplay
) {
1534 * Only when two are valid, they will be used to check
1535 * whether the mode should be added to the mode list of
1538 if (ptr
->hdisplay
> hdisplay
||
1539 ptr
->vdisplay
> vdisplay
)
1542 if (drm_mode_vrefresh(ptr
) > 61)
1544 mode
= drm_mode_duplicate(dev
, ptr
);
1546 drm_mode_probed_add(connector
, mode
);
1552 EXPORT_SYMBOL(drm_add_modes_noedid
);