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drm/i915: add power monitoring support
[deliverable/linux.git] / drivers / gpu / drm / drm_edid.c
1 /*
2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
6 *
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8 * FB layer.
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10 *
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
17 *
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
20 * of the Software.
21 *
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
29 */
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/i2c.h>
33 #include <linux/i2c-algo-bit.h>
34 #include "drmP.h"
35 #include "drm_edid.h"
36
37 #define EDID_EST_TIMINGS 16
38 #define EDID_STD_TIMINGS 8
39 #define EDID_DETAILED_TIMINGS 4
40
41 /*
42 * EDID blocks out in the wild have a variety of bugs, try to collect
43 * them here (note that userspace may work around broken monitors first,
44 * but fixes should make their way here so that the kernel "just works"
45 * on as many displays as possible).
46 */
47
48 /* First detailed mode wrong, use largest 60Hz mode */
49 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
50 /* Reported 135MHz pixel clock is too high, needs adjustment */
51 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
52 /* Prefer the largest mode at 75 Hz */
53 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
54 /* Detail timing is in cm not mm */
55 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
56 /* Detailed timing descriptors have bogus size values, so just take the
57 * maximum size and use that.
58 */
59 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
60 /* Monitor forgot to set the first detailed is preferred bit. */
61 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
62 /* use +hsync +vsync for detailed mode */
63 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
64
65
66 #define LEVEL_DMT 0
67 #define LEVEL_GTF 1
68 #define LEVEL_GTF2 2
69 #define LEVEL_CVT 3
70
71 static struct edid_quirk {
72 char *vendor;
73 int product_id;
74 u32 quirks;
75 } edid_quirk_list[] = {
76 /* Acer AL1706 */
77 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
78 /* Acer F51 */
79 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
80 /* Unknown Acer */
81 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
82
83 /* Belinea 10 15 55 */
84 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
85 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
86
87 /* Envision Peripherals, Inc. EN-7100e */
88 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
89 /* Envision EN2028 */
90 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
91
92 /* Funai Electronics PM36B */
93 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
94 EDID_QUIRK_DETAILED_IN_CM },
95
96 /* LG Philips LCD LP154W01-A5 */
97 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
98 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
99
100 /* Philips 107p5 CRT */
101 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
102
103 /* Proview AY765C */
104 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
105
106 /* Samsung SyncMaster 205BW. Note: irony */
107 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
108 /* Samsung SyncMaster 22[5-6]BW */
109 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
110 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
111 };
112
113 /*** DDC fetch and block validation ***/
114
115 static const u8 edid_header[] = {
116 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
117 };
118
119 /*
120 * Sanity check the EDID block (base or extension). Return 0 if the block
121 * doesn't check out, or 1 if it's valid.
122 */
123 static bool
124 drm_edid_block_valid(u8 *raw_edid)
125 {
126 int i;
127 u8 csum = 0;
128 struct edid *edid = (struct edid *)raw_edid;
129
130 if (raw_edid[0] == 0x00) {
131 int score = 0;
132
133 for (i = 0; i < sizeof(edid_header); i++)
134 if (raw_edid[i] == edid_header[i])
135 score++;
136
137 if (score == 8) ;
138 else if (score >= 6) {
139 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
140 memcpy(raw_edid, edid_header, sizeof(edid_header));
141 } else {
142 goto bad;
143 }
144 }
145
146 for (i = 0; i < EDID_LENGTH; i++)
147 csum += raw_edid[i];
148 if (csum) {
149 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
150 goto bad;
151 }
152
153 /* per-block-type checks */
154 switch (raw_edid[0]) {
155 case 0: /* base */
156 if (edid->version != 1) {
157 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
158 goto bad;
159 }
160
161 if (edid->revision > 4)
162 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
163 break;
164
165 default:
166 break;
167 }
168
169 return 1;
170
171 bad:
172 if (raw_edid) {
173 DRM_ERROR("Raw EDID:\n");
174 print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH);
175 printk("\n");
176 }
177 return 0;
178 }
179
180 /**
181 * drm_edid_is_valid - sanity check EDID data
182 * @edid: EDID data
183 *
184 * Sanity-check an entire EDID record (including extensions)
185 */
186 bool drm_edid_is_valid(struct edid *edid)
187 {
188 int i;
189 u8 *raw = (u8 *)edid;
190
191 if (!edid)
192 return false;
193
194 for (i = 0; i <= edid->extensions; i++)
195 if (!drm_edid_block_valid(raw + i * EDID_LENGTH))
196 return false;
197
198 return true;
199 }
200 EXPORT_SYMBOL(drm_edid_is_valid);
201
202 #define DDC_ADDR 0x50
203 #define DDC_SEGMENT_ADDR 0x30
204 /**
205 * Get EDID information via I2C.
206 *
207 * \param adapter : i2c device adaptor
208 * \param buf : EDID data buffer to be filled
209 * \param len : EDID data buffer length
210 * \return 0 on success or -1 on failure.
211 *
212 * Try to fetch EDID information by calling i2c driver function.
213 */
214 static int
215 drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
216 int block, int len)
217 {
218 unsigned char start = block * EDID_LENGTH;
219 struct i2c_msg msgs[] = {
220 {
221 .addr = DDC_ADDR,
222 .flags = 0,
223 .len = 1,
224 .buf = &start,
225 }, {
226 .addr = DDC_ADDR,
227 .flags = I2C_M_RD,
228 .len = len,
229 .buf = buf + start,
230 }
231 };
232
233 if (i2c_transfer(adapter, msgs, 2) == 2)
234 return 0;
235
236 return -1;
237 }
238
239 static u8 *
240 drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
241 {
242 int i, j = 0;
243 u8 *block, *new;
244
245 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
246 return NULL;
247
248 /* base block fetch */
249 for (i = 0; i < 4; i++) {
250 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
251 goto out;
252 if (drm_edid_block_valid(block))
253 break;
254 }
255 if (i == 4)
256 goto carp;
257
258 /* if there's no extensions, we're done */
259 if (block[0x7e] == 0)
260 return block;
261
262 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
263 if (!new)
264 goto out;
265 block = new;
266
267 for (j = 1; j <= block[0x7e]; j++) {
268 for (i = 0; i < 4; i++) {
269 if (drm_do_probe_ddc_edid(adapter, block, j,
270 EDID_LENGTH))
271 goto out;
272 if (drm_edid_block_valid(block + j * EDID_LENGTH))
273 break;
274 }
275 if (i == 4)
276 goto carp;
277 }
278
279 return block;
280
281 carp:
282 dev_warn(&connector->dev->pdev->dev, "%s: EDID block %d invalid.\n",
283 drm_get_connector_name(connector), j);
284
285 out:
286 kfree(block);
287 return NULL;
288 }
289
290 /**
291 * Probe DDC presence.
292 *
293 * \param adapter : i2c device adaptor
294 * \return 1 on success
295 */
296 static bool
297 drm_probe_ddc(struct i2c_adapter *adapter)
298 {
299 unsigned char out;
300
301 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
302 }
303
304 /**
305 * drm_get_edid - get EDID data, if available
306 * @connector: connector we're probing
307 * @adapter: i2c adapter to use for DDC
308 *
309 * Poke the given i2c channel to grab EDID data if possible. If found,
310 * attach it to the connector.
311 *
312 * Return edid data or NULL if we couldn't find any.
313 */
314 struct edid *drm_get_edid(struct drm_connector *connector,
315 struct i2c_adapter *adapter)
316 {
317 struct edid *edid = NULL;
318
319 if (drm_probe_ddc(adapter))
320 edid = (struct edid *)drm_do_get_edid(connector, adapter);
321
322 connector->display_info.raw_edid = (char *)edid;
323
324 return edid;
325
326 }
327 EXPORT_SYMBOL(drm_get_edid);
328
329 /*** EDID parsing ***/
330
331 /**
332 * edid_vendor - match a string against EDID's obfuscated vendor field
333 * @edid: EDID to match
334 * @vendor: vendor string
335 *
336 * Returns true if @vendor is in @edid, false otherwise
337 */
338 static bool edid_vendor(struct edid *edid, char *vendor)
339 {
340 char edid_vendor[3];
341
342 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
343 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
344 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
345 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
346
347 return !strncmp(edid_vendor, vendor, 3);
348 }
349
350 /**
351 * edid_get_quirks - return quirk flags for a given EDID
352 * @edid: EDID to process
353 *
354 * This tells subsequent routines what fixes they need to apply.
355 */
356 static u32 edid_get_quirks(struct edid *edid)
357 {
358 struct edid_quirk *quirk;
359 int i;
360
361 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
362 quirk = &edid_quirk_list[i];
363
364 if (edid_vendor(edid, quirk->vendor) &&
365 (EDID_PRODUCT_ID(edid) == quirk->product_id))
366 return quirk->quirks;
367 }
368
369 return 0;
370 }
371
372 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
373 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
374
375
376 /**
377 * edid_fixup_preferred - set preferred modes based on quirk list
378 * @connector: has mode list to fix up
379 * @quirks: quirks list
380 *
381 * Walk the mode list for @connector, clearing the preferred status
382 * on existing modes and setting it anew for the right mode ala @quirks.
383 */
384 static void edid_fixup_preferred(struct drm_connector *connector,
385 u32 quirks)
386 {
387 struct drm_display_mode *t, *cur_mode, *preferred_mode;
388 int target_refresh = 0;
389
390 if (list_empty(&connector->probed_modes))
391 return;
392
393 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
394 target_refresh = 60;
395 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
396 target_refresh = 75;
397
398 preferred_mode = list_first_entry(&connector->probed_modes,
399 struct drm_display_mode, head);
400
401 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
402 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
403
404 if (cur_mode == preferred_mode)
405 continue;
406
407 /* Largest mode is preferred */
408 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
409 preferred_mode = cur_mode;
410
411 /* At a given size, try to get closest to target refresh */
412 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
413 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
414 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
415 preferred_mode = cur_mode;
416 }
417 }
418
419 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
420 }
421
422 /*
423 * Add the Autogenerated from the DMT spec.
424 * This table is copied from xfree86/modes/xf86EdidModes.c.
425 * But the mode with Reduced blank feature is deleted.
426 */
427 static struct drm_display_mode drm_dmt_modes[] = {
428 /* 640x350@85Hz */
429 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
430 736, 832, 0, 350, 382, 385, 445, 0,
431 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
432 /* 640x400@85Hz */
433 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
434 736, 832, 0, 400, 401, 404, 445, 0,
435 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
436 /* 720x400@85Hz */
437 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
438 828, 936, 0, 400, 401, 404, 446, 0,
439 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
440 /* 640x480@60Hz */
441 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
442 752, 800, 0, 480, 489, 492, 525, 0,
443 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
444 /* 640x480@72Hz */
445 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
446 704, 832, 0, 480, 489, 492, 520, 0,
447 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
448 /* 640x480@75Hz */
449 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
450 720, 840, 0, 480, 481, 484, 500, 0,
451 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
452 /* 640x480@85Hz */
453 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
454 752, 832, 0, 480, 481, 484, 509, 0,
455 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
456 /* 800x600@56Hz */
457 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
458 896, 1024, 0, 600, 601, 603, 625, 0,
459 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
460 /* 800x600@60Hz */
461 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
462 968, 1056, 0, 600, 601, 605, 628, 0,
463 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
464 /* 800x600@72Hz */
465 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
466 976, 1040, 0, 600, 637, 643, 666, 0,
467 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
468 /* 800x600@75Hz */
469 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
470 896, 1056, 0, 600, 601, 604, 625, 0,
471 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
472 /* 800x600@85Hz */
473 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
474 896, 1048, 0, 600, 601, 604, 631, 0,
475 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
476 /* 848x480@60Hz */
477 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
478 976, 1088, 0, 480, 486, 494, 517, 0,
479 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
480 /* 1024x768@43Hz, interlace */
481 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
482 1208, 1264, 0, 768, 768, 772, 817, 0,
483 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
484 DRM_MODE_FLAG_INTERLACE) },
485 /* 1024x768@60Hz */
486 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
487 1184, 1344, 0, 768, 771, 777, 806, 0,
488 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
489 /* 1024x768@70Hz */
490 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
491 1184, 1328, 0, 768, 771, 777, 806, 0,
492 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
493 /* 1024x768@75Hz */
494 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
495 1136, 1312, 0, 768, 769, 772, 800, 0,
496 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
497 /* 1024x768@85Hz */
498 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
499 1168, 1376, 0, 768, 769, 772, 808, 0,
500 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
501 /* 1152x864@75Hz */
502 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
503 1344, 1600, 0, 864, 865, 868, 900, 0,
504 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
505 /* 1280x768@60Hz */
506 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
507 1472, 1664, 0, 768, 771, 778, 798, 0,
508 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
509 /* 1280x768@75Hz */
510 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
511 1488, 1696, 0, 768, 771, 778, 805, 0,
512 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
513 /* 1280x768@85Hz */
514 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
515 1496, 1712, 0, 768, 771, 778, 809, 0,
516 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
517 /* 1280x800@60Hz */
518 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
519 1480, 1680, 0, 800, 803, 809, 831, 0,
520 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
521 /* 1280x800@75Hz */
522 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
523 1488, 1696, 0, 800, 803, 809, 838, 0,
524 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
525 /* 1280x800@85Hz */
526 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
527 1496, 1712, 0, 800, 803, 809, 843, 0,
528 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
529 /* 1280x960@60Hz */
530 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
531 1488, 1800, 0, 960, 961, 964, 1000, 0,
532 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
533 /* 1280x960@85Hz */
534 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
535 1504, 1728, 0, 960, 961, 964, 1011, 0,
536 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
537 /* 1280x1024@60Hz */
538 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
539 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
540 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
541 /* 1280x1024@75Hz */
542 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
543 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
544 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
545 /* 1280x1024@85Hz */
546 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
547 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
548 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
549 /* 1360x768@60Hz */
550 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
551 1536, 1792, 0, 768, 771, 777, 795, 0,
552 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
553 /* 1440x1050@60Hz */
554 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
555 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
556 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
557 /* 1440x1050@75Hz */
558 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
559 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
560 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
561 /* 1440x1050@85Hz */
562 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
563 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
564 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
565 /* 1440x900@60Hz */
566 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
567 1672, 1904, 0, 900, 903, 909, 934, 0,
568 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
569 /* 1440x900@75Hz */
570 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
571 1688, 1936, 0, 900, 903, 909, 942, 0,
572 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
573 /* 1440x900@85Hz */
574 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
575 1696, 1952, 0, 900, 903, 909, 948, 0,
576 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
577 /* 1600x1200@60Hz */
578 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
579 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
580 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
581 /* 1600x1200@65Hz */
582 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
583 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
584 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
585 /* 1600x1200@70Hz */
586 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
587 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
588 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
589 /* 1600x1200@75Hz */
590 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
591 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
592 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
593 /* 1600x1200@85Hz */
594 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
595 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
596 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
597 /* 1680x1050@60Hz */
598 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
599 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
600 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
601 /* 1680x1050@75Hz */
602 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
603 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
604 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
605 /* 1680x1050@85Hz */
606 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
607 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
608 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
609 /* 1792x1344@60Hz */
610 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
611 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
612 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
613 /* 1729x1344@75Hz */
614 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
615 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
616 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
617 /* 1853x1392@60Hz */
618 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
619 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
620 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
621 /* 1856x1392@75Hz */
622 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
623 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
624 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
625 /* 1920x1200@60Hz */
626 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
627 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
628 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
629 /* 1920x1200@75Hz */
630 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
631 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
632 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
633 /* 1920x1200@85Hz */
634 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
635 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
636 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
637 /* 1920x1440@60Hz */
638 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
639 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
640 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
641 /* 1920x1440@75Hz */
642 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
643 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
644 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
645 /* 2560x1600@60Hz */
646 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
647 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
648 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
649 /* 2560x1600@75HZ */
650 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
651 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
652 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
653 /* 2560x1600@85HZ */
654 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
655 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
656 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
657 };
658 static const int drm_num_dmt_modes =
659 sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
660
661 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
662 int hsize, int vsize, int fresh)
663 {
664 int i;
665 struct drm_display_mode *ptr, *mode;
666
667 mode = NULL;
668 for (i = 0; i < drm_num_dmt_modes; i++) {
669 ptr = &drm_dmt_modes[i];
670 if (hsize == ptr->hdisplay &&
671 vsize == ptr->vdisplay &&
672 fresh == drm_mode_vrefresh(ptr)) {
673 /* get the expected default mode */
674 mode = drm_mode_duplicate(dev, ptr);
675 break;
676 }
677 }
678 return mode;
679 }
680 EXPORT_SYMBOL(drm_mode_find_dmt);
681
682 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
683
684 static void
685 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
686 {
687 int i;
688 struct edid *edid = (struct edid *)raw_edid;
689
690 if (edid == NULL)
691 return;
692
693 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
694 cb(&(edid->detailed_timings[i]), closure);
695
696 /* XXX extension block walk */
697 }
698
699 static void
700 is_rb(struct detailed_timing *t, void *data)
701 {
702 u8 *r = (u8 *)t;
703 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
704 if (r[15] & 0x10)
705 *(bool *)data = true;
706 }
707
708 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
709 static bool
710 drm_monitor_supports_rb(struct edid *edid)
711 {
712 if (edid->revision >= 4) {
713 bool ret;
714 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
715 return ret;
716 }
717
718 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
719 }
720
721 static void
722 find_gtf2(struct detailed_timing *t, void *data)
723 {
724 u8 *r = (u8 *)t;
725 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
726 *(u8 **)data = r;
727 }
728
729 /* Secondary GTF curve kicks in above some break frequency */
730 static int
731 drm_gtf2_hbreak(struct edid *edid)
732 {
733 u8 *r = NULL;
734 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
735 return r ? (r[12] * 2) : 0;
736 }
737
738 static int
739 drm_gtf2_2c(struct edid *edid)
740 {
741 u8 *r = NULL;
742 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
743 return r ? r[13] : 0;
744 }
745
746 static int
747 drm_gtf2_m(struct edid *edid)
748 {
749 u8 *r = NULL;
750 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
751 return r ? (r[15] << 8) + r[14] : 0;
752 }
753
754 static int
755 drm_gtf2_k(struct edid *edid)
756 {
757 u8 *r = NULL;
758 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
759 return r ? r[16] : 0;
760 }
761
762 static int
763 drm_gtf2_2j(struct edid *edid)
764 {
765 u8 *r = NULL;
766 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
767 return r ? r[17] : 0;
768 }
769
770 /**
771 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
772 * @edid: EDID block to scan
773 */
774 static int standard_timing_level(struct edid *edid)
775 {
776 if (edid->revision >= 2) {
777 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
778 return LEVEL_CVT;
779 if (drm_gtf2_hbreak(edid))
780 return LEVEL_GTF2;
781 return LEVEL_GTF;
782 }
783 return LEVEL_DMT;
784 }
785
786 /*
787 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
788 * monitors fill with ascii space (0x20) instead.
789 */
790 static int
791 bad_std_timing(u8 a, u8 b)
792 {
793 return (a == 0x00 && b == 0x00) ||
794 (a == 0x01 && b == 0x01) ||
795 (a == 0x20 && b == 0x20);
796 }
797
798 /**
799 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
800 * @t: standard timing params
801 * @timing_level: standard timing level
802 *
803 * Take the standard timing params (in this case width, aspect, and refresh)
804 * and convert them into a real mode using CVT/GTF/DMT.
805 */
806 static struct drm_display_mode *
807 drm_mode_std(struct drm_connector *connector, struct edid *edid,
808 struct std_timing *t, int revision)
809 {
810 struct drm_device *dev = connector->dev;
811 struct drm_display_mode *m, *mode = NULL;
812 int hsize, vsize;
813 int vrefresh_rate;
814 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
815 >> EDID_TIMING_ASPECT_SHIFT;
816 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
817 >> EDID_TIMING_VFREQ_SHIFT;
818 int timing_level = standard_timing_level(edid);
819
820 if (bad_std_timing(t->hsize, t->vfreq_aspect))
821 return NULL;
822
823 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
824 hsize = t->hsize * 8 + 248;
825 /* vrefresh_rate = vfreq + 60 */
826 vrefresh_rate = vfreq + 60;
827 /* the vdisplay is calculated based on the aspect ratio */
828 if (aspect_ratio == 0) {
829 if (revision < 3)
830 vsize = hsize;
831 else
832 vsize = (hsize * 10) / 16;
833 } else if (aspect_ratio == 1)
834 vsize = (hsize * 3) / 4;
835 else if (aspect_ratio == 2)
836 vsize = (hsize * 4) / 5;
837 else
838 vsize = (hsize * 9) / 16;
839
840 /* HDTV hack, part 1 */
841 if (vrefresh_rate == 60 &&
842 ((hsize == 1360 && vsize == 765) ||
843 (hsize == 1368 && vsize == 769))) {
844 hsize = 1366;
845 vsize = 768;
846 }
847
848 /*
849 * If this connector already has a mode for this size and refresh
850 * rate (because it came from detailed or CVT info), use that
851 * instead. This way we don't have to guess at interlace or
852 * reduced blanking.
853 */
854 list_for_each_entry(m, &connector->probed_modes, head)
855 if (m->hdisplay == hsize && m->vdisplay == vsize &&
856 drm_mode_vrefresh(m) == vrefresh_rate)
857 return NULL;
858
859 /* HDTV hack, part 2 */
860 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
861 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
862 false);
863 mode->hdisplay = 1366;
864 mode->vsync_start = mode->vsync_start - 1;
865 mode->vsync_end = mode->vsync_end - 1;
866 return mode;
867 }
868
869 /* check whether it can be found in default mode table */
870 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate);
871 if (mode)
872 return mode;
873
874 switch (timing_level) {
875 case LEVEL_DMT:
876 break;
877 case LEVEL_GTF:
878 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
879 break;
880 case LEVEL_GTF2:
881 /*
882 * This is potentially wrong if there's ever a monitor with
883 * more than one ranges section, each claiming a different
884 * secondary GTF curve. Please don't do that.
885 */
886 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
887 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
888 kfree(mode);
889 mode = drm_gtf_mode_complex(dev, hsize, vsize,
890 vrefresh_rate, 0, 0,
891 drm_gtf2_m(edid),
892 drm_gtf2_2c(edid),
893 drm_gtf2_k(edid),
894 drm_gtf2_2j(edid));
895 }
896 break;
897 case LEVEL_CVT:
898 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
899 false);
900 break;
901 }
902 return mode;
903 }
904
905 /*
906 * EDID is delightfully ambiguous about how interlaced modes are to be
907 * encoded. Our internal representation is of frame height, but some
908 * HDTV detailed timings are encoded as field height.
909 *
910 * The format list here is from CEA, in frame size. Technically we
911 * should be checking refresh rate too. Whatever.
912 */
913 static void
914 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
915 struct detailed_pixel_timing *pt)
916 {
917 int i;
918 static const struct {
919 int w, h;
920 } cea_interlaced[] = {
921 { 1920, 1080 },
922 { 720, 480 },
923 { 1440, 480 },
924 { 2880, 480 },
925 { 720, 576 },
926 { 1440, 576 },
927 { 2880, 576 },
928 };
929 static const int n_sizes =
930 sizeof(cea_interlaced)/sizeof(cea_interlaced[0]);
931
932 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
933 return;
934
935 for (i = 0; i < n_sizes; i++) {
936 if ((mode->hdisplay == cea_interlaced[i].w) &&
937 (mode->vdisplay == cea_interlaced[i].h / 2)) {
938 mode->vdisplay *= 2;
939 mode->vsync_start *= 2;
940 mode->vsync_end *= 2;
941 mode->vtotal *= 2;
942 mode->vtotal |= 1;
943 }
944 }
945
946 mode->flags |= DRM_MODE_FLAG_INTERLACE;
947 }
948
949 /**
950 * drm_mode_detailed - create a new mode from an EDID detailed timing section
951 * @dev: DRM device (needed to create new mode)
952 * @edid: EDID block
953 * @timing: EDID detailed timing info
954 * @quirks: quirks to apply
955 *
956 * An EDID detailed timing block contains enough info for us to create and
957 * return a new struct drm_display_mode.
958 */
959 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
960 struct edid *edid,
961 struct detailed_timing *timing,
962 u32 quirks)
963 {
964 struct drm_display_mode *mode;
965 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
966 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
967 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
968 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
969 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
970 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
971 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
972 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
973 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
974
975 /* ignore tiny modes */
976 if (hactive < 64 || vactive < 64)
977 return NULL;
978
979 if (pt->misc & DRM_EDID_PT_STEREO) {
980 printk(KERN_WARNING "stereo mode not supported\n");
981 return NULL;
982 }
983 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
984 printk(KERN_WARNING "composite sync not supported\n");
985 }
986
987 /* it is incorrect if hsync/vsync width is zero */
988 if (!hsync_pulse_width || !vsync_pulse_width) {
989 DRM_DEBUG_KMS("Incorrect Detailed timing. "
990 "Wrong Hsync/Vsync pulse width\n");
991 return NULL;
992 }
993 mode = drm_mode_create(dev);
994 if (!mode)
995 return NULL;
996
997 mode->type = DRM_MODE_TYPE_DRIVER;
998
999 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
1000 timing->pixel_clock = cpu_to_le16(1088);
1001
1002 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
1003
1004 mode->hdisplay = hactive;
1005 mode->hsync_start = mode->hdisplay + hsync_offset;
1006 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1007 mode->htotal = mode->hdisplay + hblank;
1008
1009 mode->vdisplay = vactive;
1010 mode->vsync_start = mode->vdisplay + vsync_offset;
1011 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1012 mode->vtotal = mode->vdisplay + vblank;
1013
1014 /* Some EDIDs have bogus h/vtotal values */
1015 if (mode->hsync_end > mode->htotal)
1016 mode->htotal = mode->hsync_end + 1;
1017 if (mode->vsync_end > mode->vtotal)
1018 mode->vtotal = mode->vsync_end + 1;
1019
1020 drm_mode_do_interlace_quirk(mode, pt);
1021
1022 drm_mode_set_name(mode);
1023
1024 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
1025 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
1026 }
1027
1028 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
1029 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
1030 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
1031 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
1032
1033 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
1034 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
1035
1036 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
1037 mode->width_mm *= 10;
1038 mode->height_mm *= 10;
1039 }
1040
1041 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
1042 mode->width_mm = edid->width_cm * 10;
1043 mode->height_mm = edid->height_cm * 10;
1044 }
1045
1046 return mode;
1047 }
1048
1049 /*
1050 * Detailed mode info for the EDID "established modes" data to use.
1051 */
1052 static struct drm_display_mode edid_est_modes[] = {
1053 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1054 968, 1056, 0, 600, 601, 605, 628, 0,
1055 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
1056 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
1057 896, 1024, 0, 600, 601, 603, 625, 0,
1058 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
1059 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
1060 720, 840, 0, 480, 481, 484, 500, 0,
1061 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
1062 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
1063 704, 832, 0, 480, 489, 491, 520, 0,
1064 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
1065 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
1066 768, 864, 0, 480, 483, 486, 525, 0,
1067 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
1068 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
1069 752, 800, 0, 480, 490, 492, 525, 0,
1070 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
1071 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
1072 846, 900, 0, 400, 421, 423, 449, 0,
1073 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
1074 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
1075 846, 900, 0, 400, 412, 414, 449, 0,
1076 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
1077 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
1078 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1079 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
1080 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
1081 1136, 1312, 0, 768, 769, 772, 800, 0,
1082 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
1083 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
1084 1184, 1328, 0, 768, 771, 777, 806, 0,
1085 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
1086 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1087 1184, 1344, 0, 768, 771, 777, 806, 0,
1088 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
1089 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
1090 1208, 1264, 0, 768, 768, 776, 817, 0,
1091 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
1092 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
1093 928, 1152, 0, 624, 625, 628, 667, 0,
1094 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
1095 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
1096 896, 1056, 0, 600, 601, 604, 625, 0,
1097 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
1098 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
1099 976, 1040, 0, 600, 637, 643, 666, 0,
1100 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
1101 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1102 1344, 1600, 0, 864, 865, 868, 900, 0,
1103 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
1104 };
1105
1106 /**
1107 * add_established_modes - get est. modes from EDID and add them
1108 * @edid: EDID block to scan
1109 *
1110 * Each EDID block contains a bitmap of the supported "established modes" list
1111 * (defined above). Tease them out and add them to the global modes list.
1112 */
1113 static int add_established_modes(struct drm_connector *connector, struct edid *edid)
1114 {
1115 struct drm_device *dev = connector->dev;
1116 unsigned long est_bits = edid->established_timings.t1 |
1117 (edid->established_timings.t2 << 8) |
1118 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
1119 int i, modes = 0;
1120
1121 for (i = 0; i <= EDID_EST_TIMINGS; i++)
1122 if (est_bits & (1<<i)) {
1123 struct drm_display_mode *newmode;
1124 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
1125 if (newmode) {
1126 drm_mode_probed_add(connector, newmode);
1127 modes++;
1128 }
1129 }
1130
1131 return modes;
1132 }
1133
1134 /**
1135 * add_standard_modes - get std. modes from EDID and add them
1136 * @edid: EDID block to scan
1137 *
1138 * Standard modes can be calculated using the CVT standard. Grab them from
1139 * @edid, calculate them, and add them to the list.
1140 */
1141 static int add_standard_modes(struct drm_connector *connector, struct edid *edid)
1142 {
1143 int i, modes = 0;
1144
1145 for (i = 0; i < EDID_STD_TIMINGS; i++) {
1146 struct drm_display_mode *newmode;
1147
1148 newmode = drm_mode_std(connector, edid,
1149 &edid->standard_timings[i],
1150 edid->revision);
1151 if (newmode) {
1152 drm_mode_probed_add(connector, newmode);
1153 modes++;
1154 }
1155 }
1156
1157 return modes;
1158 }
1159
1160 static bool
1161 mode_is_rb(struct drm_display_mode *mode)
1162 {
1163 return (mode->htotal - mode->hdisplay == 160) &&
1164 (mode->hsync_end - mode->hdisplay == 80) &&
1165 (mode->hsync_end - mode->hsync_start == 32) &&
1166 (mode->vsync_start - mode->vdisplay == 3);
1167 }
1168
1169 static bool
1170 mode_in_hsync_range(struct drm_display_mode *mode, struct edid *edid, u8 *t)
1171 {
1172 int hsync, hmin, hmax;
1173
1174 hmin = t[7];
1175 if (edid->revision >= 4)
1176 hmin += ((t[4] & 0x04) ? 255 : 0);
1177 hmax = t[8];
1178 if (edid->revision >= 4)
1179 hmax += ((t[4] & 0x08) ? 255 : 0);
1180 hsync = drm_mode_hsync(mode);
1181
1182 return (hsync <= hmax && hsync >= hmin);
1183 }
1184
1185 static bool
1186 mode_in_vsync_range(struct drm_display_mode *mode, struct edid *edid, u8 *t)
1187 {
1188 int vsync, vmin, vmax;
1189
1190 vmin = t[5];
1191 if (edid->revision >= 4)
1192 vmin += ((t[4] & 0x01) ? 255 : 0);
1193 vmax = t[6];
1194 if (edid->revision >= 4)
1195 vmax += ((t[4] & 0x02) ? 255 : 0);
1196 vsync = drm_mode_vrefresh(mode);
1197
1198 return (vsync <= vmax && vsync >= vmin);
1199 }
1200
1201 static u32
1202 range_pixel_clock(struct edid *edid, u8 *t)
1203 {
1204 /* unspecified */
1205 if (t[9] == 0 || t[9] == 255)
1206 return 0;
1207
1208 /* 1.4 with CVT support gives us real precision, yay */
1209 if (edid->revision >= 4 && t[10] == 0x04)
1210 return (t[9] * 10000) - ((t[12] >> 2) * 250);
1211
1212 /* 1.3 is pathetic, so fuzz up a bit */
1213 return t[9] * 10000 + 5001;
1214 }
1215
1216 static bool
1217 mode_in_range(struct drm_display_mode *mode, struct edid *edid,
1218 struct detailed_timing *timing)
1219 {
1220 u32 max_clock;
1221 u8 *t = (u8 *)timing;
1222
1223 if (!mode_in_hsync_range(mode, edid, t))
1224 return false;
1225
1226 if (!mode_in_vsync_range(mode, edid, t))
1227 return false;
1228
1229 if ((max_clock = range_pixel_clock(edid, t)))
1230 if (mode->clock > max_clock)
1231 return false;
1232
1233 /* 1.4 max horizontal check */
1234 if (edid->revision >= 4 && t[10] == 0x04)
1235 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1236 return false;
1237
1238 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1239 return false;
1240
1241 return true;
1242 }
1243
1244 /*
1245 * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
1246 * need to account for them.
1247 */
1248 static int
1249 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1250 struct detailed_timing *timing)
1251 {
1252 int i, modes = 0;
1253 struct drm_display_mode *newmode;
1254 struct drm_device *dev = connector->dev;
1255
1256 for (i = 0; i < drm_num_dmt_modes; i++) {
1257 if (mode_in_range(drm_dmt_modes + i, edid, timing)) {
1258 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1259 if (newmode) {
1260 drm_mode_probed_add(connector, newmode);
1261 modes++;
1262 }
1263 }
1264 }
1265
1266 return modes;
1267 }
1268
1269 static int drm_cvt_modes(struct drm_connector *connector,
1270 struct detailed_timing *timing)
1271 {
1272 int i, j, modes = 0;
1273 struct drm_display_mode *newmode;
1274 struct drm_device *dev = connector->dev;
1275 struct cvt_timing *cvt;
1276 const int rates[] = { 60, 85, 75, 60, 50 };
1277 const u8 empty[3] = { 0, 0, 0 };
1278
1279 for (i = 0; i < 4; i++) {
1280 int uninitialized_var(width), height;
1281 cvt = &(timing->data.other_data.data.cvt[i]);
1282
1283 if (!memcmp(cvt->code, empty, 3))
1284 continue;
1285
1286 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
1287 switch (cvt->code[1] & 0x0c) {
1288 case 0x00:
1289 width = height * 4 / 3;
1290 break;
1291 case 0x04:
1292 width = height * 16 / 9;
1293 break;
1294 case 0x08:
1295 width = height * 16 / 10;
1296 break;
1297 case 0x0c:
1298 width = height * 15 / 9;
1299 break;
1300 }
1301
1302 for (j = 1; j < 5; j++) {
1303 if (cvt->code[2] & (1 << j)) {
1304 newmode = drm_cvt_mode(dev, width, height,
1305 rates[j], j == 0,
1306 false, false);
1307 if (newmode) {
1308 drm_mode_probed_add(connector, newmode);
1309 modes++;
1310 }
1311 }
1312 }
1313 }
1314
1315 return modes;
1316 }
1317
1318 static const struct {
1319 short w;
1320 short h;
1321 short r;
1322 short rb;
1323 } est3_modes[] = {
1324 /* byte 6 */
1325 { 640, 350, 85, 0 },
1326 { 640, 400, 85, 0 },
1327 { 720, 400, 85, 0 },
1328 { 640, 480, 85, 0 },
1329 { 848, 480, 60, 0 },
1330 { 800, 600, 85, 0 },
1331 { 1024, 768, 85, 0 },
1332 { 1152, 864, 75, 0 },
1333 /* byte 7 */
1334 { 1280, 768, 60, 1 },
1335 { 1280, 768, 60, 0 },
1336 { 1280, 768, 75, 0 },
1337 { 1280, 768, 85, 0 },
1338 { 1280, 960, 60, 0 },
1339 { 1280, 960, 85, 0 },
1340 { 1280, 1024, 60, 0 },
1341 { 1280, 1024, 85, 0 },
1342 /* byte 8 */
1343 { 1360, 768, 60, 0 },
1344 { 1440, 900, 60, 1 },
1345 { 1440, 900, 60, 0 },
1346 { 1440, 900, 75, 0 },
1347 { 1440, 900, 85, 0 },
1348 { 1400, 1050, 60, 1 },
1349 { 1400, 1050, 60, 0 },
1350 { 1400, 1050, 75, 0 },
1351 /* byte 9 */
1352 { 1400, 1050, 85, 0 },
1353 { 1680, 1050, 60, 1 },
1354 { 1680, 1050, 60, 0 },
1355 { 1680, 1050, 75, 0 },
1356 { 1680, 1050, 85, 0 },
1357 { 1600, 1200, 60, 0 },
1358 { 1600, 1200, 65, 0 },
1359 { 1600, 1200, 70, 0 },
1360 /* byte 10 */
1361 { 1600, 1200, 75, 0 },
1362 { 1600, 1200, 85, 0 },
1363 { 1792, 1344, 60, 0 },
1364 { 1792, 1344, 85, 0 },
1365 { 1856, 1392, 60, 0 },
1366 { 1856, 1392, 75, 0 },
1367 { 1920, 1200, 60, 1 },
1368 { 1920, 1200, 60, 0 },
1369 /* byte 11 */
1370 { 1920, 1200, 75, 0 },
1371 { 1920, 1200, 85, 0 },
1372 { 1920, 1440, 60, 0 },
1373 { 1920, 1440, 75, 0 },
1374 };
1375 static const int num_est3_modes = sizeof(est3_modes) / sizeof(est3_modes[0]);
1376
1377 static int
1378 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1379 {
1380 int i, j, m, modes = 0;
1381 struct drm_display_mode *mode;
1382 u8 *est = ((u8 *)timing) + 5;
1383
1384 for (i = 0; i < 6; i++) {
1385 for (j = 7; j > 0; j--) {
1386 m = (i * 8) + (7 - j);
1387 if (m >= num_est3_modes)
1388 break;
1389 if (est[i] & (1 << j)) {
1390 mode = drm_mode_find_dmt(connector->dev,
1391 est3_modes[m].w,
1392 est3_modes[m].h,
1393 est3_modes[m].r
1394 /*, est3_modes[m].rb */);
1395 if (mode) {
1396 drm_mode_probed_add(connector, mode);
1397 modes++;
1398 }
1399 }
1400 }
1401 }
1402
1403 return modes;
1404 }
1405
1406 static int add_detailed_modes(struct drm_connector *connector,
1407 struct detailed_timing *timing,
1408 struct edid *edid, u32 quirks, int preferred)
1409 {
1410 int i, modes = 0;
1411 struct detailed_non_pixel *data = &timing->data.other_data;
1412 int gtf = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF);
1413 struct drm_display_mode *newmode;
1414 struct drm_device *dev = connector->dev;
1415
1416 if (timing->pixel_clock) {
1417 newmode = drm_mode_detailed(dev, edid, timing, quirks);
1418 if (!newmode)
1419 return 0;
1420
1421 if (preferred)
1422 newmode->type |= DRM_MODE_TYPE_PREFERRED;
1423
1424 drm_mode_probed_add(connector, newmode);
1425 return 1;
1426 }
1427
1428 /* other timing types */
1429 switch (data->type) {
1430 case EDID_DETAIL_MONITOR_RANGE:
1431 if (gtf)
1432 modes += drm_gtf_modes_for_range(connector, edid,
1433 timing);
1434 break;
1435 case EDID_DETAIL_STD_MODES:
1436 /* Six modes per detailed section */
1437 for (i = 0; i < 6; i++) {
1438 struct std_timing *std;
1439 struct drm_display_mode *newmode;
1440
1441 std = &data->data.timings[i];
1442 newmode = drm_mode_std(connector, edid, std,
1443 edid->revision);
1444 if (newmode) {
1445 drm_mode_probed_add(connector, newmode);
1446 modes++;
1447 }
1448 }
1449 break;
1450 case EDID_DETAIL_CVT_3BYTE:
1451 modes += drm_cvt_modes(connector, timing);
1452 break;
1453 case EDID_DETAIL_EST_TIMINGS:
1454 modes += drm_est3_modes(connector, timing);
1455 break;
1456 default:
1457 break;
1458 }
1459
1460 return modes;
1461 }
1462
1463 /**
1464 * add_detailed_info - get detailed mode info from EDID data
1465 * @connector: attached connector
1466 * @edid: EDID block to scan
1467 * @quirks: quirks to apply
1468 *
1469 * Some of the detailed timing sections may contain mode information. Grab
1470 * it and add it to the list.
1471 */
1472 static int add_detailed_info(struct drm_connector *connector,
1473 struct edid *edid, u32 quirks)
1474 {
1475 int i, modes = 0;
1476
1477 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) {
1478 struct detailed_timing *timing = &edid->detailed_timings[i];
1479 int preferred = (i == 0);
1480
1481 if (preferred && edid->version == 1 && edid->revision < 4)
1482 preferred = (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1483
1484 /* In 1.0, only timings are allowed */
1485 if (!timing->pixel_clock && edid->version == 1 &&
1486 edid->revision == 0)
1487 continue;
1488
1489 modes += add_detailed_modes(connector, timing, edid, quirks,
1490 preferred);
1491 }
1492
1493 return modes;
1494 }
1495
1496 /**
1497 * add_detailed_mode_eedid - get detailed mode info from addtional timing
1498 * EDID block
1499 * @connector: attached connector
1500 * @edid: EDID block to scan(It is only to get addtional timing EDID block)
1501 * @quirks: quirks to apply
1502 *
1503 * Some of the detailed timing sections may contain mode information. Grab
1504 * it and add it to the list.
1505 */
1506 static int add_detailed_info_eedid(struct drm_connector *connector,
1507 struct edid *edid, u32 quirks)
1508 {
1509 int i, modes = 0;
1510 char *edid_ext = NULL;
1511 struct detailed_timing *timing;
1512 int start_offset, end_offset;
1513
1514 if (edid->version == 1 && edid->revision < 3)
1515 return 0;
1516 if (!edid->extensions)
1517 return 0;
1518
1519 /* Find CEA extension */
1520 for (i = 0; i < edid->extensions; i++) {
1521 edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
1522 if (edid_ext[0] == 0x02)
1523 break;
1524 }
1525
1526 if (i == edid->extensions)
1527 return 0;
1528
1529 /* Get the start offset of detailed timing block */
1530 start_offset = edid_ext[2];
1531 if (start_offset == 0) {
1532 /* If the start_offset is zero, it means that neither detailed
1533 * info nor data block exist. In such case it is also
1534 * unnecessary to parse the detailed timing info.
1535 */
1536 return 0;
1537 }
1538
1539 end_offset = EDID_LENGTH;
1540 end_offset -= sizeof(struct detailed_timing);
1541 for (i = start_offset; i < end_offset;
1542 i += sizeof(struct detailed_timing)) {
1543 timing = (struct detailed_timing *)(edid_ext + i);
1544 modes += add_detailed_modes(connector, timing, edid, quirks, 0);
1545 }
1546
1547 return modes;
1548 }
1549
1550 #define HDMI_IDENTIFIER 0x000C03
1551 #define VENDOR_BLOCK 0x03
1552 /**
1553 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1554 * @edid: monitor EDID information
1555 *
1556 * Parse the CEA extension according to CEA-861-B.
1557 * Return true if HDMI, false if not or unknown.
1558 */
1559 bool drm_detect_hdmi_monitor(struct edid *edid)
1560 {
1561 char *edid_ext = NULL;
1562 int i, hdmi_id;
1563 int start_offset, end_offset;
1564 bool is_hdmi = false;
1565
1566 /* No EDID or EDID extensions */
1567 if (edid == NULL || edid->extensions == 0)
1568 goto end;
1569
1570 /* Find CEA extension */
1571 for (i = 0; i < edid->extensions; i++) {
1572 edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
1573 /* This block is CEA extension */
1574 if (edid_ext[0] == 0x02)
1575 break;
1576 }
1577
1578 if (i == edid->extensions)
1579 goto end;
1580
1581 /* Data block offset in CEA extension block */
1582 start_offset = 4;
1583 end_offset = edid_ext[2];
1584
1585 /*
1586 * Because HDMI identifier is in Vendor Specific Block,
1587 * search it from all data blocks of CEA extension.
1588 */
1589 for (i = start_offset; i < end_offset;
1590 /* Increased by data block len */
1591 i += ((edid_ext[i] & 0x1f) + 1)) {
1592 /* Find vendor specific block */
1593 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
1594 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
1595 edid_ext[i + 3] << 16;
1596 /* Find HDMI identifier */
1597 if (hdmi_id == HDMI_IDENTIFIER)
1598 is_hdmi = true;
1599 break;
1600 }
1601 }
1602
1603 end:
1604 return is_hdmi;
1605 }
1606 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1607
1608 /**
1609 * drm_add_edid_modes - add modes from EDID data, if available
1610 * @connector: connector we're probing
1611 * @edid: edid data
1612 *
1613 * Add the specified modes to the connector's mode list.
1614 *
1615 * Return number of modes added or 0 if we couldn't find any.
1616 */
1617 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1618 {
1619 int num_modes = 0;
1620 u32 quirks;
1621
1622 if (edid == NULL) {
1623 return 0;
1624 }
1625 if (!drm_edid_is_valid(edid)) {
1626 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
1627 drm_get_connector_name(connector));
1628 return 0;
1629 }
1630
1631 quirks = edid_get_quirks(edid);
1632
1633 /*
1634 * EDID spec says modes should be preferred in this order:
1635 * - preferred detailed mode
1636 * - other detailed modes from base block
1637 * - detailed modes from extension blocks
1638 * - CVT 3-byte code modes
1639 * - standard timing codes
1640 * - established timing codes
1641 * - modes inferred from GTF or CVT range information
1642 *
1643 * We don't quite implement this yet, but we're close.
1644 *
1645 * XXX order for additional mode types in extension blocks?
1646 */
1647 num_modes += add_detailed_info(connector, edid, quirks);
1648 num_modes += add_detailed_info_eedid(connector, edid, quirks);
1649 num_modes += add_standard_modes(connector, edid);
1650 num_modes += add_established_modes(connector, edid);
1651
1652 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
1653 edid_fixup_preferred(connector, quirks);
1654
1655 connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0;
1656 connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0;
1657 connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0;
1658 connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0;
1659 connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0;
1660 connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5;
1661 connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0;
1662 connector->display_info.width_mm = edid->width_cm * 10;
1663 connector->display_info.height_mm = edid->height_cm * 10;
1664 connector->display_info.gamma = edid->gamma;
1665 connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0;
1666 connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0;
1667 connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3;
1668 connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0;
1669 connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0;
1670 connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0;
1671 connector->display_info.gamma = edid->gamma;
1672
1673 return num_modes;
1674 }
1675 EXPORT_SYMBOL(drm_add_edid_modes);
1676
1677 /**
1678 * drm_add_modes_noedid - add modes for the connectors without EDID
1679 * @connector: connector we're probing
1680 * @hdisplay: the horizontal display limit
1681 * @vdisplay: the vertical display limit
1682 *
1683 * Add the specified modes to the connector's mode list. Only when the
1684 * hdisplay/vdisplay is not beyond the given limit, it will be added.
1685 *
1686 * Return number of modes added or 0 if we couldn't find any.
1687 */
1688 int drm_add_modes_noedid(struct drm_connector *connector,
1689 int hdisplay, int vdisplay)
1690 {
1691 int i, count, num_modes = 0;
1692 struct drm_display_mode *mode, *ptr;
1693 struct drm_device *dev = connector->dev;
1694
1695 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
1696 if (hdisplay < 0)
1697 hdisplay = 0;
1698 if (vdisplay < 0)
1699 vdisplay = 0;
1700
1701 for (i = 0; i < count; i++) {
1702 ptr = &drm_dmt_modes[i];
1703 if (hdisplay && vdisplay) {
1704 /*
1705 * Only when two are valid, they will be used to check
1706 * whether the mode should be added to the mode list of
1707 * the connector.
1708 */
1709 if (ptr->hdisplay > hdisplay ||
1710 ptr->vdisplay > vdisplay)
1711 continue;
1712 }
1713 if (drm_mode_vrefresh(ptr) > 61)
1714 continue;
1715 mode = drm_mode_duplicate(dev, ptr);
1716 if (mode) {
1717 drm_mode_probed_add(connector, mode);
1718 num_modes++;
1719 }
1720 }
1721 return num_modes;
1722 }
1723 EXPORT_SYMBOL(drm_add_modes_noedid);
Linux kernel - Deliverables
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