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drm/modes: drop return value from drm_display_mode_from_videomode
[deliverable/linux.git] / drivers / gpu / drm / drm_modes.c
1 /*
2 * Copyright © 1997-2003 by The XFree86 Project, Inc.
3 * Copyright © 2007 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
5 * Jesse Barnes <jesse.barnes@intel.com>
6 * Copyright 2005-2006 Luc Verhaegen
7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 *
27 * Except as contained in this notice, the name of the copyright holder(s)
28 * and author(s) shall not be used in advertising or otherwise to promote
29 * the sale, use or other dealings in this Software without prior written
30 * authorization from the copyright holder(s) and author(s).
31 */
32
33 #include <linux/list.h>
34 #include <linux/list_sort.h>
35 #include <linux/export.h>
36 #include <drm/drmP.h>
37 #include <drm/drm_crtc.h>
38 #include <video/of_videomode.h>
39 #include <video/videomode.h>
40 #include <drm/drm_modes.h>
41
42 #include "drm_crtc_internal.h"
43
44 /**
45 * drm_mode_debug_printmodeline - print a mode to dmesg
46 * @mode: mode to print
47 *
48 * Describe @mode using DRM_DEBUG.
49 */
50 void drm_mode_debug_printmodeline(const struct drm_display_mode *mode)
51 {
52 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
53 "0x%x 0x%x\n",
54 mode->base.id, mode->name, mode->vrefresh, mode->clock,
55 mode->hdisplay, mode->hsync_start,
56 mode->hsync_end, mode->htotal,
57 mode->vdisplay, mode->vsync_start,
58 mode->vsync_end, mode->vtotal, mode->type, mode->flags);
59 }
60 EXPORT_SYMBOL(drm_mode_debug_printmodeline);
61
62 /**
63 * drm_mode_create - create a new display mode
64 * @dev: DRM device
65 *
66 * Create a new drm_display_mode, give it an ID, and return it.
67 *
68 * RETURNS:
69 * Pointer to new mode on success, NULL on error.
70 */
71 struct drm_display_mode *drm_mode_create(struct drm_device *dev)
72 {
73 struct drm_display_mode *nmode;
74
75 nmode = kzalloc(sizeof(struct drm_display_mode), GFP_KERNEL);
76 if (!nmode)
77 return NULL;
78
79 if (drm_mode_object_get(dev, &nmode->base, DRM_MODE_OBJECT_MODE)) {
80 kfree(nmode);
81 return NULL;
82 }
83
84 return nmode;
85 }
86 EXPORT_SYMBOL(drm_mode_create);
87
88 /**
89 * drm_mode_destroy - remove a mode
90 * @dev: DRM device
91 * @mode: mode to remove
92 *
93 * Free @mode's unique identifier, then free it.
94 */
95 void drm_mode_destroy(struct drm_device *dev, struct drm_display_mode *mode)
96 {
97 if (!mode)
98 return;
99
100 drm_mode_object_put(dev, &mode->base);
101
102 kfree(mode);
103 }
104 EXPORT_SYMBOL(drm_mode_destroy);
105
106 /**
107 * drm_mode_probed_add - add a mode to a connector's probed mode list
108 * @connector: connector the new mode
109 * @mode: mode data
110 *
111 * Add @mode to @connector's mode list for later use.
112 */
113 void drm_mode_probed_add(struct drm_connector *connector,
114 struct drm_display_mode *mode)
115 {
116 WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex));
117
118 list_add_tail(&mode->head, &connector->probed_modes);
119 }
120 EXPORT_SYMBOL(drm_mode_probed_add);
121
122 /**
123 * drm_cvt_mode -create a modeline based on CVT algorithm
124 * @dev: DRM device
125 * @hdisplay: hdisplay size
126 * @vdisplay: vdisplay size
127 * @vrefresh : vrefresh rate
128 * @reduced : Whether the GTF calculation is simplified
129 * @interlaced:Whether the interlace is supported
130 * @margins: whether to add margins or not
131 *
132 * return the modeline based on CVT algorithm
133 *
134 * This function is called to generate the modeline based on CVT algorithm
135 * according to the hdisplay, vdisplay, vrefresh.
136 * It is based from the VESA(TM) Coordinated Video Timing Generator by
137 * Graham Loveridge April 9, 2003 available at
138 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
139 *
140 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
141 * What I have done is to translate it by using integer calculation.
142 */
143 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
144 int vdisplay, int vrefresh,
145 bool reduced, bool interlaced, bool margins)
146 {
147 #define HV_FACTOR 1000
148 /* 1) top/bottom margin size (% of height) - default: 1.8, */
149 #define CVT_MARGIN_PERCENTAGE 18
150 /* 2) character cell horizontal granularity (pixels) - default 8 */
151 #define CVT_H_GRANULARITY 8
152 /* 3) Minimum vertical porch (lines) - default 3 */
153 #define CVT_MIN_V_PORCH 3
154 /* 4) Minimum number of vertical back porch lines - default 6 */
155 #define CVT_MIN_V_BPORCH 6
156 /* Pixel Clock step (kHz) */
157 #define CVT_CLOCK_STEP 250
158 struct drm_display_mode *drm_mode;
159 unsigned int vfieldrate, hperiod;
160 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
161 int interlace;
162
163 /* allocate the drm_display_mode structure. If failure, we will
164 * return directly
165 */
166 drm_mode = drm_mode_create(dev);
167 if (!drm_mode)
168 return NULL;
169
170 /* the CVT default refresh rate is 60Hz */
171 if (!vrefresh)
172 vrefresh = 60;
173
174 /* the required field fresh rate */
175 if (interlaced)
176 vfieldrate = vrefresh * 2;
177 else
178 vfieldrate = vrefresh;
179
180 /* horizontal pixels */
181 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
182
183 /* determine the left&right borders */
184 hmargin = 0;
185 if (margins) {
186 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
187 hmargin -= hmargin % CVT_H_GRANULARITY;
188 }
189 /* find the total active pixels */
190 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
191
192 /* find the number of lines per field */
193 if (interlaced)
194 vdisplay_rnd = vdisplay / 2;
195 else
196 vdisplay_rnd = vdisplay;
197
198 /* find the top & bottom borders */
199 vmargin = 0;
200 if (margins)
201 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
202
203 drm_mode->vdisplay = vdisplay + 2 * vmargin;
204
205 /* Interlaced */
206 if (interlaced)
207 interlace = 1;
208 else
209 interlace = 0;
210
211 /* Determine VSync Width from aspect ratio */
212 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
213 vsync = 4;
214 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
215 vsync = 5;
216 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
217 vsync = 6;
218 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
219 vsync = 7;
220 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
221 vsync = 7;
222 else /* custom */
223 vsync = 10;
224
225 if (!reduced) {
226 /* simplify the GTF calculation */
227 /* 4) Minimum time of vertical sync + back porch interval (µs)
228 * default 550.0
229 */
230 int tmp1, tmp2;
231 #define CVT_MIN_VSYNC_BP 550
232 /* 3) Nominal HSync width (% of line period) - default 8 */
233 #define CVT_HSYNC_PERCENTAGE 8
234 unsigned int hblank_percentage;
235 int vsyncandback_porch, vback_porch, hblank;
236
237 /* estimated the horizontal period */
238 tmp1 = HV_FACTOR * 1000000 -
239 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
240 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
241 interlace;
242 hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
243
244 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
245 /* 9. Find number of lines in sync + backporch */
246 if (tmp1 < (vsync + CVT_MIN_V_PORCH))
247 vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
248 else
249 vsyncandback_porch = tmp1;
250 /* 10. Find number of lines in back porch */
251 vback_porch = vsyncandback_porch - vsync;
252 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
253 vsyncandback_porch + CVT_MIN_V_PORCH;
254 /* 5) Definition of Horizontal blanking time limitation */
255 /* Gradient (%/kHz) - default 600 */
256 #define CVT_M_FACTOR 600
257 /* Offset (%) - default 40 */
258 #define CVT_C_FACTOR 40
259 /* Blanking time scaling factor - default 128 */
260 #define CVT_K_FACTOR 128
261 /* Scaling factor weighting - default 20 */
262 #define CVT_J_FACTOR 20
263 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256)
264 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
265 CVT_J_FACTOR)
266 /* 12. Find ideal blanking duty cycle from formula */
267 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
268 hperiod / 1000;
269 /* 13. Blanking time */
270 if (hblank_percentage < 20 * HV_FACTOR)
271 hblank_percentage = 20 * HV_FACTOR;
272 hblank = drm_mode->hdisplay * hblank_percentage /
273 (100 * HV_FACTOR - hblank_percentage);
274 hblank -= hblank % (2 * CVT_H_GRANULARITY);
275 /* 14. find the total pixes per line */
276 drm_mode->htotal = drm_mode->hdisplay + hblank;
277 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
278 drm_mode->hsync_start = drm_mode->hsync_end -
279 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
280 drm_mode->hsync_start += CVT_H_GRANULARITY -
281 drm_mode->hsync_start % CVT_H_GRANULARITY;
282 /* fill the Vsync values */
283 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
284 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
285 } else {
286 /* Reduced blanking */
287 /* Minimum vertical blanking interval time (µs)- default 460 */
288 #define CVT_RB_MIN_VBLANK 460
289 /* Fixed number of clocks for horizontal sync */
290 #define CVT_RB_H_SYNC 32
291 /* Fixed number of clocks for horizontal blanking */
292 #define CVT_RB_H_BLANK 160
293 /* Fixed number of lines for vertical front porch - default 3*/
294 #define CVT_RB_VFPORCH 3
295 int vbilines;
296 int tmp1, tmp2;
297 /* 8. Estimate Horizontal period. */
298 tmp1 = HV_FACTOR * 1000000 -
299 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
300 tmp2 = vdisplay_rnd + 2 * vmargin;
301 hperiod = tmp1 / (tmp2 * vfieldrate);
302 /* 9. Find number of lines in vertical blanking */
303 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
304 /* 10. Check if vertical blanking is sufficient */
305 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
306 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
307 /* 11. Find total number of lines in vertical field */
308 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
309 /* 12. Find total number of pixels in a line */
310 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
311 /* Fill in HSync values */
312 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
313 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
314 /* Fill in VSync values */
315 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
316 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
317 }
318 /* 15/13. Find pixel clock frequency (kHz for xf86) */
319 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
320 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
321 /* 18/16. Find actual vertical frame frequency */
322 /* ignore - just set the mode flag for interlaced */
323 if (interlaced) {
324 drm_mode->vtotal *= 2;
325 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
326 }
327 /* Fill the mode line name */
328 drm_mode_set_name(drm_mode);
329 if (reduced)
330 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
331 DRM_MODE_FLAG_NVSYNC);
332 else
333 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
334 DRM_MODE_FLAG_NHSYNC);
335
336 return drm_mode;
337 }
338 EXPORT_SYMBOL(drm_cvt_mode);
339
340 /**
341 * drm_gtf_mode_complex - create the modeline based on full GTF algorithm
342 *
343 * @dev :drm device
344 * @hdisplay :hdisplay size
345 * @vdisplay :vdisplay size
346 * @vrefresh :vrefresh rate.
347 * @interlaced :whether the interlace is supported
348 * @margins :desired margin size
349 * @GTF_M: extended GTF formula parameters
350 * @GTF_2C: extended GTF formula parameters
351 * @GTF_K: extended GTF formula parameters
352 * @GTF_2J: extended GTF formula parameters
353 *
354 * return the modeline based on full GTF algorithm.
355 *
356 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them
357 * in here multiplied by two. For a C of 40, pass in 80.
358 */
359 struct drm_display_mode *
360 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay,
361 int vrefresh, bool interlaced, int margins,
362 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
363 { /* 1) top/bottom margin size (% of height) - default: 1.8, */
364 #define GTF_MARGIN_PERCENTAGE 18
365 /* 2) character cell horizontal granularity (pixels) - default 8 */
366 #define GTF_CELL_GRAN 8
367 /* 3) Minimum vertical porch (lines) - default 3 */
368 #define GTF_MIN_V_PORCH 1
369 /* width of vsync in lines */
370 #define V_SYNC_RQD 3
371 /* width of hsync as % of total line */
372 #define H_SYNC_PERCENT 8
373 /* min time of vsync + back porch (microsec) */
374 #define MIN_VSYNC_PLUS_BP 550
375 /* C' and M' are part of the Blanking Duty Cycle computation */
376 #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
377 #define GTF_M_PRIME (GTF_K * GTF_M / 256)
378 struct drm_display_mode *drm_mode;
379 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
380 int top_margin, bottom_margin;
381 int interlace;
382 unsigned int hfreq_est;
383 int vsync_plus_bp, vback_porch;
384 unsigned int vtotal_lines, vfieldrate_est, hperiod;
385 unsigned int vfield_rate, vframe_rate;
386 int left_margin, right_margin;
387 unsigned int total_active_pixels, ideal_duty_cycle;
388 unsigned int hblank, total_pixels, pixel_freq;
389 int hsync, hfront_porch, vodd_front_porch_lines;
390 unsigned int tmp1, tmp2;
391
392 drm_mode = drm_mode_create(dev);
393 if (!drm_mode)
394 return NULL;
395
396 /* 1. In order to give correct results, the number of horizontal
397 * pixels requested is first processed to ensure that it is divisible
398 * by the character size, by rounding it to the nearest character
399 * cell boundary:
400 */
401 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
402 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
403
404 /* 2. If interlace is requested, the number of vertical lines assumed
405 * by the calculation must be halved, as the computation calculates
406 * the number of vertical lines per field.
407 */
408 if (interlaced)
409 vdisplay_rnd = vdisplay / 2;
410 else
411 vdisplay_rnd = vdisplay;
412
413 /* 3. Find the frame rate required: */
414 if (interlaced)
415 vfieldrate_rqd = vrefresh * 2;
416 else
417 vfieldrate_rqd = vrefresh;
418
419 /* 4. Find number of lines in Top margin: */
420 top_margin = 0;
421 if (margins)
422 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
423 1000;
424 /* 5. Find number of lines in bottom margin: */
425 bottom_margin = top_margin;
426
427 /* 6. If interlace is required, then set variable interlace: */
428 if (interlaced)
429 interlace = 1;
430 else
431 interlace = 0;
432
433 /* 7. Estimate the Horizontal frequency */
434 {
435 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
436 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
437 2 + interlace;
438 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
439 }
440
441 /* 8. Find the number of lines in V sync + back porch */
442 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
443 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
444 vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
445 /* 9. Find the number of lines in V back porch alone: */
446 vback_porch = vsync_plus_bp - V_SYNC_RQD;
447 /* 10. Find the total number of lines in Vertical field period: */
448 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
449 vsync_plus_bp + GTF_MIN_V_PORCH;
450 /* 11. Estimate the Vertical field frequency: */
451 vfieldrate_est = hfreq_est / vtotal_lines;
452 /* 12. Find the actual horizontal period: */
453 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
454
455 /* 13. Find the actual Vertical field frequency: */
456 vfield_rate = hfreq_est / vtotal_lines;
457 /* 14. Find the Vertical frame frequency: */
458 if (interlaced)
459 vframe_rate = vfield_rate / 2;
460 else
461 vframe_rate = vfield_rate;
462 /* 15. Find number of pixels in left margin: */
463 if (margins)
464 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
465 1000;
466 else
467 left_margin = 0;
468
469 /* 16.Find number of pixels in right margin: */
470 right_margin = left_margin;
471 /* 17.Find total number of active pixels in image and left and right */
472 total_active_pixels = hdisplay_rnd + left_margin + right_margin;
473 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */
474 ideal_duty_cycle = GTF_C_PRIME * 1000 -
475 (GTF_M_PRIME * 1000000 / hfreq_est);
476 /* 19.Find the number of pixels in the blanking time to the nearest
477 * double character cell: */
478 hblank = total_active_pixels * ideal_duty_cycle /
479 (100000 - ideal_duty_cycle);
480 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
481 hblank = hblank * 2 * GTF_CELL_GRAN;
482 /* 20.Find total number of pixels: */
483 total_pixels = total_active_pixels + hblank;
484 /* 21.Find pixel clock frequency: */
485 pixel_freq = total_pixels * hfreq_est / 1000;
486 /* Stage 1 computations are now complete; I should really pass
487 * the results to another function and do the Stage 2 computations,
488 * but I only need a few more values so I'll just append the
489 * computations here for now */
490 /* 17. Find the number of pixels in the horizontal sync period: */
491 hsync = H_SYNC_PERCENT * total_pixels / 100;
492 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
493 hsync = hsync * GTF_CELL_GRAN;
494 /* 18. Find the number of pixels in horizontal front porch period */
495 hfront_porch = hblank / 2 - hsync;
496 /* 36. Find the number of lines in the odd front porch period: */
497 vodd_front_porch_lines = GTF_MIN_V_PORCH ;
498
499 /* finally, pack the results in the mode struct */
500 drm_mode->hdisplay = hdisplay_rnd;
501 drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
502 drm_mode->hsync_end = drm_mode->hsync_start + hsync;
503 drm_mode->htotal = total_pixels;
504 drm_mode->vdisplay = vdisplay_rnd;
505 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
506 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
507 drm_mode->vtotal = vtotal_lines;
508
509 drm_mode->clock = pixel_freq;
510
511 if (interlaced) {
512 drm_mode->vtotal *= 2;
513 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
514 }
515
516 drm_mode_set_name(drm_mode);
517 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
518 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
519 else
520 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
521
522 return drm_mode;
523 }
524 EXPORT_SYMBOL(drm_gtf_mode_complex);
525
526 /**
527 * drm_gtf_mode - create the modeline based on GTF algorithm
528 *
529 * @dev :drm device
530 * @hdisplay :hdisplay size
531 * @vdisplay :vdisplay size
532 * @vrefresh :vrefresh rate.
533 * @interlaced :whether the interlace is supported
534 * @margins :whether the margin is supported
535 *
536 * return the modeline based on GTF algorithm
537 *
538 * This function is to create the modeline based on the GTF algorithm.
539 * Generalized Timing Formula is derived from:
540 * GTF Spreadsheet by Andy Morrish (1/5/97)
541 * available at http://www.vesa.org
542 *
543 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
544 * What I have done is to translate it by using integer calculation.
545 * I also refer to the function of fb_get_mode in the file of
546 * drivers/video/fbmon.c
547 *
548 * Standard GTF parameters:
549 * M = 600
550 * C = 40
551 * K = 128
552 * J = 20
553 */
554 struct drm_display_mode *
555 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh,
556 bool interlaced, int margins)
557 {
558 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh,
559 interlaced, margins,
560 600, 40 * 2, 128, 20 * 2);
561 }
562 EXPORT_SYMBOL(drm_gtf_mode);
563
564 #ifdef CONFIG_VIDEOMODE_HELPERS
565 void drm_display_mode_from_videomode(const struct videomode *vm,
566 struct drm_display_mode *dmode)
567 {
568 dmode->hdisplay = vm->hactive;
569 dmode->hsync_start = dmode->hdisplay + vm->hfront_porch;
570 dmode->hsync_end = dmode->hsync_start + vm->hsync_len;
571 dmode->htotal = dmode->hsync_end + vm->hback_porch;
572
573 dmode->vdisplay = vm->vactive;
574 dmode->vsync_start = dmode->vdisplay + vm->vfront_porch;
575 dmode->vsync_end = dmode->vsync_start + vm->vsync_len;
576 dmode->vtotal = dmode->vsync_end + vm->vback_porch;
577
578 dmode->clock = vm->pixelclock / 1000;
579
580 dmode->flags = 0;
581 if (vm->flags & DISPLAY_FLAGS_HSYNC_HIGH)
582 dmode->flags |= DRM_MODE_FLAG_PHSYNC;
583 else if (vm->flags & DISPLAY_FLAGS_HSYNC_LOW)
584 dmode->flags |= DRM_MODE_FLAG_NHSYNC;
585 if (vm->flags & DISPLAY_FLAGS_VSYNC_HIGH)
586 dmode->flags |= DRM_MODE_FLAG_PVSYNC;
587 else if (vm->flags & DISPLAY_FLAGS_VSYNC_LOW)
588 dmode->flags |= DRM_MODE_FLAG_NVSYNC;
589 if (vm->flags & DISPLAY_FLAGS_INTERLACED)
590 dmode->flags |= DRM_MODE_FLAG_INTERLACE;
591 if (vm->flags & DISPLAY_FLAGS_DOUBLESCAN)
592 dmode->flags |= DRM_MODE_FLAG_DBLSCAN;
593 if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
594 dmode->flags |= DRM_MODE_FLAG_DBLCLK;
595 drm_mode_set_name(dmode);
596 }
597 EXPORT_SYMBOL_GPL(drm_display_mode_from_videomode);
598
599 #ifdef CONFIG_OF
600 /**
601 * of_get_drm_display_mode - get a drm_display_mode from devicetree
602 * @np: device_node with the timing specification
603 * @dmode: will be set to the return value
604 * @index: index into the list of display timings in devicetree
605 *
606 * This function is expensive and should only be used, if only one mode is to be
607 * read from DT. To get multiple modes start with of_get_display_timings and
608 * work with that instead.
609 */
610 int of_get_drm_display_mode(struct device_node *np,
611 struct drm_display_mode *dmode, int index)
612 {
613 struct videomode vm;
614 int ret;
615
616 ret = of_get_videomode(np, &vm, index);
617 if (ret)
618 return ret;
619
620 drm_display_mode_from_videomode(&vm, dmode);
621
622 pr_debug("%s: got %dx%d display mode from %s\n",
623 of_node_full_name(np), vm.hactive, vm.vactive, np->name);
624 drm_mode_debug_printmodeline(dmode);
625
626 return 0;
627 }
628 EXPORT_SYMBOL_GPL(of_get_drm_display_mode);
629 #endif /* CONFIG_OF */
630 #endif /* CONFIG_VIDEOMODE_HELPERS */
631
632 /**
633 * drm_mode_set_name - set the name on a mode
634 * @mode: name will be set in this mode
635 *
636 * Set the name of @mode to a standard format.
637 */
638 void drm_mode_set_name(struct drm_display_mode *mode)
639 {
640 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
641
642 snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",
643 mode->hdisplay, mode->vdisplay,
644 interlaced ? "i" : "");
645 }
646 EXPORT_SYMBOL(drm_mode_set_name);
647
648 /** drm_mode_hsync - get the hsync of a mode
649 * @mode: mode
650 *
651 * Return @modes's hsync rate in kHz, rounded to the nearest int.
652 */
653 int drm_mode_hsync(const struct drm_display_mode *mode)
654 {
655 unsigned int calc_val;
656
657 if (mode->hsync)
658 return mode->hsync;
659
660 if (mode->htotal < 0)
661 return 0;
662
663 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
664 calc_val += 500; /* round to 1000Hz */
665 calc_val /= 1000; /* truncate to kHz */
666
667 return calc_val;
668 }
669 EXPORT_SYMBOL(drm_mode_hsync);
670
671 /**
672 * drm_mode_vrefresh - get the vrefresh of a mode
673 * @mode: mode
674 *
675 * Return @mode's vrefresh rate in Hz or calculate it if necessary.
676 *
677 * FIXME: why is this needed? shouldn't vrefresh be set already?
678 *
679 * RETURNS:
680 * Vertical refresh rate. It will be the result of actual value plus 0.5.
681 * If it is 70.288, it will return 70Hz.
682 * If it is 59.6, it will return 60Hz.
683 */
684 int drm_mode_vrefresh(const struct drm_display_mode *mode)
685 {
686 int refresh = 0;
687 unsigned int calc_val;
688
689 if (mode->vrefresh > 0)
690 refresh = mode->vrefresh;
691 else if (mode->htotal > 0 && mode->vtotal > 0) {
692 int vtotal;
693 vtotal = mode->vtotal;
694 /* work out vrefresh the value will be x1000 */
695 calc_val = (mode->clock * 1000);
696 calc_val /= mode->htotal;
697 refresh = (calc_val + vtotal / 2) / vtotal;
698
699 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
700 refresh *= 2;
701 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
702 refresh /= 2;
703 if (mode->vscan > 1)
704 refresh /= mode->vscan;
705 }
706 return refresh;
707 }
708 EXPORT_SYMBOL(drm_mode_vrefresh);
709
710 /**
711 * drm_mode_set_crtcinfo - set CRTC modesetting parameters
712 * @p: mode
713 * @adjust_flags: a combination of adjustment flags
714 *
715 * Setup the CRTC modesetting parameters for @p, adjusting if necessary.
716 *
717 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of
718 * interlaced modes.
719 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for
720 * buffers containing two eyes (only adjust the timings when needed, eg. for
721 * "frame packing" or "side by side full").
722 */
723 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
724 {
725 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
726 return;
727
728 p->crtc_clock = p->clock;
729 p->crtc_hdisplay = p->hdisplay;
730 p->crtc_hsync_start = p->hsync_start;
731 p->crtc_hsync_end = p->hsync_end;
732 p->crtc_htotal = p->htotal;
733 p->crtc_hskew = p->hskew;
734 p->crtc_vdisplay = p->vdisplay;
735 p->crtc_vsync_start = p->vsync_start;
736 p->crtc_vsync_end = p->vsync_end;
737 p->crtc_vtotal = p->vtotal;
738
739 if (p->flags & DRM_MODE_FLAG_INTERLACE) {
740 if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
741 p->crtc_vdisplay /= 2;
742 p->crtc_vsync_start /= 2;
743 p->crtc_vsync_end /= 2;
744 p->crtc_vtotal /= 2;
745 }
746 }
747
748 if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
749 p->crtc_vdisplay *= 2;
750 p->crtc_vsync_start *= 2;
751 p->crtc_vsync_end *= 2;
752 p->crtc_vtotal *= 2;
753 }
754
755 if (p->vscan > 1) {
756 p->crtc_vdisplay *= p->vscan;
757 p->crtc_vsync_start *= p->vscan;
758 p->crtc_vsync_end *= p->vscan;
759 p->crtc_vtotal *= p->vscan;
760 }
761
762 if (adjust_flags & CRTC_STEREO_DOUBLE) {
763 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK;
764
765 switch (layout) {
766 case DRM_MODE_FLAG_3D_FRAME_PACKING:
767 p->crtc_clock *= 2;
768 p->crtc_vdisplay += p->crtc_vtotal;
769 p->crtc_vsync_start += p->crtc_vtotal;
770 p->crtc_vsync_end += p->crtc_vtotal;
771 p->crtc_vtotal += p->crtc_vtotal;
772 break;
773 }
774 }
775
776 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
777 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
778 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
779 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
780 }
781 EXPORT_SYMBOL(drm_mode_set_crtcinfo);
782
783
784 /**
785 * drm_mode_copy - copy the mode
786 * @dst: mode to overwrite
787 * @src: mode to copy
788 *
789 * Copy an existing mode into another mode, preserving the object id and
790 * list head of the destination mode.
791 */
792 void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src)
793 {
794 int id = dst->base.id;
795 struct list_head head = dst->head;
796
797 *dst = *src;
798 dst->base.id = id;
799 dst->head = head;
800 }
801 EXPORT_SYMBOL(drm_mode_copy);
802
803 /**
804 * drm_mode_duplicate - allocate and duplicate an existing mode
805 * @dev: drm_device to allocate the duplicated mode for
806 * @mode: mode to duplicate
807 *
808 * Just allocate a new mode, copy the existing mode into it, and return
809 * a pointer to it. Used to create new instances of established modes.
810 */
811 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
812 const struct drm_display_mode *mode)
813 {
814 struct drm_display_mode *nmode;
815
816 nmode = drm_mode_create(dev);
817 if (!nmode)
818 return NULL;
819
820 drm_mode_copy(nmode, mode);
821
822 return nmode;
823 }
824 EXPORT_SYMBOL(drm_mode_duplicate);
825
826 /**
827 * drm_mode_equal - test modes for equality
828 * @mode1: first mode
829 * @mode2: second mode
830 *
831 * Check to see if @mode1 and @mode2 are equivalent.
832 *
833 * RETURNS:
834 * True if the modes are equal, false otherwise.
835 */
836 bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2)
837 {
838 /* do clock check convert to PICOS so fb modes get matched
839 * the same */
840 if (mode1->clock && mode2->clock) {
841 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
842 return false;
843 } else if (mode1->clock != mode2->clock)
844 return false;
845
846 if ((mode1->flags & DRM_MODE_FLAG_3D_MASK) !=
847 (mode2->flags & DRM_MODE_FLAG_3D_MASK))
848 return false;
849
850 return drm_mode_equal_no_clocks_no_stereo(mode1, mode2);
851 }
852 EXPORT_SYMBOL(drm_mode_equal);
853
854 /**
855 * drm_mode_equal_no_clocks_no_stereo - test modes for equality
856 * @mode1: first mode
857 * @mode2: second mode
858 *
859 * Check to see if @mode1 and @mode2 are equivalent, but
860 * don't check the pixel clocks nor the stereo layout.
861 *
862 * RETURNS:
863 * True if the modes are equal, false otherwise.
864 */
865 bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1,
866 const struct drm_display_mode *mode2)
867 {
868 if (mode1->hdisplay == mode2->hdisplay &&
869 mode1->hsync_start == mode2->hsync_start &&
870 mode1->hsync_end == mode2->hsync_end &&
871 mode1->htotal == mode2->htotal &&
872 mode1->hskew == mode2->hskew &&
873 mode1->vdisplay == mode2->vdisplay &&
874 mode1->vsync_start == mode2->vsync_start &&
875 mode1->vsync_end == mode2->vsync_end &&
876 mode1->vtotal == mode2->vtotal &&
877 mode1->vscan == mode2->vscan &&
878 (mode1->flags & ~DRM_MODE_FLAG_3D_MASK) ==
879 (mode2->flags & ~DRM_MODE_FLAG_3D_MASK))
880 return true;
881
882 return false;
883 }
884 EXPORT_SYMBOL(drm_mode_equal_no_clocks_no_stereo);
885
886 /**
887 * drm_mode_validate_size - make sure modes adhere to size constraints
888 * @dev: DRM device
889 * @mode_list: list of modes to check
890 * @maxX: maximum width
891 * @maxY: maximum height
892 * @maxPitch: max pitch
893 *
894 * The DRM device (@dev) has size and pitch limits. Here we validate the
895 * modes we probed for @dev against those limits and set their status as
896 * necessary.
897 */
898 void drm_mode_validate_size(struct drm_device *dev,
899 struct list_head *mode_list,
900 int maxX, int maxY, int maxPitch)
901 {
902 struct drm_display_mode *mode;
903
904 list_for_each_entry(mode, mode_list, head) {
905 if (maxPitch > 0 && mode->hdisplay > maxPitch)
906 mode->status = MODE_BAD_WIDTH;
907
908 if (maxX > 0 && mode->hdisplay > maxX)
909 mode->status = MODE_VIRTUAL_X;
910
911 if (maxY > 0 && mode->vdisplay > maxY)
912 mode->status = MODE_VIRTUAL_Y;
913 }
914 }
915 EXPORT_SYMBOL(drm_mode_validate_size);
916
917 /**
918 * drm_mode_prune_invalid - remove invalid modes from mode list
919 * @dev: DRM device
920 * @mode_list: list of modes to check
921 * @verbose: be verbose about it
922 *
923 * Once mode list generation is complete, a caller can use this routine to
924 * remove invalid modes from a mode list. If any of the modes have a
925 * status other than %MODE_OK, they are removed from @mode_list and freed.
926 */
927 void drm_mode_prune_invalid(struct drm_device *dev,
928 struct list_head *mode_list, bool verbose)
929 {
930 struct drm_display_mode *mode, *t;
931
932 list_for_each_entry_safe(mode, t, mode_list, head) {
933 if (mode->status != MODE_OK) {
934 list_del(&mode->head);
935 if (verbose) {
936 drm_mode_debug_printmodeline(mode);
937 DRM_DEBUG_KMS("Not using %s mode %d\n",
938 mode->name, mode->status);
939 }
940 drm_mode_destroy(dev, mode);
941 }
942 }
943 }
944 EXPORT_SYMBOL(drm_mode_prune_invalid);
945
946 /**
947 * drm_mode_compare - compare modes for favorability
948 * @priv: unused
949 * @lh_a: list_head for first mode
950 * @lh_b: list_head for second mode
951 *
952 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
953 * which is better.
954 *
955 * RETURNS:
956 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
957 * positive if @lh_b is better than @lh_a.
958 */
959 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
960 {
961 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
962 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
963 int diff;
964
965 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
966 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
967 if (diff)
968 return diff;
969 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
970 if (diff)
971 return diff;
972
973 diff = b->vrefresh - a->vrefresh;
974 if (diff)
975 return diff;
976
977 diff = b->clock - a->clock;
978 return diff;
979 }
980
981 /**
982 * drm_mode_sort - sort mode list
983 * @mode_list: list to sort
984 *
985 * Sort @mode_list by favorability, putting good modes first.
986 */
987 void drm_mode_sort(struct list_head *mode_list)
988 {
989 list_sort(NULL, mode_list, drm_mode_compare);
990 }
991 EXPORT_SYMBOL(drm_mode_sort);
992
993 /**
994 * drm_mode_connector_list_update - update the mode list for the connector
995 * @connector: the connector to update
996 *
997 * This moves the modes from the @connector probed_modes list
998 * to the actual mode list. It compares the probed mode against the current
999 * list and only adds different modes. All modes unverified after this point
1000 * will be removed by the prune invalid modes.
1001 */
1002 void drm_mode_connector_list_update(struct drm_connector *connector)
1003 {
1004 struct drm_display_mode *mode;
1005 struct drm_display_mode *pmode, *pt;
1006 int found_it;
1007
1008 WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex));
1009
1010 list_for_each_entry_safe(pmode, pt, &connector->probed_modes,
1011 head) {
1012 found_it = 0;
1013 /* go through current modes checking for the new probed mode */
1014 list_for_each_entry(mode, &connector->modes, head) {
1015 if (drm_mode_equal(pmode, mode)) {
1016 found_it = 1;
1017 /* if equal delete the probed mode */
1018 mode->status = pmode->status;
1019 /* Merge type bits together */
1020 mode->type |= pmode->type;
1021 list_del(&pmode->head);
1022 drm_mode_destroy(connector->dev, pmode);
1023 break;
1024 }
1025 }
1026
1027 if (!found_it) {
1028 list_move_tail(&pmode->head, &connector->modes);
1029 }
1030 }
1031 }
1032 EXPORT_SYMBOL(drm_mode_connector_list_update);
1033
1034 /**
1035 * drm_mode_parse_command_line_for_connector - parse command line for connector
1036 * @mode_option: per connector mode option
1037 * @connector: connector to parse line for
1038 * @mode: preallocated mode structure to fill out
1039 *
1040 * This parses the connector specific then generic command lines for
1041 * modes and options to configure the connector.
1042 *
1043 * This uses the same parameters as the fb modedb.c, except for extra
1044 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
1045 *
1046 * enable/enable Digital/disable bit at the end
1047 */
1048 bool drm_mode_parse_command_line_for_connector(const char *mode_option,
1049 struct drm_connector *connector,
1050 struct drm_cmdline_mode *mode)
1051 {
1052 const char *name;
1053 unsigned int namelen;
1054 bool res_specified = false, bpp_specified = false, refresh_specified = false;
1055 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0;
1056 bool yres_specified = false, cvt = false, rb = false;
1057 bool interlace = false, margins = false, was_digit = false;
1058 int i;
1059 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED;
1060
1061 #ifdef CONFIG_FB
1062 if (!mode_option)
1063 mode_option = fb_mode_option;
1064 #endif
1065
1066 if (!mode_option) {
1067 mode->specified = false;
1068 return false;
1069 }
1070
1071 name = mode_option;
1072 namelen = strlen(name);
1073 for (i = namelen-1; i >= 0; i--) {
1074 switch (name[i]) {
1075 case '@':
1076 if (!refresh_specified && !bpp_specified &&
1077 !yres_specified && !cvt && !rb && was_digit) {
1078 refresh = simple_strtol(&name[i+1], NULL, 10);
1079 refresh_specified = true;
1080 was_digit = false;
1081 } else
1082 goto done;
1083 break;
1084 case '-':
1085 if (!bpp_specified && !yres_specified && !cvt &&
1086 !rb && was_digit) {
1087 bpp = simple_strtol(&name[i+1], NULL, 10);
1088 bpp_specified = true;
1089 was_digit = false;
1090 } else
1091 goto done;
1092 break;
1093 case 'x':
1094 if (!yres_specified && was_digit) {
1095 yres = simple_strtol(&name[i+1], NULL, 10);
1096 yres_specified = true;
1097 was_digit = false;
1098 } else
1099 goto done;
1100 break;
1101 case '0' ... '9':
1102 was_digit = true;
1103 break;
1104 case 'M':
1105 if (yres_specified || cvt || was_digit)
1106 goto done;
1107 cvt = true;
1108 break;
1109 case 'R':
1110 if (yres_specified || cvt || rb || was_digit)
1111 goto done;
1112 rb = true;
1113 break;
1114 case 'm':
1115 if (cvt || yres_specified || was_digit)
1116 goto done;
1117 margins = true;
1118 break;
1119 case 'i':
1120 if (cvt || yres_specified || was_digit)
1121 goto done;
1122 interlace = true;
1123 break;
1124 case 'e':
1125 if (yres_specified || bpp_specified || refresh_specified ||
1126 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1127 goto done;
1128
1129 force = DRM_FORCE_ON;
1130 break;
1131 case 'D':
1132 if (yres_specified || bpp_specified || refresh_specified ||
1133 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1134 goto done;
1135
1136 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
1137 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
1138 force = DRM_FORCE_ON;
1139 else
1140 force = DRM_FORCE_ON_DIGITAL;
1141 break;
1142 case 'd':
1143 if (yres_specified || bpp_specified || refresh_specified ||
1144 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1145 goto done;
1146
1147 force = DRM_FORCE_OFF;
1148 break;
1149 default:
1150 goto done;
1151 }
1152 }
1153
1154 if (i < 0 && yres_specified) {
1155 char *ch;
1156 xres = simple_strtol(name, &ch, 10);
1157 if ((ch != NULL) && (*ch == 'x'))
1158 res_specified = true;
1159 else
1160 i = ch - name;
1161 } else if (!yres_specified && was_digit) {
1162 /* catch mode that begins with digits but has no 'x' */
1163 i = 0;
1164 }
1165 done:
1166 if (i >= 0) {
1167 printk(KERN_WARNING
1168 "parse error at position %i in video mode '%s'\n",
1169 i, name);
1170 mode->specified = false;
1171 return false;
1172 }
1173
1174 if (res_specified) {
1175 mode->specified = true;
1176 mode->xres = xres;
1177 mode->yres = yres;
1178 }
1179
1180 if (refresh_specified) {
1181 mode->refresh_specified = true;
1182 mode->refresh = refresh;
1183 }
1184
1185 if (bpp_specified) {
1186 mode->bpp_specified = true;
1187 mode->bpp = bpp;
1188 }
1189 mode->rb = rb;
1190 mode->cvt = cvt;
1191 mode->interlace = interlace;
1192 mode->margins = margins;
1193 mode->force = force;
1194
1195 return true;
1196 }
1197 EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector);
1198
1199 struct drm_display_mode *
1200 drm_mode_create_from_cmdline_mode(struct drm_device *dev,
1201 struct drm_cmdline_mode *cmd)
1202 {
1203 struct drm_display_mode *mode;
1204
1205 if (cmd->cvt)
1206 mode = drm_cvt_mode(dev,
1207 cmd->xres, cmd->yres,
1208 cmd->refresh_specified ? cmd->refresh : 60,
1209 cmd->rb, cmd->interlace,
1210 cmd->margins);
1211 else
1212 mode = drm_gtf_mode(dev,
1213 cmd->xres, cmd->yres,
1214 cmd->refresh_specified ? cmd->refresh : 60,
1215 cmd->interlace,
1216 cmd->margins);
1217 if (!mode)
1218 return NULL;
1219
1220 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
1221 return mode;
1222 }
1223 EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode);
Linux kernel - Deliverables
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