Merge tag 'efi-urgent' into x86/urgent
[deliverable/linux.git] / drivers / gpu / drm / drm_modes.c
1 /*
2 * Copyright © 1997-2003 by The XFree86 Project, Inc.
3 * Copyright © 2007 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
5 * Jesse Barnes <jesse.barnes@intel.com>
6 * Copyright 2005-2006 Luc Verhaegen
7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 *
27 * Except as contained in this notice, the name of the copyright holder(s)
28 * and author(s) shall not be used in advertising or otherwise to promote
29 * the sale, use or other dealings in this Software without prior written
30 * authorization from the copyright holder(s) and author(s).
31 */
32
33 #include <linux/list.h>
34 #include <linux/list_sort.h>
35 #include <linux/export.h>
36 #include <drm/drmP.h>
37 #include <drm/drm_crtc.h>
38 #include <video/of_videomode.h>
39 #include <video/videomode.h>
40
41 /**
42 * drm_mode_debug_printmodeline - debug print a mode
43 * @dev: DRM device
44 * @mode: mode to print
45 *
46 * LOCKING:
47 * None.
48 *
49 * Describe @mode using DRM_DEBUG.
50 */
51 void drm_mode_debug_printmodeline(const struct drm_display_mode *mode)
52 {
53 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
54 "0x%x 0x%x\n",
55 mode->base.id, mode->name, mode->vrefresh, mode->clock,
56 mode->hdisplay, mode->hsync_start,
57 mode->hsync_end, mode->htotal,
58 mode->vdisplay, mode->vsync_start,
59 mode->vsync_end, mode->vtotal, mode->type, mode->flags);
60 }
61 EXPORT_SYMBOL(drm_mode_debug_printmodeline);
62
63 /**
64 * drm_cvt_mode -create a modeline based on CVT algorithm
65 * @dev: DRM device
66 * @hdisplay: hdisplay size
67 * @vdisplay: vdisplay size
68 * @vrefresh : vrefresh rate
69 * @reduced : Whether the GTF calculation is simplified
70 * @interlaced:Whether the interlace is supported
71 *
72 * LOCKING:
73 * none.
74 *
75 * return the modeline based on CVT algorithm
76 *
77 * This function is called to generate the modeline based on CVT algorithm
78 * according to the hdisplay, vdisplay, vrefresh.
79 * It is based from the VESA(TM) Coordinated Video Timing Generator by
80 * Graham Loveridge April 9, 2003 available at
81 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
82 *
83 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
84 * What I have done is to translate it by using integer calculation.
85 */
86 #define HV_FACTOR 1000
87 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
88 int vdisplay, int vrefresh,
89 bool reduced, bool interlaced, bool margins)
90 {
91 /* 1) top/bottom margin size (% of height) - default: 1.8, */
92 #define CVT_MARGIN_PERCENTAGE 18
93 /* 2) character cell horizontal granularity (pixels) - default 8 */
94 #define CVT_H_GRANULARITY 8
95 /* 3) Minimum vertical porch (lines) - default 3 */
96 #define CVT_MIN_V_PORCH 3
97 /* 4) Minimum number of vertical back porch lines - default 6 */
98 #define CVT_MIN_V_BPORCH 6
99 /* Pixel Clock step (kHz) */
100 #define CVT_CLOCK_STEP 250
101 struct drm_display_mode *drm_mode;
102 unsigned int vfieldrate, hperiod;
103 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
104 int interlace;
105
106 /* allocate the drm_display_mode structure. If failure, we will
107 * return directly
108 */
109 drm_mode = drm_mode_create(dev);
110 if (!drm_mode)
111 return NULL;
112
113 /* the CVT default refresh rate is 60Hz */
114 if (!vrefresh)
115 vrefresh = 60;
116
117 /* the required field fresh rate */
118 if (interlaced)
119 vfieldrate = vrefresh * 2;
120 else
121 vfieldrate = vrefresh;
122
123 /* horizontal pixels */
124 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
125
126 /* determine the left&right borders */
127 hmargin = 0;
128 if (margins) {
129 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
130 hmargin -= hmargin % CVT_H_GRANULARITY;
131 }
132 /* find the total active pixels */
133 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
134
135 /* find the number of lines per field */
136 if (interlaced)
137 vdisplay_rnd = vdisplay / 2;
138 else
139 vdisplay_rnd = vdisplay;
140
141 /* find the top & bottom borders */
142 vmargin = 0;
143 if (margins)
144 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
145
146 drm_mode->vdisplay = vdisplay + 2 * vmargin;
147
148 /* Interlaced */
149 if (interlaced)
150 interlace = 1;
151 else
152 interlace = 0;
153
154 /* Determine VSync Width from aspect ratio */
155 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
156 vsync = 4;
157 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
158 vsync = 5;
159 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
160 vsync = 6;
161 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
162 vsync = 7;
163 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
164 vsync = 7;
165 else /* custom */
166 vsync = 10;
167
168 if (!reduced) {
169 /* simplify the GTF calculation */
170 /* 4) Minimum time of vertical sync + back porch interval (µs)
171 * default 550.0
172 */
173 int tmp1, tmp2;
174 #define CVT_MIN_VSYNC_BP 550
175 /* 3) Nominal HSync width (% of line period) - default 8 */
176 #define CVT_HSYNC_PERCENTAGE 8
177 unsigned int hblank_percentage;
178 int vsyncandback_porch, vback_porch, hblank;
179
180 /* estimated the horizontal period */
181 tmp1 = HV_FACTOR * 1000000 -
182 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
183 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
184 interlace;
185 hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
186
187 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
188 /* 9. Find number of lines in sync + backporch */
189 if (tmp1 < (vsync + CVT_MIN_V_PORCH))
190 vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
191 else
192 vsyncandback_porch = tmp1;
193 /* 10. Find number of lines in back porch */
194 vback_porch = vsyncandback_porch - vsync;
195 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
196 vsyncandback_porch + CVT_MIN_V_PORCH;
197 /* 5) Definition of Horizontal blanking time limitation */
198 /* Gradient (%/kHz) - default 600 */
199 #define CVT_M_FACTOR 600
200 /* Offset (%) - default 40 */
201 #define CVT_C_FACTOR 40
202 /* Blanking time scaling factor - default 128 */
203 #define CVT_K_FACTOR 128
204 /* Scaling factor weighting - default 20 */
205 #define CVT_J_FACTOR 20
206 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256)
207 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
208 CVT_J_FACTOR)
209 /* 12. Find ideal blanking duty cycle from formula */
210 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
211 hperiod / 1000;
212 /* 13. Blanking time */
213 if (hblank_percentage < 20 * HV_FACTOR)
214 hblank_percentage = 20 * HV_FACTOR;
215 hblank = drm_mode->hdisplay * hblank_percentage /
216 (100 * HV_FACTOR - hblank_percentage);
217 hblank -= hblank % (2 * CVT_H_GRANULARITY);
218 /* 14. find the total pixes per line */
219 drm_mode->htotal = drm_mode->hdisplay + hblank;
220 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
221 drm_mode->hsync_start = drm_mode->hsync_end -
222 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
223 drm_mode->hsync_start += CVT_H_GRANULARITY -
224 drm_mode->hsync_start % CVT_H_GRANULARITY;
225 /* fill the Vsync values */
226 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
227 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
228 } else {
229 /* Reduced blanking */
230 /* Minimum vertical blanking interval time (µs)- default 460 */
231 #define CVT_RB_MIN_VBLANK 460
232 /* Fixed number of clocks for horizontal sync */
233 #define CVT_RB_H_SYNC 32
234 /* Fixed number of clocks for horizontal blanking */
235 #define CVT_RB_H_BLANK 160
236 /* Fixed number of lines for vertical front porch - default 3*/
237 #define CVT_RB_VFPORCH 3
238 int vbilines;
239 int tmp1, tmp2;
240 /* 8. Estimate Horizontal period. */
241 tmp1 = HV_FACTOR * 1000000 -
242 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
243 tmp2 = vdisplay_rnd + 2 * vmargin;
244 hperiod = tmp1 / (tmp2 * vfieldrate);
245 /* 9. Find number of lines in vertical blanking */
246 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
247 /* 10. Check if vertical blanking is sufficient */
248 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
249 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
250 /* 11. Find total number of lines in vertical field */
251 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
252 /* 12. Find total number of pixels in a line */
253 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
254 /* Fill in HSync values */
255 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
256 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
257 /* Fill in VSync values */
258 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
259 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
260 }
261 /* 15/13. Find pixel clock frequency (kHz for xf86) */
262 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
263 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
264 /* 18/16. Find actual vertical frame frequency */
265 /* ignore - just set the mode flag for interlaced */
266 if (interlaced) {
267 drm_mode->vtotal *= 2;
268 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
269 }
270 /* Fill the mode line name */
271 drm_mode_set_name(drm_mode);
272 if (reduced)
273 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
274 DRM_MODE_FLAG_NVSYNC);
275 else
276 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
277 DRM_MODE_FLAG_NHSYNC);
278
279 return drm_mode;
280 }
281 EXPORT_SYMBOL(drm_cvt_mode);
282
283 /**
284 * drm_gtf_mode_complex - create the modeline based on full GTF algorithm
285 *
286 * @dev :drm device
287 * @hdisplay :hdisplay size
288 * @vdisplay :vdisplay size
289 * @vrefresh :vrefresh rate.
290 * @interlaced :whether the interlace is supported
291 * @margins :desired margin size
292 * @GTF_[MCKJ] :extended GTF formula parameters
293 *
294 * LOCKING.
295 * none.
296 *
297 * return the modeline based on full GTF algorithm.
298 *
299 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them
300 * in here multiplied by two. For a C of 40, pass in 80.
301 */
302 struct drm_display_mode *
303 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay,
304 int vrefresh, bool interlaced, int margins,
305 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
306 { /* 1) top/bottom margin size (% of height) - default: 1.8, */
307 #define GTF_MARGIN_PERCENTAGE 18
308 /* 2) character cell horizontal granularity (pixels) - default 8 */
309 #define GTF_CELL_GRAN 8
310 /* 3) Minimum vertical porch (lines) - default 3 */
311 #define GTF_MIN_V_PORCH 1
312 /* width of vsync in lines */
313 #define V_SYNC_RQD 3
314 /* width of hsync as % of total line */
315 #define H_SYNC_PERCENT 8
316 /* min time of vsync + back porch (microsec) */
317 #define MIN_VSYNC_PLUS_BP 550
318 /* C' and M' are part of the Blanking Duty Cycle computation */
319 #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
320 #define GTF_M_PRIME (GTF_K * GTF_M / 256)
321 struct drm_display_mode *drm_mode;
322 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
323 int top_margin, bottom_margin;
324 int interlace;
325 unsigned int hfreq_est;
326 int vsync_plus_bp, vback_porch;
327 unsigned int vtotal_lines, vfieldrate_est, hperiod;
328 unsigned int vfield_rate, vframe_rate;
329 int left_margin, right_margin;
330 unsigned int total_active_pixels, ideal_duty_cycle;
331 unsigned int hblank, total_pixels, pixel_freq;
332 int hsync, hfront_porch, vodd_front_porch_lines;
333 unsigned int tmp1, tmp2;
334
335 drm_mode = drm_mode_create(dev);
336 if (!drm_mode)
337 return NULL;
338
339 /* 1. In order to give correct results, the number of horizontal
340 * pixels requested is first processed to ensure that it is divisible
341 * by the character size, by rounding it to the nearest character
342 * cell boundary:
343 */
344 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
345 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
346
347 /* 2. If interlace is requested, the number of vertical lines assumed
348 * by the calculation must be halved, as the computation calculates
349 * the number of vertical lines per field.
350 */
351 if (interlaced)
352 vdisplay_rnd = vdisplay / 2;
353 else
354 vdisplay_rnd = vdisplay;
355
356 /* 3. Find the frame rate required: */
357 if (interlaced)
358 vfieldrate_rqd = vrefresh * 2;
359 else
360 vfieldrate_rqd = vrefresh;
361
362 /* 4. Find number of lines in Top margin: */
363 top_margin = 0;
364 if (margins)
365 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
366 1000;
367 /* 5. Find number of lines in bottom margin: */
368 bottom_margin = top_margin;
369
370 /* 6. If interlace is required, then set variable interlace: */
371 if (interlaced)
372 interlace = 1;
373 else
374 interlace = 0;
375
376 /* 7. Estimate the Horizontal frequency */
377 {
378 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
379 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
380 2 + interlace;
381 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
382 }
383
384 /* 8. Find the number of lines in V sync + back porch */
385 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
386 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
387 vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
388 /* 9. Find the number of lines in V back porch alone: */
389 vback_porch = vsync_plus_bp - V_SYNC_RQD;
390 /* 10. Find the total number of lines in Vertical field period: */
391 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
392 vsync_plus_bp + GTF_MIN_V_PORCH;
393 /* 11. Estimate the Vertical field frequency: */
394 vfieldrate_est = hfreq_est / vtotal_lines;
395 /* 12. Find the actual horizontal period: */
396 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
397
398 /* 13. Find the actual Vertical field frequency: */
399 vfield_rate = hfreq_est / vtotal_lines;
400 /* 14. Find the Vertical frame frequency: */
401 if (interlaced)
402 vframe_rate = vfield_rate / 2;
403 else
404 vframe_rate = vfield_rate;
405 /* 15. Find number of pixels in left margin: */
406 if (margins)
407 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
408 1000;
409 else
410 left_margin = 0;
411
412 /* 16.Find number of pixels in right margin: */
413 right_margin = left_margin;
414 /* 17.Find total number of active pixels in image and left and right */
415 total_active_pixels = hdisplay_rnd + left_margin + right_margin;
416 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */
417 ideal_duty_cycle = GTF_C_PRIME * 1000 -
418 (GTF_M_PRIME * 1000000 / hfreq_est);
419 /* 19.Find the number of pixels in the blanking time to the nearest
420 * double character cell: */
421 hblank = total_active_pixels * ideal_duty_cycle /
422 (100000 - ideal_duty_cycle);
423 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
424 hblank = hblank * 2 * GTF_CELL_GRAN;
425 /* 20.Find total number of pixels: */
426 total_pixels = total_active_pixels + hblank;
427 /* 21.Find pixel clock frequency: */
428 pixel_freq = total_pixels * hfreq_est / 1000;
429 /* Stage 1 computations are now complete; I should really pass
430 * the results to another function and do the Stage 2 computations,
431 * but I only need a few more values so I'll just append the
432 * computations here for now */
433 /* 17. Find the number of pixels in the horizontal sync period: */
434 hsync = H_SYNC_PERCENT * total_pixels / 100;
435 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
436 hsync = hsync * GTF_CELL_GRAN;
437 /* 18. Find the number of pixels in horizontal front porch period */
438 hfront_porch = hblank / 2 - hsync;
439 /* 36. Find the number of lines in the odd front porch period: */
440 vodd_front_porch_lines = GTF_MIN_V_PORCH ;
441
442 /* finally, pack the results in the mode struct */
443 drm_mode->hdisplay = hdisplay_rnd;
444 drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
445 drm_mode->hsync_end = drm_mode->hsync_start + hsync;
446 drm_mode->htotal = total_pixels;
447 drm_mode->vdisplay = vdisplay_rnd;
448 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
449 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
450 drm_mode->vtotal = vtotal_lines;
451
452 drm_mode->clock = pixel_freq;
453
454 if (interlaced) {
455 drm_mode->vtotal *= 2;
456 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
457 }
458
459 drm_mode_set_name(drm_mode);
460 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
461 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
462 else
463 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
464
465 return drm_mode;
466 }
467 EXPORT_SYMBOL(drm_gtf_mode_complex);
468
469 /**
470 * drm_gtf_mode - create the modeline based on GTF algorithm
471 *
472 * @dev :drm device
473 * @hdisplay :hdisplay size
474 * @vdisplay :vdisplay size
475 * @vrefresh :vrefresh rate.
476 * @interlaced :whether the interlace is supported
477 * @margins :whether the margin is supported
478 *
479 * LOCKING.
480 * none.
481 *
482 * return the modeline based on GTF algorithm
483 *
484 * This function is to create the modeline based on the GTF algorithm.
485 * Generalized Timing Formula is derived from:
486 * GTF Spreadsheet by Andy Morrish (1/5/97)
487 * available at http://www.vesa.org
488 *
489 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
490 * What I have done is to translate it by using integer calculation.
491 * I also refer to the function of fb_get_mode in the file of
492 * drivers/video/fbmon.c
493 *
494 * Standard GTF parameters:
495 * M = 600
496 * C = 40
497 * K = 128
498 * J = 20
499 */
500 struct drm_display_mode *
501 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh,
502 bool lace, int margins)
503 {
504 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace,
505 margins, 600, 40 * 2, 128, 20 * 2);
506 }
507 EXPORT_SYMBOL(drm_gtf_mode);
508
509 #ifdef CONFIG_VIDEOMODE_HELPERS
510 int drm_display_mode_from_videomode(const struct videomode *vm,
511 struct drm_display_mode *dmode)
512 {
513 dmode->hdisplay = vm->hactive;
514 dmode->hsync_start = dmode->hdisplay + vm->hfront_porch;
515 dmode->hsync_end = dmode->hsync_start + vm->hsync_len;
516 dmode->htotal = dmode->hsync_end + vm->hback_porch;
517
518 dmode->vdisplay = vm->vactive;
519 dmode->vsync_start = dmode->vdisplay + vm->vfront_porch;
520 dmode->vsync_end = dmode->vsync_start + vm->vsync_len;
521 dmode->vtotal = dmode->vsync_end + vm->vback_porch;
522
523 dmode->clock = vm->pixelclock / 1000;
524
525 dmode->flags = 0;
526 if (vm->flags & DISPLAY_FLAGS_HSYNC_HIGH)
527 dmode->flags |= DRM_MODE_FLAG_PHSYNC;
528 else if (vm->flags & DISPLAY_FLAGS_HSYNC_LOW)
529 dmode->flags |= DRM_MODE_FLAG_NHSYNC;
530 if (vm->flags & DISPLAY_FLAGS_VSYNC_HIGH)
531 dmode->flags |= DRM_MODE_FLAG_PVSYNC;
532 else if (vm->flags & DISPLAY_FLAGS_VSYNC_LOW)
533 dmode->flags |= DRM_MODE_FLAG_NVSYNC;
534 if (vm->flags & DISPLAY_FLAGS_INTERLACED)
535 dmode->flags |= DRM_MODE_FLAG_INTERLACE;
536 if (vm->flags & DISPLAY_FLAGS_DOUBLESCAN)
537 dmode->flags |= DRM_MODE_FLAG_DBLSCAN;
538 drm_mode_set_name(dmode);
539
540 return 0;
541 }
542 EXPORT_SYMBOL_GPL(drm_display_mode_from_videomode);
543
544 #ifdef CONFIG_OF
545 /**
546 * of_get_drm_display_mode - get a drm_display_mode from devicetree
547 * @np: device_node with the timing specification
548 * @dmode: will be set to the return value
549 * @index: index into the list of display timings in devicetree
550 *
551 * This function is expensive and should only be used, if only one mode is to be
552 * read from DT. To get multiple modes start with of_get_display_timings and
553 * work with that instead.
554 */
555 int of_get_drm_display_mode(struct device_node *np,
556 struct drm_display_mode *dmode, int index)
557 {
558 struct videomode vm;
559 int ret;
560
561 ret = of_get_videomode(np, &vm, index);
562 if (ret)
563 return ret;
564
565 drm_display_mode_from_videomode(&vm, dmode);
566
567 pr_debug("%s: got %dx%d display mode from %s\n",
568 of_node_full_name(np), vm.hactive, vm.vactive, np->name);
569 drm_mode_debug_printmodeline(dmode);
570
571 return 0;
572 }
573 EXPORT_SYMBOL_GPL(of_get_drm_display_mode);
574 #endif /* CONFIG_OF */
575 #endif /* CONFIG_VIDEOMODE_HELPERS */
576
577 /**
578 * drm_mode_set_name - set the name on a mode
579 * @mode: name will be set in this mode
580 *
581 * LOCKING:
582 * None.
583 *
584 * Set the name of @mode to a standard format.
585 */
586 void drm_mode_set_name(struct drm_display_mode *mode)
587 {
588 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
589
590 snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",
591 mode->hdisplay, mode->vdisplay,
592 interlaced ? "i" : "");
593 }
594 EXPORT_SYMBOL(drm_mode_set_name);
595
596 /**
597 * drm_mode_list_concat - move modes from one list to another
598 * @head: source list
599 * @new: dst list
600 *
601 * LOCKING:
602 * Caller must ensure both lists are locked.
603 *
604 * Move all the modes from @head to @new.
605 */
606 void drm_mode_list_concat(struct list_head *head, struct list_head *new)
607 {
608
609 struct list_head *entry, *tmp;
610
611 list_for_each_safe(entry, tmp, head) {
612 list_move_tail(entry, new);
613 }
614 }
615 EXPORT_SYMBOL(drm_mode_list_concat);
616
617 /**
618 * drm_mode_width - get the width of a mode
619 * @mode: mode
620 *
621 * LOCKING:
622 * None.
623 *
624 * Return @mode's width (hdisplay) value.
625 *
626 * FIXME: is this needed?
627 *
628 * RETURNS:
629 * @mode->hdisplay
630 */
631 int drm_mode_width(const struct drm_display_mode *mode)
632 {
633 return mode->hdisplay;
634
635 }
636 EXPORT_SYMBOL(drm_mode_width);
637
638 /**
639 * drm_mode_height - get the height of a mode
640 * @mode: mode
641 *
642 * LOCKING:
643 * None.
644 *
645 * Return @mode's height (vdisplay) value.
646 *
647 * FIXME: is this needed?
648 *
649 * RETURNS:
650 * @mode->vdisplay
651 */
652 int drm_mode_height(const struct drm_display_mode *mode)
653 {
654 return mode->vdisplay;
655 }
656 EXPORT_SYMBOL(drm_mode_height);
657
658 /** drm_mode_hsync - get the hsync of a mode
659 * @mode: mode
660 *
661 * LOCKING:
662 * None.
663 *
664 * Return @modes's hsync rate in kHz, rounded to the nearest int.
665 */
666 int drm_mode_hsync(const struct drm_display_mode *mode)
667 {
668 unsigned int calc_val;
669
670 if (mode->hsync)
671 return mode->hsync;
672
673 if (mode->htotal < 0)
674 return 0;
675
676 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
677 calc_val += 500; /* round to 1000Hz */
678 calc_val /= 1000; /* truncate to kHz */
679
680 return calc_val;
681 }
682 EXPORT_SYMBOL(drm_mode_hsync);
683
684 /**
685 * drm_mode_vrefresh - get the vrefresh of a mode
686 * @mode: mode
687 *
688 * LOCKING:
689 * None.
690 *
691 * Return @mode's vrefresh rate in Hz or calculate it if necessary.
692 *
693 * FIXME: why is this needed? shouldn't vrefresh be set already?
694 *
695 * RETURNS:
696 * Vertical refresh rate. It will be the result of actual value plus 0.5.
697 * If it is 70.288, it will return 70Hz.
698 * If it is 59.6, it will return 60Hz.
699 */
700 int drm_mode_vrefresh(const struct drm_display_mode *mode)
701 {
702 int refresh = 0;
703 unsigned int calc_val;
704
705 if (mode->vrefresh > 0)
706 refresh = mode->vrefresh;
707 else if (mode->htotal > 0 && mode->vtotal > 0) {
708 int vtotal;
709 vtotal = mode->vtotal;
710 /* work out vrefresh the value will be x1000 */
711 calc_val = (mode->clock * 1000);
712 calc_val /= mode->htotal;
713 refresh = (calc_val + vtotal / 2) / vtotal;
714
715 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
716 refresh *= 2;
717 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
718 refresh /= 2;
719 if (mode->vscan > 1)
720 refresh /= mode->vscan;
721 }
722 return refresh;
723 }
724 EXPORT_SYMBOL(drm_mode_vrefresh);
725
726 /**
727 * drm_mode_set_crtcinfo - set CRTC modesetting parameters
728 * @p: mode
729 * @adjust_flags: unused? (FIXME)
730 *
731 * LOCKING:
732 * None.
733 *
734 * Setup the CRTC modesetting parameters for @p, adjusting if necessary.
735 */
736 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
737 {
738 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
739 return;
740
741 p->crtc_hdisplay = p->hdisplay;
742 p->crtc_hsync_start = p->hsync_start;
743 p->crtc_hsync_end = p->hsync_end;
744 p->crtc_htotal = p->htotal;
745 p->crtc_hskew = p->hskew;
746 p->crtc_vdisplay = p->vdisplay;
747 p->crtc_vsync_start = p->vsync_start;
748 p->crtc_vsync_end = p->vsync_end;
749 p->crtc_vtotal = p->vtotal;
750
751 if (p->flags & DRM_MODE_FLAG_INTERLACE) {
752 if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
753 p->crtc_vdisplay /= 2;
754 p->crtc_vsync_start /= 2;
755 p->crtc_vsync_end /= 2;
756 p->crtc_vtotal /= 2;
757 }
758 }
759
760 if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
761 p->crtc_vdisplay *= 2;
762 p->crtc_vsync_start *= 2;
763 p->crtc_vsync_end *= 2;
764 p->crtc_vtotal *= 2;
765 }
766
767 if (p->vscan > 1) {
768 p->crtc_vdisplay *= p->vscan;
769 p->crtc_vsync_start *= p->vscan;
770 p->crtc_vsync_end *= p->vscan;
771 p->crtc_vtotal *= p->vscan;
772 }
773
774 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
775 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
776 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
777 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
778 }
779 EXPORT_SYMBOL(drm_mode_set_crtcinfo);
780
781
782 /**
783 * drm_mode_copy - copy the mode
784 * @dst: mode to overwrite
785 * @src: mode to copy
786 *
787 * LOCKING:
788 * None.
789 *
790 * Copy an existing mode into another mode, preserving the object id
791 * of the destination mode.
792 */
793 void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src)
794 {
795 int id = dst->base.id;
796
797 *dst = *src;
798 dst->base.id = id;
799 INIT_LIST_HEAD(&dst->head);
800 }
801 EXPORT_SYMBOL(drm_mode_copy);
802
803 /**
804 * drm_mode_duplicate - allocate and duplicate an existing mode
805 * @m: mode to duplicate
806 *
807 * LOCKING:
808 * None.
809 *
810 * Just allocate a new mode, copy the existing mode into it, and return
811 * a pointer to it. Used to create new instances of established modes.
812 */
813 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
814 const struct drm_display_mode *mode)
815 {
816 struct drm_display_mode *nmode;
817
818 nmode = drm_mode_create(dev);
819 if (!nmode)
820 return NULL;
821
822 drm_mode_copy(nmode, mode);
823
824 return nmode;
825 }
826 EXPORT_SYMBOL(drm_mode_duplicate);
827
828 /**
829 * drm_mode_equal - test modes for equality
830 * @mode1: first mode
831 * @mode2: second mode
832 *
833 * LOCKING:
834 * None.
835 *
836 * Check to see if @mode1 and @mode2 are equivalent.
837 *
838 * RETURNS:
839 * True if the modes are equal, false otherwise.
840 */
841 bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2)
842 {
843 /* do clock check convert to PICOS so fb modes get matched
844 * the same */
845 if (mode1->clock && mode2->clock) {
846 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
847 return false;
848 } else if (mode1->clock != mode2->clock)
849 return false;
850
851 return drm_mode_equal_no_clocks(mode1, mode2);
852 }
853 EXPORT_SYMBOL(drm_mode_equal);
854
855 /**
856 * drm_mode_equal_no_clocks - test modes for equality
857 * @mode1: first mode
858 * @mode2: second mode
859 *
860 * LOCKING:
861 * None.
862 *
863 * Check to see if @mode1 and @mode2 are equivalent, but
864 * don't check the pixel clocks.
865 *
866 * RETURNS:
867 * True if the modes are equal, false otherwise.
868 */
869 bool drm_mode_equal_no_clocks(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2)
870 {
871 if (mode1->hdisplay == mode2->hdisplay &&
872 mode1->hsync_start == mode2->hsync_start &&
873 mode1->hsync_end == mode2->hsync_end &&
874 mode1->htotal == mode2->htotal &&
875 mode1->hskew == mode2->hskew &&
876 mode1->vdisplay == mode2->vdisplay &&
877 mode1->vsync_start == mode2->vsync_start &&
878 mode1->vsync_end == mode2->vsync_end &&
879 mode1->vtotal == mode2->vtotal &&
880 mode1->vscan == mode2->vscan &&
881 mode1->flags == mode2->flags)
882 return true;
883
884 return false;
885 }
886 EXPORT_SYMBOL(drm_mode_equal_no_clocks);
887
888 /**
889 * drm_mode_validate_size - make sure modes adhere to size constraints
890 * @dev: DRM device
891 * @mode_list: list of modes to check
892 * @maxX: maximum width
893 * @maxY: maximum height
894 * @maxPitch: max pitch
895 *
896 * LOCKING:
897 * Caller must hold a lock protecting @mode_list.
898 *
899 * The DRM device (@dev) has size and pitch limits. Here we validate the
900 * modes we probed for @dev against those limits and set their status as
901 * necessary.
902 */
903 void drm_mode_validate_size(struct drm_device *dev,
904 struct list_head *mode_list,
905 int maxX, int maxY, int maxPitch)
906 {
907 struct drm_display_mode *mode;
908
909 list_for_each_entry(mode, mode_list, head) {
910 if (maxPitch > 0 && mode->hdisplay > maxPitch)
911 mode->status = MODE_BAD_WIDTH;
912
913 if (maxX > 0 && mode->hdisplay > maxX)
914 mode->status = MODE_VIRTUAL_X;
915
916 if (maxY > 0 && mode->vdisplay > maxY)
917 mode->status = MODE_VIRTUAL_Y;
918 }
919 }
920 EXPORT_SYMBOL(drm_mode_validate_size);
921
922 /**
923 * drm_mode_validate_clocks - validate modes against clock limits
924 * @dev: DRM device
925 * @mode_list: list of modes to check
926 * @min: minimum clock rate array
927 * @max: maximum clock rate array
928 * @n_ranges: number of clock ranges (size of arrays)
929 *
930 * LOCKING:
931 * Caller must hold a lock protecting @mode_list.
932 *
933 * Some code may need to check a mode list against the clock limits of the
934 * device in question. This function walks the mode list, testing to make
935 * sure each mode falls within a given range (defined by @min and @max
936 * arrays) and sets @mode->status as needed.
937 */
938 void drm_mode_validate_clocks(struct drm_device *dev,
939 struct list_head *mode_list,
940 int *min, int *max, int n_ranges)
941 {
942 struct drm_display_mode *mode;
943 int i;
944
945 list_for_each_entry(mode, mode_list, head) {
946 bool good = false;
947 for (i = 0; i < n_ranges; i++) {
948 if (mode->clock >= min[i] && mode->clock <= max[i]) {
949 good = true;
950 break;
951 }
952 }
953 if (!good)
954 mode->status = MODE_CLOCK_RANGE;
955 }
956 }
957 EXPORT_SYMBOL(drm_mode_validate_clocks);
958
959 /**
960 * drm_mode_prune_invalid - remove invalid modes from mode list
961 * @dev: DRM device
962 * @mode_list: list of modes to check
963 * @verbose: be verbose about it
964 *
965 * LOCKING:
966 * Caller must hold a lock protecting @mode_list.
967 *
968 * Once mode list generation is complete, a caller can use this routine to
969 * remove invalid modes from a mode list. If any of the modes have a
970 * status other than %MODE_OK, they are removed from @mode_list and freed.
971 */
972 void drm_mode_prune_invalid(struct drm_device *dev,
973 struct list_head *mode_list, bool verbose)
974 {
975 struct drm_display_mode *mode, *t;
976
977 list_for_each_entry_safe(mode, t, mode_list, head) {
978 if (mode->status != MODE_OK) {
979 list_del(&mode->head);
980 if (verbose) {
981 drm_mode_debug_printmodeline(mode);
982 DRM_DEBUG_KMS("Not using %s mode %d\n",
983 mode->name, mode->status);
984 }
985 drm_mode_destroy(dev, mode);
986 }
987 }
988 }
989 EXPORT_SYMBOL(drm_mode_prune_invalid);
990
991 /**
992 * drm_mode_compare - compare modes for favorability
993 * @priv: unused
994 * @lh_a: list_head for first mode
995 * @lh_b: list_head for second mode
996 *
997 * LOCKING:
998 * None.
999 *
1000 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
1001 * which is better.
1002 *
1003 * RETURNS:
1004 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
1005 * positive if @lh_b is better than @lh_a.
1006 */
1007 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
1008 {
1009 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
1010 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
1011 int diff;
1012
1013 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
1014 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
1015 if (diff)
1016 return diff;
1017 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
1018 if (diff)
1019 return diff;
1020 diff = b->clock - a->clock;
1021 return diff;
1022 }
1023
1024 /**
1025 * drm_mode_sort - sort mode list
1026 * @mode_list: list to sort
1027 *
1028 * LOCKING:
1029 * Caller must hold a lock protecting @mode_list.
1030 *
1031 * Sort @mode_list by favorability, putting good modes first.
1032 */
1033 void drm_mode_sort(struct list_head *mode_list)
1034 {
1035 list_sort(NULL, mode_list, drm_mode_compare);
1036 }
1037 EXPORT_SYMBOL(drm_mode_sort);
1038
1039 /**
1040 * drm_mode_connector_list_update - update the mode list for the connector
1041 * @connector: the connector to update
1042 *
1043 * LOCKING:
1044 * Caller must hold a lock protecting @mode_list.
1045 *
1046 * This moves the modes from the @connector probed_modes list
1047 * to the actual mode list. It compares the probed mode against the current
1048 * list and only adds different modes. All modes unverified after this point
1049 * will be removed by the prune invalid modes.
1050 */
1051 void drm_mode_connector_list_update(struct drm_connector *connector)
1052 {
1053 struct drm_display_mode *mode;
1054 struct drm_display_mode *pmode, *pt;
1055 int found_it;
1056
1057 list_for_each_entry_safe(pmode, pt, &connector->probed_modes,
1058 head) {
1059 found_it = 0;
1060 /* go through current modes checking for the new probed mode */
1061 list_for_each_entry(mode, &connector->modes, head) {
1062 if (drm_mode_equal(pmode, mode)) {
1063 found_it = 1;
1064 /* if equal delete the probed mode */
1065 mode->status = pmode->status;
1066 /* Merge type bits together */
1067 mode->type |= pmode->type;
1068 list_del(&pmode->head);
1069 drm_mode_destroy(connector->dev, pmode);
1070 break;
1071 }
1072 }
1073
1074 if (!found_it) {
1075 list_move_tail(&pmode->head, &connector->modes);
1076 }
1077 }
1078 }
1079 EXPORT_SYMBOL(drm_mode_connector_list_update);
1080
1081 /**
1082 * drm_mode_parse_command_line_for_connector - parse command line for connector
1083 * @mode_option - per connector mode option
1084 * @connector - connector to parse line for
1085 *
1086 * This parses the connector specific then generic command lines for
1087 * modes and options to configure the connector.
1088 *
1089 * This uses the same parameters as the fb modedb.c, except for extra
1090 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
1091 *
1092 * enable/enable Digital/disable bit at the end
1093 */
1094 bool drm_mode_parse_command_line_for_connector(const char *mode_option,
1095 struct drm_connector *connector,
1096 struct drm_cmdline_mode *mode)
1097 {
1098 const char *name;
1099 unsigned int namelen;
1100 bool res_specified = false, bpp_specified = false, refresh_specified = false;
1101 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0;
1102 bool yres_specified = false, cvt = false, rb = false;
1103 bool interlace = false, margins = false, was_digit = false;
1104 int i;
1105 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED;
1106
1107 #ifdef CONFIG_FB
1108 if (!mode_option)
1109 mode_option = fb_mode_option;
1110 #endif
1111
1112 if (!mode_option) {
1113 mode->specified = false;
1114 return false;
1115 }
1116
1117 name = mode_option;
1118 namelen = strlen(name);
1119 for (i = namelen-1; i >= 0; i--) {
1120 switch (name[i]) {
1121 case '@':
1122 if (!refresh_specified && !bpp_specified &&
1123 !yres_specified && !cvt && !rb && was_digit) {
1124 refresh = simple_strtol(&name[i+1], NULL, 10);
1125 refresh_specified = true;
1126 was_digit = false;
1127 } else
1128 goto done;
1129 break;
1130 case '-':
1131 if (!bpp_specified && !yres_specified && !cvt &&
1132 !rb && was_digit) {
1133 bpp = simple_strtol(&name[i+1], NULL, 10);
1134 bpp_specified = true;
1135 was_digit = false;
1136 } else
1137 goto done;
1138 break;
1139 case 'x':
1140 if (!yres_specified && was_digit) {
1141 yres = simple_strtol(&name[i+1], NULL, 10);
1142 yres_specified = true;
1143 was_digit = false;
1144 } else
1145 goto done;
1146 break;
1147 case '0' ... '9':
1148 was_digit = true;
1149 break;
1150 case 'M':
1151 if (yres_specified || cvt || was_digit)
1152 goto done;
1153 cvt = true;
1154 break;
1155 case 'R':
1156 if (yres_specified || cvt || rb || was_digit)
1157 goto done;
1158 rb = true;
1159 break;
1160 case 'm':
1161 if (cvt || yres_specified || was_digit)
1162 goto done;
1163 margins = true;
1164 break;
1165 case 'i':
1166 if (cvt || yres_specified || was_digit)
1167 goto done;
1168 interlace = true;
1169 break;
1170 case 'e':
1171 if (yres_specified || bpp_specified || refresh_specified ||
1172 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1173 goto done;
1174
1175 force = DRM_FORCE_ON;
1176 break;
1177 case 'D':
1178 if (yres_specified || bpp_specified || refresh_specified ||
1179 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1180 goto done;
1181
1182 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
1183 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
1184 force = DRM_FORCE_ON;
1185 else
1186 force = DRM_FORCE_ON_DIGITAL;
1187 break;
1188 case 'd':
1189 if (yres_specified || bpp_specified || refresh_specified ||
1190 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1191 goto done;
1192
1193 force = DRM_FORCE_OFF;
1194 break;
1195 default:
1196 goto done;
1197 }
1198 }
1199
1200 if (i < 0 && yres_specified) {
1201 char *ch;
1202 xres = simple_strtol(name, &ch, 10);
1203 if ((ch != NULL) && (*ch == 'x'))
1204 res_specified = true;
1205 else
1206 i = ch - name;
1207 } else if (!yres_specified && was_digit) {
1208 /* catch mode that begins with digits but has no 'x' */
1209 i = 0;
1210 }
1211 done:
1212 if (i >= 0) {
1213 printk(KERN_WARNING
1214 "parse error at position %i in video mode '%s'\n",
1215 i, name);
1216 mode->specified = false;
1217 return false;
1218 }
1219
1220 if (res_specified) {
1221 mode->specified = true;
1222 mode->xres = xres;
1223 mode->yres = yres;
1224 }
1225
1226 if (refresh_specified) {
1227 mode->refresh_specified = true;
1228 mode->refresh = refresh;
1229 }
1230
1231 if (bpp_specified) {
1232 mode->bpp_specified = true;
1233 mode->bpp = bpp;
1234 }
1235 mode->rb = rb;
1236 mode->cvt = cvt;
1237 mode->interlace = interlace;
1238 mode->margins = margins;
1239 mode->force = force;
1240
1241 return true;
1242 }
1243 EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector);
1244
1245 struct drm_display_mode *
1246 drm_mode_create_from_cmdline_mode(struct drm_device *dev,
1247 struct drm_cmdline_mode *cmd)
1248 {
1249 struct drm_display_mode *mode;
1250
1251 if (cmd->cvt)
1252 mode = drm_cvt_mode(dev,
1253 cmd->xres, cmd->yres,
1254 cmd->refresh_specified ? cmd->refresh : 60,
1255 cmd->rb, cmd->interlace,
1256 cmd->margins);
1257 else
1258 mode = drm_gtf_mode(dev,
1259 cmd->xres, cmd->yres,
1260 cmd->refresh_specified ? cmd->refresh : 60,
1261 cmd->interlace,
1262 cmd->margins);
1263 if (!mode)
1264 return NULL;
1265
1266 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
1267 return mode;
1268 }
1269 EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode);
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