2 * Copyright © 1997-2003 by The XFree86 Project, Inc.
3 * Copyright © 2007 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
5 * Jesse Barnes <jesse.barnes@intel.com>
6 * Copyright 2005-2006 Luc Verhaegen
7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
27 * Except as contained in this notice, the name of the copyright holder(s)
28 * and author(s) shall not be used in advertising or otherwise to promote
29 * the sale, use or other dealings in this Software without prior written
30 * authorization from the copyright holder(s) and author(s).
33 #include <linux/list.h>
34 #include <linux/list_sort.h>
40 * drm_mode_debug_printmodeline - debug print a mode
42 * @mode: mode to print
47 * Describe @mode using DRM_DEBUG.
49 void drm_mode_debug_printmodeline(struct drm_display_mode
*mode
)
51 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
53 mode
->base
.id
, mode
->name
, mode
->vrefresh
, mode
->clock
,
54 mode
->hdisplay
, mode
->hsync_start
,
55 mode
->hsync_end
, mode
->htotal
,
56 mode
->vdisplay
, mode
->vsync_start
,
57 mode
->vsync_end
, mode
->vtotal
, mode
->type
, mode
->flags
);
59 EXPORT_SYMBOL(drm_mode_debug_printmodeline
);
62 * drm_cvt_mode -create a modeline based on CVT algorithm
64 * @hdisplay: hdisplay size
65 * @vdisplay: vdisplay size
66 * @vrefresh : vrefresh rate
67 * @reduced : Whether the GTF calculation is simplified
68 * @interlaced:Whether the interlace is supported
73 * return the modeline based on CVT algorithm
75 * This function is called to generate the modeline based on CVT algorithm
76 * according to the hdisplay, vdisplay, vrefresh.
77 * It is based from the VESA(TM) Coordinated Video Timing Generator by
78 * Graham Loveridge April 9, 2003 available at
79 * http://www.vesa.org/public/CVT/CVTd6r1.xls
81 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
82 * What I have done is to translate it by using integer calculation.
84 #define HV_FACTOR 1000
85 struct drm_display_mode
*drm_cvt_mode(struct drm_device
*dev
, int hdisplay
,
86 int vdisplay
, int vrefresh
,
87 bool reduced
, bool interlaced
, bool margins
)
89 /* 1) top/bottom margin size (% of height) - default: 1.8, */
90 #define CVT_MARGIN_PERCENTAGE 18
91 /* 2) character cell horizontal granularity (pixels) - default 8 */
92 #define CVT_H_GRANULARITY 8
93 /* 3) Minimum vertical porch (lines) - default 3 */
94 #define CVT_MIN_V_PORCH 3
95 /* 4) Minimum number of vertical back porch lines - default 6 */
96 #define CVT_MIN_V_BPORCH 6
97 /* Pixel Clock step (kHz) */
98 #define CVT_CLOCK_STEP 250
99 struct drm_display_mode
*drm_mode
;
100 unsigned int vfieldrate
, hperiod
;
101 int hdisplay_rnd
, hmargin
, vdisplay_rnd
, vmargin
, vsync
;
104 /* allocate the drm_display_mode structure. If failure, we will
107 drm_mode
= drm_mode_create(dev
);
111 /* the CVT default refresh rate is 60Hz */
115 /* the required field fresh rate */
117 vfieldrate
= vrefresh
* 2;
119 vfieldrate
= vrefresh
;
121 /* horizontal pixels */
122 hdisplay_rnd
= hdisplay
- (hdisplay
% CVT_H_GRANULARITY
);
124 /* determine the left&right borders */
127 hmargin
= hdisplay_rnd
* CVT_MARGIN_PERCENTAGE
/ 1000;
128 hmargin
-= hmargin
% CVT_H_GRANULARITY
;
130 /* find the total active pixels */
131 drm_mode
->hdisplay
= hdisplay_rnd
+ 2 * hmargin
;
133 /* find the number of lines per field */
135 vdisplay_rnd
= vdisplay
/ 2;
137 vdisplay_rnd
= vdisplay
;
139 /* find the top & bottom borders */
142 vmargin
= vdisplay_rnd
* CVT_MARGIN_PERCENTAGE
/ 1000;
144 drm_mode
->vdisplay
= vdisplay
+ 2 * vmargin
;
152 /* Determine VSync Width from aspect ratio */
153 if (!(vdisplay
% 3) && ((vdisplay
* 4 / 3) == hdisplay
))
155 else if (!(vdisplay
% 9) && ((vdisplay
* 16 / 9) == hdisplay
))
157 else if (!(vdisplay
% 10) && ((vdisplay
* 16 / 10) == hdisplay
))
159 else if (!(vdisplay
% 4) && ((vdisplay
* 5 / 4) == hdisplay
))
161 else if (!(vdisplay
% 9) && ((vdisplay
* 15 / 9) == hdisplay
))
167 /* simplify the GTF calculation */
168 /* 4) Minimum time of vertical sync + back porch interval (µs)
172 #define CVT_MIN_VSYNC_BP 550
173 /* 3) Nominal HSync width (% of line period) - default 8 */
174 #define CVT_HSYNC_PERCENTAGE 8
175 unsigned int hblank_percentage
;
176 int vsyncandback_porch
, vback_porch
, hblank
;
178 /* estimated the horizontal period */
179 tmp1
= HV_FACTOR
* 1000000 -
180 CVT_MIN_VSYNC_BP
* HV_FACTOR
* vfieldrate
;
181 tmp2
= (vdisplay_rnd
+ 2 * vmargin
+ CVT_MIN_V_PORCH
) * 2 +
183 hperiod
= tmp1
* 2 / (tmp2
* vfieldrate
);
185 tmp1
= CVT_MIN_VSYNC_BP
* HV_FACTOR
/ hperiod
+ 1;
186 /* 9. Find number of lines in sync + backporch */
187 if (tmp1
< (vsync
+ CVT_MIN_V_PORCH
))
188 vsyncandback_porch
= vsync
+ CVT_MIN_V_PORCH
;
190 vsyncandback_porch
= tmp1
;
191 /* 10. Find number of lines in back porch */
192 vback_porch
= vsyncandback_porch
- vsync
;
193 drm_mode
->vtotal
= vdisplay_rnd
+ 2 * vmargin
+
194 vsyncandback_porch
+ CVT_MIN_V_PORCH
;
195 /* 5) Definition of Horizontal blanking time limitation */
196 /* Gradient (%/kHz) - default 600 */
197 #define CVT_M_FACTOR 600
198 /* Offset (%) - default 40 */
199 #define CVT_C_FACTOR 40
200 /* Blanking time scaling factor - default 128 */
201 #define CVT_K_FACTOR 128
202 /* Scaling factor weighting - default 20 */
203 #define CVT_J_FACTOR 20
204 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256)
205 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
207 /* 12. Find ideal blanking duty cycle from formula */
208 hblank_percentage
= CVT_C_PRIME
* HV_FACTOR
- CVT_M_PRIME
*
210 /* 13. Blanking time */
211 if (hblank_percentage
< 20 * HV_FACTOR
)
212 hblank_percentage
= 20 * HV_FACTOR
;
213 hblank
= drm_mode
->hdisplay
* hblank_percentage
/
214 (100 * HV_FACTOR
- hblank_percentage
);
215 hblank
-= hblank
% (2 * CVT_H_GRANULARITY
);
216 /* 14. find the total pixes per line */
217 drm_mode
->htotal
= drm_mode
->hdisplay
+ hblank
;
218 drm_mode
->hsync_end
= drm_mode
->hdisplay
+ hblank
/ 2;
219 drm_mode
->hsync_start
= drm_mode
->hsync_end
-
220 (drm_mode
->htotal
* CVT_HSYNC_PERCENTAGE
) / 100;
221 drm_mode
->hsync_start
+= CVT_H_GRANULARITY
-
222 drm_mode
->hsync_start
% CVT_H_GRANULARITY
;
223 /* fill the Vsync values */
224 drm_mode
->vsync_start
= drm_mode
->vdisplay
+ CVT_MIN_V_PORCH
;
225 drm_mode
->vsync_end
= drm_mode
->vsync_start
+ vsync
;
227 /* Reduced blanking */
228 /* Minimum vertical blanking interval time (µs)- default 460 */
229 #define CVT_RB_MIN_VBLANK 460
230 /* Fixed number of clocks for horizontal sync */
231 #define CVT_RB_H_SYNC 32
232 /* Fixed number of clocks for horizontal blanking */
233 #define CVT_RB_H_BLANK 160
234 /* Fixed number of lines for vertical front porch - default 3*/
235 #define CVT_RB_VFPORCH 3
238 /* 8. Estimate Horizontal period. */
239 tmp1
= HV_FACTOR
* 1000000 -
240 CVT_RB_MIN_VBLANK
* HV_FACTOR
* vfieldrate
;
241 tmp2
= vdisplay_rnd
+ 2 * vmargin
;
242 hperiod
= tmp1
/ (tmp2
* vfieldrate
);
243 /* 9. Find number of lines in vertical blanking */
244 vbilines
= CVT_RB_MIN_VBLANK
* HV_FACTOR
/ hperiod
+ 1;
245 /* 10. Check if vertical blanking is sufficient */
246 if (vbilines
< (CVT_RB_VFPORCH
+ vsync
+ CVT_MIN_V_BPORCH
))
247 vbilines
= CVT_RB_VFPORCH
+ vsync
+ CVT_MIN_V_BPORCH
;
248 /* 11. Find total number of lines in vertical field */
249 drm_mode
->vtotal
= vdisplay_rnd
+ 2 * vmargin
+ vbilines
;
250 /* 12. Find total number of pixels in a line */
251 drm_mode
->htotal
= drm_mode
->hdisplay
+ CVT_RB_H_BLANK
;
252 /* Fill in HSync values */
253 drm_mode
->hsync_end
= drm_mode
->hdisplay
+ CVT_RB_H_BLANK
/ 2;
254 drm_mode
->hsync_start
= drm_mode
->hsync_end
= CVT_RB_H_SYNC
;
256 /* 15/13. Find pixel clock frequency (kHz for xf86) */
257 drm_mode
->clock
= drm_mode
->htotal
* HV_FACTOR
* 1000 / hperiod
;
258 drm_mode
->clock
-= drm_mode
->clock
% CVT_CLOCK_STEP
;
259 /* 18/16. Find actual vertical frame frequency */
260 /* ignore - just set the mode flag for interlaced */
262 drm_mode
->vtotal
*= 2;
263 drm_mode
->flags
|= DRM_MODE_FLAG_INTERLACE
;
265 /* Fill the mode line name */
266 drm_mode_set_name(drm_mode
);
268 drm_mode
->flags
|= (DRM_MODE_FLAG_PHSYNC
|
269 DRM_MODE_FLAG_NVSYNC
);
271 drm_mode
->flags
|= (DRM_MODE_FLAG_PVSYNC
|
272 DRM_MODE_FLAG_NHSYNC
);
276 EXPORT_SYMBOL(drm_cvt_mode
);
279 * drm_gtf_mode_complex - create the modeline based on full GTF algorithm
282 * @hdisplay :hdisplay size
283 * @vdisplay :vdisplay size
284 * @vrefresh :vrefresh rate.
285 * @interlaced :whether the interlace is supported
286 * @margins :desired margin size
287 * @GTF_[MCKJ] :extended GTF formula parameters
292 * return the modeline based on full GTF algorithm.
294 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them
295 * in here multiplied by two. For a C of 40, pass in 80.
297 struct drm_display_mode
*
298 drm_gtf_mode_complex(struct drm_device
*dev
, int hdisplay
, int vdisplay
,
299 int vrefresh
, bool interlaced
, int margins
,
300 int GTF_M
, int GTF_2C
, int GTF_K
, int GTF_2J
)
301 { /* 1) top/bottom margin size (% of height) - default: 1.8, */
302 #define GTF_MARGIN_PERCENTAGE 18
303 /* 2) character cell horizontal granularity (pixels) - default 8 */
304 #define GTF_CELL_GRAN 8
305 /* 3) Minimum vertical porch (lines) - default 3 */
306 #define GTF_MIN_V_PORCH 1
307 /* width of vsync in lines */
309 /* width of hsync as % of total line */
310 #define H_SYNC_PERCENT 8
311 /* min time of vsync + back porch (microsec) */
312 #define MIN_VSYNC_PLUS_BP 550
313 /* C' and M' are part of the Blanking Duty Cycle computation */
314 #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
315 #define GTF_M_PRIME (GTF_K * GTF_M / 256)
316 struct drm_display_mode
*drm_mode
;
317 unsigned int hdisplay_rnd
, vdisplay_rnd
, vfieldrate_rqd
;
318 int top_margin
, bottom_margin
;
320 unsigned int hfreq_est
;
321 int vsync_plus_bp
, vback_porch
;
322 unsigned int vtotal_lines
, vfieldrate_est
, hperiod
;
323 unsigned int vfield_rate
, vframe_rate
;
324 int left_margin
, right_margin
;
325 unsigned int total_active_pixels
, ideal_duty_cycle
;
326 unsigned int hblank
, total_pixels
, pixel_freq
;
327 int hsync
, hfront_porch
, vodd_front_porch_lines
;
328 unsigned int tmp1
, tmp2
;
330 drm_mode
= drm_mode_create(dev
);
334 /* 1. In order to give correct results, the number of horizontal
335 * pixels requested is first processed to ensure that it is divisible
336 * by the character size, by rounding it to the nearest character
339 hdisplay_rnd
= (hdisplay
+ GTF_CELL_GRAN
/ 2) / GTF_CELL_GRAN
;
340 hdisplay_rnd
= hdisplay_rnd
* GTF_CELL_GRAN
;
342 /* 2. If interlace is requested, the number of vertical lines assumed
343 * by the calculation must be halved, as the computation calculates
344 * the number of vertical lines per field.
347 vdisplay_rnd
= vdisplay
/ 2;
349 vdisplay_rnd
= vdisplay
;
351 /* 3. Find the frame rate required: */
353 vfieldrate_rqd
= vrefresh
* 2;
355 vfieldrate_rqd
= vrefresh
;
357 /* 4. Find number of lines in Top margin: */
360 top_margin
= (vdisplay_rnd
* GTF_MARGIN_PERCENTAGE
+ 500) /
362 /* 5. Find number of lines in bottom margin: */
363 bottom_margin
= top_margin
;
365 /* 6. If interlace is required, then set variable interlace: */
371 /* 7. Estimate the Horizontal frequency */
373 tmp1
= (1000000 - MIN_VSYNC_PLUS_BP
* vfieldrate_rqd
) / 500;
374 tmp2
= (vdisplay_rnd
+ 2 * top_margin
+ GTF_MIN_V_PORCH
) *
376 hfreq_est
= (tmp2
* 1000 * vfieldrate_rqd
) / tmp1
;
379 /* 8. Find the number of lines in V sync + back porch */
380 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
381 vsync_plus_bp
= MIN_VSYNC_PLUS_BP
* hfreq_est
/ 1000;
382 vsync_plus_bp
= (vsync_plus_bp
+ 500) / 1000;
383 /* 9. Find the number of lines in V back porch alone: */
384 vback_porch
= vsync_plus_bp
- V_SYNC_RQD
;
385 /* 10. Find the total number of lines in Vertical field period: */
386 vtotal_lines
= vdisplay_rnd
+ top_margin
+ bottom_margin
+
387 vsync_plus_bp
+ GTF_MIN_V_PORCH
;
388 /* 11. Estimate the Vertical field frequency: */
389 vfieldrate_est
= hfreq_est
/ vtotal_lines
;
390 /* 12. Find the actual horizontal period: */
391 hperiod
= 1000000 / (vfieldrate_rqd
* vtotal_lines
);
393 /* 13. Find the actual Vertical field frequency: */
394 vfield_rate
= hfreq_est
/ vtotal_lines
;
395 /* 14. Find the Vertical frame frequency: */
397 vframe_rate
= vfield_rate
/ 2;
399 vframe_rate
= vfield_rate
;
400 /* 15. Find number of pixels in left margin: */
402 left_margin
= (hdisplay_rnd
* GTF_MARGIN_PERCENTAGE
+ 500) /
407 /* 16.Find number of pixels in right margin: */
408 right_margin
= left_margin
;
409 /* 17.Find total number of active pixels in image and left and right */
410 total_active_pixels
= hdisplay_rnd
+ left_margin
+ right_margin
;
411 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */
412 ideal_duty_cycle
= GTF_C_PRIME
* 1000 -
413 (GTF_M_PRIME
* 1000000 / hfreq_est
);
414 /* 19.Find the number of pixels in the blanking time to the nearest
415 * double character cell: */
416 hblank
= total_active_pixels
* ideal_duty_cycle
/
417 (100000 - ideal_duty_cycle
);
418 hblank
= (hblank
+ GTF_CELL_GRAN
) / (2 * GTF_CELL_GRAN
);
419 hblank
= hblank
* 2 * GTF_CELL_GRAN
;
420 /* 20.Find total number of pixels: */
421 total_pixels
= total_active_pixels
+ hblank
;
422 /* 21.Find pixel clock frequency: */
423 pixel_freq
= total_pixels
* hfreq_est
/ 1000;
424 /* Stage 1 computations are now complete; I should really pass
425 * the results to another function and do the Stage 2 computations,
426 * but I only need a few more values so I'll just append the
427 * computations here for now */
428 /* 17. Find the number of pixels in the horizontal sync period: */
429 hsync
= H_SYNC_PERCENT
* total_pixels
/ 100;
430 hsync
= (hsync
+ GTF_CELL_GRAN
/ 2) / GTF_CELL_GRAN
;
431 hsync
= hsync
* GTF_CELL_GRAN
;
432 /* 18. Find the number of pixels in horizontal front porch period */
433 hfront_porch
= hblank
/ 2 - hsync
;
434 /* 36. Find the number of lines in the odd front porch period: */
435 vodd_front_porch_lines
= GTF_MIN_V_PORCH
;
437 /* finally, pack the results in the mode struct */
438 drm_mode
->hdisplay
= hdisplay_rnd
;
439 drm_mode
->hsync_start
= hdisplay_rnd
+ hfront_porch
;
440 drm_mode
->hsync_end
= drm_mode
->hsync_start
+ hsync
;
441 drm_mode
->htotal
= total_pixels
;
442 drm_mode
->vdisplay
= vdisplay_rnd
;
443 drm_mode
->vsync_start
= vdisplay_rnd
+ vodd_front_porch_lines
;
444 drm_mode
->vsync_end
= drm_mode
->vsync_start
+ V_SYNC_RQD
;
445 drm_mode
->vtotal
= vtotal_lines
;
447 drm_mode
->clock
= pixel_freq
;
450 drm_mode
->vtotal
*= 2;
451 drm_mode
->flags
|= DRM_MODE_FLAG_INTERLACE
;
454 drm_mode_set_name(drm_mode
);
455 if (GTF_M
== 600 && GTF_2C
== 80 && GTF_K
== 128 && GTF_2J
== 40)
456 drm_mode
->flags
= DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
;
458 drm_mode
->flags
= DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
;
462 EXPORT_SYMBOL(drm_gtf_mode_complex
);
465 * drm_gtf_mode - create the modeline based on GTF algorithm
468 * @hdisplay :hdisplay size
469 * @vdisplay :vdisplay size
470 * @vrefresh :vrefresh rate.
471 * @interlaced :whether the interlace is supported
472 * @margins :whether the margin is supported
477 * return the modeline based on GTF algorithm
479 * This function is to create the modeline based on the GTF algorithm.
480 * Generalized Timing Formula is derived from:
481 * GTF Spreadsheet by Andy Morrish (1/5/97)
482 * available at http://www.vesa.org
484 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
485 * What I have done is to translate it by using integer calculation.
486 * I also refer to the function of fb_get_mode in the file of
487 * drivers/video/fbmon.c
489 * Standard GTF parameters:
495 struct drm_display_mode
*
496 drm_gtf_mode(struct drm_device
*dev
, int hdisplay
, int vdisplay
, int vrefresh
,
497 bool lace
, int margins
)
499 return drm_gtf_mode_complex(dev
, hdisplay
, vdisplay
, vrefresh
, lace
,
500 margins
, 600, 40 * 2, 128, 20 * 2);
502 EXPORT_SYMBOL(drm_gtf_mode
);
505 * drm_mode_set_name - set the name on a mode
506 * @mode: name will be set in this mode
511 * Set the name of @mode to a standard format.
513 void drm_mode_set_name(struct drm_display_mode
*mode
)
515 bool interlaced
= !!(mode
->flags
& DRM_MODE_FLAG_INTERLACE
);
517 snprintf(mode
->name
, DRM_DISPLAY_MODE_LEN
, "%dx%d%s",
518 mode
->hdisplay
, mode
->vdisplay
,
519 interlaced
? "i" : "");
521 EXPORT_SYMBOL(drm_mode_set_name
);
524 * drm_mode_list_concat - move modes from one list to another
529 * Caller must ensure both lists are locked.
531 * Move all the modes from @head to @new.
533 void drm_mode_list_concat(struct list_head
*head
, struct list_head
*new)
536 struct list_head
*entry
, *tmp
;
538 list_for_each_safe(entry
, tmp
, head
) {
539 list_move_tail(entry
, new);
542 EXPORT_SYMBOL(drm_mode_list_concat
);
545 * drm_mode_width - get the width of a mode
551 * Return @mode's width (hdisplay) value.
553 * FIXME: is this needed?
558 int drm_mode_width(struct drm_display_mode
*mode
)
560 return mode
->hdisplay
;
563 EXPORT_SYMBOL(drm_mode_width
);
566 * drm_mode_height - get the height of a mode
572 * Return @mode's height (vdisplay) value.
574 * FIXME: is this needed?
579 int drm_mode_height(struct drm_display_mode
*mode
)
581 return mode
->vdisplay
;
583 EXPORT_SYMBOL(drm_mode_height
);
585 /** drm_mode_hsync - get the hsync of a mode
591 * Return @modes's hsync rate in kHz, rounded to the nearest int.
593 int drm_mode_hsync(struct drm_display_mode
*mode
)
595 unsigned int calc_val
;
600 if (mode
->htotal
< 0)
603 calc_val
= (mode
->clock
* 1000) / mode
->htotal
; /* hsync in Hz */
604 calc_val
+= 500; /* round to 1000Hz */
605 calc_val
/= 1000; /* truncate to kHz */
609 EXPORT_SYMBOL(drm_mode_hsync
);
612 * drm_mode_vrefresh - get the vrefresh of a mode
618 * Return @mode's vrefresh rate in Hz or calculate it if necessary.
620 * FIXME: why is this needed? shouldn't vrefresh be set already?
623 * Vertical refresh rate. It will be the result of actual value plus 0.5.
624 * If it is 70.288, it will return 70Hz.
625 * If it is 59.6, it will return 60Hz.
627 int drm_mode_vrefresh(struct drm_display_mode
*mode
)
630 unsigned int calc_val
;
632 if (mode
->vrefresh
> 0)
633 refresh
= mode
->vrefresh
;
634 else if (mode
->htotal
> 0 && mode
->vtotal
> 0) {
636 vtotal
= mode
->vtotal
;
637 /* work out vrefresh the value will be x1000 */
638 calc_val
= (mode
->clock
* 1000);
639 calc_val
/= mode
->htotal
;
640 refresh
= (calc_val
+ vtotal
/ 2) / vtotal
;
642 if (mode
->flags
& DRM_MODE_FLAG_INTERLACE
)
644 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
647 refresh
/= mode
->vscan
;
651 EXPORT_SYMBOL(drm_mode_vrefresh
);
654 * drm_mode_set_crtcinfo - set CRTC modesetting parameters
656 * @adjust_flags: unused? (FIXME)
661 * Setup the CRTC modesetting parameters for @p, adjusting if necessary.
663 void drm_mode_set_crtcinfo(struct drm_display_mode
*p
, int adjust_flags
)
665 if ((p
== NULL
) || ((p
->type
& DRM_MODE_TYPE_CRTC_C
) == DRM_MODE_TYPE_BUILTIN
))
668 p
->crtc_hdisplay
= p
->hdisplay
;
669 p
->crtc_hsync_start
= p
->hsync_start
;
670 p
->crtc_hsync_end
= p
->hsync_end
;
671 p
->crtc_htotal
= p
->htotal
;
672 p
->crtc_hskew
= p
->hskew
;
673 p
->crtc_vdisplay
= p
->vdisplay
;
674 p
->crtc_vsync_start
= p
->vsync_start
;
675 p
->crtc_vsync_end
= p
->vsync_end
;
676 p
->crtc_vtotal
= p
->vtotal
;
678 if (p
->flags
& DRM_MODE_FLAG_INTERLACE
) {
679 if (adjust_flags
& CRTC_INTERLACE_HALVE_V
) {
680 p
->crtc_vdisplay
/= 2;
681 p
->crtc_vsync_start
/= 2;
682 p
->crtc_vsync_end
/= 2;
689 if (p
->flags
& DRM_MODE_FLAG_DBLSCAN
) {
690 p
->crtc_vdisplay
*= 2;
691 p
->crtc_vsync_start
*= 2;
692 p
->crtc_vsync_end
*= 2;
697 p
->crtc_vdisplay
*= p
->vscan
;
698 p
->crtc_vsync_start
*= p
->vscan
;
699 p
->crtc_vsync_end
*= p
->vscan
;
700 p
->crtc_vtotal
*= p
->vscan
;
703 p
->crtc_vblank_start
= min(p
->crtc_vsync_start
, p
->crtc_vdisplay
);
704 p
->crtc_vblank_end
= max(p
->crtc_vsync_end
, p
->crtc_vtotal
);
705 p
->crtc_hblank_start
= min(p
->crtc_hsync_start
, p
->crtc_hdisplay
);
706 p
->crtc_hblank_end
= max(p
->crtc_hsync_end
, p
->crtc_htotal
);
708 p
->crtc_hadjusted
= false;
709 p
->crtc_vadjusted
= false;
711 EXPORT_SYMBOL(drm_mode_set_crtcinfo
);
715 * drm_mode_duplicate - allocate and duplicate an existing mode
716 * @m: mode to duplicate
721 * Just allocate a new mode, copy the existing mode into it, and return
722 * a pointer to it. Used to create new instances of established modes.
724 struct drm_display_mode
*drm_mode_duplicate(struct drm_device
*dev
,
725 struct drm_display_mode
*mode
)
727 struct drm_display_mode
*nmode
;
730 nmode
= drm_mode_create(dev
);
734 new_id
= nmode
->base
.id
;
736 nmode
->base
.id
= new_id
;
737 INIT_LIST_HEAD(&nmode
->head
);
740 EXPORT_SYMBOL(drm_mode_duplicate
);
743 * drm_mode_equal - test modes for equality
745 * @mode2: second mode
750 * Check to see if @mode1 and @mode2 are equivalent.
753 * True if the modes are equal, false otherwise.
755 bool drm_mode_equal(struct drm_display_mode
*mode1
, struct drm_display_mode
*mode2
)
757 /* do clock check convert to PICOS so fb modes get matched
759 if (mode1
->clock
&& mode2
->clock
) {
760 if (KHZ2PICOS(mode1
->clock
) != KHZ2PICOS(mode2
->clock
))
762 } else if (mode1
->clock
!= mode2
->clock
)
765 if (mode1
->hdisplay
== mode2
->hdisplay
&&
766 mode1
->hsync_start
== mode2
->hsync_start
&&
767 mode1
->hsync_end
== mode2
->hsync_end
&&
768 mode1
->htotal
== mode2
->htotal
&&
769 mode1
->hskew
== mode2
->hskew
&&
770 mode1
->vdisplay
== mode2
->vdisplay
&&
771 mode1
->vsync_start
== mode2
->vsync_start
&&
772 mode1
->vsync_end
== mode2
->vsync_end
&&
773 mode1
->vtotal
== mode2
->vtotal
&&
774 mode1
->vscan
== mode2
->vscan
&&
775 mode1
->flags
== mode2
->flags
)
780 EXPORT_SYMBOL(drm_mode_equal
);
783 * drm_mode_validate_size - make sure modes adhere to size constraints
785 * @mode_list: list of modes to check
786 * @maxX: maximum width
787 * @maxY: maximum height
788 * @maxPitch: max pitch
791 * Caller must hold a lock protecting @mode_list.
793 * The DRM device (@dev) has size and pitch limits. Here we validate the
794 * modes we probed for @dev against those limits and set their status as
797 void drm_mode_validate_size(struct drm_device
*dev
,
798 struct list_head
*mode_list
,
799 int maxX
, int maxY
, int maxPitch
)
801 struct drm_display_mode
*mode
;
803 list_for_each_entry(mode
, mode_list
, head
) {
804 if (maxPitch
> 0 && mode
->hdisplay
> maxPitch
)
805 mode
->status
= MODE_BAD_WIDTH
;
807 if (maxX
> 0 && mode
->hdisplay
> maxX
)
808 mode
->status
= MODE_VIRTUAL_X
;
810 if (maxY
> 0 && mode
->vdisplay
> maxY
)
811 mode
->status
= MODE_VIRTUAL_Y
;
814 EXPORT_SYMBOL(drm_mode_validate_size
);
817 * drm_mode_validate_clocks - validate modes against clock limits
819 * @mode_list: list of modes to check
820 * @min: minimum clock rate array
821 * @max: maximum clock rate array
822 * @n_ranges: number of clock ranges (size of arrays)
825 * Caller must hold a lock protecting @mode_list.
827 * Some code may need to check a mode list against the clock limits of the
828 * device in question. This function walks the mode list, testing to make
829 * sure each mode falls within a given range (defined by @min and @max
830 * arrays) and sets @mode->status as needed.
832 void drm_mode_validate_clocks(struct drm_device
*dev
,
833 struct list_head
*mode_list
,
834 int *min
, int *max
, int n_ranges
)
836 struct drm_display_mode
*mode
;
839 list_for_each_entry(mode
, mode_list
, head
) {
841 for (i
= 0; i
< n_ranges
; i
++) {
842 if (mode
->clock
>= min
[i
] && mode
->clock
<= max
[i
]) {
848 mode
->status
= MODE_CLOCK_RANGE
;
851 EXPORT_SYMBOL(drm_mode_validate_clocks
);
854 * drm_mode_prune_invalid - remove invalid modes from mode list
856 * @mode_list: list of modes to check
857 * @verbose: be verbose about it
860 * Caller must hold a lock protecting @mode_list.
862 * Once mode list generation is complete, a caller can use this routine to
863 * remove invalid modes from a mode list. If any of the modes have a
864 * status other than %MODE_OK, they are removed from @mode_list and freed.
866 void drm_mode_prune_invalid(struct drm_device
*dev
,
867 struct list_head
*mode_list
, bool verbose
)
869 struct drm_display_mode
*mode
, *t
;
871 list_for_each_entry_safe(mode
, t
, mode_list
, head
) {
872 if (mode
->status
!= MODE_OK
) {
873 list_del(&mode
->head
);
875 drm_mode_debug_printmodeline(mode
);
876 DRM_DEBUG_KMS("Not using %s mode %d\n",
877 mode
->name
, mode
->status
);
879 drm_mode_destroy(dev
, mode
);
883 EXPORT_SYMBOL(drm_mode_prune_invalid
);
886 * drm_mode_compare - compare modes for favorability
888 * @lh_a: list_head for first mode
889 * @lh_b: list_head for second mode
894 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
898 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
899 * positive if @lh_b is better than @lh_a.
901 static int drm_mode_compare(void *priv
, struct list_head
*lh_a
, struct list_head
*lh_b
)
903 struct drm_display_mode
*a
= list_entry(lh_a
, struct drm_display_mode
, head
);
904 struct drm_display_mode
*b
= list_entry(lh_b
, struct drm_display_mode
, head
);
907 diff
= ((b
->type
& DRM_MODE_TYPE_PREFERRED
) != 0) -
908 ((a
->type
& DRM_MODE_TYPE_PREFERRED
) != 0);
911 diff
= b
->hdisplay
* b
->vdisplay
- a
->hdisplay
* a
->vdisplay
;
914 diff
= b
->clock
- a
->clock
;
919 * drm_mode_sort - sort mode list
920 * @mode_list: list to sort
923 * Caller must hold a lock protecting @mode_list.
925 * Sort @mode_list by favorability, putting good modes first.
927 void drm_mode_sort(struct list_head
*mode_list
)
929 list_sort(NULL
, mode_list
, drm_mode_compare
);
931 EXPORT_SYMBOL(drm_mode_sort
);
934 * drm_mode_connector_list_update - update the mode list for the connector
935 * @connector: the connector to update
938 * Caller must hold a lock protecting @mode_list.
940 * This moves the modes from the @connector probed_modes list
941 * to the actual mode list. It compares the probed mode against the current
942 * list and only adds different modes. All modes unverified after this point
943 * will be removed by the prune invalid modes.
945 void drm_mode_connector_list_update(struct drm_connector
*connector
)
947 struct drm_display_mode
*mode
;
948 struct drm_display_mode
*pmode
, *pt
;
951 list_for_each_entry_safe(pmode
, pt
, &connector
->probed_modes
,
954 /* go through current modes checking for the new probed mode */
955 list_for_each_entry(mode
, &connector
->modes
, head
) {
956 if (drm_mode_equal(pmode
, mode
)) {
958 /* if equal delete the probed mode */
959 mode
->status
= pmode
->status
;
960 /* Merge type bits together */
961 mode
->type
|= pmode
->type
;
962 list_del(&pmode
->head
);
963 drm_mode_destroy(connector
->dev
, pmode
);
969 list_move_tail(&pmode
->head
, &connector
->modes
);
973 EXPORT_SYMBOL(drm_mode_connector_list_update
);