2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
28 #include <linux/module.h>
29 #include <linux/i2c.h>
30 #include <linux/slab.h>
31 #include <linux/delay.h>
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_edid.h>
35 #include "psb_intel_drv.h"
36 #include <drm/gma_drm.h>
38 #include "psb_intel_sdvo_regs.h"
39 #include "psb_intel_reg.h"
41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
44 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
49 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
50 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
51 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
55 static const char *tv_format_names
[] = {
56 "NTSC_M" , "NTSC_J" , "NTSC_443",
57 "PAL_B" , "PAL_D" , "PAL_G" ,
58 "PAL_H" , "PAL_I" , "PAL_M" ,
59 "PAL_N" , "PAL_NC" , "PAL_60" ,
60 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
61 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
65 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
67 struct psb_intel_sdvo
{
68 struct psb_intel_encoder base
;
70 struct i2c_adapter
*i2c
;
73 struct i2c_adapter ddc
;
75 /* Register for the SDVO device: SDVOB or SDVOC */
78 /* Active outputs controlled by this SDVO output */
79 uint16_t controlled_output
;
82 * Capabilities of the SDVO device returned by
83 * i830_sdvo_get_capabilities()
85 struct psb_intel_sdvo_caps caps
;
87 /* Pixel clock limitations reported by the SDVO device, in kHz */
88 int pixel_clock_min
, pixel_clock_max
;
91 * For multiple function SDVO device,
92 * this is for current attached outputs.
94 uint16_t attached_output
;
97 * This is used to select the color range of RBG outputs in HDMI mode.
98 * It is only valid when using TMDS encoding and 8 bit per color mode.
100 uint32_t color_range
;
103 * This is set if we're going to treat the device as TV-out.
105 * While we have these nice friendly flags for output types that ought
106 * to decide this for us, the S-Video output on our HDMI+S-Video card
107 * shows up as RGB1 (VGA).
111 /* This is for current tv format name */
115 * This is set if we treat the device as HDMI, instead of DVI.
118 bool has_hdmi_monitor
;
122 * This is set if we detect output of sdvo device as LVDS and
123 * have a valid fixed mode to use with the panel.
128 * This is sdvo fixed pannel mode pointer
130 struct drm_display_mode
*sdvo_lvds_fixed_mode
;
132 /* DDC bus used by this SDVO encoder */
135 /* Input timings for adjusted_mode */
136 struct psb_intel_sdvo_dtd input_dtd
;
139 struct psb_intel_sdvo_connector
{
140 struct psb_intel_connector base
;
142 /* Mark the type of connector */
143 uint16_t output_flag
;
147 /* This contains all current supported TV format */
148 u8 tv_format_supported
[TV_FORMAT_NUM
];
149 int format_supported_num
;
150 struct drm_property
*tv_format
;
152 /* add the property for the SDVO-TV */
153 struct drm_property
*left
;
154 struct drm_property
*right
;
155 struct drm_property
*top
;
156 struct drm_property
*bottom
;
157 struct drm_property
*hpos
;
158 struct drm_property
*vpos
;
159 struct drm_property
*contrast
;
160 struct drm_property
*saturation
;
161 struct drm_property
*hue
;
162 struct drm_property
*sharpness
;
163 struct drm_property
*flicker_filter
;
164 struct drm_property
*flicker_filter_adaptive
;
165 struct drm_property
*flicker_filter_2d
;
166 struct drm_property
*tv_chroma_filter
;
167 struct drm_property
*tv_luma_filter
;
168 struct drm_property
*dot_crawl
;
170 /* add the property for the SDVO-TV/LVDS */
171 struct drm_property
*brightness
;
173 /* Add variable to record current setting for the above property */
174 u32 left_margin
, right_margin
, top_margin
, bottom_margin
;
176 /* this is to get the range of margin.*/
177 u32 max_hscan
, max_vscan
;
178 u32 max_hpos
, cur_hpos
;
179 u32 max_vpos
, cur_vpos
;
180 u32 cur_brightness
, max_brightness
;
181 u32 cur_contrast
, max_contrast
;
182 u32 cur_saturation
, max_saturation
;
183 u32 cur_hue
, max_hue
;
184 u32 cur_sharpness
, max_sharpness
;
185 u32 cur_flicker_filter
, max_flicker_filter
;
186 u32 cur_flicker_filter_adaptive
, max_flicker_filter_adaptive
;
187 u32 cur_flicker_filter_2d
, max_flicker_filter_2d
;
188 u32 cur_tv_chroma_filter
, max_tv_chroma_filter
;
189 u32 cur_tv_luma_filter
, max_tv_luma_filter
;
190 u32 cur_dot_crawl
, max_dot_crawl
;
193 static struct psb_intel_sdvo
*to_psb_intel_sdvo(struct drm_encoder
*encoder
)
195 return container_of(encoder
, struct psb_intel_sdvo
, base
.base
);
198 static struct psb_intel_sdvo
*intel_attached_sdvo(struct drm_connector
*connector
)
200 return container_of(psb_intel_attached_encoder(connector
),
201 struct psb_intel_sdvo
, base
);
204 static struct psb_intel_sdvo_connector
*to_psb_intel_sdvo_connector(struct drm_connector
*connector
)
206 return container_of(to_psb_intel_connector(connector
), struct psb_intel_sdvo_connector
, base
);
210 psb_intel_sdvo_output_setup(struct psb_intel_sdvo
*psb_intel_sdvo
, uint16_t flags
);
212 psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo
*psb_intel_sdvo
,
213 struct psb_intel_sdvo_connector
*psb_intel_sdvo_connector
,
216 psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo
*psb_intel_sdvo
,
217 struct psb_intel_sdvo_connector
*psb_intel_sdvo_connector
);
220 * Writes the SDVOB or SDVOC with the given value, but always writes both
221 * SDVOB and SDVOC to work around apparent hardware issues (according to
222 * comments in the BIOS).
224 static void psb_intel_sdvo_write_sdvox(struct psb_intel_sdvo
*psb_intel_sdvo
, u32 val
)
226 struct drm_device
*dev
= psb_intel_sdvo
->base
.base
.dev
;
227 u32 bval
= val
, cval
= val
;
230 if (psb_intel_sdvo
->sdvo_reg
== SDVOB
) {
231 cval
= REG_READ(SDVOC
);
233 bval
= REG_READ(SDVOB
);
236 * Write the registers twice for luck. Sometimes,
237 * writing them only once doesn't appear to 'stick'.
238 * The BIOS does this too. Yay, magic
240 for (i
= 0; i
< 2; i
++)
242 REG_WRITE(SDVOB
, bval
);
244 REG_WRITE(SDVOC
, cval
);
249 static bool psb_intel_sdvo_read_byte(struct psb_intel_sdvo
*psb_intel_sdvo
, u8 addr
, u8
*ch
)
251 struct i2c_msg msgs
[] = {
253 .addr
= psb_intel_sdvo
->slave_addr
,
259 .addr
= psb_intel_sdvo
->slave_addr
,
267 if ((ret
= i2c_transfer(psb_intel_sdvo
->i2c
, msgs
, 2)) == 2)
270 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret
);
274 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
275 /** Mapping of command numbers to names, for debug output */
276 static const struct _sdvo_cmd_name
{
279 } sdvo_cmd_names
[] = {
280 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET
),
281 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS
),
282 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV
),
283 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS
),
284 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS
),
285 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS
),
286 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP
),
287 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP
),
288 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS
),
289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT
),
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG
),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG
),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE
),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT
),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT
),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1
),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2
),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1
),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2
),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1
),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1
),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2
),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1
),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2
),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING
),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1
),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2
),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE
),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE
),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS
),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT
),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT
),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS
),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT
),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT
),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES
),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE
),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE
),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE
),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH
),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT
),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT
),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS
),
324 /* Add the op code for SDVO enhancements */
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS
),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS
),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS
),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS
),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS
),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS
),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION
),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION
),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION
),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE
),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE
),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE
),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST
),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST
),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST
),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS
),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS
),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS
),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H
),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H
),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H
),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V
),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V
),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V
),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER
),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER
),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER
),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE
),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE
),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE
),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D
),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D
),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D
),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS
),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS
),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS
),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL
),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL
),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER
),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER
),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER
),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER
),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER
),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER
),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE
),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE
),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE
),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI
),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI
),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP
),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY
),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY
),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER
),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT
),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT
),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX
),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX
),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO
),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT
),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT
),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE
),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE
),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA
),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA
),
393 #define IS_SDVOB(reg) (reg == SDVOB)
394 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
396 static void psb_intel_sdvo_debug_write(struct psb_intel_sdvo
*psb_intel_sdvo
, u8 cmd
,
397 const void *args
, int args_len
)
401 DRM_DEBUG_KMS("%s: W: %02X ",
402 SDVO_NAME(psb_intel_sdvo
), cmd
);
403 for (i
= 0; i
< args_len
; i
++)
404 DRM_LOG_KMS("%02X ", ((u8
*)args
)[i
]);
407 for (i
= 0; i
< ARRAY_SIZE(sdvo_cmd_names
); i
++) {
408 if (cmd
== sdvo_cmd_names
[i
].cmd
) {
409 DRM_LOG_KMS("(%s)", sdvo_cmd_names
[i
].name
);
413 if (i
== ARRAY_SIZE(sdvo_cmd_names
))
414 DRM_LOG_KMS("(%02X)", cmd
);
418 static const char *cmd_status_names
[] = {
424 "Target not specified",
425 "Scaling not supported"
428 static bool psb_intel_sdvo_write_cmd(struct psb_intel_sdvo
*psb_intel_sdvo
, u8 cmd
,
429 const void *args
, int args_len
)
431 u8 buf
[args_len
*2 + 2], status
;
432 struct i2c_msg msgs
[args_len
+ 3];
435 psb_intel_sdvo_debug_write(psb_intel_sdvo
, cmd
, args
, args_len
);
437 for (i
= 0; i
< args_len
; i
++) {
438 msgs
[i
].addr
= psb_intel_sdvo
->slave_addr
;
441 msgs
[i
].buf
= buf
+ 2 *i
;
442 buf
[2*i
+ 0] = SDVO_I2C_ARG_0
- i
;
443 buf
[2*i
+ 1] = ((u8
*)args
)[i
];
445 msgs
[i
].addr
= psb_intel_sdvo
->slave_addr
;
448 msgs
[i
].buf
= buf
+ 2*i
;
449 buf
[2*i
+ 0] = SDVO_I2C_OPCODE
;
452 /* the following two are to read the response */
453 status
= SDVO_I2C_CMD_STATUS
;
454 msgs
[i
+1].addr
= psb_intel_sdvo
->slave_addr
;
457 msgs
[i
+1].buf
= &status
;
459 msgs
[i
+2].addr
= psb_intel_sdvo
->slave_addr
;
460 msgs
[i
+2].flags
= I2C_M_RD
;
462 msgs
[i
+2].buf
= &status
;
464 ret
= i2c_transfer(psb_intel_sdvo
->i2c
, msgs
, i
+3);
466 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret
);
470 /* failure in I2C transfer */
471 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret
, i
+3);
478 static bool psb_intel_sdvo_read_response(struct psb_intel_sdvo
*psb_intel_sdvo
,
479 void *response
, int response_len
)
485 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(psb_intel_sdvo
));
488 * The documentation states that all commands will be
489 * processed within 15µs, and that we need only poll
490 * the status byte a maximum of 3 times in order for the
491 * command to be complete.
493 * Check 5 times in case the hardware failed to read the docs.
495 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo
,
500 while (status
== SDVO_CMD_STATUS_PENDING
&& retry
--) {
502 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo
,
508 if (status
<= SDVO_CMD_STATUS_SCALING_NOT_SUPP
)
509 DRM_LOG_KMS("(%s)", cmd_status_names
[status
]);
511 DRM_LOG_KMS("(??? %d)", status
);
513 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
516 /* Read the command response */
517 for (i
= 0; i
< response_len
; i
++) {
518 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo
,
519 SDVO_I2C_RETURN_0
+ i
,
520 &((u8
*)response
)[i
]))
522 DRM_LOG_KMS(" %02X", ((u8
*)response
)[i
]);
528 DRM_LOG_KMS("... failed\n");
532 static int psb_intel_sdvo_get_pixel_multiplier(struct drm_display_mode
*mode
)
534 if (mode
->clock
>= 100000)
536 else if (mode
->clock
>= 50000)
542 static bool psb_intel_sdvo_set_control_bus_switch(struct psb_intel_sdvo
*psb_intel_sdvo
,
545 /* This must be the immediately preceding write before the i2c xfer */
546 return psb_intel_sdvo_write_cmd(psb_intel_sdvo
,
547 SDVO_CMD_SET_CONTROL_BUS_SWITCH
,
551 static bool psb_intel_sdvo_set_value(struct psb_intel_sdvo
*psb_intel_sdvo
, u8 cmd
, const void *data
, int len
)
553 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo
, cmd
, data
, len
))
556 return psb_intel_sdvo_read_response(psb_intel_sdvo
, NULL
, 0);
560 psb_intel_sdvo_get_value(struct psb_intel_sdvo
*psb_intel_sdvo
, u8 cmd
, void *value
, int len
)
562 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo
, cmd
, NULL
, 0))
565 return psb_intel_sdvo_read_response(psb_intel_sdvo
, value
, len
);
568 static bool psb_intel_sdvo_set_target_input(struct psb_intel_sdvo
*psb_intel_sdvo
)
570 struct psb_intel_sdvo_set_target_input_args targets
= {0};
571 return psb_intel_sdvo_set_value(psb_intel_sdvo
,
572 SDVO_CMD_SET_TARGET_INPUT
,
573 &targets
, sizeof(targets
));
577 * Return whether each input is trained.
579 * This function is making an assumption about the layout of the response,
580 * which should be checked against the docs.
582 static bool psb_intel_sdvo_get_trained_inputs(struct psb_intel_sdvo
*psb_intel_sdvo
, bool *input_1
, bool *input_2
)
584 struct psb_intel_sdvo_get_trained_inputs_response response
;
586 BUILD_BUG_ON(sizeof(response
) != 1);
587 if (!psb_intel_sdvo_get_value(psb_intel_sdvo
, SDVO_CMD_GET_TRAINED_INPUTS
,
588 &response
, sizeof(response
)))
591 *input_1
= response
.input0_trained
;
592 *input_2
= response
.input1_trained
;
596 static bool psb_intel_sdvo_set_active_outputs(struct psb_intel_sdvo
*psb_intel_sdvo
,
599 return psb_intel_sdvo_set_value(psb_intel_sdvo
,
600 SDVO_CMD_SET_ACTIVE_OUTPUTS
,
601 &outputs
, sizeof(outputs
));
604 static bool psb_intel_sdvo_set_encoder_power_state(struct psb_intel_sdvo
*psb_intel_sdvo
,
607 u8 state
= SDVO_ENCODER_STATE_ON
;
610 case DRM_MODE_DPMS_ON
:
611 state
= SDVO_ENCODER_STATE_ON
;
613 case DRM_MODE_DPMS_STANDBY
:
614 state
= SDVO_ENCODER_STATE_STANDBY
;
616 case DRM_MODE_DPMS_SUSPEND
:
617 state
= SDVO_ENCODER_STATE_SUSPEND
;
619 case DRM_MODE_DPMS_OFF
:
620 state
= SDVO_ENCODER_STATE_OFF
;
624 return psb_intel_sdvo_set_value(psb_intel_sdvo
,
625 SDVO_CMD_SET_ENCODER_POWER_STATE
, &state
, sizeof(state
));
628 static bool psb_intel_sdvo_get_input_pixel_clock_range(struct psb_intel_sdvo
*psb_intel_sdvo
,
632 struct psb_intel_sdvo_pixel_clock_range clocks
;
634 BUILD_BUG_ON(sizeof(clocks
) != 4);
635 if (!psb_intel_sdvo_get_value(psb_intel_sdvo
,
636 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE
,
637 &clocks
, sizeof(clocks
)))
640 /* Convert the values from units of 10 kHz to kHz. */
641 *clock_min
= clocks
.min
* 10;
642 *clock_max
= clocks
.max
* 10;
646 static bool psb_intel_sdvo_set_target_output(struct psb_intel_sdvo
*psb_intel_sdvo
,
649 return psb_intel_sdvo_set_value(psb_intel_sdvo
,
650 SDVO_CMD_SET_TARGET_OUTPUT
,
651 &outputs
, sizeof(outputs
));
654 static bool psb_intel_sdvo_set_timing(struct psb_intel_sdvo
*psb_intel_sdvo
, u8 cmd
,
655 struct psb_intel_sdvo_dtd
*dtd
)
657 return psb_intel_sdvo_set_value(psb_intel_sdvo
, cmd
, &dtd
->part1
, sizeof(dtd
->part1
)) &&
658 psb_intel_sdvo_set_value(psb_intel_sdvo
, cmd
+ 1, &dtd
->part2
, sizeof(dtd
->part2
));
661 static bool psb_intel_sdvo_set_input_timing(struct psb_intel_sdvo
*psb_intel_sdvo
,
662 struct psb_intel_sdvo_dtd
*dtd
)
664 return psb_intel_sdvo_set_timing(psb_intel_sdvo
,
665 SDVO_CMD_SET_INPUT_TIMINGS_PART1
, dtd
);
668 static bool psb_intel_sdvo_set_output_timing(struct psb_intel_sdvo
*psb_intel_sdvo
,
669 struct psb_intel_sdvo_dtd
*dtd
)
671 return psb_intel_sdvo_set_timing(psb_intel_sdvo
,
672 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1
, dtd
);
676 psb_intel_sdvo_create_preferred_input_timing(struct psb_intel_sdvo
*psb_intel_sdvo
,
681 struct psb_intel_sdvo_preferred_input_timing_args args
;
683 memset(&args
, 0, sizeof(args
));
686 args
.height
= height
;
689 if (psb_intel_sdvo
->is_lvds
&&
690 (psb_intel_sdvo
->sdvo_lvds_fixed_mode
->hdisplay
!= width
||
691 psb_intel_sdvo
->sdvo_lvds_fixed_mode
->vdisplay
!= height
))
694 return psb_intel_sdvo_set_value(psb_intel_sdvo
,
695 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING
,
696 &args
, sizeof(args
));
699 static bool psb_intel_sdvo_get_preferred_input_timing(struct psb_intel_sdvo
*psb_intel_sdvo
,
700 struct psb_intel_sdvo_dtd
*dtd
)
702 BUILD_BUG_ON(sizeof(dtd
->part1
) != 8);
703 BUILD_BUG_ON(sizeof(dtd
->part2
) != 8);
704 return psb_intel_sdvo_get_value(psb_intel_sdvo
, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1
,
705 &dtd
->part1
, sizeof(dtd
->part1
)) &&
706 psb_intel_sdvo_get_value(psb_intel_sdvo
, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2
,
707 &dtd
->part2
, sizeof(dtd
->part2
));
710 static bool psb_intel_sdvo_set_clock_rate_mult(struct psb_intel_sdvo
*psb_intel_sdvo
, u8 val
)
712 return psb_intel_sdvo_set_value(psb_intel_sdvo
, SDVO_CMD_SET_CLOCK_RATE_MULT
, &val
, 1);
715 static void psb_intel_sdvo_get_dtd_from_mode(struct psb_intel_sdvo_dtd
*dtd
,
716 const struct drm_display_mode
*mode
)
718 uint16_t width
, height
;
719 uint16_t h_blank_len
, h_sync_len
, v_blank_len
, v_sync_len
;
720 uint16_t h_sync_offset
, v_sync_offset
;
722 width
= mode
->crtc_hdisplay
;
723 height
= mode
->crtc_vdisplay
;
725 /* do some mode translations */
726 h_blank_len
= mode
->crtc_hblank_end
- mode
->crtc_hblank_start
;
727 h_sync_len
= mode
->crtc_hsync_end
- mode
->crtc_hsync_start
;
729 v_blank_len
= mode
->crtc_vblank_end
- mode
->crtc_vblank_start
;
730 v_sync_len
= mode
->crtc_vsync_end
- mode
->crtc_vsync_start
;
732 h_sync_offset
= mode
->crtc_hsync_start
- mode
->crtc_hblank_start
;
733 v_sync_offset
= mode
->crtc_vsync_start
- mode
->crtc_vblank_start
;
735 dtd
->part1
.clock
= mode
->clock
/ 10;
736 dtd
->part1
.h_active
= width
& 0xff;
737 dtd
->part1
.h_blank
= h_blank_len
& 0xff;
738 dtd
->part1
.h_high
= (((width
>> 8) & 0xf) << 4) |
739 ((h_blank_len
>> 8) & 0xf);
740 dtd
->part1
.v_active
= height
& 0xff;
741 dtd
->part1
.v_blank
= v_blank_len
& 0xff;
742 dtd
->part1
.v_high
= (((height
>> 8) & 0xf) << 4) |
743 ((v_blank_len
>> 8) & 0xf);
745 dtd
->part2
.h_sync_off
= h_sync_offset
& 0xff;
746 dtd
->part2
.h_sync_width
= h_sync_len
& 0xff;
747 dtd
->part2
.v_sync_off_width
= (v_sync_offset
& 0xf) << 4 |
749 dtd
->part2
.sync_off_width_high
= ((h_sync_offset
& 0x300) >> 2) |
750 ((h_sync_len
& 0x300) >> 4) | ((v_sync_offset
& 0x30) >> 2) |
751 ((v_sync_len
& 0x30) >> 4);
753 dtd
->part2
.dtd_flags
= 0x18;
754 if (mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
755 dtd
->part2
.dtd_flags
|= 0x2;
756 if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
757 dtd
->part2
.dtd_flags
|= 0x4;
759 dtd
->part2
.sdvo_flags
= 0;
760 dtd
->part2
.v_sync_off_high
= v_sync_offset
& 0xc0;
761 dtd
->part2
.reserved
= 0;
764 static void psb_intel_sdvo_get_mode_from_dtd(struct drm_display_mode
* mode
,
765 const struct psb_intel_sdvo_dtd
*dtd
)
767 mode
->hdisplay
= dtd
->part1
.h_active
;
768 mode
->hdisplay
+= ((dtd
->part1
.h_high
>> 4) & 0x0f) << 8;
769 mode
->hsync_start
= mode
->hdisplay
+ dtd
->part2
.h_sync_off
;
770 mode
->hsync_start
+= (dtd
->part2
.sync_off_width_high
& 0xc0) << 2;
771 mode
->hsync_end
= mode
->hsync_start
+ dtd
->part2
.h_sync_width
;
772 mode
->hsync_end
+= (dtd
->part2
.sync_off_width_high
& 0x30) << 4;
773 mode
->htotal
= mode
->hdisplay
+ dtd
->part1
.h_blank
;
774 mode
->htotal
+= (dtd
->part1
.h_high
& 0xf) << 8;
776 mode
->vdisplay
= dtd
->part1
.v_active
;
777 mode
->vdisplay
+= ((dtd
->part1
.v_high
>> 4) & 0x0f) << 8;
778 mode
->vsync_start
= mode
->vdisplay
;
779 mode
->vsync_start
+= (dtd
->part2
.v_sync_off_width
>> 4) & 0xf;
780 mode
->vsync_start
+= (dtd
->part2
.sync_off_width_high
& 0x0c) << 2;
781 mode
->vsync_start
+= dtd
->part2
.v_sync_off_high
& 0xc0;
782 mode
->vsync_end
= mode
->vsync_start
+
783 (dtd
->part2
.v_sync_off_width
& 0xf);
784 mode
->vsync_end
+= (dtd
->part2
.sync_off_width_high
& 0x3) << 4;
785 mode
->vtotal
= mode
->vdisplay
+ dtd
->part1
.v_blank
;
786 mode
->vtotal
+= (dtd
->part1
.v_high
& 0xf) << 8;
788 mode
->clock
= dtd
->part1
.clock
* 10;
790 mode
->flags
&= ~(DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
);
791 if (dtd
->part2
.dtd_flags
& 0x2)
792 mode
->flags
|= DRM_MODE_FLAG_PHSYNC
;
793 if (dtd
->part2
.dtd_flags
& 0x4)
794 mode
->flags
|= DRM_MODE_FLAG_PVSYNC
;
797 static bool psb_intel_sdvo_check_supp_encode(struct psb_intel_sdvo
*psb_intel_sdvo
)
799 struct psb_intel_sdvo_encode encode
;
801 BUILD_BUG_ON(sizeof(encode
) != 2);
802 return psb_intel_sdvo_get_value(psb_intel_sdvo
,
803 SDVO_CMD_GET_SUPP_ENCODE
,
804 &encode
, sizeof(encode
));
807 static bool psb_intel_sdvo_set_encode(struct psb_intel_sdvo
*psb_intel_sdvo
,
810 return psb_intel_sdvo_set_value(psb_intel_sdvo
, SDVO_CMD_SET_ENCODE
, &mode
, 1);
813 static bool psb_intel_sdvo_set_colorimetry(struct psb_intel_sdvo
*psb_intel_sdvo
,
816 return psb_intel_sdvo_set_value(psb_intel_sdvo
, SDVO_CMD_SET_COLORIMETRY
, &mode
, 1);
820 static void psb_intel_sdvo_dump_hdmi_buf(struct psb_intel_sdvo
*psb_intel_sdvo
)
823 uint8_t set_buf_index
[2];
829 psb_intel_sdvo_get_value(encoder
, SDVO_CMD_GET_HBUF_AV_SPLIT
, &av_split
, 1);
831 for (i
= 0; i
<= av_split
; i
++) {
832 set_buf_index
[0] = i
; set_buf_index
[1] = 0;
833 psb_intel_sdvo_write_cmd(encoder
, SDVO_CMD_SET_HBUF_INDEX
,
835 psb_intel_sdvo_write_cmd(encoder
, SDVO_CMD_GET_HBUF_INFO
, NULL
, 0);
836 psb_intel_sdvo_read_response(encoder
, &buf_size
, 1);
839 for (j
= 0; j
<= buf_size
; j
+= 8) {
840 psb_intel_sdvo_write_cmd(encoder
, SDVO_CMD_GET_HBUF_DATA
,
842 psb_intel_sdvo_read_response(encoder
, pos
, 8);
849 static bool psb_intel_sdvo_set_avi_infoframe(struct psb_intel_sdvo
*psb_intel_sdvo
)
851 DRM_INFO("HDMI is not supported yet");
855 struct dip_infoframe avi_if
= {
856 .type
= DIP_TYPE_AVI
,
857 .ver
= DIP_VERSION_AVI
,
860 uint8_t tx_rate
= SDVO_HBUF_TX_VSYNC
;
861 uint8_t set_buf_index
[2] = { 1, 0 };
862 uint64_t *data
= (uint64_t *)&avi_if
;
865 intel_dip_infoframe_csum(&avi_if
);
867 if (!psb_intel_sdvo_set_value(psb_intel_sdvo
,
868 SDVO_CMD_SET_HBUF_INDEX
,
872 for (i
= 0; i
< sizeof(avi_if
); i
+= 8) {
873 if (!psb_intel_sdvo_set_value(psb_intel_sdvo
,
874 SDVO_CMD_SET_HBUF_DATA
,
880 return psb_intel_sdvo_set_value(psb_intel_sdvo
,
881 SDVO_CMD_SET_HBUF_TXRATE
,
886 static bool psb_intel_sdvo_set_tv_format(struct psb_intel_sdvo
*psb_intel_sdvo
)
888 struct psb_intel_sdvo_tv_format format
;
891 format_map
= 1 << psb_intel_sdvo
->tv_format_index
;
892 memset(&format
, 0, sizeof(format
));
893 memcpy(&format
, &format_map
, min(sizeof(format
), sizeof(format_map
)));
895 BUILD_BUG_ON(sizeof(format
) != 6);
896 return psb_intel_sdvo_set_value(psb_intel_sdvo
,
897 SDVO_CMD_SET_TV_FORMAT
,
898 &format
, sizeof(format
));
902 psb_intel_sdvo_set_output_timings_from_mode(struct psb_intel_sdvo
*psb_intel_sdvo
,
903 const struct drm_display_mode
*mode
)
905 struct psb_intel_sdvo_dtd output_dtd
;
907 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo
,
908 psb_intel_sdvo
->attached_output
))
911 psb_intel_sdvo_get_dtd_from_mode(&output_dtd
, mode
);
912 if (!psb_intel_sdvo_set_output_timing(psb_intel_sdvo
, &output_dtd
))
919 psb_intel_sdvo_set_input_timings_for_mode(struct psb_intel_sdvo
*psb_intel_sdvo
,
920 const struct drm_display_mode
*mode
,
921 struct drm_display_mode
*adjusted_mode
)
923 /* Reset the input timing to the screen. Assume always input 0. */
924 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo
))
927 if (!psb_intel_sdvo_create_preferred_input_timing(psb_intel_sdvo
,
933 if (!psb_intel_sdvo_get_preferred_input_timing(psb_intel_sdvo
,
934 &psb_intel_sdvo
->input_dtd
))
937 psb_intel_sdvo_get_mode_from_dtd(adjusted_mode
, &psb_intel_sdvo
->input_dtd
);
939 drm_mode_set_crtcinfo(adjusted_mode
, 0);
943 static bool psb_intel_sdvo_mode_fixup(struct drm_encoder
*encoder
,
944 const struct drm_display_mode
*mode
,
945 struct drm_display_mode
*adjusted_mode
)
947 struct psb_intel_sdvo
*psb_intel_sdvo
= to_psb_intel_sdvo(encoder
);
950 /* We need to construct preferred input timings based on our
951 * output timings. To do that, we have to set the output
952 * timings, even though this isn't really the right place in
953 * the sequence to do it. Oh well.
955 if (psb_intel_sdvo
->is_tv
) {
956 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo
, mode
))
959 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo
,
962 } else if (psb_intel_sdvo
->is_lvds
) {
963 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo
,
964 psb_intel_sdvo
->sdvo_lvds_fixed_mode
))
967 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo
,
972 /* Make the CRTC code factor in the SDVO pixel multiplier. The
973 * SDVO device will factor out the multiplier during mode_set.
975 multiplier
= psb_intel_sdvo_get_pixel_multiplier(adjusted_mode
);
976 psb_intel_mode_set_pixel_multiplier(adjusted_mode
, multiplier
);
981 static void psb_intel_sdvo_mode_set(struct drm_encoder
*encoder
,
982 struct drm_display_mode
*mode
,
983 struct drm_display_mode
*adjusted_mode
)
985 struct drm_device
*dev
= encoder
->dev
;
986 struct drm_crtc
*crtc
= encoder
->crtc
;
987 struct psb_intel_crtc
*psb_intel_crtc
= to_psb_intel_crtc(crtc
);
988 struct psb_intel_sdvo
*psb_intel_sdvo
= to_psb_intel_sdvo(encoder
);
990 struct psb_intel_sdvo_in_out_map in_out
;
991 struct psb_intel_sdvo_dtd input_dtd
;
992 int pixel_multiplier
= psb_intel_mode_get_pixel_multiplier(adjusted_mode
);
998 /* First, set the input mapping for the first input to our controlled
999 * output. This is only correct if we're a single-input device, in
1000 * which case the first input is the output from the appropriate SDVO
1001 * channel on the motherboard. In a two-input device, the first input
1002 * will be SDVOB and the second SDVOC.
1004 in_out
.in0
= psb_intel_sdvo
->attached_output
;
1007 psb_intel_sdvo_set_value(psb_intel_sdvo
,
1008 SDVO_CMD_SET_IN_OUT_MAP
,
1009 &in_out
, sizeof(in_out
));
1011 /* Set the output timings to the screen */
1012 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo
,
1013 psb_intel_sdvo
->attached_output
))
1016 /* We have tried to get input timing in mode_fixup, and filled into
1019 if (psb_intel_sdvo
->is_tv
|| psb_intel_sdvo
->is_lvds
) {
1020 input_dtd
= psb_intel_sdvo
->input_dtd
;
1022 /* Set the output timing to the screen */
1023 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo
,
1024 psb_intel_sdvo
->attached_output
))
1027 psb_intel_sdvo_get_dtd_from_mode(&input_dtd
, adjusted_mode
);
1028 (void) psb_intel_sdvo_set_output_timing(psb_intel_sdvo
, &input_dtd
);
1031 /* Set the input timing to the screen. Assume always input 0. */
1032 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo
))
1035 if (psb_intel_sdvo
->has_hdmi_monitor
) {
1036 psb_intel_sdvo_set_encode(psb_intel_sdvo
, SDVO_ENCODE_HDMI
);
1037 psb_intel_sdvo_set_colorimetry(psb_intel_sdvo
,
1038 SDVO_COLORIMETRY_RGB256
);
1039 psb_intel_sdvo_set_avi_infoframe(psb_intel_sdvo
);
1041 psb_intel_sdvo_set_encode(psb_intel_sdvo
, SDVO_ENCODE_DVI
);
1043 if (psb_intel_sdvo
->is_tv
&&
1044 !psb_intel_sdvo_set_tv_format(psb_intel_sdvo
))
1047 (void) psb_intel_sdvo_set_input_timing(psb_intel_sdvo
, &input_dtd
);
1049 switch (pixel_multiplier
) {
1051 case 1: rate
= SDVO_CLOCK_RATE_MULT_1X
; break;
1052 case 2: rate
= SDVO_CLOCK_RATE_MULT_2X
; break;
1053 case 4: rate
= SDVO_CLOCK_RATE_MULT_4X
; break;
1055 if (!psb_intel_sdvo_set_clock_rate_mult(psb_intel_sdvo
, rate
))
1058 /* Set the SDVO control regs. */
1059 sdvox
= REG_READ(psb_intel_sdvo
->sdvo_reg
);
1060 switch (psb_intel_sdvo
->sdvo_reg
) {
1062 sdvox
&= SDVOB_PRESERVE_MASK
;
1065 sdvox
&= SDVOC_PRESERVE_MASK
;
1068 sdvox
|= (9 << 19) | SDVO_BORDER_ENABLE
;
1070 if (psb_intel_crtc
->pipe
== 1)
1071 sdvox
|= SDVO_PIPE_B_SELECT
;
1072 if (psb_intel_sdvo
->has_hdmi_audio
)
1073 sdvox
|= SDVO_AUDIO_ENABLE
;
1075 /* FIXME: Check if this is needed for PSB
1076 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1079 if (input_dtd
.part2
.sdvo_flags
& SDVO_NEED_TO_STALL
)
1080 sdvox
|= SDVO_STALL_SELECT
;
1081 psb_intel_sdvo_write_sdvox(psb_intel_sdvo
, sdvox
);
1084 static void psb_intel_sdvo_dpms(struct drm_encoder
*encoder
, int mode
)
1086 struct drm_device
*dev
= encoder
->dev
;
1087 struct psb_intel_sdvo
*psb_intel_sdvo
= to_psb_intel_sdvo(encoder
);
1091 case DRM_MODE_DPMS_ON
:
1092 DRM_DEBUG("DPMS_ON");
1094 case DRM_MODE_DPMS_OFF
:
1095 DRM_DEBUG("DPMS_OFF");
1098 DRM_DEBUG("DPMS: %d", mode
);
1101 if (mode
!= DRM_MODE_DPMS_ON
) {
1102 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo
, 0);
1104 psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo
, mode
);
1106 if (mode
== DRM_MODE_DPMS_OFF
) {
1107 temp
= REG_READ(psb_intel_sdvo
->sdvo_reg
);
1108 if ((temp
& SDVO_ENABLE
) != 0) {
1109 psb_intel_sdvo_write_sdvox(psb_intel_sdvo
, temp
& ~SDVO_ENABLE
);
1113 bool input1
, input2
;
1117 temp
= REG_READ(psb_intel_sdvo
->sdvo_reg
);
1118 if ((temp
& SDVO_ENABLE
) == 0)
1119 psb_intel_sdvo_write_sdvox(psb_intel_sdvo
, temp
| SDVO_ENABLE
);
1120 for (i
= 0; i
< 2; i
++)
1121 psb_intel_wait_for_vblank(dev
);
1123 status
= psb_intel_sdvo_get_trained_inputs(psb_intel_sdvo
, &input1
, &input2
);
1124 /* Warn if the device reported failure to sync.
1125 * A lot of SDVO devices fail to notify of sync, but it's
1126 * a given it the status is a success, we succeeded.
1128 if (status
== SDVO_CMD_STATUS_SUCCESS
&& !input1
) {
1129 DRM_DEBUG_KMS("First %s output reported failure to "
1130 "sync\n", SDVO_NAME(psb_intel_sdvo
));
1134 psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo
, mode
);
1135 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo
, psb_intel_sdvo
->attached_output
);
1140 static int psb_intel_sdvo_mode_valid(struct drm_connector
*connector
,
1141 struct drm_display_mode
*mode
)
1143 struct psb_intel_sdvo
*psb_intel_sdvo
= intel_attached_sdvo(connector
);
1145 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
1146 return MODE_NO_DBLESCAN
;
1148 if (psb_intel_sdvo
->pixel_clock_min
> mode
->clock
)
1149 return MODE_CLOCK_LOW
;
1151 if (psb_intel_sdvo
->pixel_clock_max
< mode
->clock
)
1152 return MODE_CLOCK_HIGH
;
1154 if (psb_intel_sdvo
->is_lvds
) {
1155 if (mode
->hdisplay
> psb_intel_sdvo
->sdvo_lvds_fixed_mode
->hdisplay
)
1158 if (mode
->vdisplay
> psb_intel_sdvo
->sdvo_lvds_fixed_mode
->vdisplay
)
1165 static bool psb_intel_sdvo_get_capabilities(struct psb_intel_sdvo
*psb_intel_sdvo
, struct psb_intel_sdvo_caps
*caps
)
1167 BUILD_BUG_ON(sizeof(*caps
) != 8);
1168 if (!psb_intel_sdvo_get_value(psb_intel_sdvo
,
1169 SDVO_CMD_GET_DEVICE_CAPS
,
1170 caps
, sizeof(*caps
)))
1173 DRM_DEBUG_KMS("SDVO capabilities:\n"
1176 " device_rev_id: %d\n"
1177 " sdvo_version_major: %d\n"
1178 " sdvo_version_minor: %d\n"
1179 " sdvo_inputs_mask: %d\n"
1180 " smooth_scaling: %d\n"
1181 " sharp_scaling: %d\n"
1183 " down_scaling: %d\n"
1184 " stall_support: %d\n"
1185 " output_flags: %d\n",
1188 caps
->device_rev_id
,
1189 caps
->sdvo_version_major
,
1190 caps
->sdvo_version_minor
,
1191 caps
->sdvo_inputs_mask
,
1192 caps
->smooth_scaling
,
1193 caps
->sharp_scaling
,
1196 caps
->stall_support
,
1197 caps
->output_flags
);
1204 struct drm_connector
* psb_intel_sdvo_find(struct drm_device
*dev
, int sdvoB
)
1206 struct drm_connector
*connector
= NULL
;
1207 struct psb_intel_sdvo
*iout
= NULL
;
1208 struct psb_intel_sdvo
*sdvo
;
1210 /* find the sdvo connector */
1211 list_for_each_entry(connector
, &dev
->mode_config
.connector_list
, head
) {
1212 iout
= to_psb_intel_sdvo(connector
);
1214 if (iout
->type
!= INTEL_OUTPUT_SDVO
)
1217 sdvo
= iout
->dev_priv
;
1219 if (sdvo
->sdvo_reg
== SDVOB
&& sdvoB
)
1222 if (sdvo
->sdvo_reg
== SDVOC
&& !sdvoB
)
1230 int psb_intel_sdvo_supports_hotplug(struct drm_connector
*connector
)
1234 struct psb_intel_sdvo
*psb_intel_sdvo
;
1235 DRM_DEBUG_KMS("\n");
1240 psb_intel_sdvo
= to_psb_intel_sdvo(connector
);
1242 return psb_intel_sdvo_get_value(psb_intel_sdvo
, SDVO_CMD_GET_HOT_PLUG_SUPPORT
,
1243 &response
, 2) && response
[0];
1246 void psb_intel_sdvo_set_hotplug(struct drm_connector
*connector
, int on
)
1250 struct psb_intel_sdvo
*psb_intel_sdvo
= to_psb_intel_sdvo(connector
);
1252 psb_intel_sdvo_write_cmd(psb_intel_sdvo
, SDVO_CMD_GET_ACTIVE_HOT_PLUG
, NULL
, 0);
1253 psb_intel_sdvo_read_response(psb_intel_sdvo
, &response
, 2);
1256 psb_intel_sdvo_write_cmd(psb_intel_sdvo
, SDVO_CMD_GET_HOT_PLUG_SUPPORT
, NULL
, 0);
1257 status
= psb_intel_sdvo_read_response(psb_intel_sdvo
, &response
, 2);
1259 psb_intel_sdvo_write_cmd(psb_intel_sdvo
, SDVO_CMD_SET_ACTIVE_HOT_PLUG
, &response
, 2);
1263 psb_intel_sdvo_write_cmd(psb_intel_sdvo
, SDVO_CMD_SET_ACTIVE_HOT_PLUG
, &response
, 2);
1266 psb_intel_sdvo_write_cmd(psb_intel_sdvo
, SDVO_CMD_GET_ACTIVE_HOT_PLUG
, NULL
, 0);
1267 psb_intel_sdvo_read_response(psb_intel_sdvo
, &response
, 2);
1272 psb_intel_sdvo_multifunc_encoder(struct psb_intel_sdvo
*psb_intel_sdvo
)
1274 /* Is there more than one type of output? */
1275 int caps
= psb_intel_sdvo
->caps
.output_flags
& 0xf;
1276 return caps
& -caps
;
1279 static struct edid
*
1280 psb_intel_sdvo_get_edid(struct drm_connector
*connector
)
1282 struct psb_intel_sdvo
*sdvo
= intel_attached_sdvo(connector
);
1283 return drm_get_edid(connector
, &sdvo
->ddc
);
1286 /* Mac mini hack -- use the same DDC as the analog connector */
1287 static struct edid
*
1288 psb_intel_sdvo_get_analog_edid(struct drm_connector
*connector
)
1290 struct drm_psb_private
*dev_priv
= connector
->dev
->dev_private
;
1292 return drm_get_edid(connector
,
1293 &dev_priv
->gmbus
[dev_priv
->crt_ddc_pin
].adapter
);
1297 static enum drm_connector_status
1298 psb_intel_sdvo_hdmi_sink_detect(struct drm_connector
*connector
)
1300 struct psb_intel_sdvo
*psb_intel_sdvo
= intel_attached_sdvo(connector
);
1301 enum drm_connector_status status
;
1304 edid
= psb_intel_sdvo_get_edid(connector
);
1306 if (edid
== NULL
&& psb_intel_sdvo_multifunc_encoder(psb_intel_sdvo
)) {
1307 u8 ddc
, saved_ddc
= psb_intel_sdvo
->ddc_bus
;
1310 * Don't use the 1 as the argument of DDC bus switch to get
1311 * the EDID. It is used for SDVO SPD ROM.
1313 for (ddc
= psb_intel_sdvo
->ddc_bus
>> 1; ddc
> 1; ddc
>>= 1) {
1314 psb_intel_sdvo
->ddc_bus
= ddc
;
1315 edid
= psb_intel_sdvo_get_edid(connector
);
1320 * If we found the EDID on the other bus,
1321 * assume that is the correct DDC bus.
1324 psb_intel_sdvo
->ddc_bus
= saved_ddc
;
1328 * When there is no edid and no monitor is connected with VGA
1329 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1332 edid
= psb_intel_sdvo_get_analog_edid(connector
);
1334 status
= connector_status_unknown
;
1336 /* DDC bus is shared, match EDID to connector type */
1337 if (edid
->input
& DRM_EDID_INPUT_DIGITAL
) {
1338 status
= connector_status_connected
;
1339 if (psb_intel_sdvo
->is_hdmi
) {
1340 psb_intel_sdvo
->has_hdmi_monitor
= drm_detect_hdmi_monitor(edid
);
1341 psb_intel_sdvo
->has_hdmi_audio
= drm_detect_monitor_audio(edid
);
1344 status
= connector_status_disconnected
;
1345 connector
->display_info
.raw_edid
= NULL
;
1349 if (status
== connector_status_connected
) {
1350 struct psb_intel_sdvo_connector
*psb_intel_sdvo_connector
= to_psb_intel_sdvo_connector(connector
);
1351 if (psb_intel_sdvo_connector
->force_audio
)
1352 psb_intel_sdvo
->has_hdmi_audio
= psb_intel_sdvo_connector
->force_audio
> 0;
1358 static enum drm_connector_status
1359 psb_intel_sdvo_detect(struct drm_connector
*connector
, bool force
)
1362 struct psb_intel_sdvo
*psb_intel_sdvo
= intel_attached_sdvo(connector
);
1363 struct psb_intel_sdvo_connector
*psb_intel_sdvo_connector
= to_psb_intel_sdvo_connector(connector
);
1364 enum drm_connector_status ret
;
1366 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo
,
1367 SDVO_CMD_GET_ATTACHED_DISPLAYS
, NULL
, 0))
1368 return connector_status_unknown
;
1370 /* add 30ms delay when the output type might be TV */
1371 if (psb_intel_sdvo
->caps
.output_flags
&
1372 (SDVO_OUTPUT_SVID0
| SDVO_OUTPUT_CVBS0
))
1375 if (!psb_intel_sdvo_read_response(psb_intel_sdvo
, &response
, 2))
1376 return connector_status_unknown
;
1378 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1379 response
& 0xff, response
>> 8,
1380 psb_intel_sdvo_connector
->output_flag
);
1383 return connector_status_disconnected
;
1385 psb_intel_sdvo
->attached_output
= response
;
1387 psb_intel_sdvo
->has_hdmi_monitor
= false;
1388 psb_intel_sdvo
->has_hdmi_audio
= false;
1390 if ((psb_intel_sdvo_connector
->output_flag
& response
) == 0)
1391 ret
= connector_status_disconnected
;
1392 else if (IS_TMDS(psb_intel_sdvo_connector
))
1393 ret
= psb_intel_sdvo_hdmi_sink_detect(connector
);
1397 /* if we have an edid check it matches the connection */
1398 edid
= psb_intel_sdvo_get_edid(connector
);
1400 edid
= psb_intel_sdvo_get_analog_edid(connector
);
1402 if (edid
->input
& DRM_EDID_INPUT_DIGITAL
)
1403 ret
= connector_status_disconnected
;
1405 ret
= connector_status_connected
;
1406 connector
->display_info
.raw_edid
= NULL
;
1409 ret
= connector_status_connected
;
1412 /* May update encoder flag for like clock for SDVO TV, etc.*/
1413 if (ret
== connector_status_connected
) {
1414 psb_intel_sdvo
->is_tv
= false;
1415 psb_intel_sdvo
->is_lvds
= false;
1416 psb_intel_sdvo
->base
.needs_tv_clock
= false;
1418 if (response
& SDVO_TV_MASK
) {
1419 psb_intel_sdvo
->is_tv
= true;
1420 psb_intel_sdvo
->base
.needs_tv_clock
= true;
1422 if (response
& SDVO_LVDS_MASK
)
1423 psb_intel_sdvo
->is_lvds
= psb_intel_sdvo
->sdvo_lvds_fixed_mode
!= NULL
;
1429 static void psb_intel_sdvo_get_ddc_modes(struct drm_connector
*connector
)
1433 /* set the bus switch and get the modes */
1434 edid
= psb_intel_sdvo_get_edid(connector
);
1437 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1438 * link between analog and digital outputs. So, if the regular SDVO
1439 * DDC fails, check to see if the analog output is disconnected, in
1440 * which case we'll look there for the digital DDC data.
1443 edid
= psb_intel_sdvo_get_analog_edid(connector
);
1446 struct psb_intel_sdvo_connector
*psb_intel_sdvo_connector
= to_psb_intel_sdvo_connector(connector
);
1447 bool monitor_is_digital
= !!(edid
->input
& DRM_EDID_INPUT_DIGITAL
);
1448 bool connector_is_digital
= !!IS_TMDS(psb_intel_sdvo_connector
);
1450 if (connector_is_digital
== monitor_is_digital
) {
1451 drm_mode_connector_update_edid_property(connector
, edid
);
1452 drm_add_edid_modes(connector
, edid
);
1455 connector
->display_info
.raw_edid
= NULL
;
1461 * Set of SDVO TV modes.
1462 * Note! This is in reply order (see loop in get_tv_modes).
1463 * XXX: all 60Hz refresh?
1465 static const struct drm_display_mode sdvo_tv_modes
[] = {
1466 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER
, 5815, 320, 321, 384,
1467 416, 0, 200, 201, 232, 233, 0,
1468 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1469 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER
, 6814, 320, 321, 384,
1470 416, 0, 240, 241, 272, 273, 0,
1471 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1472 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER
, 9910, 400, 401, 464,
1473 496, 0, 300, 301, 332, 333, 0,
1474 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1475 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER
, 16913, 640, 641, 704,
1476 736, 0, 350, 351, 382, 383, 0,
1477 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1478 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER
, 19121, 640, 641, 704,
1479 736, 0, 400, 401, 432, 433, 0,
1480 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1481 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 22654, 640, 641, 704,
1482 736, 0, 480, 481, 512, 513, 0,
1483 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1484 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER
, 24624, 704, 705, 768,
1485 800, 0, 480, 481, 512, 513, 0,
1486 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1487 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER
, 29232, 704, 705, 768,
1488 800, 0, 576, 577, 608, 609, 0,
1489 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1490 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER
, 18751, 720, 721, 784,
1491 816, 0, 350, 351, 382, 383, 0,
1492 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1493 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 21199, 720, 721, 784,
1494 816, 0, 400, 401, 432, 433, 0,
1495 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1496 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 25116, 720, 721, 784,
1497 816, 0, 480, 481, 512, 513, 0,
1498 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1499 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER
, 28054, 720, 721, 784,
1500 816, 0, 540, 541, 572, 573, 0,
1501 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1502 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 29816, 720, 721, 784,
1503 816, 0, 576, 577, 608, 609, 0,
1504 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1505 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER
, 31570, 768, 769, 832,
1506 864, 0, 576, 577, 608, 609, 0,
1507 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1508 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 34030, 800, 801, 864,
1509 896, 0, 600, 601, 632, 633, 0,
1510 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1511 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER
, 36581, 832, 833, 896,
1512 928, 0, 624, 625, 656, 657, 0,
1513 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1514 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER
, 48707, 920, 921, 984,
1515 1016, 0, 766, 767, 798, 799, 0,
1516 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1517 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 53827, 1024, 1025, 1088,
1518 1120, 0, 768, 769, 800, 801, 0,
1519 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1520 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 87265, 1280, 1281, 1344,
1521 1376, 0, 1024, 1025, 1056, 1057, 0,
1522 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1525 static void psb_intel_sdvo_get_tv_modes(struct drm_connector
*connector
)
1527 struct psb_intel_sdvo
*psb_intel_sdvo
= intel_attached_sdvo(connector
);
1528 struct psb_intel_sdvo_sdtv_resolution_request tv_res
;
1529 uint32_t reply
= 0, format_map
= 0;
1532 /* Read the list of supported input resolutions for the selected TV
1535 format_map
= 1 << psb_intel_sdvo
->tv_format_index
;
1536 memcpy(&tv_res
, &format_map
,
1537 min(sizeof(format_map
), sizeof(struct psb_intel_sdvo_sdtv_resolution_request
)));
1539 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo
, psb_intel_sdvo
->attached_output
))
1542 BUILD_BUG_ON(sizeof(tv_res
) != 3);
1543 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo
,
1544 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT
,
1545 &tv_res
, sizeof(tv_res
)))
1547 if (!psb_intel_sdvo_read_response(psb_intel_sdvo
, &reply
, 3))
1550 for (i
= 0; i
< ARRAY_SIZE(sdvo_tv_modes
); i
++)
1551 if (reply
& (1 << i
)) {
1552 struct drm_display_mode
*nmode
;
1553 nmode
= drm_mode_duplicate(connector
->dev
,
1556 drm_mode_probed_add(connector
, nmode
);
1560 static void psb_intel_sdvo_get_lvds_modes(struct drm_connector
*connector
)
1562 struct psb_intel_sdvo
*psb_intel_sdvo
= intel_attached_sdvo(connector
);
1563 struct drm_psb_private
*dev_priv
= connector
->dev
->dev_private
;
1564 struct drm_display_mode
*newmode
;
1567 * Attempt to get the mode list from DDC.
1568 * Assume that the preferred modes are
1569 * arranged in priority order.
1571 psb_intel_ddc_get_modes(connector
, psb_intel_sdvo
->i2c
);
1572 if (list_empty(&connector
->probed_modes
) == false)
1575 /* Fetch modes from VBT */
1576 if (dev_priv
->sdvo_lvds_vbt_mode
!= NULL
) {
1577 newmode
= drm_mode_duplicate(connector
->dev
,
1578 dev_priv
->sdvo_lvds_vbt_mode
);
1579 if (newmode
!= NULL
) {
1580 /* Guarantee the mode is preferred */
1581 newmode
->type
= (DRM_MODE_TYPE_PREFERRED
|
1582 DRM_MODE_TYPE_DRIVER
);
1583 drm_mode_probed_add(connector
, newmode
);
1588 list_for_each_entry(newmode
, &connector
->probed_modes
, head
) {
1589 if (newmode
->type
& DRM_MODE_TYPE_PREFERRED
) {
1590 psb_intel_sdvo
->sdvo_lvds_fixed_mode
=
1591 drm_mode_duplicate(connector
->dev
, newmode
);
1593 drm_mode_set_crtcinfo(psb_intel_sdvo
->sdvo_lvds_fixed_mode
,
1596 psb_intel_sdvo
->is_lvds
= true;
1603 static int psb_intel_sdvo_get_modes(struct drm_connector
*connector
)
1605 struct psb_intel_sdvo_connector
*psb_intel_sdvo_connector
= to_psb_intel_sdvo_connector(connector
);
1607 if (IS_TV(psb_intel_sdvo_connector
))
1608 psb_intel_sdvo_get_tv_modes(connector
);
1609 else if (IS_LVDS(psb_intel_sdvo_connector
))
1610 psb_intel_sdvo_get_lvds_modes(connector
);
1612 psb_intel_sdvo_get_ddc_modes(connector
);
1614 return !list_empty(&connector
->probed_modes
);
1618 psb_intel_sdvo_destroy_enhance_property(struct drm_connector
*connector
)
1620 struct psb_intel_sdvo_connector
*psb_intel_sdvo_connector
= to_psb_intel_sdvo_connector(connector
);
1621 struct drm_device
*dev
= connector
->dev
;
1623 if (psb_intel_sdvo_connector
->left
)
1624 drm_property_destroy(dev
, psb_intel_sdvo_connector
->left
);
1625 if (psb_intel_sdvo_connector
->right
)
1626 drm_property_destroy(dev
, psb_intel_sdvo_connector
->right
);
1627 if (psb_intel_sdvo_connector
->top
)
1628 drm_property_destroy(dev
, psb_intel_sdvo_connector
->top
);
1629 if (psb_intel_sdvo_connector
->bottom
)
1630 drm_property_destroy(dev
, psb_intel_sdvo_connector
->bottom
);
1631 if (psb_intel_sdvo_connector
->hpos
)
1632 drm_property_destroy(dev
, psb_intel_sdvo_connector
->hpos
);
1633 if (psb_intel_sdvo_connector
->vpos
)
1634 drm_property_destroy(dev
, psb_intel_sdvo_connector
->vpos
);
1635 if (psb_intel_sdvo_connector
->saturation
)
1636 drm_property_destroy(dev
, psb_intel_sdvo_connector
->saturation
);
1637 if (psb_intel_sdvo_connector
->contrast
)
1638 drm_property_destroy(dev
, psb_intel_sdvo_connector
->contrast
);
1639 if (psb_intel_sdvo_connector
->hue
)
1640 drm_property_destroy(dev
, psb_intel_sdvo_connector
->hue
);
1641 if (psb_intel_sdvo_connector
->sharpness
)
1642 drm_property_destroy(dev
, psb_intel_sdvo_connector
->sharpness
);
1643 if (psb_intel_sdvo_connector
->flicker_filter
)
1644 drm_property_destroy(dev
, psb_intel_sdvo_connector
->flicker_filter
);
1645 if (psb_intel_sdvo_connector
->flicker_filter_2d
)
1646 drm_property_destroy(dev
, psb_intel_sdvo_connector
->flicker_filter_2d
);
1647 if (psb_intel_sdvo_connector
->flicker_filter_adaptive
)
1648 drm_property_destroy(dev
, psb_intel_sdvo_connector
->flicker_filter_adaptive
);
1649 if (psb_intel_sdvo_connector
->tv_luma_filter
)
1650 drm_property_destroy(dev
, psb_intel_sdvo_connector
->tv_luma_filter
);
1651 if (psb_intel_sdvo_connector
->tv_chroma_filter
)
1652 drm_property_destroy(dev
, psb_intel_sdvo_connector
->tv_chroma_filter
);
1653 if (psb_intel_sdvo_connector
->dot_crawl
)
1654 drm_property_destroy(dev
, psb_intel_sdvo_connector
->dot_crawl
);
1655 if (psb_intel_sdvo_connector
->brightness
)
1656 drm_property_destroy(dev
, psb_intel_sdvo_connector
->brightness
);
1659 static void psb_intel_sdvo_destroy(struct drm_connector
*connector
)
1661 struct psb_intel_sdvo_connector
*psb_intel_sdvo_connector
= to_psb_intel_sdvo_connector(connector
);
1663 if (psb_intel_sdvo_connector
->tv_format
)
1664 drm_property_destroy(connector
->dev
,
1665 psb_intel_sdvo_connector
->tv_format
);
1667 psb_intel_sdvo_destroy_enhance_property(connector
);
1668 drm_sysfs_connector_remove(connector
);
1669 drm_connector_cleanup(connector
);
1673 static bool psb_intel_sdvo_detect_hdmi_audio(struct drm_connector
*connector
)
1675 struct psb_intel_sdvo
*psb_intel_sdvo
= intel_attached_sdvo(connector
);
1677 bool has_audio
= false;
1679 if (!psb_intel_sdvo
->is_hdmi
)
1682 edid
= psb_intel_sdvo_get_edid(connector
);
1683 if (edid
!= NULL
&& edid
->input
& DRM_EDID_INPUT_DIGITAL
)
1684 has_audio
= drm_detect_monitor_audio(edid
);
1690 psb_intel_sdvo_set_property(struct drm_connector
*connector
,
1691 struct drm_property
*property
,
1694 struct psb_intel_sdvo
*psb_intel_sdvo
= intel_attached_sdvo(connector
);
1695 struct psb_intel_sdvo_connector
*psb_intel_sdvo_connector
= to_psb_intel_sdvo_connector(connector
);
1696 struct drm_psb_private
*dev_priv
= connector
->dev
->dev_private
;
1697 uint16_t temp_value
;
1701 ret
= drm_connector_property_set_value(connector
, property
, val
);
1705 if (property
== dev_priv
->force_audio_property
) {
1709 if (i
== psb_intel_sdvo_connector
->force_audio
)
1712 psb_intel_sdvo_connector
->force_audio
= i
;
1715 has_audio
= psb_intel_sdvo_detect_hdmi_audio(connector
);
1719 if (has_audio
== psb_intel_sdvo
->has_hdmi_audio
)
1722 psb_intel_sdvo
->has_hdmi_audio
= has_audio
;
1726 if (property
== dev_priv
->broadcast_rgb_property
) {
1727 if (val
== !!psb_intel_sdvo
->color_range
)
1730 psb_intel_sdvo
->color_range
= val
? SDVO_COLOR_RANGE_16_235
: 0;
1734 #define CHECK_PROPERTY(name, NAME) \
1735 if (psb_intel_sdvo_connector->name == property) { \
1736 if (psb_intel_sdvo_connector->cur_##name == temp_value) return 0; \
1737 if (psb_intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1738 cmd = SDVO_CMD_SET_##NAME; \
1739 psb_intel_sdvo_connector->cur_##name = temp_value; \
1743 if (property
== psb_intel_sdvo_connector
->tv_format
) {
1744 if (val
>= TV_FORMAT_NUM
)
1747 if (psb_intel_sdvo
->tv_format_index
==
1748 psb_intel_sdvo_connector
->tv_format_supported
[val
])
1751 psb_intel_sdvo
->tv_format_index
= psb_intel_sdvo_connector
->tv_format_supported
[val
];
1753 } else if (IS_TV_OR_LVDS(psb_intel_sdvo_connector
)) {
1755 if (psb_intel_sdvo_connector
->left
== property
) {
1756 drm_connector_property_set_value(connector
,
1757 psb_intel_sdvo_connector
->right
, val
);
1758 if (psb_intel_sdvo_connector
->left_margin
== temp_value
)
1761 psb_intel_sdvo_connector
->left_margin
= temp_value
;
1762 psb_intel_sdvo_connector
->right_margin
= temp_value
;
1763 temp_value
= psb_intel_sdvo_connector
->max_hscan
-
1764 psb_intel_sdvo_connector
->left_margin
;
1765 cmd
= SDVO_CMD_SET_OVERSCAN_H
;
1767 } else if (psb_intel_sdvo_connector
->right
== property
) {
1768 drm_connector_property_set_value(connector
,
1769 psb_intel_sdvo_connector
->left
, val
);
1770 if (psb_intel_sdvo_connector
->right_margin
== temp_value
)
1773 psb_intel_sdvo_connector
->left_margin
= temp_value
;
1774 psb_intel_sdvo_connector
->right_margin
= temp_value
;
1775 temp_value
= psb_intel_sdvo_connector
->max_hscan
-
1776 psb_intel_sdvo_connector
->left_margin
;
1777 cmd
= SDVO_CMD_SET_OVERSCAN_H
;
1779 } else if (psb_intel_sdvo_connector
->top
== property
) {
1780 drm_connector_property_set_value(connector
,
1781 psb_intel_sdvo_connector
->bottom
, val
);
1782 if (psb_intel_sdvo_connector
->top_margin
== temp_value
)
1785 psb_intel_sdvo_connector
->top_margin
= temp_value
;
1786 psb_intel_sdvo_connector
->bottom_margin
= temp_value
;
1787 temp_value
= psb_intel_sdvo_connector
->max_vscan
-
1788 psb_intel_sdvo_connector
->top_margin
;
1789 cmd
= SDVO_CMD_SET_OVERSCAN_V
;
1791 } else if (psb_intel_sdvo_connector
->bottom
== property
) {
1792 drm_connector_property_set_value(connector
,
1793 psb_intel_sdvo_connector
->top
, val
);
1794 if (psb_intel_sdvo_connector
->bottom_margin
== temp_value
)
1797 psb_intel_sdvo_connector
->top_margin
= temp_value
;
1798 psb_intel_sdvo_connector
->bottom_margin
= temp_value
;
1799 temp_value
= psb_intel_sdvo_connector
->max_vscan
-
1800 psb_intel_sdvo_connector
->top_margin
;
1801 cmd
= SDVO_CMD_SET_OVERSCAN_V
;
1804 CHECK_PROPERTY(hpos
, HPOS
)
1805 CHECK_PROPERTY(vpos
, VPOS
)
1806 CHECK_PROPERTY(saturation
, SATURATION
)
1807 CHECK_PROPERTY(contrast
, CONTRAST
)
1808 CHECK_PROPERTY(hue
, HUE
)
1809 CHECK_PROPERTY(brightness
, BRIGHTNESS
)
1810 CHECK_PROPERTY(sharpness
, SHARPNESS
)
1811 CHECK_PROPERTY(flicker_filter
, FLICKER_FILTER
)
1812 CHECK_PROPERTY(flicker_filter_2d
, FLICKER_FILTER_2D
)
1813 CHECK_PROPERTY(flicker_filter_adaptive
, FLICKER_FILTER_ADAPTIVE
)
1814 CHECK_PROPERTY(tv_chroma_filter
, TV_CHROMA_FILTER
)
1815 CHECK_PROPERTY(tv_luma_filter
, TV_LUMA_FILTER
)
1816 CHECK_PROPERTY(dot_crawl
, DOT_CRAWL
)
1819 return -EINVAL
; /* unknown property */
1822 if (!psb_intel_sdvo_set_value(psb_intel_sdvo
, cmd
, &temp_value
, 2))
1827 if (psb_intel_sdvo
->base
.base
.crtc
) {
1828 struct drm_crtc
*crtc
= psb_intel_sdvo
->base
.base
.crtc
;
1829 drm_crtc_helper_set_mode(crtc
, &crtc
->mode
, crtc
->x
,
1834 #undef CHECK_PROPERTY
1837 static const struct drm_encoder_helper_funcs psb_intel_sdvo_helper_funcs
= {
1838 .dpms
= psb_intel_sdvo_dpms
,
1839 .mode_fixup
= psb_intel_sdvo_mode_fixup
,
1840 .prepare
= psb_intel_encoder_prepare
,
1841 .mode_set
= psb_intel_sdvo_mode_set
,
1842 .commit
= psb_intel_encoder_commit
,
1845 static const struct drm_connector_funcs psb_intel_sdvo_connector_funcs
= {
1846 .dpms
= drm_helper_connector_dpms
,
1847 .detect
= psb_intel_sdvo_detect
,
1848 .fill_modes
= drm_helper_probe_single_connector_modes
,
1849 .set_property
= psb_intel_sdvo_set_property
,
1850 .destroy
= psb_intel_sdvo_destroy
,
1853 static const struct drm_connector_helper_funcs psb_intel_sdvo_connector_helper_funcs
= {
1854 .get_modes
= psb_intel_sdvo_get_modes
,
1855 .mode_valid
= psb_intel_sdvo_mode_valid
,
1856 .best_encoder
= psb_intel_best_encoder
,
1859 static void psb_intel_sdvo_enc_destroy(struct drm_encoder
*encoder
)
1861 struct psb_intel_sdvo
*psb_intel_sdvo
= to_psb_intel_sdvo(encoder
);
1863 if (psb_intel_sdvo
->sdvo_lvds_fixed_mode
!= NULL
)
1864 drm_mode_destroy(encoder
->dev
,
1865 psb_intel_sdvo
->sdvo_lvds_fixed_mode
);
1867 i2c_del_adapter(&psb_intel_sdvo
->ddc
);
1868 psb_intel_encoder_destroy(encoder
);
1871 static const struct drm_encoder_funcs psb_intel_sdvo_enc_funcs
= {
1872 .destroy
= psb_intel_sdvo_enc_destroy
,
1876 psb_intel_sdvo_guess_ddc_bus(struct psb_intel_sdvo
*sdvo
)
1878 /* FIXME: At the moment, ddc_bus = 2 is the only thing that works.
1879 * We need to figure out if this is true for all available poulsbo
1880 * hardware, or if we need to fiddle with the guessing code above.
1881 * The problem might go away if we can parse sdvo mappings from bios */
1886 unsigned int num_bits
;
1888 /* Make a mask of outputs less than or equal to our own priority in the
1891 switch (sdvo
->controlled_output
) {
1892 case SDVO_OUTPUT_LVDS1
:
1893 mask
|= SDVO_OUTPUT_LVDS1
;
1894 case SDVO_OUTPUT_LVDS0
:
1895 mask
|= SDVO_OUTPUT_LVDS0
;
1896 case SDVO_OUTPUT_TMDS1
:
1897 mask
|= SDVO_OUTPUT_TMDS1
;
1898 case SDVO_OUTPUT_TMDS0
:
1899 mask
|= SDVO_OUTPUT_TMDS0
;
1900 case SDVO_OUTPUT_RGB1
:
1901 mask
|= SDVO_OUTPUT_RGB1
;
1902 case SDVO_OUTPUT_RGB0
:
1903 mask
|= SDVO_OUTPUT_RGB0
;
1907 /* Count bits to find what number we are in the priority list. */
1908 mask
&= sdvo
->caps
.output_flags
;
1909 num_bits
= hweight16(mask
);
1910 /* If more than 3 outputs, default to DDC bus 3 for now. */
1914 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1915 sdvo
->ddc_bus
= 1 << num_bits
;
1920 * Choose the appropriate DDC bus for control bus switch command for this
1921 * SDVO output based on the controlled output.
1923 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1924 * outputs, then LVDS outputs.
1927 psb_intel_sdvo_select_ddc_bus(struct drm_psb_private
*dev_priv
,
1928 struct psb_intel_sdvo
*sdvo
, u32 reg
)
1930 struct sdvo_device_mapping
*mapping
;
1933 mapping
= &(dev_priv
->sdvo_mappings
[0]);
1935 mapping
= &(dev_priv
->sdvo_mappings
[1]);
1937 if (mapping
->initialized
)
1938 sdvo
->ddc_bus
= 1 << ((mapping
->ddc_pin
& 0xf0) >> 4);
1940 psb_intel_sdvo_guess_ddc_bus(sdvo
);
1944 psb_intel_sdvo_select_i2c_bus(struct drm_psb_private
*dev_priv
,
1945 struct psb_intel_sdvo
*sdvo
, u32 reg
)
1947 struct sdvo_device_mapping
*mapping
;
1951 mapping
= &dev_priv
->sdvo_mappings
[0];
1953 mapping
= &dev_priv
->sdvo_mappings
[1];
1955 pin
= GMBUS_PORT_DPB
;
1956 speed
= GMBUS_RATE_1MHZ
>> 8;
1957 if (mapping
->initialized
) {
1958 pin
= mapping
->i2c_pin
;
1959 speed
= mapping
->i2c_speed
;
1962 if (pin
< GMBUS_NUM_PORTS
) {
1963 sdvo
->i2c
= &dev_priv
->gmbus
[pin
].adapter
;
1964 gma_intel_gmbus_set_speed(sdvo
->i2c
, speed
);
1965 gma_intel_gmbus_force_bit(sdvo
->i2c
, true);
1967 sdvo
->i2c
= &dev_priv
->gmbus
[GMBUS_PORT_DPB
].adapter
;
1971 psb_intel_sdvo_is_hdmi_connector(struct psb_intel_sdvo
*psb_intel_sdvo
, int device
)
1973 return psb_intel_sdvo_check_supp_encode(psb_intel_sdvo
);
1977 psb_intel_sdvo_get_slave_addr(struct drm_device
*dev
, int sdvo_reg
)
1979 struct drm_psb_private
*dev_priv
= dev
->dev_private
;
1980 struct sdvo_device_mapping
*my_mapping
, *other_mapping
;
1982 if (IS_SDVOB(sdvo_reg
)) {
1983 my_mapping
= &dev_priv
->sdvo_mappings
[0];
1984 other_mapping
= &dev_priv
->sdvo_mappings
[1];
1986 my_mapping
= &dev_priv
->sdvo_mappings
[1];
1987 other_mapping
= &dev_priv
->sdvo_mappings
[0];
1990 /* If the BIOS described our SDVO device, take advantage of it. */
1991 if (my_mapping
->slave_addr
)
1992 return my_mapping
->slave_addr
;
1994 /* If the BIOS only described a different SDVO device, use the
1995 * address that it isn't using.
1997 if (other_mapping
->slave_addr
) {
1998 if (other_mapping
->slave_addr
== 0x70)
2004 /* No SDVO device info is found for another DVO port,
2005 * so use mapping assumption we had before BIOS parsing.
2007 if (IS_SDVOB(sdvo_reg
))
2014 psb_intel_sdvo_connector_init(struct psb_intel_sdvo_connector
*connector
,
2015 struct psb_intel_sdvo
*encoder
)
2017 drm_connector_init(encoder
->base
.base
.dev
,
2018 &connector
->base
.base
,
2019 &psb_intel_sdvo_connector_funcs
,
2020 connector
->base
.base
.connector_type
);
2022 drm_connector_helper_add(&connector
->base
.base
,
2023 &psb_intel_sdvo_connector_helper_funcs
);
2025 connector
->base
.base
.interlace_allowed
= 0;
2026 connector
->base
.base
.doublescan_allowed
= 0;
2027 connector
->base
.base
.display_info
.subpixel_order
= SubPixelHorizontalRGB
;
2029 psb_intel_connector_attach_encoder(&connector
->base
, &encoder
->base
);
2030 drm_sysfs_connector_add(&connector
->base
.base
);
2034 psb_intel_sdvo_add_hdmi_properties(struct psb_intel_sdvo_connector
*connector
)
2036 /* FIXME: We don't support HDMI at the moment
2037 struct drm_device *dev = connector->base.base.dev;
2039 intel_attach_force_audio_property(&connector->base.base);
2040 intel_attach_broadcast_rgb_property(&connector->base.base);
2045 psb_intel_sdvo_dvi_init(struct psb_intel_sdvo
*psb_intel_sdvo
, int device
)
2047 struct drm_encoder
*encoder
= &psb_intel_sdvo
->base
.base
;
2048 struct drm_connector
*connector
;
2049 struct psb_intel_connector
*intel_connector
;
2050 struct psb_intel_sdvo_connector
*psb_intel_sdvo_connector
;
2052 psb_intel_sdvo_connector
= kzalloc(sizeof(struct psb_intel_sdvo_connector
), GFP_KERNEL
);
2053 if (!psb_intel_sdvo_connector
)
2057 psb_intel_sdvo
->controlled_output
|= SDVO_OUTPUT_TMDS0
;
2058 psb_intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_TMDS0
;
2059 } else if (device
== 1) {
2060 psb_intel_sdvo
->controlled_output
|= SDVO_OUTPUT_TMDS1
;
2061 psb_intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_TMDS1
;
2064 intel_connector
= &psb_intel_sdvo_connector
->base
;
2065 connector
= &intel_connector
->base
;
2066 // connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2067 encoder
->encoder_type
= DRM_MODE_ENCODER_TMDS
;
2068 connector
->connector_type
= DRM_MODE_CONNECTOR_DVID
;
2070 if (psb_intel_sdvo_is_hdmi_connector(psb_intel_sdvo
, device
)) {
2071 connector
->connector_type
= DRM_MODE_CONNECTOR_HDMIA
;
2072 psb_intel_sdvo
->is_hdmi
= true;
2074 psb_intel_sdvo
->base
.clone_mask
= ((1 << INTEL_SDVO_NON_TV_CLONE_BIT
) |
2075 (1 << INTEL_ANALOG_CLONE_BIT
));
2077 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector
, psb_intel_sdvo
);
2078 if (psb_intel_sdvo
->is_hdmi
)
2079 psb_intel_sdvo_add_hdmi_properties(psb_intel_sdvo_connector
);
2085 psb_intel_sdvo_tv_init(struct psb_intel_sdvo
*psb_intel_sdvo
, int type
)
2087 struct drm_encoder
*encoder
= &psb_intel_sdvo
->base
.base
;
2088 struct drm_connector
*connector
;
2089 struct psb_intel_connector
*intel_connector
;
2090 struct psb_intel_sdvo_connector
*psb_intel_sdvo_connector
;
2092 psb_intel_sdvo_connector
= kzalloc(sizeof(struct psb_intel_sdvo_connector
), GFP_KERNEL
);
2093 if (!psb_intel_sdvo_connector
)
2096 intel_connector
= &psb_intel_sdvo_connector
->base
;
2097 connector
= &intel_connector
->base
;
2098 encoder
->encoder_type
= DRM_MODE_ENCODER_TVDAC
;
2099 connector
->connector_type
= DRM_MODE_CONNECTOR_SVIDEO
;
2101 psb_intel_sdvo
->controlled_output
|= type
;
2102 psb_intel_sdvo_connector
->output_flag
= type
;
2104 psb_intel_sdvo
->is_tv
= true;
2105 psb_intel_sdvo
->base
.needs_tv_clock
= true;
2106 psb_intel_sdvo
->base
.clone_mask
= 1 << INTEL_SDVO_TV_CLONE_BIT
;
2108 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector
, psb_intel_sdvo
);
2110 if (!psb_intel_sdvo_tv_create_property(psb_intel_sdvo
, psb_intel_sdvo_connector
, type
))
2113 if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo
, psb_intel_sdvo_connector
))
2119 psb_intel_sdvo_destroy(connector
);
2124 psb_intel_sdvo_analog_init(struct psb_intel_sdvo
*psb_intel_sdvo
, int device
)
2126 struct drm_encoder
*encoder
= &psb_intel_sdvo
->base
.base
;
2127 struct drm_connector
*connector
;
2128 struct psb_intel_connector
*intel_connector
;
2129 struct psb_intel_sdvo_connector
*psb_intel_sdvo_connector
;
2131 psb_intel_sdvo_connector
= kzalloc(sizeof(struct psb_intel_sdvo_connector
), GFP_KERNEL
);
2132 if (!psb_intel_sdvo_connector
)
2135 intel_connector
= &psb_intel_sdvo_connector
->base
;
2136 connector
= &intel_connector
->base
;
2137 connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
;
2138 encoder
->encoder_type
= DRM_MODE_ENCODER_DAC
;
2139 connector
->connector_type
= DRM_MODE_CONNECTOR_VGA
;
2142 psb_intel_sdvo
->controlled_output
|= SDVO_OUTPUT_RGB0
;
2143 psb_intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_RGB0
;
2144 } else if (device
== 1) {
2145 psb_intel_sdvo
->controlled_output
|= SDVO_OUTPUT_RGB1
;
2146 psb_intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_RGB1
;
2149 psb_intel_sdvo
->base
.clone_mask
= ((1 << INTEL_SDVO_NON_TV_CLONE_BIT
) |
2150 (1 << INTEL_ANALOG_CLONE_BIT
));
2152 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector
,
2158 psb_intel_sdvo_lvds_init(struct psb_intel_sdvo
*psb_intel_sdvo
, int device
)
2160 struct drm_encoder
*encoder
= &psb_intel_sdvo
->base
.base
;
2161 struct drm_connector
*connector
;
2162 struct psb_intel_connector
*intel_connector
;
2163 struct psb_intel_sdvo_connector
*psb_intel_sdvo_connector
;
2165 psb_intel_sdvo_connector
= kzalloc(sizeof(struct psb_intel_sdvo_connector
), GFP_KERNEL
);
2166 if (!psb_intel_sdvo_connector
)
2169 intel_connector
= &psb_intel_sdvo_connector
->base
;
2170 connector
= &intel_connector
->base
;
2171 encoder
->encoder_type
= DRM_MODE_ENCODER_LVDS
;
2172 connector
->connector_type
= DRM_MODE_CONNECTOR_LVDS
;
2175 psb_intel_sdvo
->controlled_output
|= SDVO_OUTPUT_LVDS0
;
2176 psb_intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_LVDS0
;
2177 } else if (device
== 1) {
2178 psb_intel_sdvo
->controlled_output
|= SDVO_OUTPUT_LVDS1
;
2179 psb_intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_LVDS1
;
2182 psb_intel_sdvo
->base
.clone_mask
= ((1 << INTEL_ANALOG_CLONE_BIT
) |
2183 (1 << INTEL_SDVO_LVDS_CLONE_BIT
));
2185 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector
, psb_intel_sdvo
);
2186 if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo
, psb_intel_sdvo_connector
))
2192 psb_intel_sdvo_destroy(connector
);
2197 psb_intel_sdvo_output_setup(struct psb_intel_sdvo
*psb_intel_sdvo
, uint16_t flags
)
2199 psb_intel_sdvo
->is_tv
= false;
2200 psb_intel_sdvo
->base
.needs_tv_clock
= false;
2201 psb_intel_sdvo
->is_lvds
= false;
2203 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2205 if (flags
& SDVO_OUTPUT_TMDS0
)
2206 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo
, 0))
2209 if ((flags
& SDVO_TMDS_MASK
) == SDVO_TMDS_MASK
)
2210 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo
, 1))
2213 /* TV has no XXX1 function block */
2214 if (flags
& SDVO_OUTPUT_SVID0
)
2215 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo
, SDVO_OUTPUT_SVID0
))
2218 if (flags
& SDVO_OUTPUT_CVBS0
)
2219 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo
, SDVO_OUTPUT_CVBS0
))
2222 if (flags
& SDVO_OUTPUT_RGB0
)
2223 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo
, 0))
2226 if ((flags
& SDVO_RGB_MASK
) == SDVO_RGB_MASK
)
2227 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo
, 1))
2230 if (flags
& SDVO_OUTPUT_LVDS0
)
2231 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo
, 0))
2234 if ((flags
& SDVO_LVDS_MASK
) == SDVO_LVDS_MASK
)
2235 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo
, 1))
2238 if ((flags
& SDVO_OUTPUT_MASK
) == 0) {
2239 unsigned char bytes
[2];
2241 psb_intel_sdvo
->controlled_output
= 0;
2242 memcpy(bytes
, &psb_intel_sdvo
->caps
.output_flags
, 2);
2243 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2244 SDVO_NAME(psb_intel_sdvo
),
2245 bytes
[0], bytes
[1]);
2248 psb_intel_sdvo
->base
.crtc_mask
= (1 << 0) | (1 << 1);
2253 static bool psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo
*psb_intel_sdvo
,
2254 struct psb_intel_sdvo_connector
*psb_intel_sdvo_connector
,
2257 struct drm_device
*dev
= psb_intel_sdvo
->base
.base
.dev
;
2258 struct psb_intel_sdvo_tv_format format
;
2259 uint32_t format_map
, i
;
2261 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo
, type
))
2264 BUILD_BUG_ON(sizeof(format
) != 6);
2265 if (!psb_intel_sdvo_get_value(psb_intel_sdvo
,
2266 SDVO_CMD_GET_SUPPORTED_TV_FORMATS
,
2267 &format
, sizeof(format
)))
2270 memcpy(&format_map
, &format
, min(sizeof(format_map
), sizeof(format
)));
2272 if (format_map
== 0)
2275 psb_intel_sdvo_connector
->format_supported_num
= 0;
2276 for (i
= 0 ; i
< TV_FORMAT_NUM
; i
++)
2277 if (format_map
& (1 << i
))
2278 psb_intel_sdvo_connector
->tv_format_supported
[psb_intel_sdvo_connector
->format_supported_num
++] = i
;
2281 psb_intel_sdvo_connector
->tv_format
=
2282 drm_property_create(dev
, DRM_MODE_PROP_ENUM
,
2283 "mode", psb_intel_sdvo_connector
->format_supported_num
);
2284 if (!psb_intel_sdvo_connector
->tv_format
)
2287 for (i
= 0; i
< psb_intel_sdvo_connector
->format_supported_num
; i
++)
2288 drm_property_add_enum(
2289 psb_intel_sdvo_connector
->tv_format
, i
,
2290 i
, tv_format_names
[psb_intel_sdvo_connector
->tv_format_supported
[i
]]);
2292 psb_intel_sdvo
->tv_format_index
= psb_intel_sdvo_connector
->tv_format_supported
[0];
2293 drm_connector_attach_property(&psb_intel_sdvo_connector
->base
.base
,
2294 psb_intel_sdvo_connector
->tv_format
, 0);
2299 #define ENHANCEMENT(name, NAME) do { \
2300 if (enhancements.name) { \
2301 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2302 !psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2304 psb_intel_sdvo_connector->max_##name = data_value[0]; \
2305 psb_intel_sdvo_connector->cur_##name = response; \
2306 psb_intel_sdvo_connector->name = \
2307 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2308 if (!psb_intel_sdvo_connector->name) return false; \
2309 drm_connector_attach_property(connector, \
2310 psb_intel_sdvo_connector->name, \
2311 psb_intel_sdvo_connector->cur_##name); \
2312 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2313 data_value[0], data_value[1], response); \
2318 psb_intel_sdvo_create_enhance_property_tv(struct psb_intel_sdvo
*psb_intel_sdvo
,
2319 struct psb_intel_sdvo_connector
*psb_intel_sdvo_connector
,
2320 struct psb_intel_sdvo_enhancements_reply enhancements
)
2322 struct drm_device
*dev
= psb_intel_sdvo
->base
.base
.dev
;
2323 struct drm_connector
*connector
= &psb_intel_sdvo_connector
->base
.base
;
2324 uint16_t response
, data_value
[2];
2326 /* when horizontal overscan is supported, Add the left/right property */
2327 if (enhancements
.overscan_h
) {
2328 if (!psb_intel_sdvo_get_value(psb_intel_sdvo
,
2329 SDVO_CMD_GET_MAX_OVERSCAN_H
,
2333 if (!psb_intel_sdvo_get_value(psb_intel_sdvo
,
2334 SDVO_CMD_GET_OVERSCAN_H
,
2338 psb_intel_sdvo_connector
->max_hscan
= data_value
[0];
2339 psb_intel_sdvo_connector
->left_margin
= data_value
[0] - response
;
2340 psb_intel_sdvo_connector
->right_margin
= psb_intel_sdvo_connector
->left_margin
;
2341 psb_intel_sdvo_connector
->left
=
2342 drm_property_create_range(dev
, 0, "left_margin", 0, data_value
[0]);
2343 if (!psb_intel_sdvo_connector
->left
)
2346 drm_connector_attach_property(connector
,
2347 psb_intel_sdvo_connector
->left
,
2348 psb_intel_sdvo_connector
->left_margin
);
2350 psb_intel_sdvo_connector
->right
=
2351 drm_property_create_range(dev
, 0, "right_margin", 0, data_value
[0]);
2352 if (!psb_intel_sdvo_connector
->right
)
2355 drm_connector_attach_property(connector
,
2356 psb_intel_sdvo_connector
->right
,
2357 psb_intel_sdvo_connector
->right_margin
);
2358 DRM_DEBUG_KMS("h_overscan: max %d, "
2359 "default %d, current %d\n",
2360 data_value
[0], data_value
[1], response
);
2363 if (enhancements
.overscan_v
) {
2364 if (!psb_intel_sdvo_get_value(psb_intel_sdvo
,
2365 SDVO_CMD_GET_MAX_OVERSCAN_V
,
2369 if (!psb_intel_sdvo_get_value(psb_intel_sdvo
,
2370 SDVO_CMD_GET_OVERSCAN_V
,
2374 psb_intel_sdvo_connector
->max_vscan
= data_value
[0];
2375 psb_intel_sdvo_connector
->top_margin
= data_value
[0] - response
;
2376 psb_intel_sdvo_connector
->bottom_margin
= psb_intel_sdvo_connector
->top_margin
;
2377 psb_intel_sdvo_connector
->top
=
2378 drm_property_create_range(dev
, 0, "top_margin", 0, data_value
[0]);
2379 if (!psb_intel_sdvo_connector
->top
)
2382 drm_connector_attach_property(connector
,
2383 psb_intel_sdvo_connector
->top
,
2384 psb_intel_sdvo_connector
->top_margin
);
2386 psb_intel_sdvo_connector
->bottom
=
2387 drm_property_create_range(dev
, 0, "bottom_margin", 0, data_value
[0]);
2388 if (!psb_intel_sdvo_connector
->bottom
)
2391 drm_connector_attach_property(connector
,
2392 psb_intel_sdvo_connector
->bottom
,
2393 psb_intel_sdvo_connector
->bottom_margin
);
2394 DRM_DEBUG_KMS("v_overscan: max %d, "
2395 "default %d, current %d\n",
2396 data_value
[0], data_value
[1], response
);
2399 ENHANCEMENT(hpos
, HPOS
);
2400 ENHANCEMENT(vpos
, VPOS
);
2401 ENHANCEMENT(saturation
, SATURATION
);
2402 ENHANCEMENT(contrast
, CONTRAST
);
2403 ENHANCEMENT(hue
, HUE
);
2404 ENHANCEMENT(sharpness
, SHARPNESS
);
2405 ENHANCEMENT(brightness
, BRIGHTNESS
);
2406 ENHANCEMENT(flicker_filter
, FLICKER_FILTER
);
2407 ENHANCEMENT(flicker_filter_adaptive
, FLICKER_FILTER_ADAPTIVE
);
2408 ENHANCEMENT(flicker_filter_2d
, FLICKER_FILTER_2D
);
2409 ENHANCEMENT(tv_chroma_filter
, TV_CHROMA_FILTER
);
2410 ENHANCEMENT(tv_luma_filter
, TV_LUMA_FILTER
);
2412 if (enhancements
.dot_crawl
) {
2413 if (!psb_intel_sdvo_get_value(psb_intel_sdvo
, SDVO_CMD_GET_DOT_CRAWL
, &response
, 2))
2416 psb_intel_sdvo_connector
->max_dot_crawl
= 1;
2417 psb_intel_sdvo_connector
->cur_dot_crawl
= response
& 0x1;
2418 psb_intel_sdvo_connector
->dot_crawl
=
2419 drm_property_create_range(dev
, 0, "dot_crawl", 0, 1);
2420 if (!psb_intel_sdvo_connector
->dot_crawl
)
2423 drm_connector_attach_property(connector
,
2424 psb_intel_sdvo_connector
->dot_crawl
,
2425 psb_intel_sdvo_connector
->cur_dot_crawl
);
2426 DRM_DEBUG_KMS("dot crawl: current %d\n", response
);
2433 psb_intel_sdvo_create_enhance_property_lvds(struct psb_intel_sdvo
*psb_intel_sdvo
,
2434 struct psb_intel_sdvo_connector
*psb_intel_sdvo_connector
,
2435 struct psb_intel_sdvo_enhancements_reply enhancements
)
2437 struct drm_device
*dev
= psb_intel_sdvo
->base
.base
.dev
;
2438 struct drm_connector
*connector
= &psb_intel_sdvo_connector
->base
.base
;
2439 uint16_t response
, data_value
[2];
2441 ENHANCEMENT(brightness
, BRIGHTNESS
);
2447 static bool psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo
*psb_intel_sdvo
,
2448 struct psb_intel_sdvo_connector
*psb_intel_sdvo_connector
)
2451 struct psb_intel_sdvo_enhancements_reply reply
;
2455 BUILD_BUG_ON(sizeof(enhancements
) != 2);
2457 enhancements
.response
= 0;
2458 psb_intel_sdvo_get_value(psb_intel_sdvo
,
2459 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS
,
2460 &enhancements
, sizeof(enhancements
));
2461 if (enhancements
.response
== 0) {
2462 DRM_DEBUG_KMS("No enhancement is supported\n");
2466 if (IS_TV(psb_intel_sdvo_connector
))
2467 return psb_intel_sdvo_create_enhance_property_tv(psb_intel_sdvo
, psb_intel_sdvo_connector
, enhancements
.reply
);
2468 else if(IS_LVDS(psb_intel_sdvo_connector
))
2469 return psb_intel_sdvo_create_enhance_property_lvds(psb_intel_sdvo
, psb_intel_sdvo_connector
, enhancements
.reply
);
2474 static int psb_intel_sdvo_ddc_proxy_xfer(struct i2c_adapter
*adapter
,
2475 struct i2c_msg
*msgs
,
2478 struct psb_intel_sdvo
*sdvo
= adapter
->algo_data
;
2480 if (!psb_intel_sdvo_set_control_bus_switch(sdvo
, sdvo
->ddc_bus
))
2483 return sdvo
->i2c
->algo
->master_xfer(sdvo
->i2c
, msgs
, num
);
2486 static u32
psb_intel_sdvo_ddc_proxy_func(struct i2c_adapter
*adapter
)
2488 struct psb_intel_sdvo
*sdvo
= adapter
->algo_data
;
2489 return sdvo
->i2c
->algo
->functionality(sdvo
->i2c
);
2492 static const struct i2c_algorithm psb_intel_sdvo_ddc_proxy
= {
2493 .master_xfer
= psb_intel_sdvo_ddc_proxy_xfer
,
2494 .functionality
= psb_intel_sdvo_ddc_proxy_func
2498 psb_intel_sdvo_init_ddc_proxy(struct psb_intel_sdvo
*sdvo
,
2499 struct drm_device
*dev
)
2501 sdvo
->ddc
.owner
= THIS_MODULE
;
2502 sdvo
->ddc
.class = I2C_CLASS_DDC
;
2503 snprintf(sdvo
->ddc
.name
, I2C_NAME_SIZE
, "SDVO DDC proxy");
2504 sdvo
->ddc
.dev
.parent
= &dev
->pdev
->dev
;
2505 sdvo
->ddc
.algo_data
= sdvo
;
2506 sdvo
->ddc
.algo
= &psb_intel_sdvo_ddc_proxy
;
2508 return i2c_add_adapter(&sdvo
->ddc
) == 0;
2511 bool psb_intel_sdvo_init(struct drm_device
*dev
, int sdvo_reg
)
2513 struct drm_psb_private
*dev_priv
= dev
->dev_private
;
2514 struct psb_intel_encoder
*psb_intel_encoder
;
2515 struct psb_intel_sdvo
*psb_intel_sdvo
;
2518 psb_intel_sdvo
= kzalloc(sizeof(struct psb_intel_sdvo
), GFP_KERNEL
);
2519 if (!psb_intel_sdvo
)
2522 psb_intel_sdvo
->sdvo_reg
= sdvo_reg
;
2523 psb_intel_sdvo
->slave_addr
= psb_intel_sdvo_get_slave_addr(dev
, sdvo_reg
) >> 1;
2524 psb_intel_sdvo_select_i2c_bus(dev_priv
, psb_intel_sdvo
, sdvo_reg
);
2525 if (!psb_intel_sdvo_init_ddc_proxy(psb_intel_sdvo
, dev
)) {
2526 kfree(psb_intel_sdvo
);
2530 /* encoder type will be decided later */
2531 psb_intel_encoder
= &psb_intel_sdvo
->base
;
2532 psb_intel_encoder
->type
= INTEL_OUTPUT_SDVO
;
2533 drm_encoder_init(dev
, &psb_intel_encoder
->base
, &psb_intel_sdvo_enc_funcs
, 0);
2535 /* Read the regs to test if we can talk to the device */
2536 for (i
= 0; i
< 0x40; i
++) {
2539 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo
, i
, &byte
)) {
2540 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2541 IS_SDVOB(sdvo_reg
) ? 'B' : 'C');
2546 if (IS_SDVOB(sdvo_reg
))
2547 dev_priv
->hotplug_supported_mask
|= SDVOB_HOTPLUG_INT_STATUS
;
2549 dev_priv
->hotplug_supported_mask
|= SDVOC_HOTPLUG_INT_STATUS
;
2551 drm_encoder_helper_add(&psb_intel_encoder
->base
, &psb_intel_sdvo_helper_funcs
);
2553 /* In default case sdvo lvds is false */
2554 if (!psb_intel_sdvo_get_capabilities(psb_intel_sdvo
, &psb_intel_sdvo
->caps
))
2557 if (psb_intel_sdvo_output_setup(psb_intel_sdvo
,
2558 psb_intel_sdvo
->caps
.output_flags
) != true) {
2559 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2560 IS_SDVOB(sdvo_reg
) ? 'B' : 'C');
2564 psb_intel_sdvo_select_ddc_bus(dev_priv
, psb_intel_sdvo
, sdvo_reg
);
2566 /* Set the input timing to the screen. Assume always input 0. */
2567 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo
))
2570 if (!psb_intel_sdvo_get_input_pixel_clock_range(psb_intel_sdvo
,
2571 &psb_intel_sdvo
->pixel_clock_min
,
2572 &psb_intel_sdvo
->pixel_clock_max
))
2575 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2576 "clock range %dMHz - %dMHz, "
2577 "input 1: %c, input 2: %c, "
2578 "output 1: %c, output 2: %c\n",
2579 SDVO_NAME(psb_intel_sdvo
),
2580 psb_intel_sdvo
->caps
.vendor_id
, psb_intel_sdvo
->caps
.device_id
,
2581 psb_intel_sdvo
->caps
.device_rev_id
,
2582 psb_intel_sdvo
->pixel_clock_min
/ 1000,
2583 psb_intel_sdvo
->pixel_clock_max
/ 1000,
2584 (psb_intel_sdvo
->caps
.sdvo_inputs_mask
& 0x1) ? 'Y' : 'N',
2585 (psb_intel_sdvo
->caps
.sdvo_inputs_mask
& 0x2) ? 'Y' : 'N',
2586 /* check currently supported outputs */
2587 psb_intel_sdvo
->caps
.output_flags
&
2588 (SDVO_OUTPUT_TMDS0
| SDVO_OUTPUT_RGB0
) ? 'Y' : 'N',
2589 psb_intel_sdvo
->caps
.output_flags
&
2590 (SDVO_OUTPUT_TMDS1
| SDVO_OUTPUT_RGB1
) ? 'Y' : 'N');
2594 drm_encoder_cleanup(&psb_intel_encoder
->base
);
2595 i2c_del_adapter(&psb_intel_sdvo
->ddc
);
2596 kfree(psb_intel_sdvo
);