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ARM: OMAP2+: serial: Change MAX_HSUART_PORTS to 6
[deliverable/linux.git] / drivers / gpu / drm / i810 / i810_dma.c
1 /* i810_dma.c -- DMA support for the i810 -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
3 *
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6 * All Rights Reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 *
27 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
30 *
31 */
32
33 #include "drmP.h"
34 #include "drm.h"
35 #include "i810_drm.h"
36 #include "i810_drv.h"
37 #include <linux/interrupt.h> /* For task queue support */
38 #include <linux/delay.h>
39 #include <linux/slab.h>
40 #include <linux/pagemap.h>
41
42 #define I810_BUF_FREE 2
43 #define I810_BUF_CLIENT 1
44 #define I810_BUF_HARDWARE 0
45
46 #define I810_BUF_UNMAPPED 0
47 #define I810_BUF_MAPPED 1
48
49 static struct drm_buf *i810_freelist_get(struct drm_device * dev)
50 {
51 struct drm_device_dma *dma = dev->dma;
52 int i;
53 int used;
54
55 /* Linear search might not be the best solution */
56
57 for (i = 0; i < dma->buf_count; i++) {
58 struct drm_buf *buf = dma->buflist[i];
59 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
60 /* In use is already a pointer */
61 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
62 I810_BUF_CLIENT);
63 if (used == I810_BUF_FREE)
64 return buf;
65 }
66 return NULL;
67 }
68
69 /* This should only be called if the buffer is not sent to the hardware
70 * yet, the hardware updates in use for us once its on the ring buffer.
71 */
72
73 static int i810_freelist_put(struct drm_device *dev, struct drm_buf *buf)
74 {
75 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
76 int used;
77
78 /* In use is already a pointer */
79 used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
80 if (used != I810_BUF_CLIENT) {
81 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
82 return -EINVAL;
83 }
84
85 return 0;
86 }
87
88 static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
89 {
90 struct drm_file *priv = filp->private_data;
91 struct drm_device *dev;
92 drm_i810_private_t *dev_priv;
93 struct drm_buf *buf;
94 drm_i810_buf_priv_t *buf_priv;
95
96 dev = priv->minor->dev;
97 dev_priv = dev->dev_private;
98 buf = dev_priv->mmap_buffer;
99 buf_priv = buf->dev_private;
100
101 vma->vm_flags |= (VM_IO | VM_DONTCOPY);
102
103 buf_priv->currently_mapped = I810_BUF_MAPPED;
104
105 if (io_remap_pfn_range(vma, vma->vm_start,
106 vma->vm_pgoff,
107 vma->vm_end - vma->vm_start, vma->vm_page_prot))
108 return -EAGAIN;
109 return 0;
110 }
111
112 static const struct file_operations i810_buffer_fops = {
113 .open = drm_open,
114 .release = drm_release,
115 .unlocked_ioctl = drm_ioctl,
116 .mmap = i810_mmap_buffers,
117 .fasync = drm_fasync,
118 .llseek = noop_llseek,
119 };
120
121 static int i810_map_buffer(struct drm_buf *buf, struct drm_file *file_priv)
122 {
123 struct drm_device *dev = file_priv->minor->dev;
124 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
125 drm_i810_private_t *dev_priv = dev->dev_private;
126 const struct file_operations *old_fops;
127 int retcode = 0;
128
129 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
130 return -EINVAL;
131
132 /* This is all entirely broken */
133 old_fops = file_priv->filp->f_op;
134 file_priv->filp->f_op = &i810_buffer_fops;
135 dev_priv->mmap_buffer = buf;
136 buf_priv->virtual = (void *)vm_mmap(file_priv->filp, 0, buf->total,
137 PROT_READ | PROT_WRITE,
138 MAP_SHARED, buf->bus_address);
139 dev_priv->mmap_buffer = NULL;
140 file_priv->filp->f_op = old_fops;
141 if (IS_ERR(buf_priv->virtual)) {
142 /* Real error */
143 DRM_ERROR("mmap error\n");
144 retcode = PTR_ERR(buf_priv->virtual);
145 buf_priv->virtual = NULL;
146 }
147
148 return retcode;
149 }
150
151 static int i810_unmap_buffer(struct drm_buf *buf)
152 {
153 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
154 int retcode = 0;
155
156 if (buf_priv->currently_mapped != I810_BUF_MAPPED)
157 return -EINVAL;
158
159 retcode = vm_munmap((unsigned long)buf_priv->virtual,
160 (size_t) buf->total);
161
162 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
163 buf_priv->virtual = NULL;
164
165 return retcode;
166 }
167
168 static int i810_dma_get_buffer(struct drm_device *dev, drm_i810_dma_t *d,
169 struct drm_file *file_priv)
170 {
171 struct drm_buf *buf;
172 drm_i810_buf_priv_t *buf_priv;
173 int retcode = 0;
174
175 buf = i810_freelist_get(dev);
176 if (!buf) {
177 retcode = -ENOMEM;
178 DRM_DEBUG("retcode=%d\n", retcode);
179 return retcode;
180 }
181
182 retcode = i810_map_buffer(buf, file_priv);
183 if (retcode) {
184 i810_freelist_put(dev, buf);
185 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
186 return retcode;
187 }
188 buf->file_priv = file_priv;
189 buf_priv = buf->dev_private;
190 d->granted = 1;
191 d->request_idx = buf->idx;
192 d->request_size = buf->total;
193 d->virtual = buf_priv->virtual;
194
195 return retcode;
196 }
197
198 static int i810_dma_cleanup(struct drm_device *dev)
199 {
200 struct drm_device_dma *dma = dev->dma;
201
202 /* Make sure interrupts are disabled here because the uninstall ioctl
203 * may not have been called from userspace and after dev_private
204 * is freed, it's too late.
205 */
206 if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ) && dev->irq_enabled)
207 drm_irq_uninstall(dev);
208
209 if (dev->dev_private) {
210 int i;
211 drm_i810_private_t *dev_priv =
212 (drm_i810_private_t *) dev->dev_private;
213
214 if (dev_priv->ring.virtual_start)
215 drm_core_ioremapfree(&dev_priv->ring.map, dev);
216 if (dev_priv->hw_status_page) {
217 pci_free_consistent(dev->pdev, PAGE_SIZE,
218 dev_priv->hw_status_page,
219 dev_priv->dma_status_page);
220 }
221 kfree(dev->dev_private);
222 dev->dev_private = NULL;
223
224 for (i = 0; i < dma->buf_count; i++) {
225 struct drm_buf *buf = dma->buflist[i];
226 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
227
228 if (buf_priv->kernel_virtual && buf->total)
229 drm_core_ioremapfree(&buf_priv->map, dev);
230 }
231 }
232 return 0;
233 }
234
235 static int i810_wait_ring(struct drm_device *dev, int n)
236 {
237 drm_i810_private_t *dev_priv = dev->dev_private;
238 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
239 int iters = 0;
240 unsigned long end;
241 unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
242
243 end = jiffies + (HZ * 3);
244 while (ring->space < n) {
245 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
246 ring->space = ring->head - (ring->tail + 8);
247 if (ring->space < 0)
248 ring->space += ring->Size;
249
250 if (ring->head != last_head) {
251 end = jiffies + (HZ * 3);
252 last_head = ring->head;
253 }
254
255 iters++;
256 if (time_before(end, jiffies)) {
257 DRM_ERROR("space: %d wanted %d\n", ring->space, n);
258 DRM_ERROR("lockup\n");
259 goto out_wait_ring;
260 }
261 udelay(1);
262 }
263
264 out_wait_ring:
265 return iters;
266 }
267
268 static void i810_kernel_lost_context(struct drm_device *dev)
269 {
270 drm_i810_private_t *dev_priv = dev->dev_private;
271 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
272
273 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
274 ring->tail = I810_READ(LP_RING + RING_TAIL);
275 ring->space = ring->head - (ring->tail + 8);
276 if (ring->space < 0)
277 ring->space += ring->Size;
278 }
279
280 static int i810_freelist_init(struct drm_device *dev, drm_i810_private_t *dev_priv)
281 {
282 struct drm_device_dma *dma = dev->dma;
283 int my_idx = 24;
284 u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
285 int i;
286
287 if (dma->buf_count > 1019) {
288 /* Not enough space in the status page for the freelist */
289 return -EINVAL;
290 }
291
292 for (i = 0; i < dma->buf_count; i++) {
293 struct drm_buf *buf = dma->buflist[i];
294 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
295
296 buf_priv->in_use = hw_status++;
297 buf_priv->my_use_idx = my_idx;
298 my_idx += 4;
299
300 *buf_priv->in_use = I810_BUF_FREE;
301
302 buf_priv->map.offset = buf->bus_address;
303 buf_priv->map.size = buf->total;
304 buf_priv->map.type = _DRM_AGP;
305 buf_priv->map.flags = 0;
306 buf_priv->map.mtrr = 0;
307
308 drm_core_ioremap(&buf_priv->map, dev);
309 buf_priv->kernel_virtual = buf_priv->map.handle;
310
311 }
312 return 0;
313 }
314
315 static int i810_dma_initialize(struct drm_device *dev,
316 drm_i810_private_t *dev_priv,
317 drm_i810_init_t *init)
318 {
319 struct drm_map_list *r_list;
320 memset(dev_priv, 0, sizeof(drm_i810_private_t));
321
322 list_for_each_entry(r_list, &dev->maplist, head) {
323 if (r_list->map &&
324 r_list->map->type == _DRM_SHM &&
325 r_list->map->flags & _DRM_CONTAINS_LOCK) {
326 dev_priv->sarea_map = r_list->map;
327 break;
328 }
329 }
330 if (!dev_priv->sarea_map) {
331 dev->dev_private = (void *)dev_priv;
332 i810_dma_cleanup(dev);
333 DRM_ERROR("can not find sarea!\n");
334 return -EINVAL;
335 }
336 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
337 if (!dev_priv->mmio_map) {
338 dev->dev_private = (void *)dev_priv;
339 i810_dma_cleanup(dev);
340 DRM_ERROR("can not find mmio map!\n");
341 return -EINVAL;
342 }
343 dev->agp_buffer_token = init->buffers_offset;
344 dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
345 if (!dev->agp_buffer_map) {
346 dev->dev_private = (void *)dev_priv;
347 i810_dma_cleanup(dev);
348 DRM_ERROR("can not find dma buffer map!\n");
349 return -EINVAL;
350 }
351
352 dev_priv->sarea_priv = (drm_i810_sarea_t *)
353 ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
354
355 dev_priv->ring.Start = init->ring_start;
356 dev_priv->ring.End = init->ring_end;
357 dev_priv->ring.Size = init->ring_size;
358
359 dev_priv->ring.map.offset = dev->agp->base + init->ring_start;
360 dev_priv->ring.map.size = init->ring_size;
361 dev_priv->ring.map.type = _DRM_AGP;
362 dev_priv->ring.map.flags = 0;
363 dev_priv->ring.map.mtrr = 0;
364
365 drm_core_ioremap(&dev_priv->ring.map, dev);
366
367 if (dev_priv->ring.map.handle == NULL) {
368 dev->dev_private = (void *)dev_priv;
369 i810_dma_cleanup(dev);
370 DRM_ERROR("can not ioremap virtual address for"
371 " ring buffer\n");
372 return -ENOMEM;
373 }
374
375 dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
376
377 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
378
379 dev_priv->w = init->w;
380 dev_priv->h = init->h;
381 dev_priv->pitch = init->pitch;
382 dev_priv->back_offset = init->back_offset;
383 dev_priv->depth_offset = init->depth_offset;
384 dev_priv->front_offset = init->front_offset;
385
386 dev_priv->overlay_offset = init->overlay_offset;
387 dev_priv->overlay_physical = init->overlay_physical;
388
389 dev_priv->front_di1 = init->front_offset | init->pitch_bits;
390 dev_priv->back_di1 = init->back_offset | init->pitch_bits;
391 dev_priv->zi1 = init->depth_offset | init->pitch_bits;
392
393 /* Program Hardware Status Page */
394 dev_priv->hw_status_page =
395 pci_alloc_consistent(dev->pdev, PAGE_SIZE,
396 &dev_priv->dma_status_page);
397 if (!dev_priv->hw_status_page) {
398 dev->dev_private = (void *)dev_priv;
399 i810_dma_cleanup(dev);
400 DRM_ERROR("Can not allocate hardware status page\n");
401 return -ENOMEM;
402 }
403 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
404 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
405
406 I810_WRITE(0x02080, dev_priv->dma_status_page);
407 DRM_DEBUG("Enabled hardware status page\n");
408
409 /* Now we need to init our freelist */
410 if (i810_freelist_init(dev, dev_priv) != 0) {
411 dev->dev_private = (void *)dev_priv;
412 i810_dma_cleanup(dev);
413 DRM_ERROR("Not enough space in the status page for"
414 " the freelist\n");
415 return -ENOMEM;
416 }
417 dev->dev_private = (void *)dev_priv;
418
419 return 0;
420 }
421
422 static int i810_dma_init(struct drm_device *dev, void *data,
423 struct drm_file *file_priv)
424 {
425 drm_i810_private_t *dev_priv;
426 drm_i810_init_t *init = data;
427 int retcode = 0;
428
429 switch (init->func) {
430 case I810_INIT_DMA_1_4:
431 DRM_INFO("Using v1.4 init.\n");
432 dev_priv = kmalloc(sizeof(drm_i810_private_t), GFP_KERNEL);
433 if (dev_priv == NULL)
434 return -ENOMEM;
435 retcode = i810_dma_initialize(dev, dev_priv, init);
436 break;
437
438 case I810_CLEANUP_DMA:
439 DRM_INFO("DMA Cleanup\n");
440 retcode = i810_dma_cleanup(dev);
441 break;
442 default:
443 return -EINVAL;
444 }
445
446 return retcode;
447 }
448
449 /* Most efficient way to verify state for the i810 is as it is
450 * emitted. Non-conformant state is silently dropped.
451 *
452 * Use 'volatile' & local var tmp to force the emitted values to be
453 * identical to the verified ones.
454 */
455 static void i810EmitContextVerified(struct drm_device *dev,
456 volatile unsigned int *code)
457 {
458 drm_i810_private_t *dev_priv = dev->dev_private;
459 int i, j = 0;
460 unsigned int tmp;
461 RING_LOCALS;
462
463 BEGIN_LP_RING(I810_CTX_SETUP_SIZE);
464
465 OUT_RING(GFX_OP_COLOR_FACTOR);
466 OUT_RING(code[I810_CTXREG_CF1]);
467
468 OUT_RING(GFX_OP_STIPPLE);
469 OUT_RING(code[I810_CTXREG_ST1]);
470
471 for (i = 4; i < I810_CTX_SETUP_SIZE; i++) {
472 tmp = code[i];
473
474 if ((tmp & (7 << 29)) == (3 << 29) &&
475 (tmp & (0x1f << 24)) < (0x1d << 24)) {
476 OUT_RING(tmp);
477 j++;
478 } else
479 printk("constext state dropped!!!\n");
480 }
481
482 if (j & 1)
483 OUT_RING(0);
484
485 ADVANCE_LP_RING();
486 }
487
488 static void i810EmitTexVerified(struct drm_device *dev, volatile unsigned int *code)
489 {
490 drm_i810_private_t *dev_priv = dev->dev_private;
491 int i, j = 0;
492 unsigned int tmp;
493 RING_LOCALS;
494
495 BEGIN_LP_RING(I810_TEX_SETUP_SIZE);
496
497 OUT_RING(GFX_OP_MAP_INFO);
498 OUT_RING(code[I810_TEXREG_MI1]);
499 OUT_RING(code[I810_TEXREG_MI2]);
500 OUT_RING(code[I810_TEXREG_MI3]);
501
502 for (i = 4; i < I810_TEX_SETUP_SIZE; i++) {
503 tmp = code[i];
504
505 if ((tmp & (7 << 29)) == (3 << 29) &&
506 (tmp & (0x1f << 24)) < (0x1d << 24)) {
507 OUT_RING(tmp);
508 j++;
509 } else
510 printk("texture state dropped!!!\n");
511 }
512
513 if (j & 1)
514 OUT_RING(0);
515
516 ADVANCE_LP_RING();
517 }
518
519 /* Need to do some additional checking when setting the dest buffer.
520 */
521 static void i810EmitDestVerified(struct drm_device *dev,
522 volatile unsigned int *code)
523 {
524 drm_i810_private_t *dev_priv = dev->dev_private;
525 unsigned int tmp;
526 RING_LOCALS;
527
528 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
529
530 tmp = code[I810_DESTREG_DI1];
531 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
532 OUT_RING(CMD_OP_DESTBUFFER_INFO);
533 OUT_RING(tmp);
534 } else
535 DRM_DEBUG("bad di1 %x (allow %x or %x)\n",
536 tmp, dev_priv->front_di1, dev_priv->back_di1);
537
538 /* invarient:
539 */
540 OUT_RING(CMD_OP_Z_BUFFER_INFO);
541 OUT_RING(dev_priv->zi1);
542
543 OUT_RING(GFX_OP_DESTBUFFER_VARS);
544 OUT_RING(code[I810_DESTREG_DV1]);
545
546 OUT_RING(GFX_OP_DRAWRECT_INFO);
547 OUT_RING(code[I810_DESTREG_DR1]);
548 OUT_RING(code[I810_DESTREG_DR2]);
549 OUT_RING(code[I810_DESTREG_DR3]);
550 OUT_RING(code[I810_DESTREG_DR4]);
551 OUT_RING(0);
552
553 ADVANCE_LP_RING();
554 }
555
556 static void i810EmitState(struct drm_device *dev)
557 {
558 drm_i810_private_t *dev_priv = dev->dev_private;
559 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
560 unsigned int dirty = sarea_priv->dirty;
561
562 DRM_DEBUG("%x\n", dirty);
563
564 if (dirty & I810_UPLOAD_BUFFERS) {
565 i810EmitDestVerified(dev, sarea_priv->BufferState);
566 sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS;
567 }
568
569 if (dirty & I810_UPLOAD_CTX) {
570 i810EmitContextVerified(dev, sarea_priv->ContextState);
571 sarea_priv->dirty &= ~I810_UPLOAD_CTX;
572 }
573
574 if (dirty & I810_UPLOAD_TEX0) {
575 i810EmitTexVerified(dev, sarea_priv->TexState[0]);
576 sarea_priv->dirty &= ~I810_UPLOAD_TEX0;
577 }
578
579 if (dirty & I810_UPLOAD_TEX1) {
580 i810EmitTexVerified(dev, sarea_priv->TexState[1]);
581 sarea_priv->dirty &= ~I810_UPLOAD_TEX1;
582 }
583 }
584
585 /* need to verify
586 */
587 static void i810_dma_dispatch_clear(struct drm_device *dev, int flags,
588 unsigned int clear_color,
589 unsigned int clear_zval)
590 {
591 drm_i810_private_t *dev_priv = dev->dev_private;
592 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
593 int nbox = sarea_priv->nbox;
594 struct drm_clip_rect *pbox = sarea_priv->boxes;
595 int pitch = dev_priv->pitch;
596 int cpp = 2;
597 int i;
598 RING_LOCALS;
599
600 if (dev_priv->current_page == 1) {
601 unsigned int tmp = flags;
602
603 flags &= ~(I810_FRONT | I810_BACK);
604 if (tmp & I810_FRONT)
605 flags |= I810_BACK;
606 if (tmp & I810_BACK)
607 flags |= I810_FRONT;
608 }
609
610 i810_kernel_lost_context(dev);
611
612 if (nbox > I810_NR_SAREA_CLIPRECTS)
613 nbox = I810_NR_SAREA_CLIPRECTS;
614
615 for (i = 0; i < nbox; i++, pbox++) {
616 unsigned int x = pbox->x1;
617 unsigned int y = pbox->y1;
618 unsigned int width = (pbox->x2 - x) * cpp;
619 unsigned int height = pbox->y2 - y;
620 unsigned int start = y * pitch + x * cpp;
621
622 if (pbox->x1 > pbox->x2 ||
623 pbox->y1 > pbox->y2 ||
624 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
625 continue;
626
627 if (flags & I810_FRONT) {
628 BEGIN_LP_RING(6);
629 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
630 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
631 OUT_RING((height << 16) | width);
632 OUT_RING(start);
633 OUT_RING(clear_color);
634 OUT_RING(0);
635 ADVANCE_LP_RING();
636 }
637
638 if (flags & I810_BACK) {
639 BEGIN_LP_RING(6);
640 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
641 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
642 OUT_RING((height << 16) | width);
643 OUT_RING(dev_priv->back_offset + start);
644 OUT_RING(clear_color);
645 OUT_RING(0);
646 ADVANCE_LP_RING();
647 }
648
649 if (flags & I810_DEPTH) {
650 BEGIN_LP_RING(6);
651 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
652 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
653 OUT_RING((height << 16) | width);
654 OUT_RING(dev_priv->depth_offset + start);
655 OUT_RING(clear_zval);
656 OUT_RING(0);
657 ADVANCE_LP_RING();
658 }
659 }
660 }
661
662 static void i810_dma_dispatch_swap(struct drm_device *dev)
663 {
664 drm_i810_private_t *dev_priv = dev->dev_private;
665 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
666 int nbox = sarea_priv->nbox;
667 struct drm_clip_rect *pbox = sarea_priv->boxes;
668 int pitch = dev_priv->pitch;
669 int cpp = 2;
670 int i;
671 RING_LOCALS;
672
673 DRM_DEBUG("swapbuffers\n");
674
675 i810_kernel_lost_context(dev);
676
677 if (nbox > I810_NR_SAREA_CLIPRECTS)
678 nbox = I810_NR_SAREA_CLIPRECTS;
679
680 for (i = 0; i < nbox; i++, pbox++) {
681 unsigned int w = pbox->x2 - pbox->x1;
682 unsigned int h = pbox->y2 - pbox->y1;
683 unsigned int dst = pbox->x1 * cpp + pbox->y1 * pitch;
684 unsigned int start = dst;
685
686 if (pbox->x1 > pbox->x2 ||
687 pbox->y1 > pbox->y2 ||
688 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
689 continue;
690
691 BEGIN_LP_RING(6);
692 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4);
693 OUT_RING(pitch | (0xCC << 16));
694 OUT_RING((h << 16) | (w * cpp));
695 if (dev_priv->current_page == 0)
696 OUT_RING(dev_priv->front_offset + start);
697 else
698 OUT_RING(dev_priv->back_offset + start);
699 OUT_RING(pitch);
700 if (dev_priv->current_page == 0)
701 OUT_RING(dev_priv->back_offset + start);
702 else
703 OUT_RING(dev_priv->front_offset + start);
704 ADVANCE_LP_RING();
705 }
706 }
707
708 static void i810_dma_dispatch_vertex(struct drm_device *dev,
709 struct drm_buf *buf, int discard, int used)
710 {
711 drm_i810_private_t *dev_priv = dev->dev_private;
712 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
713 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
714 struct drm_clip_rect *box = sarea_priv->boxes;
715 int nbox = sarea_priv->nbox;
716 unsigned long address = (unsigned long)buf->bus_address;
717 unsigned long start = address - dev->agp->base;
718 int i = 0;
719 RING_LOCALS;
720
721 i810_kernel_lost_context(dev);
722
723 if (nbox > I810_NR_SAREA_CLIPRECTS)
724 nbox = I810_NR_SAREA_CLIPRECTS;
725
726 if (used > 4 * 1024)
727 used = 0;
728
729 if (sarea_priv->dirty)
730 i810EmitState(dev);
731
732 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
733 unsigned int prim = (sarea_priv->vertex_prim & PR_MASK);
734
735 *(u32 *) buf_priv->kernel_virtual =
736 ((GFX_OP_PRIMITIVE | prim | ((used / 4) - 2)));
737
738 if (used & 4) {
739 *(u32 *) ((char *) buf_priv->kernel_virtual + used) = 0;
740 used += 4;
741 }
742
743 i810_unmap_buffer(buf);
744 }
745
746 if (used) {
747 do {
748 if (i < nbox) {
749 BEGIN_LP_RING(4);
750 OUT_RING(GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
751 SC_ENABLE);
752 OUT_RING(GFX_OP_SCISSOR_INFO);
753 OUT_RING(box[i].x1 | (box[i].y1 << 16));
754 OUT_RING((box[i].x2 -
755 1) | ((box[i].y2 - 1) << 16));
756 ADVANCE_LP_RING();
757 }
758
759 BEGIN_LP_RING(4);
760 OUT_RING(CMD_OP_BATCH_BUFFER);
761 OUT_RING(start | BB1_PROTECTED);
762 OUT_RING(start + used - 4);
763 OUT_RING(0);
764 ADVANCE_LP_RING();
765
766 } while (++i < nbox);
767 }
768
769 if (discard) {
770 dev_priv->counter++;
771
772 (void)cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
773 I810_BUF_HARDWARE);
774
775 BEGIN_LP_RING(8);
776 OUT_RING(CMD_STORE_DWORD_IDX);
777 OUT_RING(20);
778 OUT_RING(dev_priv->counter);
779 OUT_RING(CMD_STORE_DWORD_IDX);
780 OUT_RING(buf_priv->my_use_idx);
781 OUT_RING(I810_BUF_FREE);
782 OUT_RING(CMD_REPORT_HEAD);
783 OUT_RING(0);
784 ADVANCE_LP_RING();
785 }
786 }
787
788 static void i810_dma_dispatch_flip(struct drm_device *dev)
789 {
790 drm_i810_private_t *dev_priv = dev->dev_private;
791 int pitch = dev_priv->pitch;
792 RING_LOCALS;
793
794 DRM_DEBUG("page=%d pfCurrentPage=%d\n",
795 dev_priv->current_page,
796 dev_priv->sarea_priv->pf_current_page);
797
798 i810_kernel_lost_context(dev);
799
800 BEGIN_LP_RING(2);
801 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
802 OUT_RING(0);
803 ADVANCE_LP_RING();
804
805 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
806 /* On i815 at least ASYNC is buggy */
807 /* pitch<<5 is from 11.2.8 p158,
808 its the pitch / 8 then left shifted 8,
809 so (pitch >> 3) << 8 */
810 OUT_RING(CMD_OP_FRONTBUFFER_INFO | (pitch << 5) /*| ASYNC_FLIP */ );
811 if (dev_priv->current_page == 0) {
812 OUT_RING(dev_priv->back_offset);
813 dev_priv->current_page = 1;
814 } else {
815 OUT_RING(dev_priv->front_offset);
816 dev_priv->current_page = 0;
817 }
818 OUT_RING(0);
819 ADVANCE_LP_RING();
820
821 BEGIN_LP_RING(2);
822 OUT_RING(CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP);
823 OUT_RING(0);
824 ADVANCE_LP_RING();
825
826 /* Increment the frame counter. The client-side 3D driver must
827 * throttle the framerate by waiting for this value before
828 * performing the swapbuffer ioctl.
829 */
830 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
831
832 }
833
834 static void i810_dma_quiescent(struct drm_device *dev)
835 {
836 drm_i810_private_t *dev_priv = dev->dev_private;
837 RING_LOCALS;
838
839 i810_kernel_lost_context(dev);
840
841 BEGIN_LP_RING(4);
842 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
843 OUT_RING(CMD_REPORT_HEAD);
844 OUT_RING(0);
845 OUT_RING(0);
846 ADVANCE_LP_RING();
847
848 i810_wait_ring(dev, dev_priv->ring.Size - 8);
849 }
850
851 static int i810_flush_queue(struct drm_device *dev)
852 {
853 drm_i810_private_t *dev_priv = dev->dev_private;
854 struct drm_device_dma *dma = dev->dma;
855 int i, ret = 0;
856 RING_LOCALS;
857
858 i810_kernel_lost_context(dev);
859
860 BEGIN_LP_RING(2);
861 OUT_RING(CMD_REPORT_HEAD);
862 OUT_RING(0);
863 ADVANCE_LP_RING();
864
865 i810_wait_ring(dev, dev_priv->ring.Size - 8);
866
867 for (i = 0; i < dma->buf_count; i++) {
868 struct drm_buf *buf = dma->buflist[i];
869 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
870
871 int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
872 I810_BUF_FREE);
873
874 if (used == I810_BUF_HARDWARE)
875 DRM_DEBUG("reclaimed from HARDWARE\n");
876 if (used == I810_BUF_CLIENT)
877 DRM_DEBUG("still on client\n");
878 }
879
880 return ret;
881 }
882
883 /* Must be called with the lock held */
884 void i810_driver_reclaim_buffers(struct drm_device *dev,
885 struct drm_file *file_priv)
886 {
887 struct drm_device_dma *dma = dev->dma;
888 int i;
889
890 if (!dma)
891 return;
892 if (!dev->dev_private)
893 return;
894 if (!dma->buflist)
895 return;
896
897 i810_flush_queue(dev);
898
899 for (i = 0; i < dma->buf_count; i++) {
900 struct drm_buf *buf = dma->buflist[i];
901 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
902
903 if (buf->file_priv == file_priv && buf_priv) {
904 int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
905 I810_BUF_FREE);
906
907 if (used == I810_BUF_CLIENT)
908 DRM_DEBUG("reclaimed from client\n");
909 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
910 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
911 }
912 }
913 }
914
915 static int i810_flush_ioctl(struct drm_device *dev, void *data,
916 struct drm_file *file_priv)
917 {
918 LOCK_TEST_WITH_RETURN(dev, file_priv);
919
920 i810_flush_queue(dev);
921 return 0;
922 }
923
924 static int i810_dma_vertex(struct drm_device *dev, void *data,
925 struct drm_file *file_priv)
926 {
927 struct drm_device_dma *dma = dev->dma;
928 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
929 u32 *hw_status = dev_priv->hw_status_page;
930 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
931 dev_priv->sarea_priv;
932 drm_i810_vertex_t *vertex = data;
933
934 LOCK_TEST_WITH_RETURN(dev, file_priv);
935
936 DRM_DEBUG("idx %d used %d discard %d\n",
937 vertex->idx, vertex->used, vertex->discard);
938
939 if (vertex->idx < 0 || vertex->idx > dma->buf_count)
940 return -EINVAL;
941
942 i810_dma_dispatch_vertex(dev,
943 dma->buflist[vertex->idx],
944 vertex->discard, vertex->used);
945
946 atomic_add(vertex->used, &dev->counts[_DRM_STAT_SECONDARY]);
947 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
948 sarea_priv->last_enqueue = dev_priv->counter - 1;
949 sarea_priv->last_dispatch = (int)hw_status[5];
950
951 return 0;
952 }
953
954 static int i810_clear_bufs(struct drm_device *dev, void *data,
955 struct drm_file *file_priv)
956 {
957 drm_i810_clear_t *clear = data;
958
959 LOCK_TEST_WITH_RETURN(dev, file_priv);
960
961 /* GH: Someone's doing nasty things... */
962 if (!dev->dev_private)
963 return -EINVAL;
964
965 i810_dma_dispatch_clear(dev, clear->flags,
966 clear->clear_color, clear->clear_depth);
967 return 0;
968 }
969
970 static int i810_swap_bufs(struct drm_device *dev, void *data,
971 struct drm_file *file_priv)
972 {
973 DRM_DEBUG("\n");
974
975 LOCK_TEST_WITH_RETURN(dev, file_priv);
976
977 i810_dma_dispatch_swap(dev);
978 return 0;
979 }
980
981 static int i810_getage(struct drm_device *dev, void *data,
982 struct drm_file *file_priv)
983 {
984 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
985 u32 *hw_status = dev_priv->hw_status_page;
986 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
987 dev_priv->sarea_priv;
988
989 sarea_priv->last_dispatch = (int)hw_status[5];
990 return 0;
991 }
992
993 static int i810_getbuf(struct drm_device *dev, void *data,
994 struct drm_file *file_priv)
995 {
996 int retcode = 0;
997 drm_i810_dma_t *d = data;
998 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
999 u32 *hw_status = dev_priv->hw_status_page;
1000 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1001 dev_priv->sarea_priv;
1002
1003 LOCK_TEST_WITH_RETURN(dev, file_priv);
1004
1005 d->granted = 0;
1006
1007 retcode = i810_dma_get_buffer(dev, d, file_priv);
1008
1009 DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n",
1010 task_pid_nr(current), retcode, d->granted);
1011
1012 sarea_priv->last_dispatch = (int)hw_status[5];
1013
1014 return retcode;
1015 }
1016
1017 static int i810_copybuf(struct drm_device *dev, void *data,
1018 struct drm_file *file_priv)
1019 {
1020 /* Never copy - 2.4.x doesn't need it */
1021 return 0;
1022 }
1023
1024 static int i810_docopy(struct drm_device *dev, void *data,
1025 struct drm_file *file_priv)
1026 {
1027 /* Never copy - 2.4.x doesn't need it */
1028 return 0;
1029 }
1030
1031 static void i810_dma_dispatch_mc(struct drm_device *dev, struct drm_buf *buf, int used,
1032 unsigned int last_render)
1033 {
1034 drm_i810_private_t *dev_priv = dev->dev_private;
1035 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1036 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1037 unsigned long address = (unsigned long)buf->bus_address;
1038 unsigned long start = address - dev->agp->base;
1039 int u;
1040 RING_LOCALS;
1041
1042 i810_kernel_lost_context(dev);
1043
1044 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE);
1045 if (u != I810_BUF_CLIENT)
1046 DRM_DEBUG("MC found buffer that isn't mine!\n");
1047
1048 if (used > 4 * 1024)
1049 used = 0;
1050
1051 sarea_priv->dirty = 0x7f;
1052
1053 DRM_DEBUG("addr 0x%lx, used 0x%x\n", address, used);
1054
1055 dev_priv->counter++;
1056 DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1057 DRM_DEBUG("start : %lx\n", start);
1058 DRM_DEBUG("used : %d\n", used);
1059 DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
1060
1061 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
1062 if (used & 4) {
1063 *(u32 *) ((char *) buf_priv->virtual + used) = 0;
1064 used += 4;
1065 }
1066
1067 i810_unmap_buffer(buf);
1068 }
1069 BEGIN_LP_RING(4);
1070 OUT_RING(CMD_OP_BATCH_BUFFER);
1071 OUT_RING(start | BB1_PROTECTED);
1072 OUT_RING(start + used - 4);
1073 OUT_RING(0);
1074 ADVANCE_LP_RING();
1075
1076 BEGIN_LP_RING(8);
1077 OUT_RING(CMD_STORE_DWORD_IDX);
1078 OUT_RING(buf_priv->my_use_idx);
1079 OUT_RING(I810_BUF_FREE);
1080 OUT_RING(0);
1081
1082 OUT_RING(CMD_STORE_DWORD_IDX);
1083 OUT_RING(16);
1084 OUT_RING(last_render);
1085 OUT_RING(0);
1086 ADVANCE_LP_RING();
1087 }
1088
1089 static int i810_dma_mc(struct drm_device *dev, void *data,
1090 struct drm_file *file_priv)
1091 {
1092 struct drm_device_dma *dma = dev->dma;
1093 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1094 u32 *hw_status = dev_priv->hw_status_page;
1095 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1096 dev_priv->sarea_priv;
1097 drm_i810_mc_t *mc = data;
1098
1099 LOCK_TEST_WITH_RETURN(dev, file_priv);
1100
1101 if (mc->idx >= dma->buf_count || mc->idx < 0)
1102 return -EINVAL;
1103
1104 i810_dma_dispatch_mc(dev, dma->buflist[mc->idx], mc->used,
1105 mc->last_render);
1106
1107 atomic_add(mc->used, &dev->counts[_DRM_STAT_SECONDARY]);
1108 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
1109 sarea_priv->last_enqueue = dev_priv->counter - 1;
1110 sarea_priv->last_dispatch = (int)hw_status[5];
1111
1112 return 0;
1113 }
1114
1115 static int i810_rstatus(struct drm_device *dev, void *data,
1116 struct drm_file *file_priv)
1117 {
1118 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1119
1120 return (int)(((u32 *) (dev_priv->hw_status_page))[4]);
1121 }
1122
1123 static int i810_ov0_info(struct drm_device *dev, void *data,
1124 struct drm_file *file_priv)
1125 {
1126 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1127 drm_i810_overlay_t *ov = data;
1128
1129 ov->offset = dev_priv->overlay_offset;
1130 ov->physical = dev_priv->overlay_physical;
1131
1132 return 0;
1133 }
1134
1135 static int i810_fstatus(struct drm_device *dev, void *data,
1136 struct drm_file *file_priv)
1137 {
1138 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1139
1140 LOCK_TEST_WITH_RETURN(dev, file_priv);
1141 return I810_READ(0x30008);
1142 }
1143
1144 static int i810_ov0_flip(struct drm_device *dev, void *data,
1145 struct drm_file *file_priv)
1146 {
1147 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1148
1149 LOCK_TEST_WITH_RETURN(dev, file_priv);
1150
1151 /* Tell the overlay to update */
1152 I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000);
1153
1154 return 0;
1155 }
1156
1157 /* Not sure why this isn't set all the time:
1158 */
1159 static void i810_do_init_pageflip(struct drm_device *dev)
1160 {
1161 drm_i810_private_t *dev_priv = dev->dev_private;
1162
1163 DRM_DEBUG("\n");
1164 dev_priv->page_flipping = 1;
1165 dev_priv->current_page = 0;
1166 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1167 }
1168
1169 static int i810_do_cleanup_pageflip(struct drm_device *dev)
1170 {
1171 drm_i810_private_t *dev_priv = dev->dev_private;
1172
1173 DRM_DEBUG("\n");
1174 if (dev_priv->current_page != 0)
1175 i810_dma_dispatch_flip(dev);
1176
1177 dev_priv->page_flipping = 0;
1178 return 0;
1179 }
1180
1181 static int i810_flip_bufs(struct drm_device *dev, void *data,
1182 struct drm_file *file_priv)
1183 {
1184 drm_i810_private_t *dev_priv = dev->dev_private;
1185
1186 DRM_DEBUG("\n");
1187
1188 LOCK_TEST_WITH_RETURN(dev, file_priv);
1189
1190 if (!dev_priv->page_flipping)
1191 i810_do_init_pageflip(dev);
1192
1193 i810_dma_dispatch_flip(dev);
1194 return 0;
1195 }
1196
1197 int i810_driver_load(struct drm_device *dev, unsigned long flags)
1198 {
1199 /* i810 has 4 more counters */
1200 dev->counters += 4;
1201 dev->types[6] = _DRM_STAT_IRQ;
1202 dev->types[7] = _DRM_STAT_PRIMARY;
1203 dev->types[8] = _DRM_STAT_SECONDARY;
1204 dev->types[9] = _DRM_STAT_DMA;
1205
1206 pci_set_master(dev->pdev);
1207
1208 return 0;
1209 }
1210
1211 void i810_driver_lastclose(struct drm_device *dev)
1212 {
1213 i810_dma_cleanup(dev);
1214 }
1215
1216 void i810_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
1217 {
1218 if (dev->dev_private) {
1219 drm_i810_private_t *dev_priv = dev->dev_private;
1220 if (dev_priv->page_flipping)
1221 i810_do_cleanup_pageflip(dev);
1222 }
1223
1224 if (file_priv->master && file_priv->master->lock.hw_lock) {
1225 drm_idlelock_take(&file_priv->master->lock);
1226 i810_driver_reclaim_buffers(dev, file_priv);
1227 drm_idlelock_release(&file_priv->master->lock);
1228 } else {
1229 /* master disappeared, clean up stuff anyway and hope nothing
1230 * goes wrong */
1231 i810_driver_reclaim_buffers(dev, file_priv);
1232 }
1233
1234 }
1235
1236 int i810_driver_dma_quiescent(struct drm_device *dev)
1237 {
1238 i810_dma_quiescent(dev);
1239 return 0;
1240 }
1241
1242 struct drm_ioctl_desc i810_ioctls[] = {
1243 DRM_IOCTL_DEF_DRV(I810_INIT, i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1244 DRM_IOCTL_DEF_DRV(I810_VERTEX, i810_dma_vertex, DRM_AUTH|DRM_UNLOCKED),
1245 DRM_IOCTL_DEF_DRV(I810_CLEAR, i810_clear_bufs, DRM_AUTH|DRM_UNLOCKED),
1246 DRM_IOCTL_DEF_DRV(I810_FLUSH, i810_flush_ioctl, DRM_AUTH|DRM_UNLOCKED),
1247 DRM_IOCTL_DEF_DRV(I810_GETAGE, i810_getage, DRM_AUTH|DRM_UNLOCKED),
1248 DRM_IOCTL_DEF_DRV(I810_GETBUF, i810_getbuf, DRM_AUTH|DRM_UNLOCKED),
1249 DRM_IOCTL_DEF_DRV(I810_SWAP, i810_swap_bufs, DRM_AUTH|DRM_UNLOCKED),
1250 DRM_IOCTL_DEF_DRV(I810_COPY, i810_copybuf, DRM_AUTH|DRM_UNLOCKED),
1251 DRM_IOCTL_DEF_DRV(I810_DOCOPY, i810_docopy, DRM_AUTH|DRM_UNLOCKED),
1252 DRM_IOCTL_DEF_DRV(I810_OV0INFO, i810_ov0_info, DRM_AUTH|DRM_UNLOCKED),
1253 DRM_IOCTL_DEF_DRV(I810_FSTATUS, i810_fstatus, DRM_AUTH|DRM_UNLOCKED),
1254 DRM_IOCTL_DEF_DRV(I810_OV0FLIP, i810_ov0_flip, DRM_AUTH|DRM_UNLOCKED),
1255 DRM_IOCTL_DEF_DRV(I810_MC, i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1256 DRM_IOCTL_DEF_DRV(I810_RSTATUS, i810_rstatus, DRM_AUTH|DRM_UNLOCKED),
1257 DRM_IOCTL_DEF_DRV(I810_FLIP, i810_flip_bufs, DRM_AUTH|DRM_UNLOCKED),
1258 };
1259
1260 int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls);
1261
1262 /**
1263 * Determine if the device really is AGP or not.
1264 *
1265 * All Intel graphics chipsets are treated as AGP, even if they are really
1266 * PCI-e.
1267 *
1268 * \param dev The device to be tested.
1269 *
1270 * \returns
1271 * A value of 1 is always retured to indictate every i810 is AGP.
1272 */
1273 int i810_driver_device_is_agp(struct drm_device *dev)
1274 {
1275 return 1;
1276 }
Linux kernel - Deliverables
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