1 /* i830_dma.c -- DMA support for the I830 -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
27 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
30 * Abraham vd Merwe <abraham@2d3d.co.za>
38 #include <linux/interrupt.h> /* For task queue support */
39 #include <linux/smp_lock.h>
40 #include <linux/pagemap.h>
41 #include <linux/delay.h>
42 #include <linux/slab.h>
43 #include <asm/uaccess.h>
45 #define I830_BUF_FREE 2
46 #define I830_BUF_CLIENT 1
47 #define I830_BUF_HARDWARE 0
49 #define I830_BUF_UNMAPPED 0
50 #define I830_BUF_MAPPED 1
52 static struct drm_buf
*i830_freelist_get(struct drm_device
* dev
)
54 struct drm_device_dma
*dma
= dev
->dma
;
58 /* Linear search might not be the best solution */
60 for (i
= 0; i
< dma
->buf_count
; i
++) {
61 struct drm_buf
*buf
= dma
->buflist
[i
];
62 drm_i830_buf_priv_t
*buf_priv
= buf
->dev_private
;
63 /* In use is already a pointer */
64 used
= cmpxchg(buf_priv
->in_use
, I830_BUF_FREE
,
66 if (used
== I830_BUF_FREE
)
72 /* This should only be called if the buffer is not sent to the hardware
73 * yet, the hardware updates in use for us once its on the ring buffer.
76 static int i830_freelist_put(struct drm_device
*dev
, struct drm_buf
*buf
)
78 drm_i830_buf_priv_t
*buf_priv
= buf
->dev_private
;
81 /* In use is already a pointer */
82 used
= cmpxchg(buf_priv
->in_use
, I830_BUF_CLIENT
, I830_BUF_FREE
);
83 if (used
!= I830_BUF_CLIENT
) {
84 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf
->idx
);
91 static int i830_mmap_buffers(struct file
*filp
, struct vm_area_struct
*vma
)
93 struct drm_file
*priv
= filp
->private_data
;
94 struct drm_device
*dev
;
95 drm_i830_private_t
*dev_priv
;
97 drm_i830_buf_priv_t
*buf_priv
;
100 dev
= priv
->minor
->dev
;
101 dev_priv
= dev
->dev_private
;
102 buf
= dev_priv
->mmap_buffer
;
103 buf_priv
= buf
->dev_private
;
105 vma
->vm_flags
|= (VM_IO
| VM_DONTCOPY
);
108 buf_priv
->currently_mapped
= I830_BUF_MAPPED
;
111 if (io_remap_pfn_range(vma
, vma
->vm_start
,
113 vma
->vm_end
- vma
->vm_start
, vma
->vm_page_prot
))
118 static const struct file_operations i830_buffer_fops
= {
120 .release
= drm_release
,
121 .unlocked_ioctl
= drm_ioctl
,
122 .mmap
= i830_mmap_buffers
,
123 .fasync
= drm_fasync
,
124 .llseek
= noop_llseek
,
127 static int i830_map_buffer(struct drm_buf
*buf
, struct drm_file
*file_priv
)
129 struct drm_device
*dev
= file_priv
->minor
->dev
;
130 drm_i830_buf_priv_t
*buf_priv
= buf
->dev_private
;
131 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
132 const struct file_operations
*old_fops
;
133 unsigned long virtual;
136 if (buf_priv
->currently_mapped
== I830_BUF_MAPPED
)
139 down_write(¤t
->mm
->mmap_sem
);
140 old_fops
= file_priv
->filp
->f_op
;
141 file_priv
->filp
->f_op
= &i830_buffer_fops
;
142 dev_priv
->mmap_buffer
= buf
;
143 virtual = do_mmap(file_priv
->filp
, 0, buf
->total
, PROT_READ
| PROT_WRITE
,
144 MAP_SHARED
, buf
->bus_address
);
145 dev_priv
->mmap_buffer
= NULL
;
146 file_priv
->filp
->f_op
= old_fops
;
147 if (IS_ERR((void *)virtual)) { /* ugh */
149 DRM_ERROR("mmap error\n");
150 retcode
= PTR_ERR((void *)virtual);
151 buf_priv
->virtual = NULL
;
153 buf_priv
->virtual = (void __user
*)virtual;
155 up_write(¤t
->mm
->mmap_sem
);
160 static int i830_unmap_buffer(struct drm_buf
*buf
)
162 drm_i830_buf_priv_t
*buf_priv
= buf
->dev_private
;
165 if (buf_priv
->currently_mapped
!= I830_BUF_MAPPED
)
168 down_write(¤t
->mm
->mmap_sem
);
169 retcode
= do_munmap(current
->mm
,
170 (unsigned long)buf_priv
->virtual,
171 (size_t) buf
->total
);
172 up_write(¤t
->mm
->mmap_sem
);
174 buf_priv
->currently_mapped
= I830_BUF_UNMAPPED
;
175 buf_priv
->virtual = NULL
;
180 static int i830_dma_get_buffer(struct drm_device
*dev
, drm_i830_dma_t
*d
,
181 struct drm_file
*file_priv
)
184 drm_i830_buf_priv_t
*buf_priv
;
187 buf
= i830_freelist_get(dev
);
190 DRM_DEBUG("retcode=%d\n", retcode
);
194 retcode
= i830_map_buffer(buf
, file_priv
);
196 i830_freelist_put(dev
, buf
);
197 DRM_ERROR("mapbuf failed, retcode %d\n", retcode
);
200 buf
->file_priv
= file_priv
;
201 buf_priv
= buf
->dev_private
;
203 d
->request_idx
= buf
->idx
;
204 d
->request_size
= buf
->total
;
205 d
->virtual = buf_priv
->virtual;
210 static int i830_dma_cleanup(struct drm_device
*dev
)
212 struct drm_device_dma
*dma
= dev
->dma
;
214 /* Make sure interrupts are disabled here because the uninstall ioctl
215 * may not have been called from userspace and after dev_private
216 * is freed, it's too late.
218 if (dev
->irq_enabled
)
219 drm_irq_uninstall(dev
);
221 if (dev
->dev_private
) {
223 drm_i830_private_t
*dev_priv
=
224 (drm_i830_private_t
*) dev
->dev_private
;
226 if (dev_priv
->ring
.virtual_start
)
227 drm_core_ioremapfree(&dev_priv
->ring
.map
, dev
);
228 if (dev_priv
->hw_status_page
) {
229 pci_free_consistent(dev
->pdev
, PAGE_SIZE
,
230 dev_priv
->hw_status_page
,
231 dev_priv
->dma_status_page
);
232 /* Need to rewrite hardware status page */
233 I830_WRITE(0x02080, 0x1ffff000);
236 kfree(dev
->dev_private
);
237 dev
->dev_private
= NULL
;
239 for (i
= 0; i
< dma
->buf_count
; i
++) {
240 struct drm_buf
*buf
= dma
->buflist
[i
];
241 drm_i830_buf_priv_t
*buf_priv
= buf
->dev_private
;
242 if (buf_priv
->kernel_virtual
&& buf
->total
)
243 drm_core_ioremapfree(&buf_priv
->map
, dev
);
249 int i830_wait_ring(struct drm_device
*dev
, int n
, const char *caller
)
251 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
252 drm_i830_ring_buffer_t
*ring
= &(dev_priv
->ring
);
255 unsigned int last_head
= I830_READ(LP_RING
+ RING_HEAD
) & HEAD_ADDR
;
257 end
= jiffies
+ (HZ
* 3);
258 while (ring
->space
< n
) {
259 ring
->head
= I830_READ(LP_RING
+ RING_HEAD
) & HEAD_ADDR
;
260 ring
->space
= ring
->head
- (ring
->tail
+ 8);
262 ring
->space
+= ring
->Size
;
264 if (ring
->head
!= last_head
) {
265 end
= jiffies
+ (HZ
* 3);
266 last_head
= ring
->head
;
270 if (time_before(end
, jiffies
)) {
271 DRM_ERROR("space: %d wanted %d\n", ring
->space
, n
);
272 DRM_ERROR("lockup\n");
276 dev_priv
->sarea_priv
->perf_boxes
|= I830_BOX_WAIT
;
283 static void i830_kernel_lost_context(struct drm_device
*dev
)
285 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
286 drm_i830_ring_buffer_t
*ring
= &(dev_priv
->ring
);
288 ring
->head
= I830_READ(LP_RING
+ RING_HEAD
) & HEAD_ADDR
;
289 ring
->tail
= I830_READ(LP_RING
+ RING_TAIL
) & TAIL_ADDR
;
290 ring
->space
= ring
->head
- (ring
->tail
+ 8);
292 ring
->space
+= ring
->Size
;
294 if (ring
->head
== ring
->tail
)
295 dev_priv
->sarea_priv
->perf_boxes
|= I830_BOX_RING_EMPTY
;
298 static int i830_freelist_init(struct drm_device
*dev
, drm_i830_private_t
*dev_priv
)
300 struct drm_device_dma
*dma
= dev
->dma
;
302 u32
*hw_status
= (u32
*) (dev_priv
->hw_status_page
+ my_idx
);
305 if (dma
->buf_count
> 1019) {
306 /* Not enough space in the status page for the freelist */
310 for (i
= 0; i
< dma
->buf_count
; i
++) {
311 struct drm_buf
*buf
= dma
->buflist
[i
];
312 drm_i830_buf_priv_t
*buf_priv
= buf
->dev_private
;
314 buf_priv
->in_use
= hw_status
++;
315 buf_priv
->my_use_idx
= my_idx
;
318 *buf_priv
->in_use
= I830_BUF_FREE
;
320 buf_priv
->map
.offset
= buf
->bus_address
;
321 buf_priv
->map
.size
= buf
->total
;
322 buf_priv
->map
.type
= _DRM_AGP
;
323 buf_priv
->map
.flags
= 0;
324 buf_priv
->map
.mtrr
= 0;
326 drm_core_ioremap(&buf_priv
->map
, dev
);
327 buf_priv
->kernel_virtual
= buf_priv
->map
.handle
;
332 static int i830_dma_initialize(struct drm_device
*dev
,
333 drm_i830_private_t
*dev_priv
,
334 drm_i830_init_t
*init
)
336 struct drm_map_list
*r_list
;
338 memset(dev_priv
, 0, sizeof(drm_i830_private_t
));
340 list_for_each_entry(r_list
, &dev
->maplist
, head
) {
342 r_list
->map
->type
== _DRM_SHM
&&
343 r_list
->map
->flags
& _DRM_CONTAINS_LOCK
) {
344 dev_priv
->sarea_map
= r_list
->map
;
349 if (!dev_priv
->sarea_map
) {
350 dev
->dev_private
= (void *)dev_priv
;
351 i830_dma_cleanup(dev
);
352 DRM_ERROR("can not find sarea!\n");
355 dev_priv
->mmio_map
= drm_core_findmap(dev
, init
->mmio_offset
);
356 if (!dev_priv
->mmio_map
) {
357 dev
->dev_private
= (void *)dev_priv
;
358 i830_dma_cleanup(dev
);
359 DRM_ERROR("can not find mmio map!\n");
362 dev
->agp_buffer_token
= init
->buffers_offset
;
363 dev
->agp_buffer_map
= drm_core_findmap(dev
, init
->buffers_offset
);
364 if (!dev
->agp_buffer_map
) {
365 dev
->dev_private
= (void *)dev_priv
;
366 i830_dma_cleanup(dev
);
367 DRM_ERROR("can not find dma buffer map!\n");
371 dev_priv
->sarea_priv
= (drm_i830_sarea_t
*)
372 ((u8
*) dev_priv
->sarea_map
->handle
+ init
->sarea_priv_offset
);
374 dev_priv
->ring
.Start
= init
->ring_start
;
375 dev_priv
->ring
.End
= init
->ring_end
;
376 dev_priv
->ring
.Size
= init
->ring_size
;
378 dev_priv
->ring
.map
.offset
= dev
->agp
->base
+ init
->ring_start
;
379 dev_priv
->ring
.map
.size
= init
->ring_size
;
380 dev_priv
->ring
.map
.type
= _DRM_AGP
;
381 dev_priv
->ring
.map
.flags
= 0;
382 dev_priv
->ring
.map
.mtrr
= 0;
384 drm_core_ioremap(&dev_priv
->ring
.map
, dev
);
386 if (dev_priv
->ring
.map
.handle
== NULL
) {
387 dev
->dev_private
= (void *)dev_priv
;
388 i830_dma_cleanup(dev
);
389 DRM_ERROR("can not ioremap virtual address for"
394 dev_priv
->ring
.virtual_start
= dev_priv
->ring
.map
.handle
;
396 dev_priv
->ring
.tail_mask
= dev_priv
->ring
.Size
- 1;
398 dev_priv
->w
= init
->w
;
399 dev_priv
->h
= init
->h
;
400 dev_priv
->pitch
= init
->pitch
;
401 dev_priv
->back_offset
= init
->back_offset
;
402 dev_priv
->depth_offset
= init
->depth_offset
;
403 dev_priv
->front_offset
= init
->front_offset
;
405 dev_priv
->front_di1
= init
->front_offset
| init
->pitch_bits
;
406 dev_priv
->back_di1
= init
->back_offset
| init
->pitch_bits
;
407 dev_priv
->zi1
= init
->depth_offset
| init
->pitch_bits
;
409 DRM_DEBUG("front_di1 %x\n", dev_priv
->front_di1
);
410 DRM_DEBUG("back_offset %x\n", dev_priv
->back_offset
);
411 DRM_DEBUG("back_di1 %x\n", dev_priv
->back_di1
);
412 DRM_DEBUG("pitch_bits %x\n", init
->pitch_bits
);
414 dev_priv
->cpp
= init
->cpp
;
415 /* We are using separate values as placeholders for mechanisms for
416 * private backbuffer/depthbuffer usage.
419 dev_priv
->back_pitch
= init
->back_pitch
;
420 dev_priv
->depth_pitch
= init
->depth_pitch
;
421 dev_priv
->do_boxes
= 0;
422 dev_priv
->use_mi_batchbuffer_start
= 0;
424 /* Program Hardware Status Page */
425 dev_priv
->hw_status_page
=
426 pci_alloc_consistent(dev
->pdev
, PAGE_SIZE
,
427 &dev_priv
->dma_status_page
);
428 if (!dev_priv
->hw_status_page
) {
429 dev
->dev_private
= (void *)dev_priv
;
430 i830_dma_cleanup(dev
);
431 DRM_ERROR("Can not allocate hardware status page\n");
434 memset(dev_priv
->hw_status_page
, 0, PAGE_SIZE
);
435 DRM_DEBUG("hw status page @ %p\n", dev_priv
->hw_status_page
);
437 I830_WRITE(0x02080, dev_priv
->dma_status_page
);
438 DRM_DEBUG("Enabled hardware status page\n");
440 /* Now we need to init our freelist */
441 if (i830_freelist_init(dev
, dev_priv
) != 0) {
442 dev
->dev_private
= (void *)dev_priv
;
443 i830_dma_cleanup(dev
);
444 DRM_ERROR("Not enough space in the status page for"
448 dev
->dev_private
= (void *)dev_priv
;
453 static int i830_dma_init(struct drm_device
*dev
, void *data
,
454 struct drm_file
*file_priv
)
456 drm_i830_private_t
*dev_priv
;
457 drm_i830_init_t
*init
= data
;
460 switch (init
->func
) {
462 dev_priv
= kmalloc(sizeof(drm_i830_private_t
), GFP_KERNEL
);
463 if (dev_priv
== NULL
)
465 retcode
= i830_dma_initialize(dev
, dev_priv
, init
);
467 case I830_CLEANUP_DMA
:
468 retcode
= i830_dma_cleanup(dev
);
478 #define GFX_OP_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16))
479 #define ST1_ENABLE (1<<16)
480 #define ST1_MASK (0xffff)
482 /* Most efficient way to verify state for the i830 is as it is
483 * emitted. Non-conformant state is silently dropped.
485 static void i830EmitContextVerified(struct drm_device
*dev
, unsigned int *code
)
487 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
492 BEGIN_LP_RING(I830_CTX_SETUP_SIZE
+ 4);
494 for (i
= 0; i
< I830_CTXREG_BLENDCOLR0
; i
++) {
496 if ((tmp
& (7 << 29)) == CMD_3D
&&
497 (tmp
& (0x1f << 24)) < (0x1d << 24)) {
501 DRM_ERROR("Skipping %d\n", i
);
505 OUT_RING(STATE3D_CONST_BLEND_COLOR_CMD
);
506 OUT_RING(code
[I830_CTXREG_BLENDCOLR
]);
509 for (i
= I830_CTXREG_VF
; i
< I830_CTXREG_MCSB0
; i
++) {
511 if ((tmp
& (7 << 29)) == CMD_3D
&&
512 (tmp
& (0x1f << 24)) < (0x1d << 24)) {
516 DRM_ERROR("Skipping %d\n", i
);
520 OUT_RING(STATE3D_MAP_COORD_SETBIND_CMD
);
521 OUT_RING(code
[I830_CTXREG_MCSB1
]);
530 static void i830EmitTexVerified(struct drm_device
*dev
, unsigned int *code
)
532 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
537 if (code
[I830_TEXREG_MI0
] == GFX_OP_MAP_INFO
||
538 (code
[I830_TEXREG_MI0
] & ~(0xf * LOAD_TEXTURE_MAP0
)) ==
539 (STATE3D_LOAD_STATE_IMMEDIATE_2
| 4)) {
541 BEGIN_LP_RING(I830_TEX_SETUP_SIZE
);
543 OUT_RING(code
[I830_TEXREG_MI0
]); /* TM0LI */
544 OUT_RING(code
[I830_TEXREG_MI1
]); /* TM0S0 */
545 OUT_RING(code
[I830_TEXREG_MI2
]); /* TM0S1 */
546 OUT_RING(code
[I830_TEXREG_MI3
]); /* TM0S2 */
547 OUT_RING(code
[I830_TEXREG_MI4
]); /* TM0S3 */
548 OUT_RING(code
[I830_TEXREG_MI5
]); /* TM0S4 */
550 for (i
= 6; i
< I830_TEX_SETUP_SIZE
; i
++) {
561 printk("rejected packet %x\n", code
[0]);
564 static void i830EmitTexBlendVerified(struct drm_device
*dev
,
565 unsigned int *code
, unsigned int num
)
567 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
575 BEGIN_LP_RING(num
+ 1);
577 for (i
= 0; i
< num
; i
++) {
589 static void i830EmitTexPalette(struct drm_device
*dev
,
590 unsigned int *palette
, int number
, int is_shared
)
592 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
600 if (is_shared
== 1) {
601 OUT_RING(CMD_OP_MAP_PALETTE_LOAD
|
602 MAP_PALETTE_NUM(0) | MAP_PALETTE_BOTH
);
604 OUT_RING(CMD_OP_MAP_PALETTE_LOAD
| MAP_PALETTE_NUM(number
));
606 for (i
= 0; i
< 256; i
++)
607 OUT_RING(palette
[i
]);
609 /* KW: WHERE IS THE ADVANCE_LP_RING? This is effectively a noop!
613 /* Need to do some additional checking when setting the dest buffer.
615 static void i830EmitDestVerified(struct drm_device
*dev
, unsigned int *code
)
617 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
621 BEGIN_LP_RING(I830_DEST_SETUP_SIZE
+ 10);
623 tmp
= code
[I830_DESTREG_CBUFADDR
];
624 if (tmp
== dev_priv
->front_di1
|| tmp
== dev_priv
->back_di1
) {
625 if (((int)outring
) & 8) {
630 OUT_RING(CMD_OP_DESTBUFFER_INFO
);
631 OUT_RING(BUF_3D_ID_COLOR_BACK
|
632 BUF_3D_PITCH(dev_priv
->back_pitch
* dev_priv
->cpp
) |
637 OUT_RING(CMD_OP_DESTBUFFER_INFO
);
638 OUT_RING(BUF_3D_ID_DEPTH
| BUF_3D_USE_FENCE
|
639 BUF_3D_PITCH(dev_priv
->depth_pitch
* dev_priv
->cpp
));
640 OUT_RING(dev_priv
->zi1
);
643 DRM_ERROR("bad di1 %x (allow %x or %x)\n",
644 tmp
, dev_priv
->front_di1
, dev_priv
->back_di1
);
650 OUT_RING(GFX_OP_DESTBUFFER_VARS
);
651 OUT_RING(code
[I830_DESTREG_DV1
]);
653 OUT_RING(GFX_OP_DRAWRECT_INFO
);
654 OUT_RING(code
[I830_DESTREG_DR1
]);
655 OUT_RING(code
[I830_DESTREG_DR2
]);
656 OUT_RING(code
[I830_DESTREG_DR3
]);
657 OUT_RING(code
[I830_DESTREG_DR4
]);
659 /* Need to verify this */
660 tmp
= code
[I830_DESTREG_SENABLE
];
661 if ((tmp
& ~0x3) == GFX_OP_SCISSOR_ENABLE
) {
664 DRM_ERROR("bad scissor enable\n");
668 OUT_RING(GFX_OP_SCISSOR_RECT
);
669 OUT_RING(code
[I830_DESTREG_SR1
]);
670 OUT_RING(code
[I830_DESTREG_SR2
]);
676 static void i830EmitStippleVerified(struct drm_device
*dev
, unsigned int *code
)
678 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
682 OUT_RING(GFX_OP_STIPPLE
);
687 static void i830EmitState(struct drm_device
*dev
)
689 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
690 drm_i830_sarea_t
*sarea_priv
= dev_priv
->sarea_priv
;
691 unsigned int dirty
= sarea_priv
->dirty
;
693 DRM_DEBUG("%s %x\n", __func__
, dirty
);
695 if (dirty
& I830_UPLOAD_BUFFERS
) {
696 i830EmitDestVerified(dev
, sarea_priv
->BufferState
);
697 sarea_priv
->dirty
&= ~I830_UPLOAD_BUFFERS
;
700 if (dirty
& I830_UPLOAD_CTX
) {
701 i830EmitContextVerified(dev
, sarea_priv
->ContextState
);
702 sarea_priv
->dirty
&= ~I830_UPLOAD_CTX
;
705 if (dirty
& I830_UPLOAD_TEX0
) {
706 i830EmitTexVerified(dev
, sarea_priv
->TexState
[0]);
707 sarea_priv
->dirty
&= ~I830_UPLOAD_TEX0
;
710 if (dirty
& I830_UPLOAD_TEX1
) {
711 i830EmitTexVerified(dev
, sarea_priv
->TexState
[1]);
712 sarea_priv
->dirty
&= ~I830_UPLOAD_TEX1
;
715 if (dirty
& I830_UPLOAD_TEXBLEND0
) {
716 i830EmitTexBlendVerified(dev
, sarea_priv
->TexBlendState
[0],
717 sarea_priv
->TexBlendStateWordsUsed
[0]);
718 sarea_priv
->dirty
&= ~I830_UPLOAD_TEXBLEND0
;
721 if (dirty
& I830_UPLOAD_TEXBLEND1
) {
722 i830EmitTexBlendVerified(dev
, sarea_priv
->TexBlendState
[1],
723 sarea_priv
->TexBlendStateWordsUsed
[1]);
724 sarea_priv
->dirty
&= ~I830_UPLOAD_TEXBLEND1
;
727 if (dirty
& I830_UPLOAD_TEX_PALETTE_SHARED
) {
728 i830EmitTexPalette(dev
, sarea_priv
->Palette
[0], 0, 1);
730 if (dirty
& I830_UPLOAD_TEX_PALETTE_N(0)) {
731 i830EmitTexPalette(dev
, sarea_priv
->Palette
[0], 0, 0);
732 sarea_priv
->dirty
&= ~I830_UPLOAD_TEX_PALETTE_N(0);
734 if (dirty
& I830_UPLOAD_TEX_PALETTE_N(1)) {
735 i830EmitTexPalette(dev
, sarea_priv
->Palette
[1], 1, 0);
736 sarea_priv
->dirty
&= ~I830_UPLOAD_TEX_PALETTE_N(1);
742 if (dirty
& I830_UPLOAD_TEX_PALETTE_N(2)) {
743 i830EmitTexPalette(dev
, sarea_priv
->Palette2
[0], 0, 0);
744 sarea_priv
->dirty
&= ~I830_UPLOAD_TEX_PALETTE_N(2);
746 if (dirty
& I830_UPLOAD_TEX_PALETTE_N(3)) {
747 i830EmitTexPalette(dev
, sarea_priv
->Palette2
[1], 1, 0);
748 sarea_priv
->dirty
&= ~I830_UPLOAD_TEX_PALETTE_N(2);
755 if (dirty
& I830_UPLOAD_STIPPLE
) {
756 i830EmitStippleVerified(dev
, sarea_priv
->StippleState
);
757 sarea_priv
->dirty
&= ~I830_UPLOAD_STIPPLE
;
760 if (dirty
& I830_UPLOAD_TEX2
) {
761 i830EmitTexVerified(dev
, sarea_priv
->TexState2
);
762 sarea_priv
->dirty
&= ~I830_UPLOAD_TEX2
;
765 if (dirty
& I830_UPLOAD_TEX3
) {
766 i830EmitTexVerified(dev
, sarea_priv
->TexState3
);
767 sarea_priv
->dirty
&= ~I830_UPLOAD_TEX3
;
770 if (dirty
& I830_UPLOAD_TEXBLEND2
) {
771 i830EmitTexBlendVerified(dev
,
772 sarea_priv
->TexBlendState2
,
773 sarea_priv
->TexBlendStateWordsUsed2
);
775 sarea_priv
->dirty
&= ~I830_UPLOAD_TEXBLEND2
;
778 if (dirty
& I830_UPLOAD_TEXBLEND3
) {
779 i830EmitTexBlendVerified(dev
,
780 sarea_priv
->TexBlendState3
,
781 sarea_priv
->TexBlendStateWordsUsed3
);
782 sarea_priv
->dirty
&= ~I830_UPLOAD_TEXBLEND3
;
786 /* ================================================================
787 * Performance monitoring functions
790 static void i830_fill_box(struct drm_device
*dev
,
791 int x
, int y
, int w
, int h
, int r
, int g
, int b
)
793 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
795 unsigned int BR13
, CMD
;
798 BR13
= (0xF0 << 16) | (dev_priv
->pitch
* dev_priv
->cpp
) | (1 << 24);
799 CMD
= XY_COLOR_BLT_CMD
;
800 x
+= dev_priv
->sarea_priv
->boxes
[0].x1
;
801 y
+= dev_priv
->sarea_priv
->boxes
[0].y1
;
803 if (dev_priv
->cpp
== 4) {
805 CMD
|= (XY_COLOR_BLT_WRITE_ALPHA
| XY_COLOR_BLT_WRITE_RGB
);
806 color
= (((0xff) << 24) | (r
<< 16) | (g
<< 8) | b
);
808 color
= (((r
& 0xf8) << 8) |
809 ((g
& 0xfc) << 3) | ((b
& 0xf8) >> 3));
815 OUT_RING((y
<< 16) | x
);
816 OUT_RING(((y
+ h
) << 16) | (x
+ w
));
818 if (dev_priv
->current_page
== 1)
819 OUT_RING(dev_priv
->front_offset
);
821 OUT_RING(dev_priv
->back_offset
);
827 static void i830_cp_performance_boxes(struct drm_device
*dev
)
829 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
831 /* Purple box for page flipping
833 if (dev_priv
->sarea_priv
->perf_boxes
& I830_BOX_FLIP
)
834 i830_fill_box(dev
, 4, 4, 8, 8, 255, 0, 255);
836 /* Red box if we have to wait for idle at any point
838 if (dev_priv
->sarea_priv
->perf_boxes
& I830_BOX_WAIT
)
839 i830_fill_box(dev
, 16, 4, 8, 8, 255, 0, 0);
841 /* Blue box: lost context?
843 if (dev_priv
->sarea_priv
->perf_boxes
& I830_BOX_LOST_CONTEXT
)
844 i830_fill_box(dev
, 28, 4, 8, 8, 0, 0, 255);
846 /* Yellow box for texture swaps
848 if (dev_priv
->sarea_priv
->perf_boxes
& I830_BOX_TEXTURE_LOAD
)
849 i830_fill_box(dev
, 40, 4, 8, 8, 255, 255, 0);
851 /* Green box if hardware never idles (as far as we can tell)
853 if (!(dev_priv
->sarea_priv
->perf_boxes
& I830_BOX_RING_EMPTY
))
854 i830_fill_box(dev
, 64, 4, 8, 8, 0, 255, 0);
856 /* Draw bars indicating number of buffers allocated
857 * (not a great measure, easily confused)
859 if (dev_priv
->dma_used
) {
860 int bar
= dev_priv
->dma_used
/ 10240;
865 i830_fill_box(dev
, 4, 16, bar
, 4, 196, 128, 128);
866 dev_priv
->dma_used
= 0;
869 dev_priv
->sarea_priv
->perf_boxes
= 0;
872 static void i830_dma_dispatch_clear(struct drm_device
*dev
, int flags
,
873 unsigned int clear_color
,
874 unsigned int clear_zval
,
875 unsigned int clear_depthmask
)
877 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
878 drm_i830_sarea_t
*sarea_priv
= dev_priv
->sarea_priv
;
879 int nbox
= sarea_priv
->nbox
;
880 struct drm_clip_rect
*pbox
= sarea_priv
->boxes
;
881 int pitch
= dev_priv
->pitch
;
882 int cpp
= dev_priv
->cpp
;
884 unsigned int BR13
, CMD
, D_CMD
;
887 if (dev_priv
->current_page
== 1) {
888 unsigned int tmp
= flags
;
890 flags
&= ~(I830_FRONT
| I830_BACK
);
891 if (tmp
& I830_FRONT
)
897 i830_kernel_lost_context(dev
);
901 BR13
= (0xF0 << 16) | (pitch
* cpp
) | (1 << 24);
902 D_CMD
= CMD
= XY_COLOR_BLT_CMD
;
905 BR13
= (0xF0 << 16) | (pitch
* cpp
) | (1 << 24) | (1 << 25);
906 CMD
= (XY_COLOR_BLT_CMD
| XY_COLOR_BLT_WRITE_ALPHA
|
907 XY_COLOR_BLT_WRITE_RGB
);
908 D_CMD
= XY_COLOR_BLT_CMD
;
909 if (clear_depthmask
& 0x00ffffff)
910 D_CMD
|= XY_COLOR_BLT_WRITE_RGB
;
911 if (clear_depthmask
& 0xff000000)
912 D_CMD
|= XY_COLOR_BLT_WRITE_ALPHA
;
915 BR13
= (0xF0 << 16) | (pitch
* cpp
) | (1 << 24);
916 D_CMD
= CMD
= XY_COLOR_BLT_CMD
;
920 if (nbox
> I830_NR_SAREA_CLIPRECTS
)
921 nbox
= I830_NR_SAREA_CLIPRECTS
;
923 for (i
= 0; i
< nbox
; i
++, pbox
++) {
924 if (pbox
->x1
> pbox
->x2
||
925 pbox
->y1
> pbox
->y2
||
926 pbox
->x2
> dev_priv
->w
|| pbox
->y2
> dev_priv
->h
)
929 if (flags
& I830_FRONT
) {
930 DRM_DEBUG("clear front\n");
934 OUT_RING((pbox
->y1
<< 16) | pbox
->x1
);
935 OUT_RING((pbox
->y2
<< 16) | pbox
->x2
);
936 OUT_RING(dev_priv
->front_offset
);
937 OUT_RING(clear_color
);
941 if (flags
& I830_BACK
) {
942 DRM_DEBUG("clear back\n");
946 OUT_RING((pbox
->y1
<< 16) | pbox
->x1
);
947 OUT_RING((pbox
->y2
<< 16) | pbox
->x2
);
948 OUT_RING(dev_priv
->back_offset
);
949 OUT_RING(clear_color
);
953 if (flags
& I830_DEPTH
) {
954 DRM_DEBUG("clear depth\n");
958 OUT_RING((pbox
->y1
<< 16) | pbox
->x1
);
959 OUT_RING((pbox
->y2
<< 16) | pbox
->x2
);
960 OUT_RING(dev_priv
->depth_offset
);
961 OUT_RING(clear_zval
);
967 static void i830_dma_dispatch_swap(struct drm_device
*dev
)
969 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
970 drm_i830_sarea_t
*sarea_priv
= dev_priv
->sarea_priv
;
971 int nbox
= sarea_priv
->nbox
;
972 struct drm_clip_rect
*pbox
= sarea_priv
->boxes
;
973 int pitch
= dev_priv
->pitch
;
974 int cpp
= dev_priv
->cpp
;
976 unsigned int CMD
, BR13
;
979 DRM_DEBUG("swapbuffers\n");
981 i830_kernel_lost_context(dev
);
983 if (dev_priv
->do_boxes
)
984 i830_cp_performance_boxes(dev
);
988 BR13
= (pitch
* cpp
) | (0xCC << 16) | (1 << 24);
989 CMD
= XY_SRC_COPY_BLT_CMD
;
992 BR13
= (pitch
* cpp
) | (0xCC << 16) | (1 << 24) | (1 << 25);
993 CMD
= (XY_SRC_COPY_BLT_CMD
| XY_SRC_COPY_BLT_WRITE_ALPHA
|
994 XY_SRC_COPY_BLT_WRITE_RGB
);
997 BR13
= (pitch
* cpp
) | (0xCC << 16) | (1 << 24);
998 CMD
= XY_SRC_COPY_BLT_CMD
;
1002 if (nbox
> I830_NR_SAREA_CLIPRECTS
)
1003 nbox
= I830_NR_SAREA_CLIPRECTS
;
1005 for (i
= 0; i
< nbox
; i
++, pbox
++) {
1006 if (pbox
->x1
> pbox
->x2
||
1007 pbox
->y1
> pbox
->y2
||
1008 pbox
->x2
> dev_priv
->w
|| pbox
->y2
> dev_priv
->h
)
1011 DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n",
1012 pbox
->x1
, pbox
->y1
, pbox
->x2
, pbox
->y2
);
1017 OUT_RING((pbox
->y1
<< 16) | pbox
->x1
);
1018 OUT_RING((pbox
->y2
<< 16) | pbox
->x2
);
1020 if (dev_priv
->current_page
== 0)
1021 OUT_RING(dev_priv
->front_offset
);
1023 OUT_RING(dev_priv
->back_offset
);
1025 OUT_RING((pbox
->y1
<< 16) | pbox
->x1
);
1026 OUT_RING(BR13
& 0xffff);
1028 if (dev_priv
->current_page
== 0)
1029 OUT_RING(dev_priv
->back_offset
);
1031 OUT_RING(dev_priv
->front_offset
);
1037 static void i830_dma_dispatch_flip(struct drm_device
*dev
)
1039 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
1042 DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
1044 dev_priv
->current_page
,
1045 dev_priv
->sarea_priv
->pf_current_page
);
1047 i830_kernel_lost_context(dev
);
1049 if (dev_priv
->do_boxes
) {
1050 dev_priv
->sarea_priv
->perf_boxes
|= I830_BOX_FLIP
;
1051 i830_cp_performance_boxes(dev
);
1055 OUT_RING(INST_PARSER_CLIENT
| INST_OP_FLUSH
| INST_FLUSH_MAP_CACHE
);
1060 OUT_RING(CMD_OP_DISPLAYBUFFER_INFO
| ASYNC_FLIP
);
1062 if (dev_priv
->current_page
== 0) {
1063 OUT_RING(dev_priv
->back_offset
);
1064 dev_priv
->current_page
= 1;
1066 OUT_RING(dev_priv
->front_offset
);
1067 dev_priv
->current_page
= 0;
1073 OUT_RING(MI_WAIT_FOR_EVENT
| MI_WAIT_FOR_PLANE_A_FLIP
);
1077 dev_priv
->sarea_priv
->pf_current_page
= dev_priv
->current_page
;
1080 static void i830_dma_dispatch_vertex(struct drm_device
*dev
,
1081 struct drm_buf
*buf
, int discard
, int used
)
1083 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
1084 drm_i830_buf_priv_t
*buf_priv
= buf
->dev_private
;
1085 drm_i830_sarea_t
*sarea_priv
= dev_priv
->sarea_priv
;
1086 struct drm_clip_rect
*box
= sarea_priv
->boxes
;
1087 int nbox
= sarea_priv
->nbox
;
1088 unsigned long address
= (unsigned long)buf
->bus_address
;
1089 unsigned long start
= address
- dev
->agp
->base
;
1093 i830_kernel_lost_context(dev
);
1095 if (nbox
> I830_NR_SAREA_CLIPRECTS
)
1096 nbox
= I830_NR_SAREA_CLIPRECTS
;
1099 u
= cmpxchg(buf_priv
->in_use
, I830_BUF_CLIENT
,
1101 if (u
!= I830_BUF_CLIENT
)
1102 DRM_DEBUG("xxxx 2\n");
1105 if (used
> 4 * 1023)
1108 if (sarea_priv
->dirty
)
1111 DRM_DEBUG("dispatch vertex addr 0x%lx, used 0x%x nbox %d\n",
1112 address
, used
, nbox
);
1114 dev_priv
->counter
++;
1115 DRM_DEBUG("dispatch counter : %ld\n", dev_priv
->counter
);
1116 DRM_DEBUG("i830_dma_dispatch\n");
1117 DRM_DEBUG("start : %lx\n", start
);
1118 DRM_DEBUG("used : %d\n", used
);
1119 DRM_DEBUG("start + used - 4 : %ld\n", start
+ used
- 4);
1121 if (buf_priv
->currently_mapped
== I830_BUF_MAPPED
) {
1122 u32
*vp
= buf_priv
->kernel_virtual
;
1124 vp
[0] = (GFX_OP_PRIMITIVE
|
1125 sarea_priv
->vertex_prim
| ((used
/ 4) - 2));
1127 if (dev_priv
->use_mi_batchbuffer_start
) {
1128 vp
[used
/ 4] = MI_BATCH_BUFFER_END
;
1137 i830_unmap_buffer(buf
);
1144 OUT_RING(GFX_OP_DRAWRECT_INFO
);
1145 OUT_RING(sarea_priv
->
1146 BufferState
[I830_DESTREG_DR1
]);
1147 OUT_RING(box
[i
].x1
| (box
[i
].y1
<< 16));
1148 OUT_RING(box
[i
].x2
| (box
[i
].y2
<< 16));
1149 OUT_RING(sarea_priv
->
1150 BufferState
[I830_DESTREG_DR4
]);
1155 if (dev_priv
->use_mi_batchbuffer_start
) {
1157 OUT_RING(MI_BATCH_BUFFER_START
| (2 << 6));
1158 OUT_RING(start
| MI_BATCH_NON_SECURE
);
1162 OUT_RING(MI_BATCH_BUFFER
);
1163 OUT_RING(start
| MI_BATCH_NON_SECURE
);
1164 OUT_RING(start
+ used
- 4);
1169 } while (++i
< nbox
);
1173 dev_priv
->counter
++;
1175 (void)cmpxchg(buf_priv
->in_use
, I830_BUF_CLIENT
,
1179 OUT_RING(CMD_STORE_DWORD_IDX
);
1181 OUT_RING(dev_priv
->counter
);
1182 OUT_RING(CMD_STORE_DWORD_IDX
);
1183 OUT_RING(buf_priv
->my_use_idx
);
1184 OUT_RING(I830_BUF_FREE
);
1185 OUT_RING(CMD_REPORT_HEAD
);
1191 static void i830_dma_quiescent(struct drm_device
*dev
)
1193 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
1196 i830_kernel_lost_context(dev
);
1199 OUT_RING(INST_PARSER_CLIENT
| INST_OP_FLUSH
| INST_FLUSH_MAP_CACHE
);
1200 OUT_RING(CMD_REPORT_HEAD
);
1205 i830_wait_ring(dev
, dev_priv
->ring
.Size
- 8, __func__
);
1208 static int i830_flush_queue(struct drm_device
*dev
)
1210 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
1211 struct drm_device_dma
*dma
= dev
->dma
;
1215 i830_kernel_lost_context(dev
);
1218 OUT_RING(CMD_REPORT_HEAD
);
1222 i830_wait_ring(dev
, dev_priv
->ring
.Size
- 8, __func__
);
1224 for (i
= 0; i
< dma
->buf_count
; i
++) {
1225 struct drm_buf
*buf
= dma
->buflist
[i
];
1226 drm_i830_buf_priv_t
*buf_priv
= buf
->dev_private
;
1228 int used
= cmpxchg(buf_priv
->in_use
, I830_BUF_HARDWARE
,
1231 if (used
== I830_BUF_HARDWARE
)
1232 DRM_DEBUG("reclaimed from HARDWARE\n");
1233 if (used
== I830_BUF_CLIENT
)
1234 DRM_DEBUG("still on client\n");
1240 /* Must be called with the lock held */
1241 static void i830_reclaim_buffers(struct drm_device
*dev
, struct drm_file
*file_priv
)
1243 struct drm_device_dma
*dma
= dev
->dma
;
1248 if (!dev
->dev_private
)
1253 i830_flush_queue(dev
);
1255 for (i
= 0; i
< dma
->buf_count
; i
++) {
1256 struct drm_buf
*buf
= dma
->buflist
[i
];
1257 drm_i830_buf_priv_t
*buf_priv
= buf
->dev_private
;
1259 if (buf
->file_priv
== file_priv
&& buf_priv
) {
1260 int used
= cmpxchg(buf_priv
->in_use
, I830_BUF_CLIENT
,
1263 if (used
== I830_BUF_CLIENT
)
1264 DRM_DEBUG("reclaimed from client\n");
1265 if (buf_priv
->currently_mapped
== I830_BUF_MAPPED
)
1266 buf_priv
->currently_mapped
= I830_BUF_UNMAPPED
;
1271 static int i830_flush_ioctl(struct drm_device
*dev
, void *data
,
1272 struct drm_file
*file_priv
)
1274 LOCK_TEST_WITH_RETURN(dev
, file_priv
);
1276 i830_flush_queue(dev
);
1280 static int i830_dma_vertex(struct drm_device
*dev
, void *data
,
1281 struct drm_file
*file_priv
)
1283 struct drm_device_dma
*dma
= dev
->dma
;
1284 drm_i830_private_t
*dev_priv
= (drm_i830_private_t
*) dev
->dev_private
;
1285 u32
*hw_status
= dev_priv
->hw_status_page
;
1286 drm_i830_sarea_t
*sarea_priv
= (drm_i830_sarea_t
*)
1287 dev_priv
->sarea_priv
;
1288 drm_i830_vertex_t
*vertex
= data
;
1290 LOCK_TEST_WITH_RETURN(dev
, file_priv
);
1292 DRM_DEBUG("i830 dma vertex, idx %d used %d discard %d\n",
1293 vertex
->idx
, vertex
->used
, vertex
->discard
);
1295 if (vertex
->idx
< 0 || vertex
->idx
> dma
->buf_count
)
1298 i830_dma_dispatch_vertex(dev
,
1299 dma
->buflist
[vertex
->idx
],
1300 vertex
->discard
, vertex
->used
);
1302 sarea_priv
->last_enqueue
= dev_priv
->counter
- 1;
1303 sarea_priv
->last_dispatch
= (int)hw_status
[5];
1308 static int i830_clear_bufs(struct drm_device
*dev
, void *data
,
1309 struct drm_file
*file_priv
)
1311 drm_i830_clear_t
*clear
= data
;
1313 LOCK_TEST_WITH_RETURN(dev
, file_priv
);
1315 /* GH: Someone's doing nasty things... */
1316 if (!dev
->dev_private
)
1319 i830_dma_dispatch_clear(dev
, clear
->flags
,
1321 clear
->clear_depth
, clear
->clear_depthmask
);
1325 static int i830_swap_bufs(struct drm_device
*dev
, void *data
,
1326 struct drm_file
*file_priv
)
1328 DRM_DEBUG("i830_swap_bufs\n");
1330 LOCK_TEST_WITH_RETURN(dev
, file_priv
);
1332 i830_dma_dispatch_swap(dev
);
1336 /* Not sure why this isn't set all the time:
1338 static void i830_do_init_pageflip(struct drm_device
*dev
)
1340 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
1342 DRM_DEBUG("%s\n", __func__
);
1343 dev_priv
->page_flipping
= 1;
1344 dev_priv
->current_page
= 0;
1345 dev_priv
->sarea_priv
->pf_current_page
= dev_priv
->current_page
;
1348 static int i830_do_cleanup_pageflip(struct drm_device
*dev
)
1350 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
1352 DRM_DEBUG("%s\n", __func__
);
1353 if (dev_priv
->current_page
!= 0)
1354 i830_dma_dispatch_flip(dev
);
1356 dev_priv
->page_flipping
= 0;
1360 static int i830_flip_bufs(struct drm_device
*dev
, void *data
,
1361 struct drm_file
*file_priv
)
1363 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
1365 DRM_DEBUG("%s\n", __func__
);
1367 LOCK_TEST_WITH_RETURN(dev
, file_priv
);
1369 if (!dev_priv
->page_flipping
)
1370 i830_do_init_pageflip(dev
);
1372 i830_dma_dispatch_flip(dev
);
1376 static int i830_getage(struct drm_device
*dev
, void *data
,
1377 struct drm_file
*file_priv
)
1379 drm_i830_private_t
*dev_priv
= (drm_i830_private_t
*) dev
->dev_private
;
1380 u32
*hw_status
= dev_priv
->hw_status_page
;
1381 drm_i830_sarea_t
*sarea_priv
= (drm_i830_sarea_t
*)
1382 dev_priv
->sarea_priv
;
1384 sarea_priv
->last_dispatch
= (int)hw_status
[5];
1388 static int i830_getbuf(struct drm_device
*dev
, void *data
,
1389 struct drm_file
*file_priv
)
1392 drm_i830_dma_t
*d
= data
;
1393 drm_i830_private_t
*dev_priv
= (drm_i830_private_t
*) dev
->dev_private
;
1394 u32
*hw_status
= dev_priv
->hw_status_page
;
1395 drm_i830_sarea_t
*sarea_priv
= (drm_i830_sarea_t
*)
1396 dev_priv
->sarea_priv
;
1398 DRM_DEBUG("getbuf\n");
1400 LOCK_TEST_WITH_RETURN(dev
, file_priv
);
1404 retcode
= i830_dma_get_buffer(dev
, d
, file_priv
);
1406 DRM_DEBUG("i830_dma: %d returning %d, granted = %d\n",
1407 task_pid_nr(current
), retcode
, d
->granted
);
1409 sarea_priv
->last_dispatch
= (int)hw_status
[5];
1414 static int i830_copybuf(struct drm_device
*dev
, void *data
,
1415 struct drm_file
*file_priv
)
1417 /* Never copy - 2.4.x doesn't need it */
1421 static int i830_docopy(struct drm_device
*dev
, void *data
,
1422 struct drm_file
*file_priv
)
1427 static int i830_getparam(struct drm_device
*dev
, void *data
,
1428 struct drm_file
*file_priv
)
1430 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
1431 drm_i830_getparam_t
*param
= data
;
1435 DRM_ERROR("%s called with no initialization\n", __func__
);
1439 switch (param
->param
) {
1440 case I830_PARAM_IRQ_ACTIVE
:
1441 value
= dev
->irq_enabled
;
1447 if (copy_to_user(param
->value
, &value
, sizeof(int))) {
1448 DRM_ERROR("copy_to_user\n");
1455 static int i830_setparam(struct drm_device
*dev
, void *data
,
1456 struct drm_file
*file_priv
)
1458 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
1459 drm_i830_setparam_t
*param
= data
;
1462 DRM_ERROR("%s called with no initialization\n", __func__
);
1466 switch (param
->param
) {
1467 case I830_SETPARAM_USE_MI_BATCHBUFFER_START
:
1468 dev_priv
->use_mi_batchbuffer_start
= param
->value
;
1477 int i830_driver_load(struct drm_device
*dev
, unsigned long flags
)
1479 /* i830 has 4 more counters */
1481 dev
->types
[6] = _DRM_STAT_IRQ
;
1482 dev
->types
[7] = _DRM_STAT_PRIMARY
;
1483 dev
->types
[8] = _DRM_STAT_SECONDARY
;
1484 dev
->types
[9] = _DRM_STAT_DMA
;
1489 void i830_driver_lastclose(struct drm_device
*dev
)
1491 i830_dma_cleanup(dev
);
1494 void i830_driver_preclose(struct drm_device
*dev
, struct drm_file
*file_priv
)
1496 if (dev
->dev_private
) {
1497 drm_i830_private_t
*dev_priv
= dev
->dev_private
;
1498 if (dev_priv
->page_flipping
)
1499 i830_do_cleanup_pageflip(dev
);
1503 void i830_driver_reclaim_buffers_locked(struct drm_device
*dev
, struct drm_file
*file_priv
)
1505 i830_reclaim_buffers(dev
, file_priv
);
1508 int i830_driver_dma_quiescent(struct drm_device
*dev
)
1510 i830_dma_quiescent(dev
);
1515 * call the drm_ioctl under the big kernel lock because
1516 * to lock against the i830_mmap_buffers function.
1518 long i830_ioctl(struct file
*file
, unsigned int cmd
, unsigned long arg
)
1522 ret
= drm_ioctl(file
, cmd
, arg
);
1527 struct drm_ioctl_desc i830_ioctls
[] = {
1528 DRM_IOCTL_DEF_DRV(I830_INIT
, i830_dma_init
, DRM_AUTH
|DRM_MASTER
|DRM_ROOT_ONLY
|DRM_UNLOCKED
),
1529 DRM_IOCTL_DEF_DRV(I830_VERTEX
, i830_dma_vertex
, DRM_AUTH
|DRM_UNLOCKED
),
1530 DRM_IOCTL_DEF_DRV(I830_CLEAR
, i830_clear_bufs
, DRM_AUTH
|DRM_UNLOCKED
),
1531 DRM_IOCTL_DEF_DRV(I830_FLUSH
, i830_flush_ioctl
, DRM_AUTH
|DRM_UNLOCKED
),
1532 DRM_IOCTL_DEF_DRV(I830_GETAGE
, i830_getage
, DRM_AUTH
|DRM_UNLOCKED
),
1533 DRM_IOCTL_DEF_DRV(I830_GETBUF
, i830_getbuf
, DRM_AUTH
|DRM_UNLOCKED
),
1534 DRM_IOCTL_DEF_DRV(I830_SWAP
, i830_swap_bufs
, DRM_AUTH
|DRM_UNLOCKED
),
1535 DRM_IOCTL_DEF_DRV(I830_COPY
, i830_copybuf
, DRM_AUTH
|DRM_UNLOCKED
),
1536 DRM_IOCTL_DEF_DRV(I830_DOCOPY
, i830_docopy
, DRM_AUTH
|DRM_UNLOCKED
),
1537 DRM_IOCTL_DEF_DRV(I830_FLIP
, i830_flip_bufs
, DRM_AUTH
|DRM_UNLOCKED
),
1538 DRM_IOCTL_DEF_DRV(I830_IRQ_EMIT
, i830_irq_emit
, DRM_AUTH
|DRM_UNLOCKED
),
1539 DRM_IOCTL_DEF_DRV(I830_IRQ_WAIT
, i830_irq_wait
, DRM_AUTH
|DRM_UNLOCKED
),
1540 DRM_IOCTL_DEF_DRV(I830_GETPARAM
, i830_getparam
, DRM_AUTH
|DRM_UNLOCKED
),
1541 DRM_IOCTL_DEF_DRV(I830_SETPARAM
, i830_setparam
, DRM_AUTH
|DRM_UNLOCKED
),
1544 int i830_max_ioctl
= DRM_ARRAY_SIZE(i830_ioctls
);
1547 * Determine if the device really is AGP or not.
1549 * All Intel graphics chipsets are treated as AGP, even if they are really
1552 * \param dev The device to be tested.
1555 * A value of 1 is always retured to indictate every i8xx is AGP.
1557 int i830_driver_device_is_agp(struct drm_device
*dev
)