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Merge branch 'for-airlied' of git://people.freedesktop.org/~danvet/drm-intel into...
[deliverable/linux.git] / drivers / gpu / drm / i915 / i915_debugfs.c
1 /*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
26 *
27 */
28
29 #include <linux/seq_file.h>
30 #include <linux/debugfs.h>
31 #include <linux/slab.h>
32 #include <linux/export.h>
33 #include "drmP.h"
34 #include "drm.h"
35 #include "intel_drv.h"
36 #include "intel_ringbuffer.h"
37 #include "i915_drm.h"
38 #include "i915_drv.h"
39
40 #define DRM_I915_RING_DEBUG 1
41
42
43 #if defined(CONFIG_DEBUG_FS)
44
45 enum {
46 ACTIVE_LIST,
47 INACTIVE_LIST,
48 PINNED_LIST,
49 };
50
51 static const char *yesno(int v)
52 {
53 return v ? "yes" : "no";
54 }
55
56 static int i915_capabilities(struct seq_file *m, void *data)
57 {
58 struct drm_info_node *node = (struct drm_info_node *) m->private;
59 struct drm_device *dev = node->minor->dev;
60 const struct intel_device_info *info = INTEL_INFO(dev);
61
62 seq_printf(m, "gen: %d\n", info->gen);
63 seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));
64 #define DEV_INFO_FLAG(x) seq_printf(m, #x ": %s\n", yesno(info->x))
65 #define DEV_INFO_SEP ;
66 DEV_INFO_FLAGS;
67 #undef DEV_INFO_FLAG
68 #undef DEV_INFO_SEP
69
70 return 0;
71 }
72
73 static const char *get_pin_flag(struct drm_i915_gem_object *obj)
74 {
75 if (obj->user_pin_count > 0)
76 return "P";
77 else if (obj->pin_count > 0)
78 return "p";
79 else
80 return " ";
81 }
82
83 static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
84 {
85 switch (obj->tiling_mode) {
86 default:
87 case I915_TILING_NONE: return " ";
88 case I915_TILING_X: return "X";
89 case I915_TILING_Y: return "Y";
90 }
91 }
92
93 static const char *cache_level_str(int type)
94 {
95 switch (type) {
96 case I915_CACHE_NONE: return " uncached";
97 case I915_CACHE_LLC: return " snooped (LLC)";
98 case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
99 default: return "";
100 }
101 }
102
103 static void
104 describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
105 {
106 seq_printf(m, "%p: %s%s %8zdKiB %04x %04x %d %d %d%s%s%s",
107 &obj->base,
108 get_pin_flag(obj),
109 get_tiling_flag(obj),
110 obj->base.size / 1024,
111 obj->base.read_domains,
112 obj->base.write_domain,
113 obj->last_read_seqno,
114 obj->last_write_seqno,
115 obj->last_fenced_seqno,
116 cache_level_str(obj->cache_level),
117 obj->dirty ? " dirty" : "",
118 obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
119 if (obj->base.name)
120 seq_printf(m, " (name: %d)", obj->base.name);
121 if (obj->pin_count)
122 seq_printf(m, " (pinned x %d)", obj->pin_count);
123 if (obj->fence_reg != I915_FENCE_REG_NONE)
124 seq_printf(m, " (fence: %d)", obj->fence_reg);
125 if (obj->gtt_space != NULL)
126 seq_printf(m, " (gtt offset: %08x, size: %08x)",
127 obj->gtt_offset, (unsigned int)obj->gtt_space->size);
128 if (obj->pin_mappable || obj->fault_mappable) {
129 char s[3], *t = s;
130 if (obj->pin_mappable)
131 *t++ = 'p';
132 if (obj->fault_mappable)
133 *t++ = 'f';
134 *t = '\0';
135 seq_printf(m, " (%s mappable)", s);
136 }
137 if (obj->ring != NULL)
138 seq_printf(m, " (%s)", obj->ring->name);
139 }
140
141 static int i915_gem_object_list_info(struct seq_file *m, void *data)
142 {
143 struct drm_info_node *node = (struct drm_info_node *) m->private;
144 uintptr_t list = (uintptr_t) node->info_ent->data;
145 struct list_head *head;
146 struct drm_device *dev = node->minor->dev;
147 drm_i915_private_t *dev_priv = dev->dev_private;
148 struct drm_i915_gem_object *obj;
149 size_t total_obj_size, total_gtt_size;
150 int count, ret;
151
152 ret = mutex_lock_interruptible(&dev->struct_mutex);
153 if (ret)
154 return ret;
155
156 switch (list) {
157 case ACTIVE_LIST:
158 seq_printf(m, "Active:\n");
159 head = &dev_priv->mm.active_list;
160 break;
161 case INACTIVE_LIST:
162 seq_printf(m, "Inactive:\n");
163 head = &dev_priv->mm.inactive_list;
164 break;
165 default:
166 mutex_unlock(&dev->struct_mutex);
167 return -EINVAL;
168 }
169
170 total_obj_size = total_gtt_size = count = 0;
171 list_for_each_entry(obj, head, mm_list) {
172 seq_printf(m, " ");
173 describe_obj(m, obj);
174 seq_printf(m, "\n");
175 total_obj_size += obj->base.size;
176 total_gtt_size += obj->gtt_space->size;
177 count++;
178 }
179 mutex_unlock(&dev->struct_mutex);
180
181 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
182 count, total_obj_size, total_gtt_size);
183 return 0;
184 }
185
186 #define count_objects(list, member) do { \
187 list_for_each_entry(obj, list, member) { \
188 size += obj->gtt_space->size; \
189 ++count; \
190 if (obj->map_and_fenceable) { \
191 mappable_size += obj->gtt_space->size; \
192 ++mappable_count; \
193 } \
194 } \
195 } while (0)
196
197 static int i915_gem_object_info(struct seq_file *m, void* data)
198 {
199 struct drm_info_node *node = (struct drm_info_node *) m->private;
200 struct drm_device *dev = node->minor->dev;
201 struct drm_i915_private *dev_priv = dev->dev_private;
202 u32 count, mappable_count, purgeable_count;
203 size_t size, mappable_size, purgeable_size;
204 struct drm_i915_gem_object *obj;
205 int ret;
206
207 ret = mutex_lock_interruptible(&dev->struct_mutex);
208 if (ret)
209 return ret;
210
211 seq_printf(m, "%u objects, %zu bytes\n",
212 dev_priv->mm.object_count,
213 dev_priv->mm.object_memory);
214
215 size = count = mappable_size = mappable_count = 0;
216 count_objects(&dev_priv->mm.bound_list, gtt_list);
217 seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
218 count, mappable_count, size, mappable_size);
219
220 size = count = mappable_size = mappable_count = 0;
221 count_objects(&dev_priv->mm.active_list, mm_list);
222 seq_printf(m, " %u [%u] active objects, %zu [%zu] bytes\n",
223 count, mappable_count, size, mappable_size);
224
225 size = count = mappable_size = mappable_count = 0;
226 count_objects(&dev_priv->mm.inactive_list, mm_list);
227 seq_printf(m, " %u [%u] inactive objects, %zu [%zu] bytes\n",
228 count, mappable_count, size, mappable_size);
229
230 size = count = purgeable_size = purgeable_count = 0;
231 list_for_each_entry(obj, &dev_priv->mm.unbound_list, gtt_list) {
232 size += obj->base.size, ++count;
233 if (obj->madv == I915_MADV_DONTNEED)
234 purgeable_size += obj->base.size, ++purgeable_count;
235 }
236 seq_printf(m, "%u unbound objects, %zu bytes\n", count, size);
237
238 size = count = mappable_size = mappable_count = 0;
239 list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
240 if (obj->fault_mappable) {
241 size += obj->gtt_space->size;
242 ++count;
243 }
244 if (obj->pin_mappable) {
245 mappable_size += obj->gtt_space->size;
246 ++mappable_count;
247 }
248 if (obj->madv == I915_MADV_DONTNEED) {
249 purgeable_size += obj->base.size;
250 ++purgeable_count;
251 }
252 }
253 seq_printf(m, "%u purgeable objects, %zu bytes\n",
254 purgeable_count, purgeable_size);
255 seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
256 mappable_count, mappable_size);
257 seq_printf(m, "%u fault mappable objects, %zu bytes\n",
258 count, size);
259
260 seq_printf(m, "%zu [%zu] gtt total\n",
261 dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total);
262
263 mutex_unlock(&dev->struct_mutex);
264
265 return 0;
266 }
267
268 static int i915_gem_gtt_info(struct seq_file *m, void* data)
269 {
270 struct drm_info_node *node = (struct drm_info_node *) m->private;
271 struct drm_device *dev = node->minor->dev;
272 uintptr_t list = (uintptr_t) node->info_ent->data;
273 struct drm_i915_private *dev_priv = dev->dev_private;
274 struct drm_i915_gem_object *obj;
275 size_t total_obj_size, total_gtt_size;
276 int count, ret;
277
278 ret = mutex_lock_interruptible(&dev->struct_mutex);
279 if (ret)
280 return ret;
281
282 total_obj_size = total_gtt_size = count = 0;
283 list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
284 if (list == PINNED_LIST && obj->pin_count == 0)
285 continue;
286
287 seq_printf(m, " ");
288 describe_obj(m, obj);
289 seq_printf(m, "\n");
290 total_obj_size += obj->base.size;
291 total_gtt_size += obj->gtt_space->size;
292 count++;
293 }
294
295 mutex_unlock(&dev->struct_mutex);
296
297 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
298 count, total_obj_size, total_gtt_size);
299
300 return 0;
301 }
302
303 static int i915_gem_pageflip_info(struct seq_file *m, void *data)
304 {
305 struct drm_info_node *node = (struct drm_info_node *) m->private;
306 struct drm_device *dev = node->minor->dev;
307 unsigned long flags;
308 struct intel_crtc *crtc;
309
310 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
311 const char pipe = pipe_name(crtc->pipe);
312 const char plane = plane_name(crtc->plane);
313 struct intel_unpin_work *work;
314
315 spin_lock_irqsave(&dev->event_lock, flags);
316 work = crtc->unpin_work;
317 if (work == NULL) {
318 seq_printf(m, "No flip due on pipe %c (plane %c)\n",
319 pipe, plane);
320 } else {
321 if (!work->pending) {
322 seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
323 pipe, plane);
324 } else {
325 seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
326 pipe, plane);
327 }
328 if (work->enable_stall_check)
329 seq_printf(m, "Stall check enabled, ");
330 else
331 seq_printf(m, "Stall check waiting for page flip ioctl, ");
332 seq_printf(m, "%d prepares\n", work->pending);
333
334 if (work->old_fb_obj) {
335 struct drm_i915_gem_object *obj = work->old_fb_obj;
336 if (obj)
337 seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
338 }
339 if (work->pending_flip_obj) {
340 struct drm_i915_gem_object *obj = work->pending_flip_obj;
341 if (obj)
342 seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
343 }
344 }
345 spin_unlock_irqrestore(&dev->event_lock, flags);
346 }
347
348 return 0;
349 }
350
351 static int i915_gem_request_info(struct seq_file *m, void *data)
352 {
353 struct drm_info_node *node = (struct drm_info_node *) m->private;
354 struct drm_device *dev = node->minor->dev;
355 drm_i915_private_t *dev_priv = dev->dev_private;
356 struct intel_ring_buffer *ring;
357 struct drm_i915_gem_request *gem_request;
358 int ret, count, i;
359
360 ret = mutex_lock_interruptible(&dev->struct_mutex);
361 if (ret)
362 return ret;
363
364 count = 0;
365 for_each_ring(ring, dev_priv, i) {
366 if (list_empty(&ring->request_list))
367 continue;
368
369 seq_printf(m, "%s requests:\n", ring->name);
370 list_for_each_entry(gem_request,
371 &ring->request_list,
372 list) {
373 seq_printf(m, " %d @ %d\n",
374 gem_request->seqno,
375 (int) (jiffies - gem_request->emitted_jiffies));
376 }
377 count++;
378 }
379 mutex_unlock(&dev->struct_mutex);
380
381 if (count == 0)
382 seq_printf(m, "No requests\n");
383
384 return 0;
385 }
386
387 static void i915_ring_seqno_info(struct seq_file *m,
388 struct intel_ring_buffer *ring)
389 {
390 if (ring->get_seqno) {
391 seq_printf(m, "Current sequence (%s): %d\n",
392 ring->name, ring->get_seqno(ring, false));
393 }
394 }
395
396 static int i915_gem_seqno_info(struct seq_file *m, void *data)
397 {
398 struct drm_info_node *node = (struct drm_info_node *) m->private;
399 struct drm_device *dev = node->minor->dev;
400 drm_i915_private_t *dev_priv = dev->dev_private;
401 struct intel_ring_buffer *ring;
402 int ret, i;
403
404 ret = mutex_lock_interruptible(&dev->struct_mutex);
405 if (ret)
406 return ret;
407
408 for_each_ring(ring, dev_priv, i)
409 i915_ring_seqno_info(m, ring);
410
411 mutex_unlock(&dev->struct_mutex);
412
413 return 0;
414 }
415
416
417 static int i915_interrupt_info(struct seq_file *m, void *data)
418 {
419 struct drm_info_node *node = (struct drm_info_node *) m->private;
420 struct drm_device *dev = node->minor->dev;
421 drm_i915_private_t *dev_priv = dev->dev_private;
422 struct intel_ring_buffer *ring;
423 int ret, i, pipe;
424
425 ret = mutex_lock_interruptible(&dev->struct_mutex);
426 if (ret)
427 return ret;
428
429 if (IS_VALLEYVIEW(dev)) {
430 seq_printf(m, "Display IER:\t%08x\n",
431 I915_READ(VLV_IER));
432 seq_printf(m, "Display IIR:\t%08x\n",
433 I915_READ(VLV_IIR));
434 seq_printf(m, "Display IIR_RW:\t%08x\n",
435 I915_READ(VLV_IIR_RW));
436 seq_printf(m, "Display IMR:\t%08x\n",
437 I915_READ(VLV_IMR));
438 for_each_pipe(pipe)
439 seq_printf(m, "Pipe %c stat:\t%08x\n",
440 pipe_name(pipe),
441 I915_READ(PIPESTAT(pipe)));
442
443 seq_printf(m, "Master IER:\t%08x\n",
444 I915_READ(VLV_MASTER_IER));
445
446 seq_printf(m, "Render IER:\t%08x\n",
447 I915_READ(GTIER));
448 seq_printf(m, "Render IIR:\t%08x\n",
449 I915_READ(GTIIR));
450 seq_printf(m, "Render IMR:\t%08x\n",
451 I915_READ(GTIMR));
452
453 seq_printf(m, "PM IER:\t\t%08x\n",
454 I915_READ(GEN6_PMIER));
455 seq_printf(m, "PM IIR:\t\t%08x\n",
456 I915_READ(GEN6_PMIIR));
457 seq_printf(m, "PM IMR:\t\t%08x\n",
458 I915_READ(GEN6_PMIMR));
459
460 seq_printf(m, "Port hotplug:\t%08x\n",
461 I915_READ(PORT_HOTPLUG_EN));
462 seq_printf(m, "DPFLIPSTAT:\t%08x\n",
463 I915_READ(VLV_DPFLIPSTAT));
464 seq_printf(m, "DPINVGTT:\t%08x\n",
465 I915_READ(DPINVGTT));
466
467 } else if (!HAS_PCH_SPLIT(dev)) {
468 seq_printf(m, "Interrupt enable: %08x\n",
469 I915_READ(IER));
470 seq_printf(m, "Interrupt identity: %08x\n",
471 I915_READ(IIR));
472 seq_printf(m, "Interrupt mask: %08x\n",
473 I915_READ(IMR));
474 for_each_pipe(pipe)
475 seq_printf(m, "Pipe %c stat: %08x\n",
476 pipe_name(pipe),
477 I915_READ(PIPESTAT(pipe)));
478 } else {
479 seq_printf(m, "North Display Interrupt enable: %08x\n",
480 I915_READ(DEIER));
481 seq_printf(m, "North Display Interrupt identity: %08x\n",
482 I915_READ(DEIIR));
483 seq_printf(m, "North Display Interrupt mask: %08x\n",
484 I915_READ(DEIMR));
485 seq_printf(m, "South Display Interrupt enable: %08x\n",
486 I915_READ(SDEIER));
487 seq_printf(m, "South Display Interrupt identity: %08x\n",
488 I915_READ(SDEIIR));
489 seq_printf(m, "South Display Interrupt mask: %08x\n",
490 I915_READ(SDEIMR));
491 seq_printf(m, "Graphics Interrupt enable: %08x\n",
492 I915_READ(GTIER));
493 seq_printf(m, "Graphics Interrupt identity: %08x\n",
494 I915_READ(GTIIR));
495 seq_printf(m, "Graphics Interrupt mask: %08x\n",
496 I915_READ(GTIMR));
497 }
498 seq_printf(m, "Interrupts received: %d\n",
499 atomic_read(&dev_priv->irq_received));
500 for_each_ring(ring, dev_priv, i) {
501 if (IS_GEN6(dev) || IS_GEN7(dev)) {
502 seq_printf(m,
503 "Graphics Interrupt mask (%s): %08x\n",
504 ring->name, I915_READ_IMR(ring));
505 }
506 i915_ring_seqno_info(m, ring);
507 }
508 mutex_unlock(&dev->struct_mutex);
509
510 return 0;
511 }
512
513 static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
514 {
515 struct drm_info_node *node = (struct drm_info_node *) m->private;
516 struct drm_device *dev = node->minor->dev;
517 drm_i915_private_t *dev_priv = dev->dev_private;
518 int i, ret;
519
520 ret = mutex_lock_interruptible(&dev->struct_mutex);
521 if (ret)
522 return ret;
523
524 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
525 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
526 for (i = 0; i < dev_priv->num_fence_regs; i++) {
527 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
528
529 seq_printf(m, "Fence %d, pin count = %d, object = ",
530 i, dev_priv->fence_regs[i].pin_count);
531 if (obj == NULL)
532 seq_printf(m, "unused");
533 else
534 describe_obj(m, obj);
535 seq_printf(m, "\n");
536 }
537
538 mutex_unlock(&dev->struct_mutex);
539 return 0;
540 }
541
542 static int i915_hws_info(struct seq_file *m, void *data)
543 {
544 struct drm_info_node *node = (struct drm_info_node *) m->private;
545 struct drm_device *dev = node->minor->dev;
546 drm_i915_private_t *dev_priv = dev->dev_private;
547 struct intel_ring_buffer *ring;
548 const volatile u32 __iomem *hws;
549 int i;
550
551 ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
552 hws = (volatile u32 __iomem *)ring->status_page.page_addr;
553 if (hws == NULL)
554 return 0;
555
556 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
557 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
558 i * 4,
559 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
560 }
561 return 0;
562 }
563
564 static const char *ring_str(int ring)
565 {
566 switch (ring) {
567 case RCS: return "render";
568 case VCS: return "bsd";
569 case BCS: return "blt";
570 default: return "";
571 }
572 }
573
574 static const char *pin_flag(int pinned)
575 {
576 if (pinned > 0)
577 return " P";
578 else if (pinned < 0)
579 return " p";
580 else
581 return "";
582 }
583
584 static const char *tiling_flag(int tiling)
585 {
586 switch (tiling) {
587 default:
588 case I915_TILING_NONE: return "";
589 case I915_TILING_X: return " X";
590 case I915_TILING_Y: return " Y";
591 }
592 }
593
594 static const char *dirty_flag(int dirty)
595 {
596 return dirty ? " dirty" : "";
597 }
598
599 static const char *purgeable_flag(int purgeable)
600 {
601 return purgeable ? " purgeable" : "";
602 }
603
604 static void print_error_buffers(struct seq_file *m,
605 const char *name,
606 struct drm_i915_error_buffer *err,
607 int count)
608 {
609 seq_printf(m, "%s [%d]:\n", name, count);
610
611 while (count--) {
612 seq_printf(m, " %08x %8u %04x %04x %x %x%s%s%s%s%s%s%s",
613 err->gtt_offset,
614 err->size,
615 err->read_domains,
616 err->write_domain,
617 err->rseqno, err->wseqno,
618 pin_flag(err->pinned),
619 tiling_flag(err->tiling),
620 dirty_flag(err->dirty),
621 purgeable_flag(err->purgeable),
622 err->ring != -1 ? " " : "",
623 ring_str(err->ring),
624 cache_level_str(err->cache_level));
625
626 if (err->name)
627 seq_printf(m, " (name: %d)", err->name);
628 if (err->fence_reg != I915_FENCE_REG_NONE)
629 seq_printf(m, " (fence: %d)", err->fence_reg);
630
631 seq_printf(m, "\n");
632 err++;
633 }
634 }
635
636 static void i915_ring_error_state(struct seq_file *m,
637 struct drm_device *dev,
638 struct drm_i915_error_state *error,
639 unsigned ring)
640 {
641 BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
642 seq_printf(m, "%s command stream:\n", ring_str(ring));
643 seq_printf(m, " HEAD: 0x%08x\n", error->head[ring]);
644 seq_printf(m, " TAIL: 0x%08x\n", error->tail[ring]);
645 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]);
646 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]);
647 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]);
648 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone[ring]);
649 if (ring == RCS && INTEL_INFO(dev)->gen >= 4)
650 seq_printf(m, " BBADDR: 0x%08llx\n", error->bbaddr);
651
652 if (INTEL_INFO(dev)->gen >= 4)
653 seq_printf(m, " INSTPS: 0x%08x\n", error->instps[ring]);
654 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm[ring]);
655 seq_printf(m, " FADDR: 0x%08x\n", error->faddr[ring]);
656 if (INTEL_INFO(dev)->gen >= 6) {
657 seq_printf(m, " RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
658 seq_printf(m, " FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
659 seq_printf(m, " SYNC_0: 0x%08x\n",
660 error->semaphore_mboxes[ring][0]);
661 seq_printf(m, " SYNC_1: 0x%08x\n",
662 error->semaphore_mboxes[ring][1]);
663 }
664 seq_printf(m, " seqno: 0x%08x\n", error->seqno[ring]);
665 seq_printf(m, " waiting: %s\n", yesno(error->waiting[ring]));
666 seq_printf(m, " ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
667 seq_printf(m, " ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
668 }
669
670 struct i915_error_state_file_priv {
671 struct drm_device *dev;
672 struct drm_i915_error_state *error;
673 };
674
675 static int i915_error_state(struct seq_file *m, void *unused)
676 {
677 struct i915_error_state_file_priv *error_priv = m->private;
678 struct drm_device *dev = error_priv->dev;
679 drm_i915_private_t *dev_priv = dev->dev_private;
680 struct drm_i915_error_state *error = error_priv->error;
681 struct intel_ring_buffer *ring;
682 int i, j, page, offset, elt;
683
684 if (!error) {
685 seq_printf(m, "no error state collected\n");
686 return 0;
687 }
688
689 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
690 error->time.tv_usec);
691 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
692 seq_printf(m, "EIR: 0x%08x\n", error->eir);
693 seq_printf(m, "IER: 0x%08x\n", error->ier);
694 seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
695 seq_printf(m, "CCID: 0x%08x\n", error->ccid);
696
697 for (i = 0; i < dev_priv->num_fence_regs; i++)
698 seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]);
699
700 for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++)
701 seq_printf(m, " INSTDONE_%d: 0x%08x\n", i, error->extra_instdone[i]);
702
703 if (INTEL_INFO(dev)->gen >= 6) {
704 seq_printf(m, "ERROR: 0x%08x\n", error->error);
705 seq_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
706 }
707
708 if (INTEL_INFO(dev)->gen == 7)
709 seq_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
710
711 for_each_ring(ring, dev_priv, i)
712 i915_ring_error_state(m, dev, error, i);
713
714 if (error->active_bo)
715 print_error_buffers(m, "Active",
716 error->active_bo,
717 error->active_bo_count);
718
719 if (error->pinned_bo)
720 print_error_buffers(m, "Pinned",
721 error->pinned_bo,
722 error->pinned_bo_count);
723
724 for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
725 struct drm_i915_error_object *obj;
726
727 if ((obj = error->ring[i].batchbuffer)) {
728 seq_printf(m, "%s --- gtt_offset = 0x%08x\n",
729 dev_priv->ring[i].name,
730 obj->gtt_offset);
731 offset = 0;
732 for (page = 0; page < obj->page_count; page++) {
733 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
734 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
735 offset += 4;
736 }
737 }
738 }
739
740 if (error->ring[i].num_requests) {
741 seq_printf(m, "%s --- %d requests\n",
742 dev_priv->ring[i].name,
743 error->ring[i].num_requests);
744 for (j = 0; j < error->ring[i].num_requests; j++) {
745 seq_printf(m, " seqno 0x%08x, emitted %ld, tail 0x%08x\n",
746 error->ring[i].requests[j].seqno,
747 error->ring[i].requests[j].jiffies,
748 error->ring[i].requests[j].tail);
749 }
750 }
751
752 if ((obj = error->ring[i].ringbuffer)) {
753 seq_printf(m, "%s --- ringbuffer = 0x%08x\n",
754 dev_priv->ring[i].name,
755 obj->gtt_offset);
756 offset = 0;
757 for (page = 0; page < obj->page_count; page++) {
758 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
759 seq_printf(m, "%08x : %08x\n",
760 offset,
761 obj->pages[page][elt]);
762 offset += 4;
763 }
764 }
765 }
766 }
767
768 if (error->overlay)
769 intel_overlay_print_error_state(m, error->overlay);
770
771 if (error->display)
772 intel_display_print_error_state(m, dev, error->display);
773
774 return 0;
775 }
776
777 static ssize_t
778 i915_error_state_write(struct file *filp,
779 const char __user *ubuf,
780 size_t cnt,
781 loff_t *ppos)
782 {
783 struct seq_file *m = filp->private_data;
784 struct i915_error_state_file_priv *error_priv = m->private;
785 struct drm_device *dev = error_priv->dev;
786 int ret;
787
788 DRM_DEBUG_DRIVER("Resetting error state\n");
789
790 ret = mutex_lock_interruptible(&dev->struct_mutex);
791 if (ret)
792 return ret;
793
794 i915_destroy_error_state(dev);
795 mutex_unlock(&dev->struct_mutex);
796
797 return cnt;
798 }
799
800 static int i915_error_state_open(struct inode *inode, struct file *file)
801 {
802 struct drm_device *dev = inode->i_private;
803 drm_i915_private_t *dev_priv = dev->dev_private;
804 struct i915_error_state_file_priv *error_priv;
805 unsigned long flags;
806
807 error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL);
808 if (!error_priv)
809 return -ENOMEM;
810
811 error_priv->dev = dev;
812
813 spin_lock_irqsave(&dev_priv->error_lock, flags);
814 error_priv->error = dev_priv->first_error;
815 if (error_priv->error)
816 kref_get(&error_priv->error->ref);
817 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
818
819 return single_open(file, i915_error_state, error_priv);
820 }
821
822 static int i915_error_state_release(struct inode *inode, struct file *file)
823 {
824 struct seq_file *m = file->private_data;
825 struct i915_error_state_file_priv *error_priv = m->private;
826
827 if (error_priv->error)
828 kref_put(&error_priv->error->ref, i915_error_state_free);
829 kfree(error_priv);
830
831 return single_release(inode, file);
832 }
833
834 static const struct file_operations i915_error_state_fops = {
835 .owner = THIS_MODULE,
836 .open = i915_error_state_open,
837 .read = seq_read,
838 .write = i915_error_state_write,
839 .llseek = default_llseek,
840 .release = i915_error_state_release,
841 };
842
843 static int i915_rstdby_delays(struct seq_file *m, void *unused)
844 {
845 struct drm_info_node *node = (struct drm_info_node *) m->private;
846 struct drm_device *dev = node->minor->dev;
847 drm_i915_private_t *dev_priv = dev->dev_private;
848 u16 crstanddelay;
849 int ret;
850
851 ret = mutex_lock_interruptible(&dev->struct_mutex);
852 if (ret)
853 return ret;
854
855 crstanddelay = I915_READ16(CRSTANDVID);
856
857 mutex_unlock(&dev->struct_mutex);
858
859 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
860
861 return 0;
862 }
863
864 static int i915_cur_delayinfo(struct seq_file *m, void *unused)
865 {
866 struct drm_info_node *node = (struct drm_info_node *) m->private;
867 struct drm_device *dev = node->minor->dev;
868 drm_i915_private_t *dev_priv = dev->dev_private;
869 int ret;
870
871 if (IS_GEN5(dev)) {
872 u16 rgvswctl = I915_READ16(MEMSWCTL);
873 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
874
875 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
876 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
877 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
878 MEMSTAT_VID_SHIFT);
879 seq_printf(m, "Current P-state: %d\n",
880 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
881 } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
882 u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
883 u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
884 u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
885 u32 rpstat;
886 u32 rpupei, rpcurup, rpprevup;
887 u32 rpdownei, rpcurdown, rpprevdown;
888 int max_freq;
889
890 /* RPSTAT1 is in the GT power well */
891 ret = mutex_lock_interruptible(&dev->struct_mutex);
892 if (ret)
893 return ret;
894
895 gen6_gt_force_wake_get(dev_priv);
896
897 rpstat = I915_READ(GEN6_RPSTAT1);
898 rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
899 rpcurup = I915_READ(GEN6_RP_CUR_UP);
900 rpprevup = I915_READ(GEN6_RP_PREV_UP);
901 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
902 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
903 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);
904
905 gen6_gt_force_wake_put(dev_priv);
906 mutex_unlock(&dev->struct_mutex);
907
908 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
909 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
910 seq_printf(m, "Render p-state ratio: %d\n",
911 (gt_perf_status & 0xff00) >> 8);
912 seq_printf(m, "Render p-state VID: %d\n",
913 gt_perf_status & 0xff);
914 seq_printf(m, "Render p-state limit: %d\n",
915 rp_state_limits & 0xff);
916 seq_printf(m, "CAGF: %dMHz\n", ((rpstat & GEN6_CAGF_MASK) >>
917 GEN6_CAGF_SHIFT) * 50);
918 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
919 GEN6_CURICONT_MASK);
920 seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
921 GEN6_CURBSYTAVG_MASK);
922 seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
923 GEN6_CURBSYTAVG_MASK);
924 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
925 GEN6_CURIAVG_MASK);
926 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
927 GEN6_CURBSYTAVG_MASK);
928 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
929 GEN6_CURBSYTAVG_MASK);
930
931 max_freq = (rp_state_cap & 0xff0000) >> 16;
932 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
933 max_freq * 50);
934
935 max_freq = (rp_state_cap & 0xff00) >> 8;
936 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
937 max_freq * 50);
938
939 max_freq = rp_state_cap & 0xff;
940 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
941 max_freq * 50);
942 } else {
943 seq_printf(m, "no P-state info available\n");
944 }
945
946 return 0;
947 }
948
949 static int i915_delayfreq_table(struct seq_file *m, void *unused)
950 {
951 struct drm_info_node *node = (struct drm_info_node *) m->private;
952 struct drm_device *dev = node->minor->dev;
953 drm_i915_private_t *dev_priv = dev->dev_private;
954 u32 delayfreq;
955 int ret, i;
956
957 ret = mutex_lock_interruptible(&dev->struct_mutex);
958 if (ret)
959 return ret;
960
961 for (i = 0; i < 16; i++) {
962 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
963 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
964 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
965 }
966
967 mutex_unlock(&dev->struct_mutex);
968
969 return 0;
970 }
971
972 static inline int MAP_TO_MV(int map)
973 {
974 return 1250 - (map * 25);
975 }
976
977 static int i915_inttoext_table(struct seq_file *m, void *unused)
978 {
979 struct drm_info_node *node = (struct drm_info_node *) m->private;
980 struct drm_device *dev = node->minor->dev;
981 drm_i915_private_t *dev_priv = dev->dev_private;
982 u32 inttoext;
983 int ret, i;
984
985 ret = mutex_lock_interruptible(&dev->struct_mutex);
986 if (ret)
987 return ret;
988
989 for (i = 1; i <= 32; i++) {
990 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
991 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
992 }
993
994 mutex_unlock(&dev->struct_mutex);
995
996 return 0;
997 }
998
999 static int ironlake_drpc_info(struct seq_file *m)
1000 {
1001 struct drm_info_node *node = (struct drm_info_node *) m->private;
1002 struct drm_device *dev = node->minor->dev;
1003 drm_i915_private_t *dev_priv = dev->dev_private;
1004 u32 rgvmodectl, rstdbyctl;
1005 u16 crstandvid;
1006 int ret;
1007
1008 ret = mutex_lock_interruptible(&dev->struct_mutex);
1009 if (ret)
1010 return ret;
1011
1012 rgvmodectl = I915_READ(MEMMODECTL);
1013 rstdbyctl = I915_READ(RSTDBYCTL);
1014 crstandvid = I915_READ16(CRSTANDVID);
1015
1016 mutex_unlock(&dev->struct_mutex);
1017
1018 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
1019 "yes" : "no");
1020 seq_printf(m, "Boost freq: %d\n",
1021 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
1022 MEMMODE_BOOST_FREQ_SHIFT);
1023 seq_printf(m, "HW control enabled: %s\n",
1024 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
1025 seq_printf(m, "SW control enabled: %s\n",
1026 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
1027 seq_printf(m, "Gated voltage change: %s\n",
1028 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
1029 seq_printf(m, "Starting frequency: P%d\n",
1030 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
1031 seq_printf(m, "Max P-state: P%d\n",
1032 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
1033 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
1034 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
1035 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
1036 seq_printf(m, "Render standby enabled: %s\n",
1037 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
1038 seq_printf(m, "Current RS state: ");
1039 switch (rstdbyctl & RSX_STATUS_MASK) {
1040 case RSX_STATUS_ON:
1041 seq_printf(m, "on\n");
1042 break;
1043 case RSX_STATUS_RC1:
1044 seq_printf(m, "RC1\n");
1045 break;
1046 case RSX_STATUS_RC1E:
1047 seq_printf(m, "RC1E\n");
1048 break;
1049 case RSX_STATUS_RS1:
1050 seq_printf(m, "RS1\n");
1051 break;
1052 case RSX_STATUS_RS2:
1053 seq_printf(m, "RS2 (RC6)\n");
1054 break;
1055 case RSX_STATUS_RS3:
1056 seq_printf(m, "RC3 (RC6+)\n");
1057 break;
1058 default:
1059 seq_printf(m, "unknown\n");
1060 break;
1061 }
1062
1063 return 0;
1064 }
1065
1066 static int gen6_drpc_info(struct seq_file *m)
1067 {
1068
1069 struct drm_info_node *node = (struct drm_info_node *) m->private;
1070 struct drm_device *dev = node->minor->dev;
1071 struct drm_i915_private *dev_priv = dev->dev_private;
1072 u32 rpmodectl1, gt_core_status, rcctl1;
1073 unsigned forcewake_count;
1074 int count=0, ret;
1075
1076
1077 ret = mutex_lock_interruptible(&dev->struct_mutex);
1078 if (ret)
1079 return ret;
1080
1081 spin_lock_irq(&dev_priv->gt_lock);
1082 forcewake_count = dev_priv->forcewake_count;
1083 spin_unlock_irq(&dev_priv->gt_lock);
1084
1085 if (forcewake_count) {
1086 seq_printf(m, "RC information inaccurate because somebody "
1087 "holds a forcewake reference \n");
1088 } else {
1089 /* NB: we cannot use forcewake, else we read the wrong values */
1090 while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
1091 udelay(10);
1092 seq_printf(m, "RC information accurate: %s\n", yesno(count < 51));
1093 }
1094
1095 gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
1096 trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4);
1097
1098 rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
1099 rcctl1 = I915_READ(GEN6_RC_CONTROL);
1100 mutex_unlock(&dev->struct_mutex);
1101
1102 seq_printf(m, "Video Turbo Mode: %s\n",
1103 yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));
1104 seq_printf(m, "HW control enabled: %s\n",
1105 yesno(rpmodectl1 & GEN6_RP_ENABLE));
1106 seq_printf(m, "SW control enabled: %s\n",
1107 yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
1108 GEN6_RP_MEDIA_SW_MODE));
1109 seq_printf(m, "RC1e Enabled: %s\n",
1110 yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));
1111 seq_printf(m, "RC6 Enabled: %s\n",
1112 yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));
1113 seq_printf(m, "Deep RC6 Enabled: %s\n",
1114 yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));
1115 seq_printf(m, "Deepest RC6 Enabled: %s\n",
1116 yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE));
1117 seq_printf(m, "Current RC state: ");
1118 switch (gt_core_status & GEN6_RCn_MASK) {
1119 case GEN6_RC0:
1120 if (gt_core_status & GEN6_CORE_CPD_STATE_MASK)
1121 seq_printf(m, "Core Power Down\n");
1122 else
1123 seq_printf(m, "on\n");
1124 break;
1125 case GEN6_RC3:
1126 seq_printf(m, "RC3\n");
1127 break;
1128 case GEN6_RC6:
1129 seq_printf(m, "RC6\n");
1130 break;
1131 case GEN6_RC7:
1132 seq_printf(m, "RC7\n");
1133 break;
1134 default:
1135 seq_printf(m, "Unknown\n");
1136 break;
1137 }
1138
1139 seq_printf(m, "Core Power Down: %s\n",
1140 yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
1141
1142 /* Not exactly sure what this is */
1143 seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n",
1144 I915_READ(GEN6_GT_GFX_RC6_LOCKED));
1145 seq_printf(m, "RC6 residency since boot: %u\n",
1146 I915_READ(GEN6_GT_GFX_RC6));
1147 seq_printf(m, "RC6+ residency since boot: %u\n",
1148 I915_READ(GEN6_GT_GFX_RC6p));
1149 seq_printf(m, "RC6++ residency since boot: %u\n",
1150 I915_READ(GEN6_GT_GFX_RC6pp));
1151
1152 return 0;
1153 }
1154
1155 static int i915_drpc_info(struct seq_file *m, void *unused)
1156 {
1157 struct drm_info_node *node = (struct drm_info_node *) m->private;
1158 struct drm_device *dev = node->minor->dev;
1159
1160 if (IS_GEN6(dev) || IS_GEN7(dev))
1161 return gen6_drpc_info(m);
1162 else
1163 return ironlake_drpc_info(m);
1164 }
1165
1166 static int i915_fbc_status(struct seq_file *m, void *unused)
1167 {
1168 struct drm_info_node *node = (struct drm_info_node *) m->private;
1169 struct drm_device *dev = node->minor->dev;
1170 drm_i915_private_t *dev_priv = dev->dev_private;
1171
1172 if (!I915_HAS_FBC(dev)) {
1173 seq_printf(m, "FBC unsupported on this chipset\n");
1174 return 0;
1175 }
1176
1177 if (intel_fbc_enabled(dev)) {
1178 seq_printf(m, "FBC enabled\n");
1179 } else {
1180 seq_printf(m, "FBC disabled: ");
1181 switch (dev_priv->no_fbc_reason) {
1182 case FBC_NO_OUTPUT:
1183 seq_printf(m, "no outputs");
1184 break;
1185 case FBC_STOLEN_TOO_SMALL:
1186 seq_printf(m, "not enough stolen memory");
1187 break;
1188 case FBC_UNSUPPORTED_MODE:
1189 seq_printf(m, "mode not supported");
1190 break;
1191 case FBC_MODE_TOO_LARGE:
1192 seq_printf(m, "mode too large");
1193 break;
1194 case FBC_BAD_PLANE:
1195 seq_printf(m, "FBC unsupported on plane");
1196 break;
1197 case FBC_NOT_TILED:
1198 seq_printf(m, "scanout buffer not tiled");
1199 break;
1200 case FBC_MULTIPLE_PIPES:
1201 seq_printf(m, "multiple pipes are enabled");
1202 break;
1203 case FBC_MODULE_PARAM:
1204 seq_printf(m, "disabled per module param (default off)");
1205 break;
1206 default:
1207 seq_printf(m, "unknown reason");
1208 }
1209 seq_printf(m, "\n");
1210 }
1211 return 0;
1212 }
1213
1214 static int i915_sr_status(struct seq_file *m, void *unused)
1215 {
1216 struct drm_info_node *node = (struct drm_info_node *) m->private;
1217 struct drm_device *dev = node->minor->dev;
1218 drm_i915_private_t *dev_priv = dev->dev_private;
1219 bool sr_enabled = false;
1220
1221 if (HAS_PCH_SPLIT(dev))
1222 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
1223 else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
1224 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
1225 else if (IS_I915GM(dev))
1226 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
1227 else if (IS_PINEVIEW(dev))
1228 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
1229
1230 seq_printf(m, "self-refresh: %s\n",
1231 sr_enabled ? "enabled" : "disabled");
1232
1233 return 0;
1234 }
1235
1236 static int i915_emon_status(struct seq_file *m, void *unused)
1237 {
1238 struct drm_info_node *node = (struct drm_info_node *) m->private;
1239 struct drm_device *dev = node->minor->dev;
1240 drm_i915_private_t *dev_priv = dev->dev_private;
1241 unsigned long temp, chipset, gfx;
1242 int ret;
1243
1244 if (!IS_GEN5(dev))
1245 return -ENODEV;
1246
1247 ret = mutex_lock_interruptible(&dev->struct_mutex);
1248 if (ret)
1249 return ret;
1250
1251 temp = i915_mch_val(dev_priv);
1252 chipset = i915_chipset_val(dev_priv);
1253 gfx = i915_gfx_val(dev_priv);
1254 mutex_unlock(&dev->struct_mutex);
1255
1256 seq_printf(m, "GMCH temp: %ld\n", temp);
1257 seq_printf(m, "Chipset power: %ld\n", chipset);
1258 seq_printf(m, "GFX power: %ld\n", gfx);
1259 seq_printf(m, "Total power: %ld\n", chipset + gfx);
1260
1261 return 0;
1262 }
1263
1264 static int i915_ring_freq_table(struct seq_file *m, void *unused)
1265 {
1266 struct drm_info_node *node = (struct drm_info_node *) m->private;
1267 struct drm_device *dev = node->minor->dev;
1268 drm_i915_private_t *dev_priv = dev->dev_private;
1269 int ret;
1270 int gpu_freq, ia_freq;
1271
1272 if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
1273 seq_printf(m, "unsupported on this chipset\n");
1274 return 0;
1275 }
1276
1277 ret = mutex_lock_interruptible(&dev->struct_mutex);
1278 if (ret)
1279 return ret;
1280
1281 seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\n");
1282
1283 for (gpu_freq = dev_priv->rps.min_delay;
1284 gpu_freq <= dev_priv->rps.max_delay;
1285 gpu_freq++) {
1286 I915_WRITE(GEN6_PCODE_DATA, gpu_freq);
1287 I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY |
1288 GEN6_PCODE_READ_MIN_FREQ_TABLE);
1289 if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &
1290 GEN6_PCODE_READY) == 0, 10)) {
1291 DRM_ERROR("pcode read of freq table timed out\n");
1292 continue;
1293 }
1294 ia_freq = I915_READ(GEN6_PCODE_DATA);
1295 seq_printf(m, "%d\t\t%d\n", gpu_freq * 50, ia_freq * 100);
1296 }
1297
1298 mutex_unlock(&dev->struct_mutex);
1299
1300 return 0;
1301 }
1302
1303 static int i915_gfxec(struct seq_file *m, void *unused)
1304 {
1305 struct drm_info_node *node = (struct drm_info_node *) m->private;
1306 struct drm_device *dev = node->minor->dev;
1307 drm_i915_private_t *dev_priv = dev->dev_private;
1308 int ret;
1309
1310 ret = mutex_lock_interruptible(&dev->struct_mutex);
1311 if (ret)
1312 return ret;
1313
1314 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1315
1316 mutex_unlock(&dev->struct_mutex);
1317
1318 return 0;
1319 }
1320
1321 static int i915_opregion(struct seq_file *m, void *unused)
1322 {
1323 struct drm_info_node *node = (struct drm_info_node *) m->private;
1324 struct drm_device *dev = node->minor->dev;
1325 drm_i915_private_t *dev_priv = dev->dev_private;
1326 struct intel_opregion *opregion = &dev_priv->opregion;
1327 void *data = kmalloc(OPREGION_SIZE, GFP_KERNEL);
1328 int ret;
1329
1330 if (data == NULL)
1331 return -ENOMEM;
1332
1333 ret = mutex_lock_interruptible(&dev->struct_mutex);
1334 if (ret)
1335 goto out;
1336
1337 if (opregion->header) {
1338 memcpy_fromio(data, opregion->header, OPREGION_SIZE);
1339 seq_write(m, data, OPREGION_SIZE);
1340 }
1341
1342 mutex_unlock(&dev->struct_mutex);
1343
1344 out:
1345 kfree(data);
1346 return 0;
1347 }
1348
1349 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1350 {
1351 struct drm_info_node *node = (struct drm_info_node *) m->private;
1352 struct drm_device *dev = node->minor->dev;
1353 drm_i915_private_t *dev_priv = dev->dev_private;
1354 struct intel_fbdev *ifbdev;
1355 struct intel_framebuffer *fb;
1356 int ret;
1357
1358 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1359 if (ret)
1360 return ret;
1361
1362 ifbdev = dev_priv->fbdev;
1363 fb = to_intel_framebuffer(ifbdev->helper.fb);
1364
1365 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
1366 fb->base.width,
1367 fb->base.height,
1368 fb->base.depth,
1369 fb->base.bits_per_pixel);
1370 describe_obj(m, fb->obj);
1371 seq_printf(m, "\n");
1372
1373 list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
1374 if (&fb->base == ifbdev->helper.fb)
1375 continue;
1376
1377 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
1378 fb->base.width,
1379 fb->base.height,
1380 fb->base.depth,
1381 fb->base.bits_per_pixel);
1382 describe_obj(m, fb->obj);
1383 seq_printf(m, "\n");
1384 }
1385
1386 mutex_unlock(&dev->mode_config.mutex);
1387
1388 return 0;
1389 }
1390
1391 static int i915_context_status(struct seq_file *m, void *unused)
1392 {
1393 struct drm_info_node *node = (struct drm_info_node *) m->private;
1394 struct drm_device *dev = node->minor->dev;
1395 drm_i915_private_t *dev_priv = dev->dev_private;
1396 int ret;
1397
1398 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1399 if (ret)
1400 return ret;
1401
1402 if (dev_priv->pwrctx) {
1403 seq_printf(m, "power context ");
1404 describe_obj(m, dev_priv->pwrctx);
1405 seq_printf(m, "\n");
1406 }
1407
1408 if (dev_priv->renderctx) {
1409 seq_printf(m, "render context ");
1410 describe_obj(m, dev_priv->renderctx);
1411 seq_printf(m, "\n");
1412 }
1413
1414 mutex_unlock(&dev->mode_config.mutex);
1415
1416 return 0;
1417 }
1418
1419 static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
1420 {
1421 struct drm_info_node *node = (struct drm_info_node *) m->private;
1422 struct drm_device *dev = node->minor->dev;
1423 struct drm_i915_private *dev_priv = dev->dev_private;
1424 unsigned forcewake_count;
1425
1426 spin_lock_irq(&dev_priv->gt_lock);
1427 forcewake_count = dev_priv->forcewake_count;
1428 spin_unlock_irq(&dev_priv->gt_lock);
1429
1430 seq_printf(m, "forcewake count = %u\n", forcewake_count);
1431
1432 return 0;
1433 }
1434
1435 static const char *swizzle_string(unsigned swizzle)
1436 {
1437 switch(swizzle) {
1438 case I915_BIT_6_SWIZZLE_NONE:
1439 return "none";
1440 case I915_BIT_6_SWIZZLE_9:
1441 return "bit9";
1442 case I915_BIT_6_SWIZZLE_9_10:
1443 return "bit9/bit10";
1444 case I915_BIT_6_SWIZZLE_9_11:
1445 return "bit9/bit11";
1446 case I915_BIT_6_SWIZZLE_9_10_11:
1447 return "bit9/bit10/bit11";
1448 case I915_BIT_6_SWIZZLE_9_17:
1449 return "bit9/bit17";
1450 case I915_BIT_6_SWIZZLE_9_10_17:
1451 return "bit9/bit10/bit17";
1452 case I915_BIT_6_SWIZZLE_UNKNOWN:
1453 return "unkown";
1454 }
1455
1456 return "bug";
1457 }
1458
1459 static int i915_swizzle_info(struct seq_file *m, void *data)
1460 {
1461 struct drm_info_node *node = (struct drm_info_node *) m->private;
1462 struct drm_device *dev = node->minor->dev;
1463 struct drm_i915_private *dev_priv = dev->dev_private;
1464 int ret;
1465
1466 ret = mutex_lock_interruptible(&dev->struct_mutex);
1467 if (ret)
1468 return ret;
1469
1470 seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
1471 swizzle_string(dev_priv->mm.bit_6_swizzle_x));
1472 seq_printf(m, "bit6 swizzle for Y-tiling = %s\n",
1473 swizzle_string(dev_priv->mm.bit_6_swizzle_y));
1474
1475 if (IS_GEN3(dev) || IS_GEN4(dev)) {
1476 seq_printf(m, "DDC = 0x%08x\n",
1477 I915_READ(DCC));
1478 seq_printf(m, "C0DRB3 = 0x%04x\n",
1479 I915_READ16(C0DRB3));
1480 seq_printf(m, "C1DRB3 = 0x%04x\n",
1481 I915_READ16(C1DRB3));
1482 } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
1483 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
1484 I915_READ(MAD_DIMM_C0));
1485 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
1486 I915_READ(MAD_DIMM_C1));
1487 seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n",
1488 I915_READ(MAD_DIMM_C2));
1489 seq_printf(m, "TILECTL = 0x%08x\n",
1490 I915_READ(TILECTL));
1491 seq_printf(m, "ARB_MODE = 0x%08x\n",
1492 I915_READ(ARB_MODE));
1493 seq_printf(m, "DISP_ARB_CTL = 0x%08x\n",
1494 I915_READ(DISP_ARB_CTL));
1495 }
1496 mutex_unlock(&dev->struct_mutex);
1497
1498 return 0;
1499 }
1500
1501 static int i915_ppgtt_info(struct seq_file *m, void *data)
1502 {
1503 struct drm_info_node *node = (struct drm_info_node *) m->private;
1504 struct drm_device *dev = node->minor->dev;
1505 struct drm_i915_private *dev_priv = dev->dev_private;
1506 struct intel_ring_buffer *ring;
1507 int i, ret;
1508
1509
1510 ret = mutex_lock_interruptible(&dev->struct_mutex);
1511 if (ret)
1512 return ret;
1513 if (INTEL_INFO(dev)->gen == 6)
1514 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));
1515
1516 for_each_ring(ring, dev_priv, i) {
1517 seq_printf(m, "%s\n", ring->name);
1518 if (INTEL_INFO(dev)->gen == 7)
1519 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring)));
1520 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring)));
1521 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring)));
1522 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring)));
1523 }
1524 if (dev_priv->mm.aliasing_ppgtt) {
1525 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
1526
1527 seq_printf(m, "aliasing PPGTT:\n");
1528 seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset);
1529 }
1530 seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK));
1531 mutex_unlock(&dev->struct_mutex);
1532
1533 return 0;
1534 }
1535
1536 static int i915_dpio_info(struct seq_file *m, void *data)
1537 {
1538 struct drm_info_node *node = (struct drm_info_node *) m->private;
1539 struct drm_device *dev = node->minor->dev;
1540 struct drm_i915_private *dev_priv = dev->dev_private;
1541 int ret;
1542
1543
1544 if (!IS_VALLEYVIEW(dev)) {
1545 seq_printf(m, "unsupported\n");
1546 return 0;
1547 }
1548
1549 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1550 if (ret)
1551 return ret;
1552
1553 seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));
1554
1555 seq_printf(m, "DPIO_DIV_A: 0x%08x\n",
1556 intel_dpio_read(dev_priv, _DPIO_DIV_A));
1557 seq_printf(m, "DPIO_DIV_B: 0x%08x\n",
1558 intel_dpio_read(dev_priv, _DPIO_DIV_B));
1559
1560 seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",
1561 intel_dpio_read(dev_priv, _DPIO_REFSFR_A));
1562 seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",
1563 intel_dpio_read(dev_priv, _DPIO_REFSFR_B));
1564
1565 seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",
1566 intel_dpio_read(dev_priv, _DPIO_CORE_CLK_A));
1567 seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
1568 intel_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
1569
1570 seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n",
1571 intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));
1572 seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n",
1573 intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));
1574
1575 seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
1576 intel_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
1577
1578 mutex_unlock(&dev->mode_config.mutex);
1579
1580 return 0;
1581 }
1582
1583 static ssize_t
1584 i915_wedged_read(struct file *filp,
1585 char __user *ubuf,
1586 size_t max,
1587 loff_t *ppos)
1588 {
1589 struct drm_device *dev = filp->private_data;
1590 drm_i915_private_t *dev_priv = dev->dev_private;
1591 char buf[80];
1592 int len;
1593
1594 len = snprintf(buf, sizeof(buf),
1595 "wedged : %d\n",
1596 atomic_read(&dev_priv->mm.wedged));
1597
1598 if (len > sizeof(buf))
1599 len = sizeof(buf);
1600
1601 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1602 }
1603
1604 static ssize_t
1605 i915_wedged_write(struct file *filp,
1606 const char __user *ubuf,
1607 size_t cnt,
1608 loff_t *ppos)
1609 {
1610 struct drm_device *dev = filp->private_data;
1611 char buf[20];
1612 int val = 1;
1613
1614 if (cnt > 0) {
1615 if (cnt > sizeof(buf) - 1)
1616 return -EINVAL;
1617
1618 if (copy_from_user(buf, ubuf, cnt))
1619 return -EFAULT;
1620 buf[cnt] = 0;
1621
1622 val = simple_strtoul(buf, NULL, 0);
1623 }
1624
1625 DRM_INFO("Manually setting wedged to %d\n", val);
1626 i915_handle_error(dev, val);
1627
1628 return cnt;
1629 }
1630
1631 static const struct file_operations i915_wedged_fops = {
1632 .owner = THIS_MODULE,
1633 .open = simple_open,
1634 .read = i915_wedged_read,
1635 .write = i915_wedged_write,
1636 .llseek = default_llseek,
1637 };
1638
1639 static ssize_t
1640 i915_ring_stop_read(struct file *filp,
1641 char __user *ubuf,
1642 size_t max,
1643 loff_t *ppos)
1644 {
1645 struct drm_device *dev = filp->private_data;
1646 drm_i915_private_t *dev_priv = dev->dev_private;
1647 char buf[20];
1648 int len;
1649
1650 len = snprintf(buf, sizeof(buf),
1651 "0x%08x\n", dev_priv->stop_rings);
1652
1653 if (len > sizeof(buf))
1654 len = sizeof(buf);
1655
1656 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1657 }
1658
1659 static ssize_t
1660 i915_ring_stop_write(struct file *filp,
1661 const char __user *ubuf,
1662 size_t cnt,
1663 loff_t *ppos)
1664 {
1665 struct drm_device *dev = filp->private_data;
1666 struct drm_i915_private *dev_priv = dev->dev_private;
1667 char buf[20];
1668 int val = 0, ret;
1669
1670 if (cnt > 0) {
1671 if (cnt > sizeof(buf) - 1)
1672 return -EINVAL;
1673
1674 if (copy_from_user(buf, ubuf, cnt))
1675 return -EFAULT;
1676 buf[cnt] = 0;
1677
1678 val = simple_strtoul(buf, NULL, 0);
1679 }
1680
1681 DRM_DEBUG_DRIVER("Stopping rings 0x%08x\n", val);
1682
1683 ret = mutex_lock_interruptible(&dev->struct_mutex);
1684 if (ret)
1685 return ret;
1686
1687 dev_priv->stop_rings = val;
1688 mutex_unlock(&dev->struct_mutex);
1689
1690 return cnt;
1691 }
1692
1693 static const struct file_operations i915_ring_stop_fops = {
1694 .owner = THIS_MODULE,
1695 .open = simple_open,
1696 .read = i915_ring_stop_read,
1697 .write = i915_ring_stop_write,
1698 .llseek = default_llseek,
1699 };
1700
1701 static ssize_t
1702 i915_max_freq_read(struct file *filp,
1703 char __user *ubuf,
1704 size_t max,
1705 loff_t *ppos)
1706 {
1707 struct drm_device *dev = filp->private_data;
1708 drm_i915_private_t *dev_priv = dev->dev_private;
1709 char buf[80];
1710 int len, ret;
1711
1712 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1713 return -ENODEV;
1714
1715 ret = mutex_lock_interruptible(&dev->struct_mutex);
1716 if (ret)
1717 return ret;
1718
1719 len = snprintf(buf, sizeof(buf),
1720 "max freq: %d\n", dev_priv->rps.max_delay * 50);
1721 mutex_unlock(&dev->struct_mutex);
1722
1723 if (len > sizeof(buf))
1724 len = sizeof(buf);
1725
1726 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1727 }
1728
1729 static ssize_t
1730 i915_max_freq_write(struct file *filp,
1731 const char __user *ubuf,
1732 size_t cnt,
1733 loff_t *ppos)
1734 {
1735 struct drm_device *dev = filp->private_data;
1736 struct drm_i915_private *dev_priv = dev->dev_private;
1737 char buf[20];
1738 int val = 1, ret;
1739
1740 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1741 return -ENODEV;
1742
1743 if (cnt > 0) {
1744 if (cnt > sizeof(buf) - 1)
1745 return -EINVAL;
1746
1747 if (copy_from_user(buf, ubuf, cnt))
1748 return -EFAULT;
1749 buf[cnt] = 0;
1750
1751 val = simple_strtoul(buf, NULL, 0);
1752 }
1753
1754 DRM_DEBUG_DRIVER("Manually setting max freq to %d\n", val);
1755
1756 ret = mutex_lock_interruptible(&dev->struct_mutex);
1757 if (ret)
1758 return ret;
1759
1760 /*
1761 * Turbo will still be enabled, but won't go above the set value.
1762 */
1763 dev_priv->rps.max_delay = val / 50;
1764
1765 gen6_set_rps(dev, val / 50);
1766 mutex_unlock(&dev->struct_mutex);
1767
1768 return cnt;
1769 }
1770
1771 static const struct file_operations i915_max_freq_fops = {
1772 .owner = THIS_MODULE,
1773 .open = simple_open,
1774 .read = i915_max_freq_read,
1775 .write = i915_max_freq_write,
1776 .llseek = default_llseek,
1777 };
1778
1779 static ssize_t
1780 i915_min_freq_read(struct file *filp, char __user *ubuf, size_t max,
1781 loff_t *ppos)
1782 {
1783 struct drm_device *dev = filp->private_data;
1784 drm_i915_private_t *dev_priv = dev->dev_private;
1785 char buf[80];
1786 int len, ret;
1787
1788 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1789 return -ENODEV;
1790
1791 ret = mutex_lock_interruptible(&dev->struct_mutex);
1792 if (ret)
1793 return ret;
1794
1795 len = snprintf(buf, sizeof(buf),
1796 "min freq: %d\n", dev_priv->rps.min_delay * 50);
1797 mutex_unlock(&dev->struct_mutex);
1798
1799 if (len > sizeof(buf))
1800 len = sizeof(buf);
1801
1802 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1803 }
1804
1805 static ssize_t
1806 i915_min_freq_write(struct file *filp, const char __user *ubuf, size_t cnt,
1807 loff_t *ppos)
1808 {
1809 struct drm_device *dev = filp->private_data;
1810 struct drm_i915_private *dev_priv = dev->dev_private;
1811 char buf[20];
1812 int val = 1, ret;
1813
1814 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1815 return -ENODEV;
1816
1817 if (cnt > 0) {
1818 if (cnt > sizeof(buf) - 1)
1819 return -EINVAL;
1820
1821 if (copy_from_user(buf, ubuf, cnt))
1822 return -EFAULT;
1823 buf[cnt] = 0;
1824
1825 val = simple_strtoul(buf, NULL, 0);
1826 }
1827
1828 DRM_DEBUG_DRIVER("Manually setting min freq to %d\n", val);
1829
1830 ret = mutex_lock_interruptible(&dev->struct_mutex);
1831 if (ret)
1832 return ret;
1833
1834 /*
1835 * Turbo will still be enabled, but won't go below the set value.
1836 */
1837 dev_priv->rps.min_delay = val / 50;
1838
1839 gen6_set_rps(dev, val / 50);
1840 mutex_unlock(&dev->struct_mutex);
1841
1842 return cnt;
1843 }
1844
1845 static const struct file_operations i915_min_freq_fops = {
1846 .owner = THIS_MODULE,
1847 .open = simple_open,
1848 .read = i915_min_freq_read,
1849 .write = i915_min_freq_write,
1850 .llseek = default_llseek,
1851 };
1852
1853 static ssize_t
1854 i915_cache_sharing_read(struct file *filp,
1855 char __user *ubuf,
1856 size_t max,
1857 loff_t *ppos)
1858 {
1859 struct drm_device *dev = filp->private_data;
1860 drm_i915_private_t *dev_priv = dev->dev_private;
1861 char buf[80];
1862 u32 snpcr;
1863 int len, ret;
1864
1865 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1866 return -ENODEV;
1867
1868 ret = mutex_lock_interruptible(&dev->struct_mutex);
1869 if (ret)
1870 return ret;
1871
1872 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1873 mutex_unlock(&dev_priv->dev->struct_mutex);
1874
1875 len = snprintf(buf, sizeof(buf),
1876 "%d\n", (snpcr & GEN6_MBC_SNPCR_MASK) >>
1877 GEN6_MBC_SNPCR_SHIFT);
1878
1879 if (len > sizeof(buf))
1880 len = sizeof(buf);
1881
1882 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1883 }
1884
1885 static ssize_t
1886 i915_cache_sharing_write(struct file *filp,
1887 const char __user *ubuf,
1888 size_t cnt,
1889 loff_t *ppos)
1890 {
1891 struct drm_device *dev = filp->private_data;
1892 struct drm_i915_private *dev_priv = dev->dev_private;
1893 char buf[20];
1894 u32 snpcr;
1895 int val = 1;
1896
1897 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1898 return -ENODEV;
1899
1900 if (cnt > 0) {
1901 if (cnt > sizeof(buf) - 1)
1902 return -EINVAL;
1903
1904 if (copy_from_user(buf, ubuf, cnt))
1905 return -EFAULT;
1906 buf[cnt] = 0;
1907
1908 val = simple_strtoul(buf, NULL, 0);
1909 }
1910
1911 if (val < 0 || val > 3)
1912 return -EINVAL;
1913
1914 DRM_DEBUG_DRIVER("Manually setting uncore sharing to %d\n", val);
1915
1916 /* Update the cache sharing policy here as well */
1917 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1918 snpcr &= ~GEN6_MBC_SNPCR_MASK;
1919 snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);
1920 I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);
1921
1922 return cnt;
1923 }
1924
1925 static const struct file_operations i915_cache_sharing_fops = {
1926 .owner = THIS_MODULE,
1927 .open = simple_open,
1928 .read = i915_cache_sharing_read,
1929 .write = i915_cache_sharing_write,
1930 .llseek = default_llseek,
1931 };
1932
1933 /* As the drm_debugfs_init() routines are called before dev->dev_private is
1934 * allocated we need to hook into the minor for release. */
1935 static int
1936 drm_add_fake_info_node(struct drm_minor *minor,
1937 struct dentry *ent,
1938 const void *key)
1939 {
1940 struct drm_info_node *node;
1941
1942 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
1943 if (node == NULL) {
1944 debugfs_remove(ent);
1945 return -ENOMEM;
1946 }
1947
1948 node->minor = minor;
1949 node->dent = ent;
1950 node->info_ent = (void *) key;
1951
1952 mutex_lock(&minor->debugfs_lock);
1953 list_add(&node->list, &minor->debugfs_list);
1954 mutex_unlock(&minor->debugfs_lock);
1955
1956 return 0;
1957 }
1958
1959 static int i915_forcewake_open(struct inode *inode, struct file *file)
1960 {
1961 struct drm_device *dev = inode->i_private;
1962 struct drm_i915_private *dev_priv = dev->dev_private;
1963
1964 if (INTEL_INFO(dev)->gen < 6)
1965 return 0;
1966
1967 gen6_gt_force_wake_get(dev_priv);
1968
1969 return 0;
1970 }
1971
1972 static int i915_forcewake_release(struct inode *inode, struct file *file)
1973 {
1974 struct drm_device *dev = inode->i_private;
1975 struct drm_i915_private *dev_priv = dev->dev_private;
1976
1977 if (INTEL_INFO(dev)->gen < 6)
1978 return 0;
1979
1980 gen6_gt_force_wake_put(dev_priv);
1981
1982 return 0;
1983 }
1984
1985 static const struct file_operations i915_forcewake_fops = {
1986 .owner = THIS_MODULE,
1987 .open = i915_forcewake_open,
1988 .release = i915_forcewake_release,
1989 };
1990
1991 static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
1992 {
1993 struct drm_device *dev = minor->dev;
1994 struct dentry *ent;
1995
1996 ent = debugfs_create_file("i915_forcewake_user",
1997 S_IRUSR,
1998 root, dev,
1999 &i915_forcewake_fops);
2000 if (IS_ERR(ent))
2001 return PTR_ERR(ent);
2002
2003 return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops);
2004 }
2005
2006 static int i915_debugfs_create(struct dentry *root,
2007 struct drm_minor *minor,
2008 const char *name,
2009 const struct file_operations *fops)
2010 {
2011 struct drm_device *dev = minor->dev;
2012 struct dentry *ent;
2013
2014 ent = debugfs_create_file(name,
2015 S_IRUGO | S_IWUSR,
2016 root, dev,
2017 fops);
2018 if (IS_ERR(ent))
2019 return PTR_ERR(ent);
2020
2021 return drm_add_fake_info_node(minor, ent, fops);
2022 }
2023
2024 static struct drm_info_list i915_debugfs_list[] = {
2025 {"i915_capabilities", i915_capabilities, 0},
2026 {"i915_gem_objects", i915_gem_object_info, 0},
2027 {"i915_gem_gtt", i915_gem_gtt_info, 0},
2028 {"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST},
2029 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
2030 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
2031 {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
2032 {"i915_gem_request", i915_gem_request_info, 0},
2033 {"i915_gem_seqno", i915_gem_seqno_info, 0},
2034 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
2035 {"i915_gem_interrupt", i915_interrupt_info, 0},
2036 {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
2037 {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
2038 {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
2039 {"i915_rstdby_delays", i915_rstdby_delays, 0},
2040 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
2041 {"i915_delayfreq_table", i915_delayfreq_table, 0},
2042 {"i915_inttoext_table", i915_inttoext_table, 0},
2043 {"i915_drpc_info", i915_drpc_info, 0},
2044 {"i915_emon_status", i915_emon_status, 0},
2045 {"i915_ring_freq_table", i915_ring_freq_table, 0},
2046 {"i915_gfxec", i915_gfxec, 0},
2047 {"i915_fbc_status", i915_fbc_status, 0},
2048 {"i915_sr_status", i915_sr_status, 0},
2049 {"i915_opregion", i915_opregion, 0},
2050 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
2051 {"i915_context_status", i915_context_status, 0},
2052 {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
2053 {"i915_swizzle_info", i915_swizzle_info, 0},
2054 {"i915_ppgtt_info", i915_ppgtt_info, 0},
2055 {"i915_dpio", i915_dpio_info, 0},
2056 };
2057 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2058
2059 int i915_debugfs_init(struct drm_minor *minor)
2060 {
2061 int ret;
2062
2063 ret = i915_debugfs_create(minor->debugfs_root, minor,
2064 "i915_wedged",
2065 &i915_wedged_fops);
2066 if (ret)
2067 return ret;
2068
2069 ret = i915_forcewake_create(minor->debugfs_root, minor);
2070 if (ret)
2071 return ret;
2072
2073 ret = i915_debugfs_create(minor->debugfs_root, minor,
2074 "i915_max_freq",
2075 &i915_max_freq_fops);
2076 if (ret)
2077 return ret;
2078
2079 ret = i915_debugfs_create(minor->debugfs_root, minor,
2080 "i915_min_freq",
2081 &i915_min_freq_fops);
2082 if (ret)
2083 return ret;
2084
2085 ret = i915_debugfs_create(minor->debugfs_root, minor,
2086 "i915_cache_sharing",
2087 &i915_cache_sharing_fops);
2088 if (ret)
2089 return ret;
2090
2091 ret = i915_debugfs_create(minor->debugfs_root, minor,
2092 "i915_ring_stop",
2093 &i915_ring_stop_fops);
2094 if (ret)
2095 return ret;
2096
2097 ret = i915_debugfs_create(minor->debugfs_root, minor,
2098 "i915_error_state",
2099 &i915_error_state_fops);
2100 if (ret)
2101 return ret;
2102
2103 return drm_debugfs_create_files(i915_debugfs_list,
2104 I915_DEBUGFS_ENTRIES,
2105 minor->debugfs_root, minor);
2106 }
2107
2108 void i915_debugfs_cleanup(struct drm_minor *minor)
2109 {
2110 drm_debugfs_remove_files(i915_debugfs_list,
2111 I915_DEBUGFS_ENTRIES, minor);
2112 drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
2113 1, minor);
2114 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
2115 1, minor);
2116 drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
2117 1, minor);
2118 drm_debugfs_remove_files((struct drm_info_list *) &i915_min_freq_fops,
2119 1, minor);
2120 drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
2121 1, minor);
2122 drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops,
2123 1, minor);
2124 drm_debugfs_remove_files((struct drm_info_list *) &i915_error_state_fops,
2125 1, minor);
2126 }
2127
2128 #endif /* CONFIG_DEBUG_FS */
Linux kernel - Deliverables
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