2 * Copyright © 2008 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
29 #include <linux/seq_file.h>
30 #include <linux/debugfs.h>
31 #include <linux/slab.h>
32 #include <linux/export.h>
33 #include <generated/utsrelease.h>
35 #include "intel_drv.h"
36 #include "intel_ringbuffer.h"
37 #include <drm/i915_drm.h>
40 #define DRM_I915_RING_DEBUG 1
43 #if defined(CONFIG_DEBUG_FS)
51 static const char *yesno(int v
)
53 return v
? "yes" : "no";
56 static int i915_capabilities(struct seq_file
*m
, void *data
)
58 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
59 struct drm_device
*dev
= node
->minor
->dev
;
60 const struct intel_device_info
*info
= INTEL_INFO(dev
);
62 seq_printf(m
, "gen: %d\n", info
->gen
);
63 seq_printf(m
, "pch: %d\n", INTEL_PCH_TYPE(dev
));
64 #define PRINT_FLAG(x) seq_printf(m, #x ": %s\n", yesno(info->x))
65 #define SEP_SEMICOLON ;
66 DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG
, SEP_SEMICOLON
);
73 static const char *get_pin_flag(struct drm_i915_gem_object
*obj
)
75 if (obj
->user_pin_count
> 0)
77 else if (obj
->pin_count
> 0)
83 static const char *get_tiling_flag(struct drm_i915_gem_object
*obj
)
85 switch (obj
->tiling_mode
) {
87 case I915_TILING_NONE
: return " ";
88 case I915_TILING_X
: return "X";
89 case I915_TILING_Y
: return "Y";
93 static const char *cache_level_str(int type
)
96 case I915_CACHE_NONE
: return " uncached";
97 case I915_CACHE_LLC
: return " snooped (LLC)";
98 case I915_CACHE_LLC_MLC
: return " snooped (LLC+MLC)";
104 describe_obj(struct seq_file
*m
, struct drm_i915_gem_object
*obj
)
106 seq_printf(m
, "%pK: %s%s %8zdKiB %02x %02x %d %d %d%s%s%s",
109 get_tiling_flag(obj
),
110 obj
->base
.size
/ 1024,
111 obj
->base
.read_domains
,
112 obj
->base
.write_domain
,
113 obj
->last_read_seqno
,
114 obj
->last_write_seqno
,
115 obj
->last_fenced_seqno
,
116 cache_level_str(obj
->cache_level
),
117 obj
->dirty
? " dirty" : "",
118 obj
->madv
== I915_MADV_DONTNEED
? " purgeable" : "");
120 seq_printf(m
, " (name: %d)", obj
->base
.name
);
122 seq_printf(m
, " (pinned x %d)", obj
->pin_count
);
123 if (obj
->fence_reg
!= I915_FENCE_REG_NONE
)
124 seq_printf(m
, " (fence: %d)", obj
->fence_reg
);
125 if (obj
->gtt_space
!= NULL
)
126 seq_printf(m
, " (gtt offset: %08x, size: %08x)",
127 obj
->gtt_offset
, (unsigned int)obj
->gtt_space
->size
);
129 seq_printf(m
, " (stolen: %08lx)", obj
->stolen
->start
);
130 if (obj
->pin_mappable
|| obj
->fault_mappable
) {
132 if (obj
->pin_mappable
)
134 if (obj
->fault_mappable
)
137 seq_printf(m
, " (%s mappable)", s
);
139 if (obj
->ring
!= NULL
)
140 seq_printf(m
, " (%s)", obj
->ring
->name
);
143 static int i915_gem_object_list_info(struct seq_file
*m
, void *data
)
145 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
146 uintptr_t list
= (uintptr_t) node
->info_ent
->data
;
147 struct list_head
*head
;
148 struct drm_device
*dev
= node
->minor
->dev
;
149 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
150 struct drm_i915_gem_object
*obj
;
151 size_t total_obj_size
, total_gtt_size
;
154 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
160 seq_printf(m
, "Active:\n");
161 head
= &dev_priv
->mm
.active_list
;
164 seq_printf(m
, "Inactive:\n");
165 head
= &dev_priv
->mm
.inactive_list
;
168 mutex_unlock(&dev
->struct_mutex
);
172 total_obj_size
= total_gtt_size
= count
= 0;
173 list_for_each_entry(obj
, head
, mm_list
) {
175 describe_obj(m
, obj
);
177 total_obj_size
+= obj
->base
.size
;
178 total_gtt_size
+= obj
->gtt_space
->size
;
181 mutex_unlock(&dev
->struct_mutex
);
183 seq_printf(m
, "Total %d objects, %zu bytes, %zu GTT size\n",
184 count
, total_obj_size
, total_gtt_size
);
188 #define count_objects(list, member) do { \
189 list_for_each_entry(obj, list, member) { \
190 size += obj->gtt_space->size; \
192 if (obj->map_and_fenceable) { \
193 mappable_size += obj->gtt_space->size; \
199 static int i915_gem_object_info(struct seq_file
*m
, void* data
)
201 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
202 struct drm_device
*dev
= node
->minor
->dev
;
203 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
204 u32 count
, mappable_count
, purgeable_count
;
205 size_t size
, mappable_size
, purgeable_size
;
206 struct drm_i915_gem_object
*obj
;
209 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
213 seq_printf(m
, "%u objects, %zu bytes\n",
214 dev_priv
->mm
.object_count
,
215 dev_priv
->mm
.object_memory
);
217 size
= count
= mappable_size
= mappable_count
= 0;
218 count_objects(&dev_priv
->mm
.bound_list
, gtt_list
);
219 seq_printf(m
, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
220 count
, mappable_count
, size
, mappable_size
);
222 size
= count
= mappable_size
= mappable_count
= 0;
223 count_objects(&dev_priv
->mm
.active_list
, mm_list
);
224 seq_printf(m
, " %u [%u] active objects, %zu [%zu] bytes\n",
225 count
, mappable_count
, size
, mappable_size
);
227 size
= count
= mappable_size
= mappable_count
= 0;
228 count_objects(&dev_priv
->mm
.inactive_list
, mm_list
);
229 seq_printf(m
, " %u [%u] inactive objects, %zu [%zu] bytes\n",
230 count
, mappable_count
, size
, mappable_size
);
232 size
= count
= purgeable_size
= purgeable_count
= 0;
233 list_for_each_entry(obj
, &dev_priv
->mm
.unbound_list
, gtt_list
) {
234 size
+= obj
->base
.size
, ++count
;
235 if (obj
->madv
== I915_MADV_DONTNEED
)
236 purgeable_size
+= obj
->base
.size
, ++purgeable_count
;
238 seq_printf(m
, "%u unbound objects, %zu bytes\n", count
, size
);
240 size
= count
= mappable_size
= mappable_count
= 0;
241 list_for_each_entry(obj
, &dev_priv
->mm
.bound_list
, gtt_list
) {
242 if (obj
->fault_mappable
) {
243 size
+= obj
->gtt_space
->size
;
246 if (obj
->pin_mappable
) {
247 mappable_size
+= obj
->gtt_space
->size
;
250 if (obj
->madv
== I915_MADV_DONTNEED
) {
251 purgeable_size
+= obj
->base
.size
;
255 seq_printf(m
, "%u purgeable objects, %zu bytes\n",
256 purgeable_count
, purgeable_size
);
257 seq_printf(m
, "%u pinned mappable objects, %zu bytes\n",
258 mappable_count
, mappable_size
);
259 seq_printf(m
, "%u fault mappable objects, %zu bytes\n",
262 seq_printf(m
, "%zu [%lu] gtt total\n",
264 dev_priv
->gtt
.mappable_end
- dev_priv
->gtt
.start
);
266 mutex_unlock(&dev
->struct_mutex
);
271 static int i915_gem_gtt_info(struct seq_file
*m
, void* data
)
273 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
274 struct drm_device
*dev
= node
->minor
->dev
;
275 uintptr_t list
= (uintptr_t) node
->info_ent
->data
;
276 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
277 struct drm_i915_gem_object
*obj
;
278 size_t total_obj_size
, total_gtt_size
;
281 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
285 total_obj_size
= total_gtt_size
= count
= 0;
286 list_for_each_entry(obj
, &dev_priv
->mm
.bound_list
, gtt_list
) {
287 if (list
== PINNED_LIST
&& obj
->pin_count
== 0)
291 describe_obj(m
, obj
);
293 total_obj_size
+= obj
->base
.size
;
294 total_gtt_size
+= obj
->gtt_space
->size
;
298 mutex_unlock(&dev
->struct_mutex
);
300 seq_printf(m
, "Total %d objects, %zu bytes, %zu GTT size\n",
301 count
, total_obj_size
, total_gtt_size
);
306 static int i915_gem_pageflip_info(struct seq_file
*m
, void *data
)
308 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
309 struct drm_device
*dev
= node
->minor
->dev
;
311 struct intel_crtc
*crtc
;
313 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, base
.head
) {
314 const char pipe
= pipe_name(crtc
->pipe
);
315 const char plane
= plane_name(crtc
->plane
);
316 struct intel_unpin_work
*work
;
318 spin_lock_irqsave(&dev
->event_lock
, flags
);
319 work
= crtc
->unpin_work
;
321 seq_printf(m
, "No flip due on pipe %c (plane %c)\n",
324 if (atomic_read(&work
->pending
) < INTEL_FLIP_COMPLETE
) {
325 seq_printf(m
, "Flip queued on pipe %c (plane %c)\n",
328 seq_printf(m
, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
331 if (work
->enable_stall_check
)
332 seq_printf(m
, "Stall check enabled, ");
334 seq_printf(m
, "Stall check waiting for page flip ioctl, ");
335 seq_printf(m
, "%d prepares\n", atomic_read(&work
->pending
));
337 if (work
->old_fb_obj
) {
338 struct drm_i915_gem_object
*obj
= work
->old_fb_obj
;
340 seq_printf(m
, "Old framebuffer gtt_offset 0x%08x\n", obj
->gtt_offset
);
342 if (work
->pending_flip_obj
) {
343 struct drm_i915_gem_object
*obj
= work
->pending_flip_obj
;
345 seq_printf(m
, "New framebuffer gtt_offset 0x%08x\n", obj
->gtt_offset
);
348 spin_unlock_irqrestore(&dev
->event_lock
, flags
);
354 static int i915_gem_request_info(struct seq_file
*m
, void *data
)
356 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
357 struct drm_device
*dev
= node
->minor
->dev
;
358 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
359 struct intel_ring_buffer
*ring
;
360 struct drm_i915_gem_request
*gem_request
;
363 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
368 for_each_ring(ring
, dev_priv
, i
) {
369 if (list_empty(&ring
->request_list
))
372 seq_printf(m
, "%s requests:\n", ring
->name
);
373 list_for_each_entry(gem_request
,
376 seq_printf(m
, " %d @ %d\n",
378 (int) (jiffies
- gem_request
->emitted_jiffies
));
382 mutex_unlock(&dev
->struct_mutex
);
385 seq_printf(m
, "No requests\n");
390 static void i915_ring_seqno_info(struct seq_file
*m
,
391 struct intel_ring_buffer
*ring
)
393 if (ring
->get_seqno
) {
394 seq_printf(m
, "Current sequence (%s): %u\n",
395 ring
->name
, ring
->get_seqno(ring
, false));
399 static int i915_gem_seqno_info(struct seq_file
*m
, void *data
)
401 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
402 struct drm_device
*dev
= node
->minor
->dev
;
403 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
404 struct intel_ring_buffer
*ring
;
407 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
411 for_each_ring(ring
, dev_priv
, i
)
412 i915_ring_seqno_info(m
, ring
);
414 mutex_unlock(&dev
->struct_mutex
);
420 static int i915_interrupt_info(struct seq_file
*m
, void *data
)
422 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
423 struct drm_device
*dev
= node
->minor
->dev
;
424 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
425 struct intel_ring_buffer
*ring
;
428 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
432 if (IS_VALLEYVIEW(dev
)) {
433 seq_printf(m
, "Display IER:\t%08x\n",
435 seq_printf(m
, "Display IIR:\t%08x\n",
437 seq_printf(m
, "Display IIR_RW:\t%08x\n",
438 I915_READ(VLV_IIR_RW
));
439 seq_printf(m
, "Display IMR:\t%08x\n",
442 seq_printf(m
, "Pipe %c stat:\t%08x\n",
444 I915_READ(PIPESTAT(pipe
)));
446 seq_printf(m
, "Master IER:\t%08x\n",
447 I915_READ(VLV_MASTER_IER
));
449 seq_printf(m
, "Render IER:\t%08x\n",
451 seq_printf(m
, "Render IIR:\t%08x\n",
453 seq_printf(m
, "Render IMR:\t%08x\n",
456 seq_printf(m
, "PM IER:\t\t%08x\n",
457 I915_READ(GEN6_PMIER
));
458 seq_printf(m
, "PM IIR:\t\t%08x\n",
459 I915_READ(GEN6_PMIIR
));
460 seq_printf(m
, "PM IMR:\t\t%08x\n",
461 I915_READ(GEN6_PMIMR
));
463 seq_printf(m
, "Port hotplug:\t%08x\n",
464 I915_READ(PORT_HOTPLUG_EN
));
465 seq_printf(m
, "DPFLIPSTAT:\t%08x\n",
466 I915_READ(VLV_DPFLIPSTAT
));
467 seq_printf(m
, "DPINVGTT:\t%08x\n",
468 I915_READ(DPINVGTT
));
470 } else if (!HAS_PCH_SPLIT(dev
)) {
471 seq_printf(m
, "Interrupt enable: %08x\n",
473 seq_printf(m
, "Interrupt identity: %08x\n",
475 seq_printf(m
, "Interrupt mask: %08x\n",
478 seq_printf(m
, "Pipe %c stat: %08x\n",
480 I915_READ(PIPESTAT(pipe
)));
482 seq_printf(m
, "North Display Interrupt enable: %08x\n",
484 seq_printf(m
, "North Display Interrupt identity: %08x\n",
486 seq_printf(m
, "North Display Interrupt mask: %08x\n",
488 seq_printf(m
, "South Display Interrupt enable: %08x\n",
490 seq_printf(m
, "South Display Interrupt identity: %08x\n",
492 seq_printf(m
, "South Display Interrupt mask: %08x\n",
494 seq_printf(m
, "Graphics Interrupt enable: %08x\n",
496 seq_printf(m
, "Graphics Interrupt identity: %08x\n",
498 seq_printf(m
, "Graphics Interrupt mask: %08x\n",
501 seq_printf(m
, "Interrupts received: %d\n",
502 atomic_read(&dev_priv
->irq_received
));
503 for_each_ring(ring
, dev_priv
, i
) {
504 if (IS_GEN6(dev
) || IS_GEN7(dev
)) {
506 "Graphics Interrupt mask (%s): %08x\n",
507 ring
->name
, I915_READ_IMR(ring
));
509 i915_ring_seqno_info(m
, ring
);
511 mutex_unlock(&dev
->struct_mutex
);
516 static int i915_gem_fence_regs_info(struct seq_file
*m
, void *data
)
518 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
519 struct drm_device
*dev
= node
->minor
->dev
;
520 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
523 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
527 seq_printf(m
, "Reserved fences = %d\n", dev_priv
->fence_reg_start
);
528 seq_printf(m
, "Total fences = %d\n", dev_priv
->num_fence_regs
);
529 for (i
= 0; i
< dev_priv
->num_fence_regs
; i
++) {
530 struct drm_i915_gem_object
*obj
= dev_priv
->fence_regs
[i
].obj
;
532 seq_printf(m
, "Fence %d, pin count = %d, object = ",
533 i
, dev_priv
->fence_regs
[i
].pin_count
);
535 seq_printf(m
, "unused");
537 describe_obj(m
, obj
);
541 mutex_unlock(&dev
->struct_mutex
);
545 static int i915_hws_info(struct seq_file
*m
, void *data
)
547 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
548 struct drm_device
*dev
= node
->minor
->dev
;
549 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
550 struct intel_ring_buffer
*ring
;
554 ring
= &dev_priv
->ring
[(uintptr_t)node
->info_ent
->data
];
555 hws
= ring
->status_page
.page_addr
;
559 for (i
= 0; i
< 4096 / sizeof(u32
) / 4; i
+= 4) {
560 seq_printf(m
, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
562 hws
[i
], hws
[i
+ 1], hws
[i
+ 2], hws
[i
+ 3]);
567 static const char *ring_str(int ring
)
570 case RCS
: return "render";
571 case VCS
: return "bsd";
572 case BCS
: return "blt";
577 static const char *pin_flag(int pinned
)
587 static const char *tiling_flag(int tiling
)
591 case I915_TILING_NONE
: return "";
592 case I915_TILING_X
: return " X";
593 case I915_TILING_Y
: return " Y";
597 static const char *dirty_flag(int dirty
)
599 return dirty
? " dirty" : "";
602 static const char *purgeable_flag(int purgeable
)
604 return purgeable
? " purgeable" : "";
607 static void i915_error_vprintf(struct drm_i915_error_state_buf
*e
,
608 const char *f
, va_list args
)
612 if (!e
->err
&& WARN(e
->bytes
> (e
->size
- 1), "overflow")) {
617 if (e
->bytes
== e
->size
- 1 || e
->err
)
620 /* Seek the first printf which is hits start position */
621 if (e
->pos
< e
->start
) {
622 len
= vsnprintf(NULL
, 0, f
, args
);
623 if (e
->pos
+ len
<= e
->start
) {
628 /* First vsnprintf needs to fit in full for memmove*/
629 if (len
>= e
->size
) {
635 len
= vsnprintf(e
->buf
+ e
->bytes
, e
->size
- e
->bytes
, f
, args
);
636 if (len
>= e
->size
- e
->bytes
)
637 len
= e
->size
- e
->bytes
- 1;
639 /* If this is first printf in this window, adjust it so that
640 * start position matches start of the buffer
642 if (e
->pos
< e
->start
) {
643 const size_t off
= e
->start
- e
->pos
;
645 /* Should not happen but be paranoid */
646 if (off
> len
|| e
->bytes
) {
651 memmove(e
->buf
, e
->buf
+ off
, len
- off
);
652 e
->bytes
= len
- off
;
661 void i915_error_printf(struct drm_i915_error_state_buf
*e
, const char *f
, ...)
666 i915_error_vprintf(e
, f
, args
);
670 #define err_printf(e, ...) i915_error_printf(e, __VA_ARGS__)
672 static void print_error_buffers(struct drm_i915_error_state_buf
*m
,
674 struct drm_i915_error_buffer
*err
,
677 err_printf(m
, "%s [%d]:\n", name
, count
);
680 err_printf(m
, " %08x %8u %02x %02x %x %x%s%s%s%s%s%s%s",
685 err
->rseqno
, err
->wseqno
,
686 pin_flag(err
->pinned
),
687 tiling_flag(err
->tiling
),
688 dirty_flag(err
->dirty
),
689 purgeable_flag(err
->purgeable
),
690 err
->ring
!= -1 ? " " : "",
692 cache_level_str(err
->cache_level
));
695 err_printf(m
, " (name: %d)", err
->name
);
696 if (err
->fence_reg
!= I915_FENCE_REG_NONE
)
697 err_printf(m
, " (fence: %d)", err
->fence_reg
);
704 static void i915_ring_error_state(struct drm_i915_error_state_buf
*m
,
705 struct drm_device
*dev
,
706 struct drm_i915_error_state
*error
,
709 BUG_ON(ring
>= I915_NUM_RINGS
); /* shut up confused gcc */
710 err_printf(m
, "%s command stream:\n", ring_str(ring
));
711 err_printf(m
, " HEAD: 0x%08x\n", error
->head
[ring
]);
712 err_printf(m
, " TAIL: 0x%08x\n", error
->tail
[ring
]);
713 err_printf(m
, " CTL: 0x%08x\n", error
->ctl
[ring
]);
714 err_printf(m
, " ACTHD: 0x%08x\n", error
->acthd
[ring
]);
715 err_printf(m
, " IPEIR: 0x%08x\n", error
->ipeir
[ring
]);
716 err_printf(m
, " IPEHR: 0x%08x\n", error
->ipehr
[ring
]);
717 err_printf(m
, " INSTDONE: 0x%08x\n", error
->instdone
[ring
]);
718 if (ring
== RCS
&& INTEL_INFO(dev
)->gen
>= 4)
719 err_printf(m
, " BBADDR: 0x%08llx\n", error
->bbaddr
);
721 if (INTEL_INFO(dev
)->gen
>= 4)
722 err_printf(m
, " INSTPS: 0x%08x\n", error
->instps
[ring
]);
723 err_printf(m
, " INSTPM: 0x%08x\n", error
->instpm
[ring
]);
724 err_printf(m
, " FADDR: 0x%08x\n", error
->faddr
[ring
]);
725 if (INTEL_INFO(dev
)->gen
>= 6) {
726 err_printf(m
, " RC PSMI: 0x%08x\n", error
->rc_psmi
[ring
]);
727 err_printf(m
, " FAULT_REG: 0x%08x\n", error
->fault_reg
[ring
]);
728 err_printf(m
, " SYNC_0: 0x%08x [last synced 0x%08x]\n",
729 error
->semaphore_mboxes
[ring
][0],
730 error
->semaphore_seqno
[ring
][0]);
731 err_printf(m
, " SYNC_1: 0x%08x [last synced 0x%08x]\n",
732 error
->semaphore_mboxes
[ring
][1],
733 error
->semaphore_seqno
[ring
][1]);
735 err_printf(m
, " seqno: 0x%08x\n", error
->seqno
[ring
]);
736 err_printf(m
, " waiting: %s\n", yesno(error
->waiting
[ring
]));
737 err_printf(m
, " ring->head: 0x%08x\n", error
->cpu_ring_head
[ring
]);
738 err_printf(m
, " ring->tail: 0x%08x\n", error
->cpu_ring_tail
[ring
]);
741 struct i915_error_state_file_priv
{
742 struct drm_device
*dev
;
743 struct drm_i915_error_state
*error
;
747 static int i915_error_state(struct i915_error_state_file_priv
*error_priv
,
748 struct drm_i915_error_state_buf
*m
)
751 struct drm_device
*dev
= error_priv
->dev
;
752 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
753 struct drm_i915_error_state
*error
= error_priv
->error
;
754 struct intel_ring_buffer
*ring
;
755 int i
, j
, page
, offset
, elt
;
758 err_printf(m
, "no error state collected\n");
762 err_printf(m
, "Time: %ld s %ld us\n", error
->time
.tv_sec
,
763 error
->time
.tv_usec
);
764 err_printf(m
, "Kernel: " UTS_RELEASE
"\n");
765 err_printf(m
, "PCI ID: 0x%04x\n", dev
->pci_device
);
766 err_printf(m
, "EIR: 0x%08x\n", error
->eir
);
767 err_printf(m
, "IER: 0x%08x\n", error
->ier
);
768 err_printf(m
, "PGTBL_ER: 0x%08x\n", error
->pgtbl_er
);
769 err_printf(m
, "FORCEWAKE: 0x%08x\n", error
->forcewake
);
770 err_printf(m
, "DERRMR: 0x%08x\n", error
->derrmr
);
771 err_printf(m
, "CCID: 0x%08x\n", error
->ccid
);
773 for (i
= 0; i
< dev_priv
->num_fence_regs
; i
++)
774 err_printf(m
, " fence[%d] = %08llx\n", i
, error
->fence
[i
]);
776 for (i
= 0; i
< ARRAY_SIZE(error
->extra_instdone
); i
++)
777 err_printf(m
, " INSTDONE_%d: 0x%08x\n", i
,
778 error
->extra_instdone
[i
]);
780 if (INTEL_INFO(dev
)->gen
>= 6) {
781 err_printf(m
, "ERROR: 0x%08x\n", error
->error
);
782 err_printf(m
, "DONE_REG: 0x%08x\n", error
->done_reg
);
785 if (INTEL_INFO(dev
)->gen
== 7)
786 err_printf(m
, "ERR_INT: 0x%08x\n", error
->err_int
);
788 for_each_ring(ring
, dev_priv
, i
)
789 i915_ring_error_state(m
, dev
, error
, i
);
791 if (error
->active_bo
)
792 print_error_buffers(m
, "Active",
794 error
->active_bo_count
);
796 if (error
->pinned_bo
)
797 print_error_buffers(m
, "Pinned",
799 error
->pinned_bo_count
);
801 for (i
= 0; i
< ARRAY_SIZE(error
->ring
); i
++) {
802 struct drm_i915_error_object
*obj
;
804 if ((obj
= error
->ring
[i
].batchbuffer
)) {
805 err_printf(m
, "%s --- gtt_offset = 0x%08x\n",
806 dev_priv
->ring
[i
].name
,
809 for (page
= 0; page
< obj
->page_count
; page
++) {
810 for (elt
= 0; elt
< PAGE_SIZE
/4; elt
++) {
811 err_printf(m
, "%08x : %08x\n", offset
,
812 obj
->pages
[page
][elt
]);
818 if (error
->ring
[i
].num_requests
) {
819 err_printf(m
, "%s --- %d requests\n",
820 dev_priv
->ring
[i
].name
,
821 error
->ring
[i
].num_requests
);
822 for (j
= 0; j
< error
->ring
[i
].num_requests
; j
++) {
823 err_printf(m
, " seqno 0x%08x, emitted %ld, tail 0x%08x\n",
824 error
->ring
[i
].requests
[j
].seqno
,
825 error
->ring
[i
].requests
[j
].jiffies
,
826 error
->ring
[i
].requests
[j
].tail
);
830 if ((obj
= error
->ring
[i
].ringbuffer
)) {
831 err_printf(m
, "%s --- ringbuffer = 0x%08x\n",
832 dev_priv
->ring
[i
].name
,
835 for (page
= 0; page
< obj
->page_count
; page
++) {
836 for (elt
= 0; elt
< PAGE_SIZE
/4; elt
++) {
837 err_printf(m
, "%08x : %08x\n",
839 obj
->pages
[page
][elt
]);
845 obj
= error
->ring
[i
].ctx
;
847 err_printf(m
, "%s --- HW Context = 0x%08x\n",
848 dev_priv
->ring
[i
].name
,
851 for (elt
= 0; elt
< PAGE_SIZE
/16; elt
+= 4) {
852 err_printf(m
, "[%04x] %08x %08x %08x %08x\n",
855 obj
->pages
[0][elt
+1],
856 obj
->pages
[0][elt
+2],
857 obj
->pages
[0][elt
+3]);
864 intel_overlay_print_error_state(m
, error
->overlay
);
867 intel_display_print_error_state(m
, dev
, error
->display
);
873 i915_error_state_write(struct file
*filp
,
874 const char __user
*ubuf
,
878 struct i915_error_state_file_priv
*error_priv
= filp
->private_data
;
879 struct drm_device
*dev
= error_priv
->dev
;
882 DRM_DEBUG_DRIVER("Resetting error state\n");
884 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
888 i915_destroy_error_state(dev
);
889 mutex_unlock(&dev
->struct_mutex
);
894 static int i915_error_state_open(struct inode
*inode
, struct file
*file
)
896 struct drm_device
*dev
= inode
->i_private
;
897 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
898 struct i915_error_state_file_priv
*error_priv
;
901 error_priv
= kzalloc(sizeof(*error_priv
), GFP_KERNEL
);
905 error_priv
->dev
= dev
;
907 spin_lock_irqsave(&dev_priv
->gpu_error
.lock
, flags
);
908 error_priv
->error
= dev_priv
->gpu_error
.first_error
;
909 if (error_priv
->error
)
910 kref_get(&error_priv
->error
->ref
);
911 spin_unlock_irqrestore(&dev_priv
->gpu_error
.lock
, flags
);
913 file
->private_data
= error_priv
;
918 static int i915_error_state_release(struct inode
*inode
, struct file
*file
)
920 struct i915_error_state_file_priv
*error_priv
= file
->private_data
;
922 if (error_priv
->error
)
923 kref_put(&error_priv
->error
->ref
, i915_error_state_free
);
929 static ssize_t
i915_error_state_read(struct file
*file
, char __user
*userbuf
,
930 size_t count
, loff_t
*pos
)
932 struct i915_error_state_file_priv
*error_priv
= file
->private_data
;
933 struct drm_i915_error_state_buf error_str
;
935 ssize_t ret_count
= 0;
938 memset(&error_str
, 0, sizeof(error_str
));
940 /* We need to have enough room to store any i915_error_state printf
941 * so that we can move it to start position.
943 error_str
.size
= count
+ 1 > PAGE_SIZE
? count
+ 1 : PAGE_SIZE
;
944 error_str
.buf
= kmalloc(error_str
.size
,
945 GFP_TEMPORARY
| __GFP_NORETRY
| __GFP_NOWARN
);
947 if (error_str
.buf
== NULL
) {
948 error_str
.size
= PAGE_SIZE
;
949 error_str
.buf
= kmalloc(error_str
.size
, GFP_TEMPORARY
);
952 if (error_str
.buf
== NULL
) {
953 error_str
.size
= 128;
954 error_str
.buf
= kmalloc(error_str
.size
, GFP_TEMPORARY
);
957 if (error_str
.buf
== NULL
)
960 error_str
.start
= *pos
;
962 ret
= i915_error_state(error_priv
, &error_str
);
966 if (error_str
.bytes
== 0 && error_str
.err
) {
971 ret_count
= simple_read_from_buffer(userbuf
, count
, &tmp_pos
,
978 *pos
= error_str
.start
+ ret_count
;
980 kfree(error_str
.buf
);
981 return ret
?: ret_count
;
984 static const struct file_operations i915_error_state_fops
= {
985 .owner
= THIS_MODULE
,
986 .open
= i915_error_state_open
,
987 .read
= i915_error_state_read
,
988 .write
= i915_error_state_write
,
989 .llseek
= default_llseek
,
990 .release
= i915_error_state_release
,
994 i915_next_seqno_get(void *data
, u64
*val
)
996 struct drm_device
*dev
= data
;
997 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1000 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1004 *val
= dev_priv
->next_seqno
;
1005 mutex_unlock(&dev
->struct_mutex
);
1011 i915_next_seqno_set(void *data
, u64 val
)
1013 struct drm_device
*dev
= data
;
1016 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1020 ret
= i915_gem_set_seqno(dev
, val
);
1021 mutex_unlock(&dev
->struct_mutex
);
1026 DEFINE_SIMPLE_ATTRIBUTE(i915_next_seqno_fops
,
1027 i915_next_seqno_get
, i915_next_seqno_set
,
1030 static int i915_rstdby_delays(struct seq_file
*m
, void *unused
)
1032 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1033 struct drm_device
*dev
= node
->minor
->dev
;
1034 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1038 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1042 crstanddelay
= I915_READ16(CRSTANDVID
);
1044 mutex_unlock(&dev
->struct_mutex
);
1046 seq_printf(m
, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay
>> 8) & 0x3f, (crstanddelay
& 0x3f));
1051 static int i915_cur_delayinfo(struct seq_file
*m
, void *unused
)
1053 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1054 struct drm_device
*dev
= node
->minor
->dev
;
1055 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1059 u16 rgvswctl
= I915_READ16(MEMSWCTL
);
1060 u16 rgvstat
= I915_READ16(MEMSTAT_ILK
);
1062 seq_printf(m
, "Requested P-state: %d\n", (rgvswctl
>> 8) & 0xf);
1063 seq_printf(m
, "Requested VID: %d\n", rgvswctl
& 0x3f);
1064 seq_printf(m
, "Current VID: %d\n", (rgvstat
& MEMSTAT_VID_MASK
) >>
1066 seq_printf(m
, "Current P-state: %d\n",
1067 (rgvstat
& MEMSTAT_PSTATE_MASK
) >> MEMSTAT_PSTATE_SHIFT
);
1068 } else if ((IS_GEN6(dev
) || IS_GEN7(dev
)) && !IS_VALLEYVIEW(dev
)) {
1069 u32 gt_perf_status
= I915_READ(GEN6_GT_PERF_STATUS
);
1070 u32 rp_state_limits
= I915_READ(GEN6_RP_STATE_LIMITS
);
1071 u32 rp_state_cap
= I915_READ(GEN6_RP_STATE_CAP
);
1073 u32 rpupei
, rpcurup
, rpprevup
;
1074 u32 rpdownei
, rpcurdown
, rpprevdown
;
1077 /* RPSTAT1 is in the GT power well */
1078 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1082 gen6_gt_force_wake_get(dev_priv
);
1084 rpstat
= I915_READ(GEN6_RPSTAT1
);
1085 rpupei
= I915_READ(GEN6_RP_CUR_UP_EI
);
1086 rpcurup
= I915_READ(GEN6_RP_CUR_UP
);
1087 rpprevup
= I915_READ(GEN6_RP_PREV_UP
);
1088 rpdownei
= I915_READ(GEN6_RP_CUR_DOWN_EI
);
1089 rpcurdown
= I915_READ(GEN6_RP_CUR_DOWN
);
1090 rpprevdown
= I915_READ(GEN6_RP_PREV_DOWN
);
1091 if (IS_HASWELL(dev
))
1092 cagf
= (rpstat
& HSW_CAGF_MASK
) >> HSW_CAGF_SHIFT
;
1094 cagf
= (rpstat
& GEN6_CAGF_MASK
) >> GEN6_CAGF_SHIFT
;
1095 cagf
*= GT_FREQUENCY_MULTIPLIER
;
1097 gen6_gt_force_wake_put(dev_priv
);
1098 mutex_unlock(&dev
->struct_mutex
);
1100 seq_printf(m
, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status
);
1101 seq_printf(m
, "RPSTAT1: 0x%08x\n", rpstat
);
1102 seq_printf(m
, "Render p-state ratio: %d\n",
1103 (gt_perf_status
& 0xff00) >> 8);
1104 seq_printf(m
, "Render p-state VID: %d\n",
1105 gt_perf_status
& 0xff);
1106 seq_printf(m
, "Render p-state limit: %d\n",
1107 rp_state_limits
& 0xff);
1108 seq_printf(m
, "CAGF: %dMHz\n", cagf
);
1109 seq_printf(m
, "RP CUR UP EI: %dus\n", rpupei
&
1110 GEN6_CURICONT_MASK
);
1111 seq_printf(m
, "RP CUR UP: %dus\n", rpcurup
&
1112 GEN6_CURBSYTAVG_MASK
);
1113 seq_printf(m
, "RP PREV UP: %dus\n", rpprevup
&
1114 GEN6_CURBSYTAVG_MASK
);
1115 seq_printf(m
, "RP CUR DOWN EI: %dus\n", rpdownei
&
1117 seq_printf(m
, "RP CUR DOWN: %dus\n", rpcurdown
&
1118 GEN6_CURBSYTAVG_MASK
);
1119 seq_printf(m
, "RP PREV DOWN: %dus\n", rpprevdown
&
1120 GEN6_CURBSYTAVG_MASK
);
1122 max_freq
= (rp_state_cap
& 0xff0000) >> 16;
1123 seq_printf(m
, "Lowest (RPN) frequency: %dMHz\n",
1124 max_freq
* GT_FREQUENCY_MULTIPLIER
);
1126 max_freq
= (rp_state_cap
& 0xff00) >> 8;
1127 seq_printf(m
, "Nominal (RP1) frequency: %dMHz\n",
1128 max_freq
* GT_FREQUENCY_MULTIPLIER
);
1130 max_freq
= rp_state_cap
& 0xff;
1131 seq_printf(m
, "Max non-overclocked (RP0) frequency: %dMHz\n",
1132 max_freq
* GT_FREQUENCY_MULTIPLIER
);
1134 seq_printf(m
, "Max overclocked frequency: %dMHz\n",
1135 dev_priv
->rps
.hw_max
* GT_FREQUENCY_MULTIPLIER
);
1136 } else if (IS_VALLEYVIEW(dev
)) {
1139 mutex_lock(&dev_priv
->rps
.hw_lock
);
1140 freq_sts
= vlv_punit_read(dev_priv
, PUNIT_REG_GPU_FREQ_STS
);
1141 seq_printf(m
, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts
);
1142 seq_printf(m
, "DDR freq: %d MHz\n", dev_priv
->mem_freq
);
1144 val
= vlv_punit_read(dev_priv
, PUNIT_FUSE_BUS1
);
1145 seq_printf(m
, "max GPU freq: %d MHz\n",
1146 vlv_gpu_freq(dev_priv
->mem_freq
, val
));
1148 val
= vlv_punit_read(dev_priv
, PUNIT_REG_GPU_LFM
);
1149 seq_printf(m
, "min GPU freq: %d MHz\n",
1150 vlv_gpu_freq(dev_priv
->mem_freq
, val
));
1152 seq_printf(m
, "current GPU freq: %d MHz\n",
1153 vlv_gpu_freq(dev_priv
->mem_freq
,
1154 (freq_sts
>> 8) & 0xff));
1155 mutex_unlock(&dev_priv
->rps
.hw_lock
);
1157 seq_printf(m
, "no P-state info available\n");
1163 static int i915_delayfreq_table(struct seq_file
*m
, void *unused
)
1165 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1166 struct drm_device
*dev
= node
->minor
->dev
;
1167 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1171 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1175 for (i
= 0; i
< 16; i
++) {
1176 delayfreq
= I915_READ(PXVFREQ_BASE
+ i
* 4);
1177 seq_printf(m
, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i
, delayfreq
,
1178 (delayfreq
& PXVFREQ_PX_MASK
) >> PXVFREQ_PX_SHIFT
);
1181 mutex_unlock(&dev
->struct_mutex
);
1186 static inline int MAP_TO_MV(int map
)
1188 return 1250 - (map
* 25);
1191 static int i915_inttoext_table(struct seq_file
*m
, void *unused
)
1193 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1194 struct drm_device
*dev
= node
->minor
->dev
;
1195 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1199 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1203 for (i
= 1; i
<= 32; i
++) {
1204 inttoext
= I915_READ(INTTOEXT_BASE_ILK
+ i
* 4);
1205 seq_printf(m
, "INTTOEXT%02d: 0x%08x\n", i
, inttoext
);
1208 mutex_unlock(&dev
->struct_mutex
);
1213 static int ironlake_drpc_info(struct seq_file
*m
)
1215 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1216 struct drm_device
*dev
= node
->minor
->dev
;
1217 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1218 u32 rgvmodectl
, rstdbyctl
;
1222 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1226 rgvmodectl
= I915_READ(MEMMODECTL
);
1227 rstdbyctl
= I915_READ(RSTDBYCTL
);
1228 crstandvid
= I915_READ16(CRSTANDVID
);
1230 mutex_unlock(&dev
->struct_mutex
);
1232 seq_printf(m
, "HD boost: %s\n", (rgvmodectl
& MEMMODE_BOOST_EN
) ?
1234 seq_printf(m
, "Boost freq: %d\n",
1235 (rgvmodectl
& MEMMODE_BOOST_FREQ_MASK
) >>
1236 MEMMODE_BOOST_FREQ_SHIFT
);
1237 seq_printf(m
, "HW control enabled: %s\n",
1238 rgvmodectl
& MEMMODE_HWIDLE_EN
? "yes" : "no");
1239 seq_printf(m
, "SW control enabled: %s\n",
1240 rgvmodectl
& MEMMODE_SWMODE_EN
? "yes" : "no");
1241 seq_printf(m
, "Gated voltage change: %s\n",
1242 rgvmodectl
& MEMMODE_RCLK_GATE
? "yes" : "no");
1243 seq_printf(m
, "Starting frequency: P%d\n",
1244 (rgvmodectl
& MEMMODE_FSTART_MASK
) >> MEMMODE_FSTART_SHIFT
);
1245 seq_printf(m
, "Max P-state: P%d\n",
1246 (rgvmodectl
& MEMMODE_FMAX_MASK
) >> MEMMODE_FMAX_SHIFT
);
1247 seq_printf(m
, "Min P-state: P%d\n", (rgvmodectl
& MEMMODE_FMIN_MASK
));
1248 seq_printf(m
, "RS1 VID: %d\n", (crstandvid
& 0x3f));
1249 seq_printf(m
, "RS2 VID: %d\n", ((crstandvid
>> 8) & 0x3f));
1250 seq_printf(m
, "Render standby enabled: %s\n",
1251 (rstdbyctl
& RCX_SW_EXIT
) ? "no" : "yes");
1252 seq_printf(m
, "Current RS state: ");
1253 switch (rstdbyctl
& RSX_STATUS_MASK
) {
1255 seq_printf(m
, "on\n");
1257 case RSX_STATUS_RC1
:
1258 seq_printf(m
, "RC1\n");
1260 case RSX_STATUS_RC1E
:
1261 seq_printf(m
, "RC1E\n");
1263 case RSX_STATUS_RS1
:
1264 seq_printf(m
, "RS1\n");
1266 case RSX_STATUS_RS2
:
1267 seq_printf(m
, "RS2 (RC6)\n");
1269 case RSX_STATUS_RS3
:
1270 seq_printf(m
, "RC3 (RC6+)\n");
1273 seq_printf(m
, "unknown\n");
1280 static int gen6_drpc_info(struct seq_file
*m
)
1283 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1284 struct drm_device
*dev
= node
->minor
->dev
;
1285 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1286 u32 rpmodectl1
, gt_core_status
, rcctl1
, rc6vids
= 0;
1287 unsigned forcewake_count
;
1291 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1295 spin_lock_irq(&dev_priv
->gt_lock
);
1296 forcewake_count
= dev_priv
->forcewake_count
;
1297 spin_unlock_irq(&dev_priv
->gt_lock
);
1299 if (forcewake_count
) {
1300 seq_printf(m
, "RC information inaccurate because somebody "
1301 "holds a forcewake reference \n");
1303 /* NB: we cannot use forcewake, else we read the wrong values */
1304 while (count
++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK
) & 1))
1306 seq_printf(m
, "RC information accurate: %s\n", yesno(count
< 51));
1309 gt_core_status
= readl(dev_priv
->regs
+ GEN6_GT_CORE_STATUS
);
1310 trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS
, gt_core_status
, 4);
1312 rpmodectl1
= I915_READ(GEN6_RP_CONTROL
);
1313 rcctl1
= I915_READ(GEN6_RC_CONTROL
);
1314 mutex_unlock(&dev
->struct_mutex
);
1315 mutex_lock(&dev_priv
->rps
.hw_lock
);
1316 sandybridge_pcode_read(dev_priv
, GEN6_PCODE_READ_RC6VIDS
, &rc6vids
);
1317 mutex_unlock(&dev_priv
->rps
.hw_lock
);
1319 seq_printf(m
, "Video Turbo Mode: %s\n",
1320 yesno(rpmodectl1
& GEN6_RP_MEDIA_TURBO
));
1321 seq_printf(m
, "HW control enabled: %s\n",
1322 yesno(rpmodectl1
& GEN6_RP_ENABLE
));
1323 seq_printf(m
, "SW control enabled: %s\n",
1324 yesno((rpmodectl1
& GEN6_RP_MEDIA_MODE_MASK
) ==
1325 GEN6_RP_MEDIA_SW_MODE
));
1326 seq_printf(m
, "RC1e Enabled: %s\n",
1327 yesno(rcctl1
& GEN6_RC_CTL_RC1e_ENABLE
));
1328 seq_printf(m
, "RC6 Enabled: %s\n",
1329 yesno(rcctl1
& GEN6_RC_CTL_RC6_ENABLE
));
1330 seq_printf(m
, "Deep RC6 Enabled: %s\n",
1331 yesno(rcctl1
& GEN6_RC_CTL_RC6p_ENABLE
));
1332 seq_printf(m
, "Deepest RC6 Enabled: %s\n",
1333 yesno(rcctl1
& GEN6_RC_CTL_RC6pp_ENABLE
));
1334 seq_printf(m
, "Current RC state: ");
1335 switch (gt_core_status
& GEN6_RCn_MASK
) {
1337 if (gt_core_status
& GEN6_CORE_CPD_STATE_MASK
)
1338 seq_printf(m
, "Core Power Down\n");
1340 seq_printf(m
, "on\n");
1343 seq_printf(m
, "RC3\n");
1346 seq_printf(m
, "RC6\n");
1349 seq_printf(m
, "RC7\n");
1352 seq_printf(m
, "Unknown\n");
1356 seq_printf(m
, "Core Power Down: %s\n",
1357 yesno(gt_core_status
& GEN6_CORE_CPD_STATE_MASK
));
1359 /* Not exactly sure what this is */
1360 seq_printf(m
, "RC6 \"Locked to RPn\" residency since boot: %u\n",
1361 I915_READ(GEN6_GT_GFX_RC6_LOCKED
));
1362 seq_printf(m
, "RC6 residency since boot: %u\n",
1363 I915_READ(GEN6_GT_GFX_RC6
));
1364 seq_printf(m
, "RC6+ residency since boot: %u\n",
1365 I915_READ(GEN6_GT_GFX_RC6p
));
1366 seq_printf(m
, "RC6++ residency since boot: %u\n",
1367 I915_READ(GEN6_GT_GFX_RC6pp
));
1369 seq_printf(m
, "RC6 voltage: %dmV\n",
1370 GEN6_DECODE_RC6_VID(((rc6vids
>> 0) & 0xff)));
1371 seq_printf(m
, "RC6+ voltage: %dmV\n",
1372 GEN6_DECODE_RC6_VID(((rc6vids
>> 8) & 0xff)));
1373 seq_printf(m
, "RC6++ voltage: %dmV\n",
1374 GEN6_DECODE_RC6_VID(((rc6vids
>> 16) & 0xff)));
1378 static int i915_drpc_info(struct seq_file
*m
, void *unused
)
1380 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1381 struct drm_device
*dev
= node
->minor
->dev
;
1383 if (IS_GEN6(dev
) || IS_GEN7(dev
))
1384 return gen6_drpc_info(m
);
1386 return ironlake_drpc_info(m
);
1389 static int i915_fbc_status(struct seq_file
*m
, void *unused
)
1391 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1392 struct drm_device
*dev
= node
->minor
->dev
;
1393 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1395 if (!I915_HAS_FBC(dev
)) {
1396 seq_printf(m
, "FBC unsupported on this chipset\n");
1400 if (intel_fbc_enabled(dev
)) {
1401 seq_printf(m
, "FBC enabled\n");
1403 seq_printf(m
, "FBC disabled: ");
1404 switch (dev_priv
->no_fbc_reason
) {
1406 seq_printf(m
, "no outputs");
1408 case FBC_STOLEN_TOO_SMALL
:
1409 seq_printf(m
, "not enough stolen memory");
1411 case FBC_UNSUPPORTED_MODE
:
1412 seq_printf(m
, "mode not supported");
1414 case FBC_MODE_TOO_LARGE
:
1415 seq_printf(m
, "mode too large");
1418 seq_printf(m
, "FBC unsupported on plane");
1421 seq_printf(m
, "scanout buffer not tiled");
1423 case FBC_MULTIPLE_PIPES
:
1424 seq_printf(m
, "multiple pipes are enabled");
1426 case FBC_MODULE_PARAM
:
1427 seq_printf(m
, "disabled per module param (default off)");
1430 seq_printf(m
, "unknown reason");
1432 seq_printf(m
, "\n");
1437 static int i915_sr_status(struct seq_file
*m
, void *unused
)
1439 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1440 struct drm_device
*dev
= node
->minor
->dev
;
1441 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1442 bool sr_enabled
= false;
1444 if (HAS_PCH_SPLIT(dev
))
1445 sr_enabled
= I915_READ(WM1_LP_ILK
) & WM1_LP_SR_EN
;
1446 else if (IS_CRESTLINE(dev
) || IS_I945G(dev
) || IS_I945GM(dev
))
1447 sr_enabled
= I915_READ(FW_BLC_SELF
) & FW_BLC_SELF_EN
;
1448 else if (IS_I915GM(dev
))
1449 sr_enabled
= I915_READ(INSTPM
) & INSTPM_SELF_EN
;
1450 else if (IS_PINEVIEW(dev
))
1451 sr_enabled
= I915_READ(DSPFW3
) & PINEVIEW_SELF_REFRESH_EN
;
1453 seq_printf(m
, "self-refresh: %s\n",
1454 sr_enabled
? "enabled" : "disabled");
1459 static int i915_emon_status(struct seq_file
*m
, void *unused
)
1461 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1462 struct drm_device
*dev
= node
->minor
->dev
;
1463 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1464 unsigned long temp
, chipset
, gfx
;
1470 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1474 temp
= i915_mch_val(dev_priv
);
1475 chipset
= i915_chipset_val(dev_priv
);
1476 gfx
= i915_gfx_val(dev_priv
);
1477 mutex_unlock(&dev
->struct_mutex
);
1479 seq_printf(m
, "GMCH temp: %ld\n", temp
);
1480 seq_printf(m
, "Chipset power: %ld\n", chipset
);
1481 seq_printf(m
, "GFX power: %ld\n", gfx
);
1482 seq_printf(m
, "Total power: %ld\n", chipset
+ gfx
);
1487 static int i915_ring_freq_table(struct seq_file
*m
, void *unused
)
1489 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1490 struct drm_device
*dev
= node
->minor
->dev
;
1491 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1493 int gpu_freq
, ia_freq
;
1495 if (!(IS_GEN6(dev
) || IS_GEN7(dev
))) {
1496 seq_printf(m
, "unsupported on this chipset\n");
1500 ret
= mutex_lock_interruptible(&dev_priv
->rps
.hw_lock
);
1504 seq_printf(m
, "GPU freq (MHz)\tEffective CPU freq (MHz)\tEffective Ring freq (MHz)\n");
1506 for (gpu_freq
= dev_priv
->rps
.min_delay
;
1507 gpu_freq
<= dev_priv
->rps
.max_delay
;
1510 sandybridge_pcode_read(dev_priv
,
1511 GEN6_PCODE_READ_MIN_FREQ_TABLE
,
1513 seq_printf(m
, "%d\t\t%d\t\t\t\t%d\n",
1514 gpu_freq
* GT_FREQUENCY_MULTIPLIER
,
1515 ((ia_freq
>> 0) & 0xff) * 100,
1516 ((ia_freq
>> 8) & 0xff) * 100);
1519 mutex_unlock(&dev_priv
->rps
.hw_lock
);
1524 static int i915_gfxec(struct seq_file
*m
, void *unused
)
1526 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1527 struct drm_device
*dev
= node
->minor
->dev
;
1528 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1531 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1535 seq_printf(m
, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1537 mutex_unlock(&dev
->struct_mutex
);
1542 static int i915_opregion(struct seq_file
*m
, void *unused
)
1544 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1545 struct drm_device
*dev
= node
->minor
->dev
;
1546 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1547 struct intel_opregion
*opregion
= &dev_priv
->opregion
;
1548 void *data
= kmalloc(OPREGION_SIZE
, GFP_KERNEL
);
1554 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1558 if (opregion
->header
) {
1559 memcpy_fromio(data
, opregion
->header
, OPREGION_SIZE
);
1560 seq_write(m
, data
, OPREGION_SIZE
);
1563 mutex_unlock(&dev
->struct_mutex
);
1570 static int i915_gem_framebuffer_info(struct seq_file
*m
, void *data
)
1572 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1573 struct drm_device
*dev
= node
->minor
->dev
;
1574 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1575 struct intel_fbdev
*ifbdev
;
1576 struct intel_framebuffer
*fb
;
1579 ret
= mutex_lock_interruptible(&dev
->mode_config
.mutex
);
1583 ifbdev
= dev_priv
->fbdev
;
1584 fb
= to_intel_framebuffer(ifbdev
->helper
.fb
);
1586 seq_printf(m
, "fbcon size: %d x %d, depth %d, %d bpp, refcount %d, obj ",
1590 fb
->base
.bits_per_pixel
,
1591 atomic_read(&fb
->base
.refcount
.refcount
));
1592 describe_obj(m
, fb
->obj
);
1593 seq_printf(m
, "\n");
1594 mutex_unlock(&dev
->mode_config
.mutex
);
1596 mutex_lock(&dev
->mode_config
.fb_lock
);
1597 list_for_each_entry(fb
, &dev
->mode_config
.fb_list
, base
.head
) {
1598 if (&fb
->base
== ifbdev
->helper
.fb
)
1601 seq_printf(m
, "user size: %d x %d, depth %d, %d bpp, refcount %d, obj ",
1605 fb
->base
.bits_per_pixel
,
1606 atomic_read(&fb
->base
.refcount
.refcount
));
1607 describe_obj(m
, fb
->obj
);
1608 seq_printf(m
, "\n");
1610 mutex_unlock(&dev
->mode_config
.fb_lock
);
1615 static int i915_context_status(struct seq_file
*m
, void *unused
)
1617 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1618 struct drm_device
*dev
= node
->minor
->dev
;
1619 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1620 struct intel_ring_buffer
*ring
;
1623 ret
= mutex_lock_interruptible(&dev
->mode_config
.mutex
);
1627 if (dev_priv
->ips
.pwrctx
) {
1628 seq_printf(m
, "power context ");
1629 describe_obj(m
, dev_priv
->ips
.pwrctx
);
1630 seq_printf(m
, "\n");
1633 if (dev_priv
->ips
.renderctx
) {
1634 seq_printf(m
, "render context ");
1635 describe_obj(m
, dev_priv
->ips
.renderctx
);
1636 seq_printf(m
, "\n");
1639 for_each_ring(ring
, dev_priv
, i
) {
1640 if (ring
->default_context
) {
1641 seq_printf(m
, "HW default context %s ring ", ring
->name
);
1642 describe_obj(m
, ring
->default_context
->obj
);
1643 seq_printf(m
, "\n");
1647 mutex_unlock(&dev
->mode_config
.mutex
);
1652 static int i915_gen6_forcewake_count_info(struct seq_file
*m
, void *data
)
1654 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1655 struct drm_device
*dev
= node
->minor
->dev
;
1656 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1657 unsigned forcewake_count
;
1659 spin_lock_irq(&dev_priv
->gt_lock
);
1660 forcewake_count
= dev_priv
->forcewake_count
;
1661 spin_unlock_irq(&dev_priv
->gt_lock
);
1663 seq_printf(m
, "forcewake count = %u\n", forcewake_count
);
1668 static const char *swizzle_string(unsigned swizzle
)
1671 case I915_BIT_6_SWIZZLE_NONE
:
1673 case I915_BIT_6_SWIZZLE_9
:
1675 case I915_BIT_6_SWIZZLE_9_10
:
1676 return "bit9/bit10";
1677 case I915_BIT_6_SWIZZLE_9_11
:
1678 return "bit9/bit11";
1679 case I915_BIT_6_SWIZZLE_9_10_11
:
1680 return "bit9/bit10/bit11";
1681 case I915_BIT_6_SWIZZLE_9_17
:
1682 return "bit9/bit17";
1683 case I915_BIT_6_SWIZZLE_9_10_17
:
1684 return "bit9/bit10/bit17";
1685 case I915_BIT_6_SWIZZLE_UNKNOWN
:
1692 static int i915_swizzle_info(struct seq_file
*m
, void *data
)
1694 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1695 struct drm_device
*dev
= node
->minor
->dev
;
1696 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1699 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1703 seq_printf(m
, "bit6 swizzle for X-tiling = %s\n",
1704 swizzle_string(dev_priv
->mm
.bit_6_swizzle_x
));
1705 seq_printf(m
, "bit6 swizzle for Y-tiling = %s\n",
1706 swizzle_string(dev_priv
->mm
.bit_6_swizzle_y
));
1708 if (IS_GEN3(dev
) || IS_GEN4(dev
)) {
1709 seq_printf(m
, "DDC = 0x%08x\n",
1711 seq_printf(m
, "C0DRB3 = 0x%04x\n",
1712 I915_READ16(C0DRB3
));
1713 seq_printf(m
, "C1DRB3 = 0x%04x\n",
1714 I915_READ16(C1DRB3
));
1715 } else if (IS_GEN6(dev
) || IS_GEN7(dev
)) {
1716 seq_printf(m
, "MAD_DIMM_C0 = 0x%08x\n",
1717 I915_READ(MAD_DIMM_C0
));
1718 seq_printf(m
, "MAD_DIMM_C1 = 0x%08x\n",
1719 I915_READ(MAD_DIMM_C1
));
1720 seq_printf(m
, "MAD_DIMM_C2 = 0x%08x\n",
1721 I915_READ(MAD_DIMM_C2
));
1722 seq_printf(m
, "TILECTL = 0x%08x\n",
1723 I915_READ(TILECTL
));
1724 seq_printf(m
, "ARB_MODE = 0x%08x\n",
1725 I915_READ(ARB_MODE
));
1726 seq_printf(m
, "DISP_ARB_CTL = 0x%08x\n",
1727 I915_READ(DISP_ARB_CTL
));
1729 mutex_unlock(&dev
->struct_mutex
);
1734 static int i915_ppgtt_info(struct seq_file
*m
, void *data
)
1736 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1737 struct drm_device
*dev
= node
->minor
->dev
;
1738 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1739 struct intel_ring_buffer
*ring
;
1743 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1746 if (INTEL_INFO(dev
)->gen
== 6)
1747 seq_printf(m
, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE
));
1749 for_each_ring(ring
, dev_priv
, i
) {
1750 seq_printf(m
, "%s\n", ring
->name
);
1751 if (INTEL_INFO(dev
)->gen
== 7)
1752 seq_printf(m
, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring
)));
1753 seq_printf(m
, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring
)));
1754 seq_printf(m
, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring
)));
1755 seq_printf(m
, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring
)));
1757 if (dev_priv
->mm
.aliasing_ppgtt
) {
1758 struct i915_hw_ppgtt
*ppgtt
= dev_priv
->mm
.aliasing_ppgtt
;
1760 seq_printf(m
, "aliasing PPGTT:\n");
1761 seq_printf(m
, "pd gtt offset: 0x%08x\n", ppgtt
->pd_offset
);
1763 seq_printf(m
, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK
));
1764 mutex_unlock(&dev
->struct_mutex
);
1769 static int i915_dpio_info(struct seq_file
*m
, void *data
)
1771 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1772 struct drm_device
*dev
= node
->minor
->dev
;
1773 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1777 if (!IS_VALLEYVIEW(dev
)) {
1778 seq_printf(m
, "unsupported\n");
1782 ret
= mutex_lock_interruptible(&dev_priv
->dpio_lock
);
1786 seq_printf(m
, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL
));
1788 seq_printf(m
, "DPIO_DIV_A: 0x%08x\n",
1789 vlv_dpio_read(dev_priv
, _DPIO_DIV_A
));
1790 seq_printf(m
, "DPIO_DIV_B: 0x%08x\n",
1791 vlv_dpio_read(dev_priv
, _DPIO_DIV_B
));
1793 seq_printf(m
, "DPIO_REFSFR_A: 0x%08x\n",
1794 vlv_dpio_read(dev_priv
, _DPIO_REFSFR_A
));
1795 seq_printf(m
, "DPIO_REFSFR_B: 0x%08x\n",
1796 vlv_dpio_read(dev_priv
, _DPIO_REFSFR_B
));
1798 seq_printf(m
, "DPIO_CORE_CLK_A: 0x%08x\n",
1799 vlv_dpio_read(dev_priv
, _DPIO_CORE_CLK_A
));
1800 seq_printf(m
, "DPIO_CORE_CLK_B: 0x%08x\n",
1801 vlv_dpio_read(dev_priv
, _DPIO_CORE_CLK_B
));
1803 seq_printf(m
, "DPIO_LFP_COEFF_A: 0x%08x\n",
1804 vlv_dpio_read(dev_priv
, _DPIO_LFP_COEFF_A
));
1805 seq_printf(m
, "DPIO_LFP_COEFF_B: 0x%08x\n",
1806 vlv_dpio_read(dev_priv
, _DPIO_LFP_COEFF_B
));
1808 seq_printf(m
, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
1809 vlv_dpio_read(dev_priv
, DPIO_FASTCLK_DISABLE
));
1811 mutex_unlock(&dev_priv
->dpio_lock
);
1817 i915_wedged_get(void *data
, u64
*val
)
1819 struct drm_device
*dev
= data
;
1820 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1822 *val
= atomic_read(&dev_priv
->gpu_error
.reset_counter
);
1828 i915_wedged_set(void *data
, u64 val
)
1830 struct drm_device
*dev
= data
;
1832 DRM_INFO("Manually setting wedged to %llu\n", val
);
1833 i915_handle_error(dev
, val
);
1838 DEFINE_SIMPLE_ATTRIBUTE(i915_wedged_fops
,
1839 i915_wedged_get
, i915_wedged_set
,
1843 i915_ring_stop_get(void *data
, u64
*val
)
1845 struct drm_device
*dev
= data
;
1846 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1848 *val
= dev_priv
->gpu_error
.stop_rings
;
1854 i915_ring_stop_set(void *data
, u64 val
)
1856 struct drm_device
*dev
= data
;
1857 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1860 DRM_DEBUG_DRIVER("Stopping rings 0x%08llx\n", val
);
1862 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1866 dev_priv
->gpu_error
.stop_rings
= val
;
1867 mutex_unlock(&dev
->struct_mutex
);
1872 DEFINE_SIMPLE_ATTRIBUTE(i915_ring_stop_fops
,
1873 i915_ring_stop_get
, i915_ring_stop_set
,
1876 #define DROP_UNBOUND 0x1
1877 #define DROP_BOUND 0x2
1878 #define DROP_RETIRE 0x4
1879 #define DROP_ACTIVE 0x8
1880 #define DROP_ALL (DROP_UNBOUND | \
1885 i915_drop_caches_get(void *data
, u64
*val
)
1893 i915_drop_caches_set(void *data
, u64 val
)
1895 struct drm_device
*dev
= data
;
1896 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1897 struct drm_i915_gem_object
*obj
, *next
;
1900 DRM_DEBUG_DRIVER("Dropping caches: 0x%08llx\n", val
);
1902 /* No need to check and wait for gpu resets, only libdrm auto-restarts
1903 * on ioctls on -EAGAIN. */
1904 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1908 if (val
& DROP_ACTIVE
) {
1909 ret
= i915_gpu_idle(dev
);
1914 if (val
& (DROP_RETIRE
| DROP_ACTIVE
))
1915 i915_gem_retire_requests(dev
);
1917 if (val
& DROP_BOUND
) {
1918 list_for_each_entry_safe(obj
, next
, &dev_priv
->mm
.inactive_list
, mm_list
)
1919 if (obj
->pin_count
== 0) {
1920 ret
= i915_gem_object_unbind(obj
);
1926 if (val
& DROP_UNBOUND
) {
1927 list_for_each_entry_safe(obj
, next
, &dev_priv
->mm
.unbound_list
, gtt_list
)
1928 if (obj
->pages_pin_count
== 0) {
1929 ret
= i915_gem_object_put_pages(obj
);
1936 mutex_unlock(&dev
->struct_mutex
);
1941 DEFINE_SIMPLE_ATTRIBUTE(i915_drop_caches_fops
,
1942 i915_drop_caches_get
, i915_drop_caches_set
,
1946 i915_max_freq_get(void *data
, u64
*val
)
1948 struct drm_device
*dev
= data
;
1949 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1952 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
1955 ret
= mutex_lock_interruptible(&dev_priv
->rps
.hw_lock
);
1959 if (IS_VALLEYVIEW(dev
))
1960 *val
= vlv_gpu_freq(dev_priv
->mem_freq
,
1961 dev_priv
->rps
.max_delay
);
1963 *val
= dev_priv
->rps
.max_delay
* GT_FREQUENCY_MULTIPLIER
;
1964 mutex_unlock(&dev_priv
->rps
.hw_lock
);
1970 i915_max_freq_set(void *data
, u64 val
)
1972 struct drm_device
*dev
= data
;
1973 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1976 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
1979 DRM_DEBUG_DRIVER("Manually setting max freq to %llu\n", val
);
1981 ret
= mutex_lock_interruptible(&dev_priv
->rps
.hw_lock
);
1986 * Turbo will still be enabled, but won't go above the set value.
1988 if (IS_VALLEYVIEW(dev
)) {
1989 val
= vlv_freq_opcode(dev_priv
->mem_freq
, val
);
1990 dev_priv
->rps
.max_delay
= val
;
1991 gen6_set_rps(dev
, val
);
1993 do_div(val
, GT_FREQUENCY_MULTIPLIER
);
1994 dev_priv
->rps
.max_delay
= val
;
1995 gen6_set_rps(dev
, val
);
1998 mutex_unlock(&dev_priv
->rps
.hw_lock
);
2003 DEFINE_SIMPLE_ATTRIBUTE(i915_max_freq_fops
,
2004 i915_max_freq_get
, i915_max_freq_set
,
2008 i915_min_freq_get(void *data
, u64
*val
)
2010 struct drm_device
*dev
= data
;
2011 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
2014 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
2017 ret
= mutex_lock_interruptible(&dev_priv
->rps
.hw_lock
);
2021 if (IS_VALLEYVIEW(dev
))
2022 *val
= vlv_gpu_freq(dev_priv
->mem_freq
,
2023 dev_priv
->rps
.min_delay
);
2025 *val
= dev_priv
->rps
.min_delay
* GT_FREQUENCY_MULTIPLIER
;
2026 mutex_unlock(&dev_priv
->rps
.hw_lock
);
2032 i915_min_freq_set(void *data
, u64 val
)
2034 struct drm_device
*dev
= data
;
2035 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2038 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
2041 DRM_DEBUG_DRIVER("Manually setting min freq to %llu\n", val
);
2043 ret
= mutex_lock_interruptible(&dev_priv
->rps
.hw_lock
);
2048 * Turbo will still be enabled, but won't go below the set value.
2050 if (IS_VALLEYVIEW(dev
)) {
2051 val
= vlv_freq_opcode(dev_priv
->mem_freq
, val
);
2052 dev_priv
->rps
.min_delay
= val
;
2053 valleyview_set_rps(dev
, val
);
2055 do_div(val
, GT_FREQUENCY_MULTIPLIER
);
2056 dev_priv
->rps
.min_delay
= val
;
2057 gen6_set_rps(dev
, val
);
2059 mutex_unlock(&dev_priv
->rps
.hw_lock
);
2064 DEFINE_SIMPLE_ATTRIBUTE(i915_min_freq_fops
,
2065 i915_min_freq_get
, i915_min_freq_set
,
2069 i915_cache_sharing_get(void *data
, u64
*val
)
2071 struct drm_device
*dev
= data
;
2072 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
2076 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
2079 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
2083 snpcr
= I915_READ(GEN6_MBCUNIT_SNPCR
);
2084 mutex_unlock(&dev_priv
->dev
->struct_mutex
);
2086 *val
= (snpcr
& GEN6_MBC_SNPCR_MASK
) >> GEN6_MBC_SNPCR_SHIFT
;
2092 i915_cache_sharing_set(void *data
, u64 val
)
2094 struct drm_device
*dev
= data
;
2095 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2098 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
2104 DRM_DEBUG_DRIVER("Manually setting uncore sharing to %llu\n", val
);
2106 /* Update the cache sharing policy here as well */
2107 snpcr
= I915_READ(GEN6_MBCUNIT_SNPCR
);
2108 snpcr
&= ~GEN6_MBC_SNPCR_MASK
;
2109 snpcr
|= (val
<< GEN6_MBC_SNPCR_SHIFT
);
2110 I915_WRITE(GEN6_MBCUNIT_SNPCR
, snpcr
);
2115 DEFINE_SIMPLE_ATTRIBUTE(i915_cache_sharing_fops
,
2116 i915_cache_sharing_get
, i915_cache_sharing_set
,
2119 /* As the drm_debugfs_init() routines are called before dev->dev_private is
2120 * allocated we need to hook into the minor for release. */
2122 drm_add_fake_info_node(struct drm_minor
*minor
,
2126 struct drm_info_node
*node
;
2128 node
= kmalloc(sizeof(struct drm_info_node
), GFP_KERNEL
);
2130 debugfs_remove(ent
);
2134 node
->minor
= minor
;
2136 node
->info_ent
= (void *) key
;
2138 mutex_lock(&minor
->debugfs_lock
);
2139 list_add(&node
->list
, &minor
->debugfs_list
);
2140 mutex_unlock(&minor
->debugfs_lock
);
2145 static int i915_forcewake_open(struct inode
*inode
, struct file
*file
)
2147 struct drm_device
*dev
= inode
->i_private
;
2148 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2150 if (INTEL_INFO(dev
)->gen
< 6)
2153 gen6_gt_force_wake_get(dev_priv
);
2158 static int i915_forcewake_release(struct inode
*inode
, struct file
*file
)
2160 struct drm_device
*dev
= inode
->i_private
;
2161 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2163 if (INTEL_INFO(dev
)->gen
< 6)
2166 gen6_gt_force_wake_put(dev_priv
);
2171 static const struct file_operations i915_forcewake_fops
= {
2172 .owner
= THIS_MODULE
,
2173 .open
= i915_forcewake_open
,
2174 .release
= i915_forcewake_release
,
2177 static int i915_forcewake_create(struct dentry
*root
, struct drm_minor
*minor
)
2179 struct drm_device
*dev
= minor
->dev
;
2182 ent
= debugfs_create_file("i915_forcewake_user",
2185 &i915_forcewake_fops
);
2187 return PTR_ERR(ent
);
2189 return drm_add_fake_info_node(minor
, ent
, &i915_forcewake_fops
);
2192 static int i915_debugfs_create(struct dentry
*root
,
2193 struct drm_minor
*minor
,
2195 const struct file_operations
*fops
)
2197 struct drm_device
*dev
= minor
->dev
;
2200 ent
= debugfs_create_file(name
,
2205 return PTR_ERR(ent
);
2207 return drm_add_fake_info_node(minor
, ent
, fops
);
2210 static struct drm_info_list i915_debugfs_list
[] = {
2211 {"i915_capabilities", i915_capabilities
, 0},
2212 {"i915_gem_objects", i915_gem_object_info
, 0},
2213 {"i915_gem_gtt", i915_gem_gtt_info
, 0},
2214 {"i915_gem_pinned", i915_gem_gtt_info
, 0, (void *) PINNED_LIST
},
2215 {"i915_gem_active", i915_gem_object_list_info
, 0, (void *) ACTIVE_LIST
},
2216 {"i915_gem_inactive", i915_gem_object_list_info
, 0, (void *) INACTIVE_LIST
},
2217 {"i915_gem_pageflip", i915_gem_pageflip_info
, 0},
2218 {"i915_gem_request", i915_gem_request_info
, 0},
2219 {"i915_gem_seqno", i915_gem_seqno_info
, 0},
2220 {"i915_gem_fence_regs", i915_gem_fence_regs_info
, 0},
2221 {"i915_gem_interrupt", i915_interrupt_info
, 0},
2222 {"i915_gem_hws", i915_hws_info
, 0, (void *)RCS
},
2223 {"i915_gem_hws_blt", i915_hws_info
, 0, (void *)BCS
},
2224 {"i915_gem_hws_bsd", i915_hws_info
, 0, (void *)VCS
},
2225 {"i915_rstdby_delays", i915_rstdby_delays
, 0},
2226 {"i915_cur_delayinfo", i915_cur_delayinfo
, 0},
2227 {"i915_delayfreq_table", i915_delayfreq_table
, 0},
2228 {"i915_inttoext_table", i915_inttoext_table
, 0},
2229 {"i915_drpc_info", i915_drpc_info
, 0},
2230 {"i915_emon_status", i915_emon_status
, 0},
2231 {"i915_ring_freq_table", i915_ring_freq_table
, 0},
2232 {"i915_gfxec", i915_gfxec
, 0},
2233 {"i915_fbc_status", i915_fbc_status
, 0},
2234 {"i915_sr_status", i915_sr_status
, 0},
2235 {"i915_opregion", i915_opregion
, 0},
2236 {"i915_gem_framebuffer", i915_gem_framebuffer_info
, 0},
2237 {"i915_context_status", i915_context_status
, 0},
2238 {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info
, 0},
2239 {"i915_swizzle_info", i915_swizzle_info
, 0},
2240 {"i915_ppgtt_info", i915_ppgtt_info
, 0},
2241 {"i915_dpio", i915_dpio_info
, 0},
2243 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2245 int i915_debugfs_init(struct drm_minor
*minor
)
2249 ret
= i915_debugfs_create(minor
->debugfs_root
, minor
,
2255 ret
= i915_forcewake_create(minor
->debugfs_root
, minor
);
2259 ret
= i915_debugfs_create(minor
->debugfs_root
, minor
,
2261 &i915_max_freq_fops
);
2265 ret
= i915_debugfs_create(minor
->debugfs_root
, minor
,
2267 &i915_min_freq_fops
);
2271 ret
= i915_debugfs_create(minor
->debugfs_root
, minor
,
2272 "i915_cache_sharing",
2273 &i915_cache_sharing_fops
);
2277 ret
= i915_debugfs_create(minor
->debugfs_root
, minor
,
2279 &i915_ring_stop_fops
);
2283 ret
= i915_debugfs_create(minor
->debugfs_root
, minor
,
2284 "i915_gem_drop_caches",
2285 &i915_drop_caches_fops
);
2289 ret
= i915_debugfs_create(minor
->debugfs_root
, minor
,
2291 &i915_error_state_fops
);
2295 ret
= i915_debugfs_create(minor
->debugfs_root
, minor
,
2297 &i915_next_seqno_fops
);
2301 return drm_debugfs_create_files(i915_debugfs_list
,
2302 I915_DEBUGFS_ENTRIES
,
2303 minor
->debugfs_root
, minor
);
2306 void i915_debugfs_cleanup(struct drm_minor
*minor
)
2308 drm_debugfs_remove_files(i915_debugfs_list
,
2309 I915_DEBUGFS_ENTRIES
, minor
);
2310 drm_debugfs_remove_files((struct drm_info_list
*) &i915_forcewake_fops
,
2312 drm_debugfs_remove_files((struct drm_info_list
*) &i915_wedged_fops
,
2314 drm_debugfs_remove_files((struct drm_info_list
*) &i915_max_freq_fops
,
2316 drm_debugfs_remove_files((struct drm_info_list
*) &i915_min_freq_fops
,
2318 drm_debugfs_remove_files((struct drm_info_list
*) &i915_cache_sharing_fops
,
2320 drm_debugfs_remove_files((struct drm_info_list
*) &i915_drop_caches_fops
,
2322 drm_debugfs_remove_files((struct drm_info_list
*) &i915_ring_stop_fops
,
2324 drm_debugfs_remove_files((struct drm_info_list
*) &i915_error_state_fops
,
2326 drm_debugfs_remove_files((struct drm_info_list
*) &i915_next_seqno_fops
,
2330 #endif /* CONFIG_DEBUG_FS */