projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge branch 'drm-intel-fixes' into drm-intel-next
[deliverable/linux.git] / drivers / gpu / drm / i915 / i915_debugfs.c
1 /*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
26 *
27 */
28
29 #include <linux/seq_file.h>
30 #include <linux/debugfs.h>
31 #include <linux/slab.h>
32 #include "drmP.h"
33 #include "drm.h"
34 #include "intel_drv.h"
35 #include "intel_ringbuffer.h"
36 #include "i915_drm.h"
37 #include "i915_drv.h"
38
39 #define DRM_I915_RING_DEBUG 1
40
41
42 #if defined(CONFIG_DEBUG_FS)
43
44 enum {
45 ACTIVE_LIST,
46 FLUSHING_LIST,
47 INACTIVE_LIST,
48 PINNED_LIST,
49 DEFERRED_FREE_LIST,
50 };
51
52 static const char *yesno(int v)
53 {
54 return v ? "yes" : "no";
55 }
56
57 static int i915_capabilities(struct seq_file *m, void *data)
58 {
59 struct drm_info_node *node = (struct drm_info_node *) m->private;
60 struct drm_device *dev = node->minor->dev;
61 const struct intel_device_info *info = INTEL_INFO(dev);
62
63 seq_printf(m, "gen: %d\n", info->gen);
64 #define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))
65 B(is_mobile);
66 B(is_i85x);
67 B(is_i915g);
68 B(is_i945gm);
69 B(is_g33);
70 B(need_gfx_hws);
71 B(is_g4x);
72 B(is_pineview);
73 B(is_broadwater);
74 B(is_crestline);
75 B(has_fbc);
76 B(has_rc6);
77 B(has_pipe_cxsr);
78 B(has_hotplug);
79 B(cursor_needs_physical);
80 B(has_overlay);
81 B(overlay_needs_physical);
82 B(supports_tv);
83 B(has_bsd_ring);
84 B(has_blt_ring);
85 #undef B
86
87 return 0;
88 }
89
90 static const char *get_pin_flag(struct drm_i915_gem_object *obj)
91 {
92 if (obj->user_pin_count > 0)
93 return "P";
94 else if (obj->pin_count > 0)
95 return "p";
96 else
97 return " ";
98 }
99
100 static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
101 {
102 switch (obj->tiling_mode) {
103 default:
104 case I915_TILING_NONE: return " ";
105 case I915_TILING_X: return "X";
106 case I915_TILING_Y: return "Y";
107 }
108 }
109
110 static void
111 describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
112 {
113 seq_printf(m, "%p: %s%s %8zd %04x %04x %d %d%s%s",
114 &obj->base,
115 get_pin_flag(obj),
116 get_tiling_flag(obj),
117 obj->base.size,
118 obj->base.read_domains,
119 obj->base.write_domain,
120 obj->last_rendering_seqno,
121 obj->last_fenced_seqno,
122 obj->dirty ? " dirty" : "",
123 obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
124 if (obj->base.name)
125 seq_printf(m, " (name: %d)", obj->base.name);
126 if (obj->fence_reg != I915_FENCE_REG_NONE)
127 seq_printf(m, " (fence: %d)", obj->fence_reg);
128 if (obj->gtt_space != NULL)
129 seq_printf(m, " (gtt offset: %08x, size: %08x)",
130 obj->gtt_offset, (unsigned int)obj->gtt_space->size);
131 if (obj->pin_mappable || obj->fault_mappable) {
132 char s[3], *t = s;
133 if (obj->pin_mappable)
134 *t++ = 'p';
135 if (obj->fault_mappable)
136 *t++ = 'f';
137 *t = '\0';
138 seq_printf(m, " (%s mappable)", s);
139 }
140 if (obj->ring != NULL)
141 seq_printf(m, " (%s)", obj->ring->name);
142 }
143
144 static int i915_gem_object_list_info(struct seq_file *m, void *data)
145 {
146 struct drm_info_node *node = (struct drm_info_node *) m->private;
147 uintptr_t list = (uintptr_t) node->info_ent->data;
148 struct list_head *head;
149 struct drm_device *dev = node->minor->dev;
150 drm_i915_private_t *dev_priv = dev->dev_private;
151 struct drm_i915_gem_object *obj;
152 size_t total_obj_size, total_gtt_size;
153 int count, ret;
154
155 ret = mutex_lock_interruptible(&dev->struct_mutex);
156 if (ret)
157 return ret;
158
159 switch (list) {
160 case ACTIVE_LIST:
161 seq_printf(m, "Active:\n");
162 head = &dev_priv->mm.active_list;
163 break;
164 case INACTIVE_LIST:
165 seq_printf(m, "Inactive:\n");
166 head = &dev_priv->mm.inactive_list;
167 break;
168 case PINNED_LIST:
169 seq_printf(m, "Pinned:\n");
170 head = &dev_priv->mm.pinned_list;
171 break;
172 case FLUSHING_LIST:
173 seq_printf(m, "Flushing:\n");
174 head = &dev_priv->mm.flushing_list;
175 break;
176 case DEFERRED_FREE_LIST:
177 seq_printf(m, "Deferred free:\n");
178 head = &dev_priv->mm.deferred_free_list;
179 break;
180 default:
181 mutex_unlock(&dev->struct_mutex);
182 return -EINVAL;
183 }
184
185 total_obj_size = total_gtt_size = count = 0;
186 list_for_each_entry(obj, head, mm_list) {
187 seq_printf(m, " ");
188 describe_obj(m, obj);
189 seq_printf(m, "\n");
190 total_obj_size += obj->base.size;
191 total_gtt_size += obj->gtt_space->size;
192 count++;
193 }
194 mutex_unlock(&dev->struct_mutex);
195
196 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
197 count, total_obj_size, total_gtt_size);
198 return 0;
199 }
200
201 #define count_objects(list, member) do { \
202 list_for_each_entry(obj, list, member) { \
203 size += obj->gtt_space->size; \
204 ++count; \
205 if (obj->map_and_fenceable) { \
206 mappable_size += obj->gtt_space->size; \
207 ++mappable_count; \
208 } \
209 } \
210 } while(0)
211
212 static int i915_gem_object_info(struct seq_file *m, void* data)
213 {
214 struct drm_info_node *node = (struct drm_info_node *) m->private;
215 struct drm_device *dev = node->minor->dev;
216 struct drm_i915_private *dev_priv = dev->dev_private;
217 u32 count, mappable_count;
218 size_t size, mappable_size;
219 struct drm_i915_gem_object *obj;
220 int ret;
221
222 ret = mutex_lock_interruptible(&dev->struct_mutex);
223 if (ret)
224 return ret;
225
226 seq_printf(m, "%u objects, %zu bytes\n",
227 dev_priv->mm.object_count,
228 dev_priv->mm.object_memory);
229
230 size = count = mappable_size = mappable_count = 0;
231 count_objects(&dev_priv->mm.gtt_list, gtt_list);
232 seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
233 count, mappable_count, size, mappable_size);
234
235 size = count = mappable_size = mappable_count = 0;
236 count_objects(&dev_priv->mm.active_list, mm_list);
237 count_objects(&dev_priv->mm.flushing_list, mm_list);
238 seq_printf(m, " %u [%u] active objects, %zu [%zu] bytes\n",
239 count, mappable_count, size, mappable_size);
240
241 size = count = mappable_size = mappable_count = 0;
242 count_objects(&dev_priv->mm.pinned_list, mm_list);
243 seq_printf(m, " %u [%u] pinned objects, %zu [%zu] bytes\n",
244 count, mappable_count, size, mappable_size);
245
246 size = count = mappable_size = mappable_count = 0;
247 count_objects(&dev_priv->mm.inactive_list, mm_list);
248 seq_printf(m, " %u [%u] inactive objects, %zu [%zu] bytes\n",
249 count, mappable_count, size, mappable_size);
250
251 size = count = mappable_size = mappable_count = 0;
252 count_objects(&dev_priv->mm.deferred_free_list, mm_list);
253 seq_printf(m, " %u [%u] freed objects, %zu [%zu] bytes\n",
254 count, mappable_count, size, mappable_size);
255
256 size = count = mappable_size = mappable_count = 0;
257 list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
258 if (obj->fault_mappable) {
259 size += obj->gtt_space->size;
260 ++count;
261 }
262 if (obj->pin_mappable) {
263 mappable_size += obj->gtt_space->size;
264 ++mappable_count;
265 }
266 }
267 seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
268 mappable_count, mappable_size);
269 seq_printf(m, "%u fault mappable objects, %zu bytes\n",
270 count, size);
271
272 seq_printf(m, "%zu [%zu] gtt total\n",
273 dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total);
274
275 mutex_unlock(&dev->struct_mutex);
276
277 return 0;
278 }
279
280
281 static int i915_gem_pageflip_info(struct seq_file *m, void *data)
282 {
283 struct drm_info_node *node = (struct drm_info_node *) m->private;
284 struct drm_device *dev = node->minor->dev;
285 unsigned long flags;
286 struct intel_crtc *crtc;
287
288 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
289 const char *pipe = crtc->pipe ? "B" : "A";
290 const char *plane = crtc->plane ? "B" : "A";
291 struct intel_unpin_work *work;
292
293 spin_lock_irqsave(&dev->event_lock, flags);
294 work = crtc->unpin_work;
295 if (work == NULL) {
296 seq_printf(m, "No flip due on pipe %s (plane %s)\n",
297 pipe, plane);
298 } else {
299 if (!work->pending) {
300 seq_printf(m, "Flip queued on pipe %s (plane %s)\n",
301 pipe, plane);
302 } else {
303 seq_printf(m, "Flip pending (waiting for vsync) on pipe %s (plane %s)\n",
304 pipe, plane);
305 }
306 if (work->enable_stall_check)
307 seq_printf(m, "Stall check enabled, ");
308 else
309 seq_printf(m, "Stall check waiting for page flip ioctl, ");
310 seq_printf(m, "%d prepares\n", work->pending);
311
312 if (work->old_fb_obj) {
313 struct drm_i915_gem_object *obj = work->old_fb_obj;
314 if (obj)
315 seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
316 }
317 if (work->pending_flip_obj) {
318 struct drm_i915_gem_object *obj = work->pending_flip_obj;
319 if (obj)
320 seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
321 }
322 }
323 spin_unlock_irqrestore(&dev->event_lock, flags);
324 }
325
326 return 0;
327 }
328
329 static int i915_gem_request_info(struct seq_file *m, void *data)
330 {
331 struct drm_info_node *node = (struct drm_info_node *) m->private;
332 struct drm_device *dev = node->minor->dev;
333 drm_i915_private_t *dev_priv = dev->dev_private;
334 struct drm_i915_gem_request *gem_request;
335 int ret, count;
336
337 ret = mutex_lock_interruptible(&dev->struct_mutex);
338 if (ret)
339 return ret;
340
341 count = 0;
342 if (!list_empty(&dev_priv->render_ring.request_list)) {
343 seq_printf(m, "Render requests:\n");
344 list_for_each_entry(gem_request,
345 &dev_priv->render_ring.request_list,
346 list) {
347 seq_printf(m, " %d @ %d\n",
348 gem_request->seqno,
349 (int) (jiffies - gem_request->emitted_jiffies));
350 }
351 count++;
352 }
353 if (!list_empty(&dev_priv->bsd_ring.request_list)) {
354 seq_printf(m, "BSD requests:\n");
355 list_for_each_entry(gem_request,
356 &dev_priv->bsd_ring.request_list,
357 list) {
358 seq_printf(m, " %d @ %d\n",
359 gem_request->seqno,
360 (int) (jiffies - gem_request->emitted_jiffies));
361 }
362 count++;
363 }
364 if (!list_empty(&dev_priv->blt_ring.request_list)) {
365 seq_printf(m, "BLT requests:\n");
366 list_for_each_entry(gem_request,
367 &dev_priv->blt_ring.request_list,
368 list) {
369 seq_printf(m, " %d @ %d\n",
370 gem_request->seqno,
371 (int) (jiffies - gem_request->emitted_jiffies));
372 }
373 count++;
374 }
375 mutex_unlock(&dev->struct_mutex);
376
377 if (count == 0)
378 seq_printf(m, "No requests\n");
379
380 return 0;
381 }
382
383 static void i915_ring_seqno_info(struct seq_file *m,
384 struct intel_ring_buffer *ring)
385 {
386 if (ring->get_seqno) {
387 seq_printf(m, "Current sequence (%s): %d\n",
388 ring->name, ring->get_seqno(ring));
389 seq_printf(m, "Waiter sequence (%s): %d\n",
390 ring->name, ring->waiting_seqno);
391 seq_printf(m, "IRQ sequence (%s): %d\n",
392 ring->name, ring->irq_seqno);
393 }
394 }
395
396 static int i915_gem_seqno_info(struct seq_file *m, void *data)
397 {
398 struct drm_info_node *node = (struct drm_info_node *) m->private;
399 struct drm_device *dev = node->minor->dev;
400 drm_i915_private_t *dev_priv = dev->dev_private;
401 int ret;
402
403 ret = mutex_lock_interruptible(&dev->struct_mutex);
404 if (ret)
405 return ret;
406
407 i915_ring_seqno_info(m, &dev_priv->render_ring);
408 i915_ring_seqno_info(m, &dev_priv->bsd_ring);
409 i915_ring_seqno_info(m, &dev_priv->blt_ring);
410
411 mutex_unlock(&dev->struct_mutex);
412
413 return 0;
414 }
415
416
417 static int i915_interrupt_info(struct seq_file *m, void *data)
418 {
419 struct drm_info_node *node = (struct drm_info_node *) m->private;
420 struct drm_device *dev = node->minor->dev;
421 drm_i915_private_t *dev_priv = dev->dev_private;
422 int ret;
423
424 ret = mutex_lock_interruptible(&dev->struct_mutex);
425 if (ret)
426 return ret;
427
428 if (!HAS_PCH_SPLIT(dev)) {
429 seq_printf(m, "Interrupt enable: %08x\n",
430 I915_READ(IER));
431 seq_printf(m, "Interrupt identity: %08x\n",
432 I915_READ(IIR));
433 seq_printf(m, "Interrupt mask: %08x\n",
434 I915_READ(IMR));
435 seq_printf(m, "Pipe A stat: %08x\n",
436 I915_READ(PIPEASTAT));
437 seq_printf(m, "Pipe B stat: %08x\n",
438 I915_READ(PIPEBSTAT));
439 } else {
440 seq_printf(m, "North Display Interrupt enable: %08x\n",
441 I915_READ(DEIER));
442 seq_printf(m, "North Display Interrupt identity: %08x\n",
443 I915_READ(DEIIR));
444 seq_printf(m, "North Display Interrupt mask: %08x\n",
445 I915_READ(DEIMR));
446 seq_printf(m, "South Display Interrupt enable: %08x\n",
447 I915_READ(SDEIER));
448 seq_printf(m, "South Display Interrupt identity: %08x\n",
449 I915_READ(SDEIIR));
450 seq_printf(m, "South Display Interrupt mask: %08x\n",
451 I915_READ(SDEIMR));
452 seq_printf(m, "Graphics Interrupt enable: %08x\n",
453 I915_READ(GTIER));
454 seq_printf(m, "Graphics Interrupt identity: %08x\n",
455 I915_READ(GTIIR));
456 seq_printf(m, "Graphics Interrupt mask: %08x\n",
457 I915_READ(GTIMR));
458 }
459 seq_printf(m, "Interrupts received: %d\n",
460 atomic_read(&dev_priv->irq_received));
461 i915_ring_seqno_info(m, &dev_priv->render_ring);
462 i915_ring_seqno_info(m, &dev_priv->bsd_ring);
463 i915_ring_seqno_info(m, &dev_priv->blt_ring);
464 mutex_unlock(&dev->struct_mutex);
465
466 return 0;
467 }
468
469 static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
470 {
471 struct drm_info_node *node = (struct drm_info_node *) m->private;
472 struct drm_device *dev = node->minor->dev;
473 drm_i915_private_t *dev_priv = dev->dev_private;
474 int i, ret;
475
476 ret = mutex_lock_interruptible(&dev->struct_mutex);
477 if (ret)
478 return ret;
479
480 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
481 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
482 for (i = 0; i < dev_priv->num_fence_regs; i++) {
483 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
484
485 seq_printf(m, "Fenced object[%2d] = ", i);
486 if (obj == NULL)
487 seq_printf(m, "unused");
488 else
489 describe_obj(m, obj);
490 seq_printf(m, "\n");
491 }
492
493 mutex_unlock(&dev->struct_mutex);
494 return 0;
495 }
496
497 static int i915_hws_info(struct seq_file *m, void *data)
498 {
499 struct drm_info_node *node = (struct drm_info_node *) m->private;
500 struct drm_device *dev = node->minor->dev;
501 drm_i915_private_t *dev_priv = dev->dev_private;
502 struct intel_ring_buffer *ring;
503 volatile u32 *hws;
504 int i;
505
506 switch ((uintptr_t)node->info_ent->data) {
507 case RING_RENDER: ring = &dev_priv->render_ring; break;
508 case RING_BSD: ring = &dev_priv->bsd_ring; break;
509 case RING_BLT: ring = &dev_priv->blt_ring; break;
510 default: return -EINVAL;
511 }
512
513 hws = (volatile u32 *)ring->status_page.page_addr;
514 if (hws == NULL)
515 return 0;
516
517 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
518 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
519 i * 4,
520 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
521 }
522 return 0;
523 }
524
525 static void i915_dump_object(struct seq_file *m,
526 struct io_mapping *mapping,
527 struct drm_i915_gem_object *obj)
528 {
529 int page, page_count, i;
530
531 page_count = obj->base.size / PAGE_SIZE;
532 for (page = 0; page < page_count; page++) {
533 u32 *mem = io_mapping_map_wc(mapping,
534 obj->gtt_offset + page * PAGE_SIZE);
535 for (i = 0; i < PAGE_SIZE; i += 4)
536 seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
537 io_mapping_unmap(mem);
538 }
539 }
540
541 static int i915_batchbuffer_info(struct seq_file *m, void *data)
542 {
543 struct drm_info_node *node = (struct drm_info_node *) m->private;
544 struct drm_device *dev = node->minor->dev;
545 drm_i915_private_t *dev_priv = dev->dev_private;
546 struct drm_i915_gem_object *obj;
547 int ret;
548
549 ret = mutex_lock_interruptible(&dev->struct_mutex);
550 if (ret)
551 return ret;
552
553 list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list) {
554 if (obj->base.read_domains & I915_GEM_DOMAIN_COMMAND) {
555 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
556 i915_dump_object(m, dev_priv->mm.gtt_mapping, obj);
557 }
558 }
559
560 mutex_unlock(&dev->struct_mutex);
561 return 0;
562 }
563
564 static int i915_ringbuffer_data(struct seq_file *m, void *data)
565 {
566 struct drm_info_node *node = (struct drm_info_node *) m->private;
567 struct drm_device *dev = node->minor->dev;
568 drm_i915_private_t *dev_priv = dev->dev_private;
569 struct intel_ring_buffer *ring;
570 int ret;
571
572 switch ((uintptr_t)node->info_ent->data) {
573 case RING_RENDER: ring = &dev_priv->render_ring; break;
574 case RING_BSD: ring = &dev_priv->bsd_ring; break;
575 case RING_BLT: ring = &dev_priv->blt_ring; break;
576 default: return -EINVAL;
577 }
578
579 ret = mutex_lock_interruptible(&dev->struct_mutex);
580 if (ret)
581 return ret;
582
583 if (!ring->obj) {
584 seq_printf(m, "No ringbuffer setup\n");
585 } else {
586 u8 *virt = ring->virtual_start;
587 uint32_t off;
588
589 for (off = 0; off < ring->size; off += 4) {
590 uint32_t *ptr = (uint32_t *)(virt + off);
591 seq_printf(m, "%08x : %08x\n", off, *ptr);
592 }
593 }
594 mutex_unlock(&dev->struct_mutex);
595
596 return 0;
597 }
598
599 static int i915_ringbuffer_info(struct seq_file *m, void *data)
600 {
601 struct drm_info_node *node = (struct drm_info_node *) m->private;
602 struct drm_device *dev = node->minor->dev;
603 drm_i915_private_t *dev_priv = dev->dev_private;
604 struct intel_ring_buffer *ring;
605
606 switch ((uintptr_t)node->info_ent->data) {
607 case RING_RENDER: ring = &dev_priv->render_ring; break;
608 case RING_BSD: ring = &dev_priv->bsd_ring; break;
609 case RING_BLT: ring = &dev_priv->blt_ring; break;
610 default: return -EINVAL;
611 }
612
613 if (ring->size == 0)
614 return 0;
615
616 seq_printf(m, "Ring %s:\n", ring->name);
617 seq_printf(m, " Head : %08x\n", I915_READ_HEAD(ring) & HEAD_ADDR);
618 seq_printf(m, " Tail : %08x\n", I915_READ_TAIL(ring) & TAIL_ADDR);
619 seq_printf(m, " Size : %08x\n", ring->size);
620 seq_printf(m, " Active : %08x\n", intel_ring_get_active_head(ring));
621 seq_printf(m, " Control : %08x\n", I915_READ_CTL(ring));
622 seq_printf(m, " Start : %08x\n", I915_READ_START(ring));
623
624 return 0;
625 }
626
627 static const char *ring_str(int ring)
628 {
629 switch (ring) {
630 case RING_RENDER: return " render";
631 case RING_BSD: return " bsd";
632 case RING_BLT: return " blt";
633 default: return "";
634 }
635 }
636
637 static const char *pin_flag(int pinned)
638 {
639 if (pinned > 0)
640 return " P";
641 else if (pinned < 0)
642 return " p";
643 else
644 return "";
645 }
646
647 static const char *tiling_flag(int tiling)
648 {
649 switch (tiling) {
650 default:
651 case I915_TILING_NONE: return "";
652 case I915_TILING_X: return " X";
653 case I915_TILING_Y: return " Y";
654 }
655 }
656
657 static const char *dirty_flag(int dirty)
658 {
659 return dirty ? " dirty" : "";
660 }
661
662 static const char *purgeable_flag(int purgeable)
663 {
664 return purgeable ? " purgeable" : "";
665 }
666
667 static void print_error_buffers(struct seq_file *m,
668 const char *name,
669 struct drm_i915_error_buffer *err,
670 int count)
671 {
672 seq_printf(m, "%s [%d]:\n", name, count);
673
674 while (count--) {
675 seq_printf(m, " %08x %8zd %04x %04x %08x%s%s%s%s%s",
676 err->gtt_offset,
677 err->size,
678 err->read_domains,
679 err->write_domain,
680 err->seqno,
681 pin_flag(err->pinned),
682 tiling_flag(err->tiling),
683 dirty_flag(err->dirty),
684 purgeable_flag(err->purgeable),
685 ring_str(err->ring));
686
687 if (err->name)
688 seq_printf(m, " (name: %d)", err->name);
689 if (err->fence_reg != I915_FENCE_REG_NONE)
690 seq_printf(m, " (fence: %d)", err->fence_reg);
691
692 seq_printf(m, "\n");
693 err++;
694 }
695 }
696
697 static int i915_error_state(struct seq_file *m, void *unused)
698 {
699 struct drm_info_node *node = (struct drm_info_node *) m->private;
700 struct drm_device *dev = node->minor->dev;
701 drm_i915_private_t *dev_priv = dev->dev_private;
702 struct drm_i915_error_state *error;
703 unsigned long flags;
704 int i, page, offset, elt;
705
706 spin_lock_irqsave(&dev_priv->error_lock, flags);
707 if (!dev_priv->first_error) {
708 seq_printf(m, "no error state collected\n");
709 goto out;
710 }
711
712 error = dev_priv->first_error;
713
714 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
715 error->time.tv_usec);
716 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
717 seq_printf(m, "EIR: 0x%08x\n", error->eir);
718 seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
719 if (INTEL_INFO(dev)->gen >= 6) {
720 seq_printf(m, "ERROR: 0x%08x\n", error->error);
721 seq_printf(m, "Blitter command stream:\n");
722 seq_printf(m, " ACTHD: 0x%08x\n", error->bcs_acthd);
723 seq_printf(m, " IPEIR: 0x%08x\n", error->bcs_ipeir);
724 seq_printf(m, " IPEHR: 0x%08x\n", error->bcs_ipehr);
725 seq_printf(m, " INSTDONE: 0x%08x\n", error->bcs_instdone);
726 seq_printf(m, " seqno: 0x%08x\n", error->bcs_seqno);
727 seq_printf(m, "Video (BSD) command stream:\n");
728 seq_printf(m, " ACTHD: 0x%08x\n", error->vcs_acthd);
729 seq_printf(m, " IPEIR: 0x%08x\n", error->vcs_ipeir);
730 seq_printf(m, " IPEHR: 0x%08x\n", error->vcs_ipehr);
731 seq_printf(m, " INSTDONE: 0x%08x\n", error->vcs_instdone);
732 seq_printf(m, " seqno: 0x%08x\n", error->vcs_seqno);
733 }
734 seq_printf(m, "Render command stream:\n");
735 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
736 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
737 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
738 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
739 if (INTEL_INFO(dev)->gen >= 4) {
740 seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
741 seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
742 }
743 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
744 seq_printf(m, " seqno: 0x%08x\n", error->seqno);
745
746 for (i = 0; i < 16; i++)
747 seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]);
748
749 if (error->active_bo)
750 print_error_buffers(m, "Active",
751 error->active_bo,
752 error->active_bo_count);
753
754 if (error->pinned_bo)
755 print_error_buffers(m, "Pinned",
756 error->pinned_bo,
757 error->pinned_bo_count);
758
759 for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
760 if (error->batchbuffer[i]) {
761 struct drm_i915_error_object *obj = error->batchbuffer[i];
762
763 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
764 offset = 0;
765 for (page = 0; page < obj->page_count; page++) {
766 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
767 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
768 offset += 4;
769 }
770 }
771 }
772 }
773
774 if (error->ringbuffer) {
775 struct drm_i915_error_object *obj = error->ringbuffer;
776
777 seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset);
778 offset = 0;
779 for (page = 0; page < obj->page_count; page++) {
780 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
781 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
782 offset += 4;
783 }
784 }
785 }
786
787 if (error->overlay)
788 intel_overlay_print_error_state(m, error->overlay);
789
790 if (error->display)
791 intel_display_print_error_state(m, dev, error->display);
792
793 out:
794 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
795
796 return 0;
797 }
798
799 static int i915_rstdby_delays(struct seq_file *m, void *unused)
800 {
801 struct drm_info_node *node = (struct drm_info_node *) m->private;
802 struct drm_device *dev = node->minor->dev;
803 drm_i915_private_t *dev_priv = dev->dev_private;
804 u16 crstanddelay = I915_READ16(CRSTANDVID);
805
806 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
807
808 return 0;
809 }
810
811 static int i915_cur_delayinfo(struct seq_file *m, void *unused)
812 {
813 struct drm_info_node *node = (struct drm_info_node *) m->private;
814 struct drm_device *dev = node->minor->dev;
815 drm_i915_private_t *dev_priv = dev->dev_private;
816 u16 rgvswctl = I915_READ16(MEMSWCTL);
817 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
818
819 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
820 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
821 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
822 MEMSTAT_VID_SHIFT);
823 seq_printf(m, "Current P-state: %d\n",
824 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
825
826 return 0;
827 }
828
829 static int i915_delayfreq_table(struct seq_file *m, void *unused)
830 {
831 struct drm_info_node *node = (struct drm_info_node *) m->private;
832 struct drm_device *dev = node->minor->dev;
833 drm_i915_private_t *dev_priv = dev->dev_private;
834 u32 delayfreq;
835 int i;
836
837 for (i = 0; i < 16; i++) {
838 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
839 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
840 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
841 }
842
843 return 0;
844 }
845
846 static inline int MAP_TO_MV(int map)
847 {
848 return 1250 - (map * 25);
849 }
850
851 static int i915_inttoext_table(struct seq_file *m, void *unused)
852 {
853 struct drm_info_node *node = (struct drm_info_node *) m->private;
854 struct drm_device *dev = node->minor->dev;
855 drm_i915_private_t *dev_priv = dev->dev_private;
856 u32 inttoext;
857 int i;
858
859 for (i = 1; i <= 32; i++) {
860 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
861 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
862 }
863
864 return 0;
865 }
866
867 static int i915_drpc_info(struct seq_file *m, void *unused)
868 {
869 struct drm_info_node *node = (struct drm_info_node *) m->private;
870 struct drm_device *dev = node->minor->dev;
871 drm_i915_private_t *dev_priv = dev->dev_private;
872 u32 rgvmodectl = I915_READ(MEMMODECTL);
873 u32 rstdbyctl = I915_READ(MCHBAR_RENDER_STANDBY);
874 u16 crstandvid = I915_READ16(CRSTANDVID);
875
876 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
877 "yes" : "no");
878 seq_printf(m, "Boost freq: %d\n",
879 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
880 MEMMODE_BOOST_FREQ_SHIFT);
881 seq_printf(m, "HW control enabled: %s\n",
882 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
883 seq_printf(m, "SW control enabled: %s\n",
884 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
885 seq_printf(m, "Gated voltage change: %s\n",
886 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
887 seq_printf(m, "Starting frequency: P%d\n",
888 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
889 seq_printf(m, "Max P-state: P%d\n",
890 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
891 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
892 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
893 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
894 seq_printf(m, "Render standby enabled: %s\n",
895 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
896
897 return 0;
898 }
899
900 static int i915_fbc_status(struct seq_file *m, void *unused)
901 {
902 struct drm_info_node *node = (struct drm_info_node *) m->private;
903 struct drm_device *dev = node->minor->dev;
904 drm_i915_private_t *dev_priv = dev->dev_private;
905
906 if (!I915_HAS_FBC(dev)) {
907 seq_printf(m, "FBC unsupported on this chipset\n");
908 return 0;
909 }
910
911 if (intel_fbc_enabled(dev)) {
912 seq_printf(m, "FBC enabled\n");
913 } else {
914 seq_printf(m, "FBC disabled: ");
915 switch (dev_priv->no_fbc_reason) {
916 case FBC_NO_OUTPUT:
917 seq_printf(m, "no outputs");
918 break;
919 case FBC_STOLEN_TOO_SMALL:
920 seq_printf(m, "not enough stolen memory");
921 break;
922 case FBC_UNSUPPORTED_MODE:
923 seq_printf(m, "mode not supported");
924 break;
925 case FBC_MODE_TOO_LARGE:
926 seq_printf(m, "mode too large");
927 break;
928 case FBC_BAD_PLANE:
929 seq_printf(m, "FBC unsupported on plane");
930 break;
931 case FBC_NOT_TILED:
932 seq_printf(m, "scanout buffer not tiled");
933 break;
934 case FBC_MULTIPLE_PIPES:
935 seq_printf(m, "multiple pipes are enabled");
936 break;
937 default:
938 seq_printf(m, "unknown reason");
939 }
940 seq_printf(m, "\n");
941 }
942 return 0;
943 }
944
945 static int i915_sr_status(struct seq_file *m, void *unused)
946 {
947 struct drm_info_node *node = (struct drm_info_node *) m->private;
948 struct drm_device *dev = node->minor->dev;
949 drm_i915_private_t *dev_priv = dev->dev_private;
950 bool sr_enabled = false;
951
952 if (IS_GEN5(dev))
953 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
954 else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
955 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
956 else if (IS_I915GM(dev))
957 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
958 else if (IS_PINEVIEW(dev))
959 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
960
961 seq_printf(m, "self-refresh: %s\n",
962 sr_enabled ? "enabled" : "disabled");
963
964 return 0;
965 }
966
967 static int i915_emon_status(struct seq_file *m, void *unused)
968 {
969 struct drm_info_node *node = (struct drm_info_node *) m->private;
970 struct drm_device *dev = node->minor->dev;
971 drm_i915_private_t *dev_priv = dev->dev_private;
972 unsigned long temp, chipset, gfx;
973 int ret;
974
975 ret = mutex_lock_interruptible(&dev->struct_mutex);
976 if (ret)
977 return ret;
978
979 temp = i915_mch_val(dev_priv);
980 chipset = i915_chipset_val(dev_priv);
981 gfx = i915_gfx_val(dev_priv);
982 mutex_unlock(&dev->struct_mutex);
983
984 seq_printf(m, "GMCH temp: %ld\n", temp);
985 seq_printf(m, "Chipset power: %ld\n", chipset);
986 seq_printf(m, "GFX power: %ld\n", gfx);
987 seq_printf(m, "Total power: %ld\n", chipset + gfx);
988
989 return 0;
990 }
991
992 static int i915_gfxec(struct seq_file *m, void *unused)
993 {
994 struct drm_info_node *node = (struct drm_info_node *) m->private;
995 struct drm_device *dev = node->minor->dev;
996 drm_i915_private_t *dev_priv = dev->dev_private;
997
998 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
999
1000 return 0;
1001 }
1002
1003 static int i915_opregion(struct seq_file *m, void *unused)
1004 {
1005 struct drm_info_node *node = (struct drm_info_node *) m->private;
1006 struct drm_device *dev = node->minor->dev;
1007 drm_i915_private_t *dev_priv = dev->dev_private;
1008 struct intel_opregion *opregion = &dev_priv->opregion;
1009 int ret;
1010
1011 ret = mutex_lock_interruptible(&dev->struct_mutex);
1012 if (ret)
1013 return ret;
1014
1015 if (opregion->header)
1016 seq_write(m, opregion->header, OPREGION_SIZE);
1017
1018 mutex_unlock(&dev->struct_mutex);
1019
1020 return 0;
1021 }
1022
1023 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1024 {
1025 struct drm_info_node *node = (struct drm_info_node *) m->private;
1026 struct drm_device *dev = node->minor->dev;
1027 drm_i915_private_t *dev_priv = dev->dev_private;
1028 struct intel_fbdev *ifbdev;
1029 struct intel_framebuffer *fb;
1030 int ret;
1031
1032 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1033 if (ret)
1034 return ret;
1035
1036 ifbdev = dev_priv->fbdev;
1037 fb = to_intel_framebuffer(ifbdev->helper.fb);
1038
1039 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
1040 fb->base.width,
1041 fb->base.height,
1042 fb->base.depth,
1043 fb->base.bits_per_pixel);
1044 describe_obj(m, fb->obj);
1045 seq_printf(m, "\n");
1046
1047 list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
1048 if (&fb->base == ifbdev->helper.fb)
1049 continue;
1050
1051 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
1052 fb->base.width,
1053 fb->base.height,
1054 fb->base.depth,
1055 fb->base.bits_per_pixel);
1056 describe_obj(m, fb->obj);
1057 seq_printf(m, "\n");
1058 }
1059
1060 mutex_unlock(&dev->mode_config.mutex);
1061
1062 return 0;
1063 }
1064
1065 static int
1066 i915_wedged_open(struct inode *inode,
1067 struct file *filp)
1068 {
1069 filp->private_data = inode->i_private;
1070 return 0;
1071 }
1072
1073 static ssize_t
1074 i915_wedged_read(struct file *filp,
1075 char __user *ubuf,
1076 size_t max,
1077 loff_t *ppos)
1078 {
1079 struct drm_device *dev = filp->private_data;
1080 drm_i915_private_t *dev_priv = dev->dev_private;
1081 char buf[80];
1082 int len;
1083
1084 len = snprintf(buf, sizeof (buf),
1085 "wedged : %d\n",
1086 atomic_read(&dev_priv->mm.wedged));
1087
1088 if (len > sizeof (buf))
1089 len = sizeof (buf);
1090
1091 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1092 }
1093
1094 static ssize_t
1095 i915_wedged_write(struct file *filp,
1096 const char __user *ubuf,
1097 size_t cnt,
1098 loff_t *ppos)
1099 {
1100 struct drm_device *dev = filp->private_data;
1101 char buf[20];
1102 int val = 1;
1103
1104 if (cnt > 0) {
1105 if (cnt > sizeof (buf) - 1)
1106 return -EINVAL;
1107
1108 if (copy_from_user(buf, ubuf, cnt))
1109 return -EFAULT;
1110 buf[cnt] = 0;
1111
1112 val = simple_strtoul(buf, NULL, 0);
1113 }
1114
1115 DRM_INFO("Manually setting wedged to %d\n", val);
1116 i915_handle_error(dev, val);
1117
1118 return cnt;
1119 }
1120
1121 static const struct file_operations i915_wedged_fops = {
1122 .owner = THIS_MODULE,
1123 .open = i915_wedged_open,
1124 .read = i915_wedged_read,
1125 .write = i915_wedged_write,
1126 .llseek = default_llseek,
1127 };
1128
1129 /* As the drm_debugfs_init() routines are called before dev->dev_private is
1130 * allocated we need to hook into the minor for release. */
1131 static int
1132 drm_add_fake_info_node(struct drm_minor *minor,
1133 struct dentry *ent,
1134 const void *key)
1135 {
1136 struct drm_info_node *node;
1137
1138 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
1139 if (node == NULL) {
1140 debugfs_remove(ent);
1141 return -ENOMEM;
1142 }
1143
1144 node->minor = minor;
1145 node->dent = ent;
1146 node->info_ent = (void *) key;
1147 list_add(&node->list, &minor->debugfs_nodes.list);
1148
1149 return 0;
1150 }
1151
1152 static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
1153 {
1154 struct drm_device *dev = minor->dev;
1155 struct dentry *ent;
1156
1157 ent = debugfs_create_file("i915_wedged",
1158 S_IRUGO | S_IWUSR,
1159 root, dev,
1160 &i915_wedged_fops);
1161 if (IS_ERR(ent))
1162 return PTR_ERR(ent);
1163
1164 return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
1165 }
1166
1167 static struct drm_info_list i915_debugfs_list[] = {
1168 {"i915_capabilities", i915_capabilities, 0, 0},
1169 {"i915_gem_objects", i915_gem_object_info, 0},
1170 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
1171 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
1172 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
1173 {"i915_gem_pinned", i915_gem_object_list_info, 0, (void *) PINNED_LIST},
1174 {"i915_gem_deferred_free", i915_gem_object_list_info, 0, (void *) DEFERRED_FREE_LIST},
1175 {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
1176 {"i915_gem_request", i915_gem_request_info, 0},
1177 {"i915_gem_seqno", i915_gem_seqno_info, 0},
1178 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
1179 {"i915_gem_interrupt", i915_interrupt_info, 0},
1180 {"i915_gem_hws", i915_hws_info, 0, (void *)RING_RENDER},
1181 {"i915_gem_hws_blt", i915_hws_info, 0, (void *)RING_BLT},
1182 {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)RING_BSD},
1183 {"i915_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RING_RENDER},
1184 {"i915_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RING_RENDER},
1185 {"i915_bsd_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RING_BSD},
1186 {"i915_bsd_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RING_BSD},
1187 {"i915_blt_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RING_BLT},
1188 {"i915_blt_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RING_BLT},
1189 {"i915_batchbuffers", i915_batchbuffer_info, 0},
1190 {"i915_error_state", i915_error_state, 0},
1191 {"i915_rstdby_delays", i915_rstdby_delays, 0},
1192 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
1193 {"i915_delayfreq_table", i915_delayfreq_table, 0},
1194 {"i915_inttoext_table", i915_inttoext_table, 0},
1195 {"i915_drpc_info", i915_drpc_info, 0},
1196 {"i915_emon_status", i915_emon_status, 0},
1197 {"i915_gfxec", i915_gfxec, 0},
1198 {"i915_fbc_status", i915_fbc_status, 0},
1199 {"i915_sr_status", i915_sr_status, 0},
1200 {"i915_opregion", i915_opregion, 0},
1201 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
1202 };
1203 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
1204
1205 int i915_debugfs_init(struct drm_minor *minor)
1206 {
1207 int ret;
1208
1209 ret = i915_wedged_create(minor->debugfs_root, minor);
1210 if (ret)
1211 return ret;
1212
1213 return drm_debugfs_create_files(i915_debugfs_list,
1214 I915_DEBUGFS_ENTRIES,
1215 minor->debugfs_root, minor);
1216 }
1217
1218 void i915_debugfs_cleanup(struct drm_minor *minor)
1219 {
1220 drm_debugfs_remove_files(i915_debugfs_list,
1221 I915_DEBUGFS_ENTRIES, minor);
1222 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
1223 1, minor);
1224 }
1225
1226 #endif /* CONFIG_DEBUG_FS */
Linux kernel - Deliverables
This page took 0.103762 seconds and 6 git commands to generate.